Paul Paterson / mbed-src-CanNucleoF0

mbed library sources, include can_api for nucleo-f091rc

Dependents:   CanNucleoF0_example

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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_qspi.c@645:13c87cbecd54, 2016-01-07 (annotated)

Committer:
ptpaterson
Date:
Thu Jan 07 05:49:05 2016 +0000
Revision:
645:13c87cbecd54
Parent:
610:813dcc80987e 
corrected freeze on CAN_RECEIVE_IT

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_qspi.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief QSPI HAL module driver.
mbed_official 573:ad23fe03a082 8 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 9 * functionalities of the QuadSPI interface (QSPI).
mbed_official 573:ad23fe03a082 10 * + Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 11 * + Indirect functional mode management
mbed_official 573:ad23fe03a082 12 * + Memory-mapped functional mode management
mbed_official 573:ad23fe03a082 13 * + Auto-polling functional mode management
mbed_official 573:ad23fe03a082 14 * + Interrupts and flags management
mbed_official 573:ad23fe03a082 15 * + DMA channel configuration for indirect functional mode
mbed_official 573:ad23fe03a082 16 * + Errors management and abort functionality
mbed_official 573:ad23fe03a082 17 *
mbed_official 573:ad23fe03a082 18 *
mbed_official 573:ad23fe03a082 19 @verbatim
mbed_official 573:ad23fe03a082 20 ===============================================================================
mbed_official 573:ad23fe03a082 21 ##### How to use this driver #####
mbed_official 573:ad23fe03a082 22 ===============================================================================
mbed_official 573:ad23fe03a082 23 [..]
mbed_official 573:ad23fe03a082 24 *** Initialization ***
mbed_official 573:ad23fe03a082 25 ======================
mbed_official 573:ad23fe03a082 26 [..]
mbed_official 573:ad23fe03a082 27 (#) As prerequisite, fill in the HAL_QSPI_MspInit() :
mbed_official 610:813dcc80987e 28 (++) Enable QuadSPI clock interface with __HAL_RCC_QSPI_CLK_ENABLE().
mbed_official 610:813dcc80987e 29 (++) Reset QuadSPI IP with __HAL_RCC_QSPI_FORCE_RESET() and __HAL_RCC_QSPI_RELEASE_RESET().
mbed_official 610:813dcc80987e 30 (++) Enable the clocks for the QuadSPI GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
mbed_official 610:813dcc80987e 31 (++) Configure these QuadSPI pins in alternate mode using HAL_GPIO_Init().
mbed_official 610:813dcc80987e 32 (++) If interrupt mode is used, enable and configure QuadSPI global
mbed_official 573:ad23fe03a082 33 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
mbed_official 610:813dcc80987e 34 (++) If DMA mode is used, enable the clocks for the QuadSPI DMA channel
mbed_official 573:ad23fe03a082 35 with __HAL_RCC_DMAx_CLK_ENABLE(), configure DMA with HAL_DMA_Init(),
mbed_official 573:ad23fe03a082 36 link it with QuadSPI handle using __HAL_LINKDMA(), enable and configure
mbed_official 573:ad23fe03a082 37 DMA channel global interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
mbed_official 573:ad23fe03a082 38 (#) Configure the flash size, the clock prescaler, the fifo threshold, the
mbed_official 573:ad23fe03a082 39 clock mode, the sample shifting and the CS high time using the HAL_QSPI_Init() function.
mbed_official 573:ad23fe03a082 40
mbed_official 573:ad23fe03a082 41 *** Indirect functional mode ***
mbed_official 573:ad23fe03a082 42 ================================
mbed_official 573:ad23fe03a082 43 [..]
mbed_official 573:ad23fe03a082 44 (#) Configure the command sequence using the HAL_QSPI_Command() or HAL_QSPI_Command_IT()
mbed_official 573:ad23fe03a082 45 functions :
mbed_official 610:813dcc80987e 46 (++) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 610:813dcc80987e 47 (++) Address phase : the mode used and if present the size and the address value.
mbed_official 610:813dcc80987e 48 (++) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 573:ad23fe03a082 49 bytes values.
mbed_official 610:813dcc80987e 50 (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 610:813dcc80987e 51 (++) Data phase : the mode used and if present the number of bytes.
mbed_official 610:813dcc80987e 52 (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 573:ad23fe03a082 53 if activated.
mbed_official 610:813dcc80987e 54 (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 573:ad23fe03a082 55 (#) If no data is required for the command, it is sent directly to the memory :
mbed_official 610:813dcc80987e 56 (++) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 610:813dcc80987e 57 (++) In interrupt mode, HAL_QSPI_CmdCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 58 (#) For the indirect write mode, use HAL_QSPI_Transmit(), HAL_QSPI_Transmit_DMA() or
mbed_official 573:ad23fe03a082 59 HAL_QSPI_Transmit_IT() after the command configuration :
mbed_official 610:813dcc80987e 60 (++) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 610:813dcc80987e 61 (++) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold
mbed_official 573:ad23fe03a082 62 is reached and HAL_QSPI_TxCpltCallback() will be called when the transfer is complete.
mbed_official 610:813dcc80987e 63 (++) In DMA mode, HAL_QSPI_TxHalfCpltCallback() will be called at the half transfer and
mbed_official 573:ad23fe03a082 64 HAL_QSPI_TxCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 65 (#) For the indirect read mode, use HAL_QSPI_Receive(), HAL_QSPI_Receive_DMA() or
mbed_official 573:ad23fe03a082 66 HAL_QSPI_Receive_IT() after the command configuration :
mbed_official 610:813dcc80987e 67 (++) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 610:813dcc80987e 68 (++) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold
mbed_official 573:ad23fe03a082 69 is reached and HAL_QSPI_RxCpltCallback() will be called when the transfer is complete.
mbed_official 610:813dcc80987e 70 (++) In DMA mode, HAL_QSPI_RxHalfCpltCallback() will be called at the half transfer and
mbed_official 573:ad23fe03a082 71 HAL_QSPI_RxCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 72
mbed_official 573:ad23fe03a082 73 *** Auto-polling functional mode ***
mbed_official 573:ad23fe03a082 74 ====================================
mbed_official 573:ad23fe03a082 75 [..]
mbed_official 573:ad23fe03a082 76 (#) Configure the command sequence and the auto-polling functional mode using the
mbed_official 573:ad23fe03a082 77 HAL_QSPI_AutoPolling() or HAL_QSPI_AutoPolling_IT() functions :
mbed_official 610:813dcc80987e 78 (++) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 610:813dcc80987e 79 (++) Address phase : the mode used and if present the size and the address value.
mbed_official 610:813dcc80987e 80 (++) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 573:ad23fe03a082 81 bytes values.
mbed_official 610:813dcc80987e 82 (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 610:813dcc80987e 83 (++) Data phase : the mode used.
mbed_official 610:813dcc80987e 84 (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 573:ad23fe03a082 85 if activated.
mbed_official 610:813dcc80987e 86 (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 610:813dcc80987e 87 (++) The size of the status bytes, the match value, the mask used, the match mode (OR/AND),
mbed_official 573:ad23fe03a082 88 the polling interval and the automatic stop activation.
mbed_official 573:ad23fe03a082 89 (#) After the configuration :
mbed_official 610:813dcc80987e 90 (++) In polling mode, the output of the function is done when the status match is reached. The
mbed_official 573:ad23fe03a082 91 automatic stop is activated to avoid an infinite loop.
mbed_official 610:813dcc80987e 92 (++) In interrupt mode, HAL_QSPI_StatusMatchCallback() will be called each time the status match is reached.
mbed_official 573:ad23fe03a082 93
mbed_official 573:ad23fe03a082 94 *** Memory-mapped functional mode ***
mbed_official 573:ad23fe03a082 95 =====================================
mbed_official 573:ad23fe03a082 96 [..]
mbed_official 573:ad23fe03a082 97 (#) Configure the command sequence and the memory-mapped functional mode using the
mbed_official 573:ad23fe03a082 98 HAL_QSPI_MemoryMapped() functions :
mbed_official 610:813dcc80987e 99 (++) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 610:813dcc80987e 100 (++) Address phase : the mode used and the size.
mbed_official 610:813dcc80987e 101 (++) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 573:ad23fe03a082 102 bytes values.
mbed_official 610:813dcc80987e 103 (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 610:813dcc80987e 104 (++) Data phase : the mode used.
mbed_official 610:813dcc80987e 105 (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 573:ad23fe03a082 106 if activated.
mbed_official 610:813dcc80987e 107 (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 610:813dcc80987e 108 (++) The timeout activation and the timeout period.
mbed_official 573:ad23fe03a082 109 (#) After the configuration, the QuadSPI will be used as soon as an access on the AHB is done on
mbed_official 573:ad23fe03a082 110 the address range. HAL_QSPI_TimeOutCallback() will be called when the timeout expires.
mbed_official 573:ad23fe03a082 111
mbed_official 573:ad23fe03a082 112 *** Errors management and abort functionality ***
mbed_official 573:ad23fe03a082 113 ==================================================
mbed_official 573:ad23fe03a082 114 [..]
mbed_official 573:ad23fe03a082 115 (#) HAL_QSPI_GetError() function gives the error raised during the last operation.
mbed_official 573:ad23fe03a082 116 (#) HAL_QSPI_Abort() function aborts any on-going operation and flushes the fifo.
mbed_official 573:ad23fe03a082 117 (#) HAL_QSPI_GetState() function gives the current state of the HAL QuadSPI driver.
mbed_official 573:ad23fe03a082 118
mbed_official 573:ad23fe03a082 119 *** Workarounds linked to Silicon Limitation ***
mbed_official 573:ad23fe03a082 120 ====================================================
mbed_official 573:ad23fe03a082 121 [..]
mbed_official 573:ad23fe03a082 122 (#) Workarounds Implemented inside HAL Driver
mbed_official 610:813dcc80987e 123 (++) Extra data written in the FIFO at the end of a read transfer
mbed_official 573:ad23fe03a082 124
mbed_official 573:ad23fe03a082 125 @endverbatim
mbed_official 573:ad23fe03a082 126 ******************************************************************************
mbed_official 573:ad23fe03a082 127 * @attention
mbed_official 573:ad23fe03a082 128 *
mbed_official 573:ad23fe03a082 129 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 130 *
mbed_official 573:ad23fe03a082 131 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 132 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 133 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 134 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 135 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 136 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 137 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 138 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 139 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 140 * without specific prior written permission.
mbed_official 573:ad23fe03a082 141 *
mbed_official 573:ad23fe03a082 142 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 143 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 144 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 145 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 146 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 147 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 148 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 149 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 150 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 151 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 152 *
mbed_official 573:ad23fe03a082 153 ******************************************************************************
mbed_official 573:ad23fe03a082 154 */
mbed_official 573:ad23fe03a082 155
mbed_official 573:ad23fe03a082 156 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 157 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 158
mbed_official 573:ad23fe03a082 159 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 160 * @{
mbed_official 573:ad23fe03a082 161 */
mbed_official 573:ad23fe03a082 162
mbed_official 573:ad23fe03a082 163 /** @defgroup QSPI QSPI
mbed_official 573:ad23fe03a082 164 * @brief HAL QSPI module driver
mbed_official 573:ad23fe03a082 165 * @{
mbed_official 573:ad23fe03a082 166 */
mbed_official 573:ad23fe03a082 167 #ifdef HAL_QSPI_MODULE_ENABLED
mbed_official 573:ad23fe03a082 168
mbed_official 573:ad23fe03a082 169 /* Private typedef -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 170 /* Private define ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 171 /** @addtogroup QSPI_Private_Constants
mbed_official 573:ad23fe03a082 172 * @{
mbed_official 573:ad23fe03a082 173 */
mbed_official 573:ad23fe03a082 174 #define QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE ((uint32_t)0x00000000) /*!<Indirect write mode*/
mbed_official 573:ad23fe03a082 175 #define QSPI_FUNCTIONAL_MODE_INDIRECT_READ ((uint32_t)QUADSPI_CCR_FMODE_0) /*!<Indirect read mode*/
mbed_official 573:ad23fe03a082 176 #define QSPI_FUNCTIONAL_MODE_AUTO_POLLING ((uint32_t)QUADSPI_CCR_FMODE_1) /*!<Automatic polling mode*/
mbed_official 573:ad23fe03a082 177 #define QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED ((uint32_t)QUADSPI_CCR_FMODE) /*!<Memory-mapped mode*/
mbed_official 573:ad23fe03a082 178 /**
mbed_official 573:ad23fe03a082 179 * @}
mbed_official 573:ad23fe03a082 180 */
mbed_official 573:ad23fe03a082 181
mbed_official 573:ad23fe03a082 182 /* Private macro -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 183 /** @addtogroup QSPI_Private_Macros QSPI Private Macros
mbed_official 573:ad23fe03a082 184 * @{
mbed_official 573:ad23fe03a082 185 */
mbed_official 573:ad23fe03a082 186 #define IS_QSPI_FUNCTIONAL_MODE(MODE) (((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE) || \
mbed_official 573:ad23fe03a082 187 ((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_READ) || \
mbed_official 573:ad23fe03a082 188 ((MODE) == QSPI_FUNCTIONAL_MODE_AUTO_POLLING) || \
mbed_official 573:ad23fe03a082 189 ((MODE) == QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
mbed_official 573:ad23fe03a082 190 /**
mbed_official 573:ad23fe03a082 191 * @}
mbed_official 573:ad23fe03a082 192 */
mbed_official 573:ad23fe03a082 193
mbed_official 573:ad23fe03a082 194 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 195 /* Private function prototypes -----------------------------------------------*/
mbed_official 573:ad23fe03a082 196 /** @addtogroup QSPI_Private_Functions QSPI Private Functions
mbed_official 573:ad23fe03a082 197 * @{
mbed_official 573:ad23fe03a082 198 */
mbed_official 573:ad23fe03a082 199 static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 200 static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 201 static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 202 static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 203 static void QSPI_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 204 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Timeout);
mbed_official 573:ad23fe03a082 205 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode);
mbed_official 573:ad23fe03a082 206 /**
mbed_official 573:ad23fe03a082 207 * @}
mbed_official 573:ad23fe03a082 208 */
mbed_official 573:ad23fe03a082 209
mbed_official 573:ad23fe03a082 210 /* Exported functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 211
mbed_official 573:ad23fe03a082 212 /** @defgroup QSPI_Exported_Functions QSPI Exported Functions
mbed_official 573:ad23fe03a082 213 * @{
mbed_official 573:ad23fe03a082 214 */
mbed_official 573:ad23fe03a082 215
mbed_official 573:ad23fe03a082 216 /** @defgroup QSPI_Exported_Functions_Group1 Initialization/de-initialization functions
mbed_official 573:ad23fe03a082 217 * @brief Initialization and Configuration functions
mbed_official 573:ad23fe03a082 218 *
mbed_official 573:ad23fe03a082 219 @verbatim
mbed_official 573:ad23fe03a082 220 ===============================================================================
mbed_official 573:ad23fe03a082 221 ##### Initialization and Configuration functions #####
mbed_official 573:ad23fe03a082 222 ===============================================================================
mbed_official 573:ad23fe03a082 223 [..]
mbed_official 573:ad23fe03a082 224 This subsection provides a set of functions allowing to :
mbed_official 573:ad23fe03a082 225 (+) Initialize the QuadSPI.
mbed_official 573:ad23fe03a082 226 (+) De-initialize the QuadSPI.
mbed_official 573:ad23fe03a082 227
mbed_official 573:ad23fe03a082 228 @endverbatim
mbed_official 573:ad23fe03a082 229 * @{
mbed_official 573:ad23fe03a082 230 */
mbed_official 573:ad23fe03a082 231
mbed_official 573:ad23fe03a082 232 /**
mbed_official 573:ad23fe03a082 233 * @brief Initializes the QSPI mode according to the specified parameters
mbed_official 573:ad23fe03a082 234 * in the QSPI_InitTypeDef and creates the associated handle.
mbed_official 573:ad23fe03a082 235 * @param hqspi: qspi handle
mbed_official 573:ad23fe03a082 236 * @retval HAL status
mbed_official 573:ad23fe03a082 237 */
mbed_official 573:ad23fe03a082 238 HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 239 {
mbed_official 573:ad23fe03a082 240 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 241
mbed_official 573:ad23fe03a082 242 /* Check the QSPI handle allocation */
mbed_official 573:ad23fe03a082 243 if(hqspi == NULL)
mbed_official 573:ad23fe03a082 244 {
mbed_official 573:ad23fe03a082 245 return HAL_ERROR;
mbed_official 573:ad23fe03a082 246 }
mbed_official 573:ad23fe03a082 247
mbed_official 573:ad23fe03a082 248 /* Check the parameters */
mbed_official 573:ad23fe03a082 249 assert_param(IS_QSPI_ALL_INSTANCE(hqspi->Instance));
mbed_official 573:ad23fe03a082 250 assert_param(IS_QSPI_CLOCK_PRESCALER(hqspi->Init.ClockPrescaler));
mbed_official 573:ad23fe03a082 251 assert_param(IS_QSPI_FIFO_THRESHOLD(hqspi->Init.FifoThreshold));
mbed_official 573:ad23fe03a082 252 assert_param(IS_QSPI_SSHIFT(hqspi->Init.SampleShifting));
mbed_official 573:ad23fe03a082 253 assert_param(IS_QSPI_FLASH_SIZE(hqspi->Init.FlashSize));
mbed_official 573:ad23fe03a082 254 assert_param(IS_QSPI_CS_HIGH_TIME(hqspi->Init.ChipSelectHighTime));
mbed_official 573:ad23fe03a082 255 assert_param(IS_QSPI_CLOCK_MODE(hqspi->Init.ClockMode));
mbed_official 573:ad23fe03a082 256 assert_param(IS_QSPI_DUAL_FLASH_MODE(hqspi->Init.DualFlash));
mbed_official 573:ad23fe03a082 257
mbed_official 573:ad23fe03a082 258 if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE )
mbed_official 573:ad23fe03a082 259 {
mbed_official 573:ad23fe03a082 260 assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID));
mbed_official 573:ad23fe03a082 261 }
mbed_official 573:ad23fe03a082 262
mbed_official 573:ad23fe03a082 263 /* Process locked */
mbed_official 573:ad23fe03a082 264 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 265
mbed_official 573:ad23fe03a082 266 if(hqspi->State == HAL_QSPI_STATE_RESET)
mbed_official 573:ad23fe03a082 267 {
mbed_official 573:ad23fe03a082 268 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 269 hqspi->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 270
mbed_official 573:ad23fe03a082 271 /* Init the low level hardware : GPIO, CLOCK */
mbed_official 573:ad23fe03a082 272 HAL_QSPI_MspInit(hqspi);
mbed_official 573:ad23fe03a082 273
mbed_official 573:ad23fe03a082 274 /* Configure the default timeout for the QSPI memory access */
mbed_official 573:ad23fe03a082 275 HAL_QSPI_SetTimeout(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
mbed_official 573:ad23fe03a082 276 }
mbed_official 573:ad23fe03a082 277
mbed_official 573:ad23fe03a082 278 /* Configure QSPI FIFO Threshold */
mbed_official 573:ad23fe03a082 279 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, ((hqspi->Init.FifoThreshold - 1) << 8));
mbed_official 573:ad23fe03a082 280
mbed_official 573:ad23fe03a082 281 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 282 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 283
mbed_official 573:ad23fe03a082 284 if(status == HAL_OK)
mbed_official 573:ad23fe03a082 285 {
mbed_official 573:ad23fe03a082 286
mbed_official 573:ad23fe03a082 287 /* Configure QSPI Clock Prescaler and Sample Shift */
mbed_official 573:ad23fe03a082 288 MODIFY_REG(hqspi->Instance->CR,(QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), ((hqspi->Init.ClockPrescaler << 24)| hqspi->Init.SampleShifting | hqspi->Init.FlashID| hqspi->Init.DualFlash ));
mbed_official 573:ad23fe03a082 289
mbed_official 573:ad23fe03a082 290 /* Configure QSPI Flash Size, CS High Time and Clock Mode */
mbed_official 573:ad23fe03a082 291 MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE),
mbed_official 573:ad23fe03a082 292 ((hqspi->Init.FlashSize << 16) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode));
mbed_official 573:ad23fe03a082 293
mbed_official 573:ad23fe03a082 294 /* Enable the QSPI peripheral */
mbed_official 573:ad23fe03a082 295 __HAL_QSPI_ENABLE(hqspi);
mbed_official 573:ad23fe03a082 296
mbed_official 573:ad23fe03a082 297 /* Set QSPI error code to none */
mbed_official 573:ad23fe03a082 298 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 299
mbed_official 573:ad23fe03a082 300 /* Initialize the QSPI state */
mbed_official 573:ad23fe03a082 301 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 302 }
mbed_official 573:ad23fe03a082 303
mbed_official 573:ad23fe03a082 304 /* Release Lock */
mbed_official 573:ad23fe03a082 305 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 306
mbed_official 573:ad23fe03a082 307 /* Return function status */
mbed_official 573:ad23fe03a082 308 return status;
mbed_official 573:ad23fe03a082 309 }
mbed_official 573:ad23fe03a082 310
mbed_official 573:ad23fe03a082 311 /**
mbed_official 573:ad23fe03a082 312 * @brief DeInitializes the QSPI peripheral
mbed_official 573:ad23fe03a082 313 * @param hqspi: qspi handle
mbed_official 573:ad23fe03a082 314 * @retval HAL status
mbed_official 573:ad23fe03a082 315 */
mbed_official 573:ad23fe03a082 316 HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 317 {
mbed_official 573:ad23fe03a082 318 /* Check the QSPI handle allocation */
mbed_official 573:ad23fe03a082 319 if(hqspi == NULL)
mbed_official 573:ad23fe03a082 320 {
mbed_official 573:ad23fe03a082 321 return HAL_ERROR;
mbed_official 573:ad23fe03a082 322 }
mbed_official 573:ad23fe03a082 323
mbed_official 573:ad23fe03a082 324 /* Process locked */
mbed_official 573:ad23fe03a082 325 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 326
mbed_official 573:ad23fe03a082 327 /* Disable the QSPI Peripheral Clock */
mbed_official 573:ad23fe03a082 328 __HAL_QSPI_DISABLE(hqspi);
mbed_official 573:ad23fe03a082 329
mbed_official 573:ad23fe03a082 330 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official 573:ad23fe03a082 331 HAL_QSPI_MspDeInit(hqspi);
mbed_official 573:ad23fe03a082 332
mbed_official 573:ad23fe03a082 333 /* Set QSPI error code to none */
mbed_official 573:ad23fe03a082 334 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 335
mbed_official 573:ad23fe03a082 336 /* Initialize the QSPI state */
mbed_official 573:ad23fe03a082 337 hqspi->State = HAL_QSPI_STATE_RESET;
mbed_official 573:ad23fe03a082 338
mbed_official 573:ad23fe03a082 339 /* Release Lock */
mbed_official 573:ad23fe03a082 340 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 341
mbed_official 573:ad23fe03a082 342 return HAL_OK;
mbed_official 573:ad23fe03a082 343 }
mbed_official 573:ad23fe03a082 344
mbed_official 573:ad23fe03a082 345 /**
mbed_official 573:ad23fe03a082 346 * @brief QSPI MSP Init
mbed_official 573:ad23fe03a082 347 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 348 * @retval None
mbed_official 573:ad23fe03a082 349 */
mbed_official 573:ad23fe03a082 350 __weak void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 351 {
mbed_official 573:ad23fe03a082 352 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 353 the HAL_QSPI_MspInit can be implemented in the user file
mbed_official 573:ad23fe03a082 354 */
mbed_official 573:ad23fe03a082 355 }
mbed_official 573:ad23fe03a082 356
mbed_official 573:ad23fe03a082 357 /**
mbed_official 573:ad23fe03a082 358 * @brief QSPI MSP DeInit
mbed_official 573:ad23fe03a082 359 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 360 * @retval None
mbed_official 573:ad23fe03a082 361 */
mbed_official 573:ad23fe03a082 362 __weak void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 363 {
mbed_official 573:ad23fe03a082 364 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 365 the HAL_QSPI_MspDeInit can be implemented in the user file
mbed_official 573:ad23fe03a082 366 */
mbed_official 573:ad23fe03a082 367 }
mbed_official 573:ad23fe03a082 368
mbed_official 573:ad23fe03a082 369 /**
mbed_official 573:ad23fe03a082 370 * @}
mbed_official 573:ad23fe03a082 371 */
mbed_official 573:ad23fe03a082 372
mbed_official 573:ad23fe03a082 373 /** @defgroup QSPI_Exported_Functions_Group2 IO operation functions
mbed_official 573:ad23fe03a082 374 * @brief QSPI Transmit/Receive functions
mbed_official 573:ad23fe03a082 375 *
mbed_official 573:ad23fe03a082 376 @verbatim
mbed_official 573:ad23fe03a082 377 ===============================================================================
mbed_official 610:813dcc80987e 378 ##### IO operation functions #####
mbed_official 573:ad23fe03a082 379 ===============================================================================
mbed_official 573:ad23fe03a082 380 [..]
mbed_official 573:ad23fe03a082 381 This subsection provides a set of functions allowing to :
mbed_official 573:ad23fe03a082 382 (+) Handle the interrupts.
mbed_official 573:ad23fe03a082 383 (+) Handle the command sequence.
mbed_official 573:ad23fe03a082 384 (+) Transmit data in blocking, interrupt or DMA mode.
mbed_official 573:ad23fe03a082 385 (+) Receive data in blocking, interrupt or DMA mode.
mbed_official 573:ad23fe03a082 386 (+) Manage the auto-polling functional mode.
mbed_official 573:ad23fe03a082 387 (+) Manage the memory-mapped functional mode.
mbed_official 573:ad23fe03a082 388
mbed_official 573:ad23fe03a082 389 @endverbatim
mbed_official 573:ad23fe03a082 390 * @{
mbed_official 573:ad23fe03a082 391 */
mbed_official 573:ad23fe03a082 392
mbed_official 573:ad23fe03a082 393 /**
mbed_official 573:ad23fe03a082 394 * @brief This function handles QSPI interrupt request.
mbed_official 573:ad23fe03a082 395 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 396 * @retval None.
mbed_official 573:ad23fe03a082 397 */
mbed_official 573:ad23fe03a082 398 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 399 {
mbed_official 573:ad23fe03a082 400 __IO uint32_t *data_reg;
mbed_official 573:ad23fe03a082 401 uint32_t flag = 0, itsource = 0;
mbed_official 573:ad23fe03a082 402
mbed_official 573:ad23fe03a082 403 /* QSPI FIFO Threshold interrupt occurred ----------------------------------*/
mbed_official 573:ad23fe03a082 404 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT);
mbed_official 573:ad23fe03a082 405 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_FT);
mbed_official 573:ad23fe03a082 406
mbed_official 573:ad23fe03a082 407 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 408 {
mbed_official 573:ad23fe03a082 409 data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 410
mbed_official 573:ad23fe03a082 411 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
mbed_official 573:ad23fe03a082 412 {
mbed_official 573:ad23fe03a082 413 /* Transmission process */
mbed_official 573:ad23fe03a082 414 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0)
mbed_official 573:ad23fe03a082 415 {
mbed_official 573:ad23fe03a082 416 if (hqspi->TxXferCount > 0)
mbed_official 573:ad23fe03a082 417 {
mbed_official 573:ad23fe03a082 418 /* Fill the FIFO until it is full */
mbed_official 573:ad23fe03a082 419 *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++;
mbed_official 573:ad23fe03a082 420 hqspi->TxXferCount--;
mbed_official 573:ad23fe03a082 421 }
mbed_official 573:ad23fe03a082 422 else
mbed_official 573:ad23fe03a082 423 {
mbed_official 573:ad23fe03a082 424 /* No more data available for the transfer */
mbed_official 573:ad23fe03a082 425 break;
mbed_official 573:ad23fe03a082 426 }
mbed_official 573:ad23fe03a082 427 }
mbed_official 573:ad23fe03a082 428 }
mbed_official 573:ad23fe03a082 429 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
mbed_official 573:ad23fe03a082 430 {
mbed_official 573:ad23fe03a082 431 /* Receiving Process */
mbed_official 573:ad23fe03a082 432 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0)
mbed_official 573:ad23fe03a082 433 {
mbed_official 573:ad23fe03a082 434 if (hqspi->RxXferCount > 0)
mbed_official 573:ad23fe03a082 435 {
mbed_official 573:ad23fe03a082 436 /* Read the FIFO until it is empty */
mbed_official 573:ad23fe03a082 437 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 573:ad23fe03a082 438 hqspi->RxXferCount--;
mbed_official 573:ad23fe03a082 439 }
mbed_official 573:ad23fe03a082 440 else
mbed_official 573:ad23fe03a082 441 {
mbed_official 573:ad23fe03a082 442 /* All data have been received for the transfer */
mbed_official 573:ad23fe03a082 443 break;
mbed_official 573:ad23fe03a082 444 }
mbed_official 573:ad23fe03a082 445 }
mbed_official 573:ad23fe03a082 446 }
mbed_official 573:ad23fe03a082 447
mbed_official 573:ad23fe03a082 448 /* FIFO Threshold callback */
mbed_official 573:ad23fe03a082 449 HAL_QSPI_FifoThresholdCallback(hqspi);
mbed_official 573:ad23fe03a082 450 }
mbed_official 573:ad23fe03a082 451
mbed_official 573:ad23fe03a082 452 /* QSPI Transfer Complete interrupt occurred -------------------------------*/
mbed_official 573:ad23fe03a082 453 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 454 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TC);
mbed_official 573:ad23fe03a082 455
mbed_official 573:ad23fe03a082 456 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 457 {
mbed_official 573:ad23fe03a082 458 /* Clear interrupt */
mbed_official 573:ad23fe03a082 459 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 460
mbed_official 573:ad23fe03a082 461 /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */
mbed_official 573:ad23fe03a082 462 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);
mbed_official 573:ad23fe03a082 463
mbed_official 573:ad23fe03a082 464 /* Transfer complete callback */
mbed_official 573:ad23fe03a082 465 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
mbed_official 573:ad23fe03a082 466 {
mbed_official 573:ad23fe03a082 467 /* Clear Busy bit */
mbed_official 573:ad23fe03a082 468 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 469
mbed_official 573:ad23fe03a082 470 /* TX Complete callback */
mbed_official 573:ad23fe03a082 471 HAL_QSPI_TxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 472 }
mbed_official 573:ad23fe03a082 473 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
mbed_official 573:ad23fe03a082 474 {
mbed_official 573:ad23fe03a082 475 data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 476 while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0)
mbed_official 573:ad23fe03a082 477 {
mbed_official 573:ad23fe03a082 478 if (hqspi->RxXferCount > 0)
mbed_official 573:ad23fe03a082 479 {
mbed_official 573:ad23fe03a082 480 /* Read the last data received in the FIFO until it is empty */
mbed_official 573:ad23fe03a082 481 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 573:ad23fe03a082 482 hqspi->RxXferCount--;
mbed_official 573:ad23fe03a082 483 }
mbed_official 573:ad23fe03a082 484 else
mbed_official 573:ad23fe03a082 485 {
mbed_official 573:ad23fe03a082 486 /* All data have been received for the transfer */
mbed_official 573:ad23fe03a082 487 break;
mbed_official 573:ad23fe03a082 488 }
mbed_official 573:ad23fe03a082 489 }
mbed_official 573:ad23fe03a082 490
mbed_official 573:ad23fe03a082 491 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 573:ad23fe03a082 492 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 493
mbed_official 573:ad23fe03a082 494 /* RX Complete callback */
mbed_official 573:ad23fe03a082 495 HAL_QSPI_RxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 496 }
mbed_official 573:ad23fe03a082 497 else if(hqspi->State == HAL_QSPI_STATE_BUSY)
mbed_official 573:ad23fe03a082 498 {
mbed_official 573:ad23fe03a082 499 /* Command Complete callback */
mbed_official 573:ad23fe03a082 500 HAL_QSPI_CmdCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 501 }
mbed_official 573:ad23fe03a082 502
mbed_official 573:ad23fe03a082 503 /* Change state of QSPI */
mbed_official 573:ad23fe03a082 504 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 505 }
mbed_official 573:ad23fe03a082 506
mbed_official 573:ad23fe03a082 507 /* QSPI Status Match interrupt occurred ------------------------------------*/
mbed_official 573:ad23fe03a082 508 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 573:ad23fe03a082 509 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_SM);
mbed_official 573:ad23fe03a082 510
mbed_official 573:ad23fe03a082 511 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 512 {
mbed_official 573:ad23fe03a082 513 /* Clear interrupt */
mbed_official 573:ad23fe03a082 514 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 573:ad23fe03a082 515
mbed_official 573:ad23fe03a082 516 /* Check if the automatic poll mode stop is activated */
mbed_official 573:ad23fe03a082 517 if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0)
mbed_official 573:ad23fe03a082 518 {
mbed_official 573:ad23fe03a082 519 /* Disable the QSPI FIFO Threshold, Transfer Error and Status Match Interrupts */
mbed_official 573:ad23fe03a082 520 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_FT | QSPI_IT_TE);
mbed_official 573:ad23fe03a082 521
mbed_official 573:ad23fe03a082 522 /* Change state of QSPI */
mbed_official 573:ad23fe03a082 523 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 524 }
mbed_official 573:ad23fe03a082 525
mbed_official 573:ad23fe03a082 526 /* Status match callback */
mbed_official 573:ad23fe03a082 527 HAL_QSPI_StatusMatchCallback(hqspi);
mbed_official 573:ad23fe03a082 528 }
mbed_official 573:ad23fe03a082 529
mbed_official 573:ad23fe03a082 530 /* QSPI Transfer Error interrupt occurred ----------------------------------*/
mbed_official 573:ad23fe03a082 531 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TE);
mbed_official 573:ad23fe03a082 532 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TE);
mbed_official 573:ad23fe03a082 533
mbed_official 573:ad23fe03a082 534 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 535 {
mbed_official 573:ad23fe03a082 536 /* Clear interrupt */
mbed_official 573:ad23fe03a082 537 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE);
mbed_official 573:ad23fe03a082 538
mbed_official 573:ad23fe03a082 539 /* Disable all the QSPI Interrupts */
mbed_official 573:ad23fe03a082 540 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);
mbed_official 573:ad23fe03a082 541
mbed_official 573:ad23fe03a082 542 /* Set error code */
mbed_official 573:ad23fe03a082 543 hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER;
mbed_official 573:ad23fe03a082 544
mbed_official 573:ad23fe03a082 545 /* Change state of QSPI */
mbed_official 573:ad23fe03a082 546 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 573:ad23fe03a082 547
mbed_official 573:ad23fe03a082 548 /* Error callback */
mbed_official 573:ad23fe03a082 549 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 550 }
mbed_official 573:ad23fe03a082 551
mbed_official 573:ad23fe03a082 552 /* QSPI Time out interrupt occurred -----------------------------------------*/
mbed_official 573:ad23fe03a082 553 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TO);
mbed_official 573:ad23fe03a082 554 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TO);
mbed_official 573:ad23fe03a082 555
mbed_official 573:ad23fe03a082 556 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 557 {
mbed_official 573:ad23fe03a082 558 /* Clear interrupt */
mbed_official 573:ad23fe03a082 559 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO);
mbed_official 573:ad23fe03a082 560
mbed_official 573:ad23fe03a082 561 /* Time out callback */
mbed_official 573:ad23fe03a082 562 HAL_QSPI_TimeOutCallback(hqspi);
mbed_official 573:ad23fe03a082 563 }
mbed_official 573:ad23fe03a082 564 }
mbed_official 573:ad23fe03a082 565
mbed_official 573:ad23fe03a082 566 /**
mbed_official 573:ad23fe03a082 567 * @brief Sets the command configuration.
mbed_official 573:ad23fe03a082 568 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 569 * @param cmd : structure that contains the command configuration information
mbed_official 573:ad23fe03a082 570 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 571 * @note This function is used only in Indirect Read or Write Modes
mbed_official 573:ad23fe03a082 572 * @retval HAL status
mbed_official 573:ad23fe03a082 573 */
mbed_official 573:ad23fe03a082 574 HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout)
mbed_official 573:ad23fe03a082 575 {
mbed_official 573:ad23fe03a082 576 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 577
mbed_official 573:ad23fe03a082 578 /* Check the parameters */
mbed_official 573:ad23fe03a082 579 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 580 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 581 {
mbed_official 573:ad23fe03a082 582 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 583 }
mbed_official 573:ad23fe03a082 584
mbed_official 573:ad23fe03a082 585 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 586 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 587 {
mbed_official 573:ad23fe03a082 588 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 589 }
mbed_official 573:ad23fe03a082 590
mbed_official 573:ad23fe03a082 591 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 592 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 593 {
mbed_official 573:ad23fe03a082 594 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 595 }
mbed_official 573:ad23fe03a082 596
mbed_official 573:ad23fe03a082 597 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 598 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 599
mbed_official 573:ad23fe03a082 600 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 601 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 602 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 603
mbed_official 573:ad23fe03a082 604 /* Process locked */
mbed_official 573:ad23fe03a082 605 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 606
mbed_official 573:ad23fe03a082 607 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 608 {
mbed_official 573:ad23fe03a082 609 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 610
mbed_official 573:ad23fe03a082 611 /* Update QSPI state */
mbed_official 573:ad23fe03a082 612 hqspi->State = HAL_QSPI_STATE_BUSY;
mbed_official 573:ad23fe03a082 613
mbed_official 573:ad23fe03a082 614 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 615 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout);
mbed_official 573:ad23fe03a082 616
mbed_official 573:ad23fe03a082 617 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 618 {
mbed_official 573:ad23fe03a082 619 /* Call the configuration function */
mbed_official 573:ad23fe03a082 620 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 621
mbed_official 573:ad23fe03a082 622 if (cmd->DataMode == QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 623 {
mbed_official 573:ad23fe03a082 624 /* When there is no data phase, the transfer start as soon as the configuration is done
mbed_official 573:ad23fe03a082 625 so wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 626 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 627 {
mbed_official 573:ad23fe03a082 628 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 629 }
mbed_official 573:ad23fe03a082 630 else
mbed_official 573:ad23fe03a082 631 {
mbed_official 573:ad23fe03a082 632 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 633
mbed_official 573:ad23fe03a082 634 /* Update QSPI state */
mbed_official 573:ad23fe03a082 635 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 636 }
mbed_official 573:ad23fe03a082 637
mbed_official 573:ad23fe03a082 638 }
mbed_official 573:ad23fe03a082 639 else
mbed_official 573:ad23fe03a082 640 {
mbed_official 573:ad23fe03a082 641 /* Update QSPI state */
mbed_official 573:ad23fe03a082 642 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 643 }
mbed_official 573:ad23fe03a082 644 }
mbed_official 573:ad23fe03a082 645 }
mbed_official 573:ad23fe03a082 646 else
mbed_official 573:ad23fe03a082 647 {
mbed_official 573:ad23fe03a082 648 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 649 }
mbed_official 573:ad23fe03a082 650
mbed_official 573:ad23fe03a082 651 /* Process unlocked */
mbed_official 573:ad23fe03a082 652 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 653
mbed_official 573:ad23fe03a082 654 /* Return function status */
mbed_official 573:ad23fe03a082 655 return status;
mbed_official 573:ad23fe03a082 656 }
mbed_official 573:ad23fe03a082 657
mbed_official 573:ad23fe03a082 658 /**
mbed_official 573:ad23fe03a082 659 * @brief Sets the command configuration in interrupt mode.
mbed_official 573:ad23fe03a082 660 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 661 * @param cmd : structure that contains the command configuration information
mbed_official 573:ad23fe03a082 662 * @note This function is used only in Indirect Read or Write Modes
mbed_official 573:ad23fe03a082 663 * @retval HAL status
mbed_official 573:ad23fe03a082 664 */
mbed_official 573:ad23fe03a082 665 HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd)
mbed_official 573:ad23fe03a082 666 {
mbed_official 573:ad23fe03a082 667 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 668
mbed_official 573:ad23fe03a082 669 /* Check the parameters */
mbed_official 573:ad23fe03a082 670 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 671 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 672 {
mbed_official 573:ad23fe03a082 673 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 674 }
mbed_official 573:ad23fe03a082 675
mbed_official 573:ad23fe03a082 676 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 677 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 678 {
mbed_official 573:ad23fe03a082 679 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 680 }
mbed_official 573:ad23fe03a082 681
mbed_official 573:ad23fe03a082 682 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 683 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 684 {
mbed_official 573:ad23fe03a082 685 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 686 }
mbed_official 573:ad23fe03a082 687
mbed_official 573:ad23fe03a082 688 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 689 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 690
mbed_official 573:ad23fe03a082 691 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 692 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 693 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 694
mbed_official 573:ad23fe03a082 695 /* Process locked */
mbed_official 573:ad23fe03a082 696 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 697
mbed_official 573:ad23fe03a082 698 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 699 {
mbed_official 573:ad23fe03a082 700 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 701
mbed_official 573:ad23fe03a082 702 /* Update QSPI state */
mbed_official 573:ad23fe03a082 703 hqspi->State = HAL_QSPI_STATE_BUSY;
mbed_official 573:ad23fe03a082 704
mbed_official 573:ad23fe03a082 705 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 706 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 707
mbed_official 573:ad23fe03a082 708 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 709 {
mbed_official 573:ad23fe03a082 710 if (cmd->DataMode == QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 711 {
mbed_official 573:ad23fe03a082 712 /* When there is no data phase, the transfer start as soon as the configuration is done
mbed_official 573:ad23fe03a082 713 so activate TC and TE interrupts */
mbed_official 573:ad23fe03a082 714 /* Enable the QSPI Transfer Error Interrupt */
mbed_official 573:ad23fe03a082 715 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC);
mbed_official 573:ad23fe03a082 716 }
mbed_official 573:ad23fe03a082 717
mbed_official 573:ad23fe03a082 718 /* Call the configuration function */
mbed_official 573:ad23fe03a082 719 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 720
mbed_official 573:ad23fe03a082 721 if (cmd->DataMode != QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 722 {
mbed_official 573:ad23fe03a082 723 /* Update QSPI state */
mbed_official 573:ad23fe03a082 724 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 725 }
mbed_official 573:ad23fe03a082 726 }
mbed_official 573:ad23fe03a082 727 }
mbed_official 573:ad23fe03a082 728 else
mbed_official 573:ad23fe03a082 729 {
mbed_official 573:ad23fe03a082 730 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 731 }
mbed_official 573:ad23fe03a082 732
mbed_official 573:ad23fe03a082 733 /* Process unlocked */
mbed_official 573:ad23fe03a082 734 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 735
mbed_official 573:ad23fe03a082 736 /* Return function status */
mbed_official 573:ad23fe03a082 737 return status;
mbed_official 573:ad23fe03a082 738 }
mbed_official 573:ad23fe03a082 739
mbed_official 573:ad23fe03a082 740 /**
mbed_official 573:ad23fe03a082 741 * @brief Transmit an amount of data in blocking mode.
mbed_official 573:ad23fe03a082 742 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 743 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 744 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 745 * @note This function is used only in Indirect Write Mode
mbed_official 573:ad23fe03a082 746 * @retval HAL status
mbed_official 573:ad23fe03a082 747 */
mbed_official 573:ad23fe03a082 748 HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 749 {
mbed_official 573:ad23fe03a082 750 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 751 __IO uint32_t *data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 752
mbed_official 573:ad23fe03a082 753 /* Process locked */
mbed_official 573:ad23fe03a082 754 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 755
mbed_official 573:ad23fe03a082 756 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 757 {
mbed_official 573:ad23fe03a082 758 if(pData != NULL )
mbed_official 573:ad23fe03a082 759 {
mbed_official 573:ad23fe03a082 760 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 761
mbed_official 573:ad23fe03a082 762 /* Update state */
mbed_official 573:ad23fe03a082 763 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 573:ad23fe03a082 764
mbed_official 573:ad23fe03a082 765 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 766 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 767 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 768 hqspi->pTxBuffPtr = pData;
mbed_official 573:ad23fe03a082 769
mbed_official 573:ad23fe03a082 770 /* Configure QSPI: CCR register with functional as indirect write */
mbed_official 573:ad23fe03a082 771 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 772
mbed_official 573:ad23fe03a082 773 while(hqspi->TxXferCount > 0)
mbed_official 573:ad23fe03a082 774 {
mbed_official 573:ad23fe03a082 775 /* Wait until FT flag is set to send data */
mbed_official 573:ad23fe03a082 776 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 777 {
mbed_official 573:ad23fe03a082 778 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 779 break;
mbed_official 573:ad23fe03a082 780 }
mbed_official 573:ad23fe03a082 781
mbed_official 573:ad23fe03a082 782 *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++;
mbed_official 573:ad23fe03a082 783 hqspi->TxXferCount--;
mbed_official 573:ad23fe03a082 784 }
mbed_official 573:ad23fe03a082 785
mbed_official 573:ad23fe03a082 786 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 787 {
mbed_official 573:ad23fe03a082 788 /* Wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 789 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 790 {
mbed_official 573:ad23fe03a082 791 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 792 }
mbed_official 573:ad23fe03a082 793 else
mbed_official 573:ad23fe03a082 794 {
mbed_official 573:ad23fe03a082 795 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 796 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 797
mbed_official 573:ad23fe03a082 798 /* Clear Busy bit */
mbed_official 573:ad23fe03a082 799 status = HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 800 }
mbed_official 573:ad23fe03a082 801 }
mbed_official 573:ad23fe03a082 802
mbed_official 573:ad23fe03a082 803 /* Update QSPI state */
mbed_official 573:ad23fe03a082 804 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 805 }
mbed_official 573:ad23fe03a082 806 else
mbed_official 573:ad23fe03a082 807 {
mbed_official 573:ad23fe03a082 808 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 809 }
mbed_official 573:ad23fe03a082 810 }
mbed_official 573:ad23fe03a082 811 else
mbed_official 573:ad23fe03a082 812 {
mbed_official 573:ad23fe03a082 813 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 814 }
mbed_official 573:ad23fe03a082 815
mbed_official 573:ad23fe03a082 816 /* Process unlocked */
mbed_official 573:ad23fe03a082 817 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 818
mbed_official 573:ad23fe03a082 819 return status;
mbed_official 573:ad23fe03a082 820 }
mbed_official 573:ad23fe03a082 821
mbed_official 573:ad23fe03a082 822
mbed_official 573:ad23fe03a082 823 /**
mbed_official 573:ad23fe03a082 824 * @brief Receive an amount of data in blocking mode
mbed_official 573:ad23fe03a082 825 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 826 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 827 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 828 * @note This function is used only in Indirect Read Mode
mbed_official 573:ad23fe03a082 829 * @retval HAL status
mbed_official 573:ad23fe03a082 830 */
mbed_official 573:ad23fe03a082 831 HAL_StatusTypeDef HAL_QSPI_Receive(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 832 {
mbed_official 573:ad23fe03a082 833 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 834 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 573:ad23fe03a082 835 __IO uint32_t *data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 836
mbed_official 573:ad23fe03a082 837 /* Process locked */
mbed_official 573:ad23fe03a082 838 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 839
mbed_official 573:ad23fe03a082 840 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 841 {
mbed_official 573:ad23fe03a082 842 if(pData != NULL )
mbed_official 573:ad23fe03a082 843 {
mbed_official 573:ad23fe03a082 844 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 845
mbed_official 573:ad23fe03a082 846 /* Update state */
mbed_official 573:ad23fe03a082 847 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 573:ad23fe03a082 848
mbed_official 573:ad23fe03a082 849 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 850 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 851 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 852 hqspi->pRxBuffPtr = pData;
mbed_official 573:ad23fe03a082 853
mbed_official 573:ad23fe03a082 854 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 573:ad23fe03a082 855 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 573:ad23fe03a082 856
mbed_official 573:ad23fe03a082 857 /* Start the transfer by re-writing the address in AR register */
mbed_official 573:ad23fe03a082 858 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 573:ad23fe03a082 859
mbed_official 573:ad23fe03a082 860 while(hqspi->RxXferCount > 0)
mbed_official 573:ad23fe03a082 861 {
mbed_official 573:ad23fe03a082 862 /* Wait until FT or TC flag is set to read received data */
mbed_official 573:ad23fe03a082 863 if(QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 864 {
mbed_official 573:ad23fe03a082 865 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 866 break;
mbed_official 573:ad23fe03a082 867 }
mbed_official 573:ad23fe03a082 868
mbed_official 573:ad23fe03a082 869 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 573:ad23fe03a082 870 hqspi->RxXferCount--;
mbed_official 573:ad23fe03a082 871 }
mbed_official 573:ad23fe03a082 872
mbed_official 573:ad23fe03a082 873 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 874 {
mbed_official 573:ad23fe03a082 875 /* Wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 876 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 877 {
mbed_official 573:ad23fe03a082 878 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 879 }
mbed_official 573:ad23fe03a082 880 else
mbed_official 573:ad23fe03a082 881 {
mbed_official 573:ad23fe03a082 882 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 883 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 884
mbed_official 573:ad23fe03a082 885 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 573:ad23fe03a082 886 status = HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 887 }
mbed_official 573:ad23fe03a082 888 }
mbed_official 573:ad23fe03a082 889
mbed_official 573:ad23fe03a082 890 /* Update QSPI state */
mbed_official 573:ad23fe03a082 891 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 892 }
mbed_official 573:ad23fe03a082 893 else
mbed_official 573:ad23fe03a082 894 {
mbed_official 573:ad23fe03a082 895 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 896 }
mbed_official 573:ad23fe03a082 897 }
mbed_official 573:ad23fe03a082 898 else
mbed_official 573:ad23fe03a082 899 {
mbed_official 573:ad23fe03a082 900 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 901 }
mbed_official 573:ad23fe03a082 902
mbed_official 573:ad23fe03a082 903 /* Process unlocked */
mbed_official 573:ad23fe03a082 904 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 905
mbed_official 573:ad23fe03a082 906 return status;
mbed_official 573:ad23fe03a082 907 }
mbed_official 573:ad23fe03a082 908
mbed_official 573:ad23fe03a082 909 /**
mbed_official 573:ad23fe03a082 910 * @brief Send an amount of data in interrupt mode
mbed_official 573:ad23fe03a082 911 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 912 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 913 * @note This function is used only in Indirect Write Mode
mbed_official 573:ad23fe03a082 914 * @retval HAL status
mbed_official 573:ad23fe03a082 915 */
mbed_official 573:ad23fe03a082 916 HAL_StatusTypeDef HAL_QSPI_Transmit_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 917 {
mbed_official 573:ad23fe03a082 918 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 919
mbed_official 573:ad23fe03a082 920 /* Process locked */
mbed_official 573:ad23fe03a082 921 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 922
mbed_official 573:ad23fe03a082 923 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 924 {
mbed_official 573:ad23fe03a082 925 if(pData != NULL )
mbed_official 573:ad23fe03a082 926 {
mbed_official 573:ad23fe03a082 927 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 928
mbed_official 573:ad23fe03a082 929 /* Update state */
mbed_official 573:ad23fe03a082 930 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 573:ad23fe03a082 931
mbed_official 573:ad23fe03a082 932 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 933 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 934 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 935 hqspi->pTxBuffPtr = pData;
mbed_official 573:ad23fe03a082 936
mbed_official 573:ad23fe03a082 937 /* Configure QSPI: CCR register with functional as indirect write */
mbed_official 573:ad23fe03a082 938 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 939
mbed_official 573:ad23fe03a082 940 /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */
mbed_official 573:ad23fe03a082 941 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
mbed_official 573:ad23fe03a082 942
mbed_official 573:ad23fe03a082 943 }
mbed_official 573:ad23fe03a082 944 else
mbed_official 573:ad23fe03a082 945 {
mbed_official 573:ad23fe03a082 946 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 947 }
mbed_official 573:ad23fe03a082 948 }
mbed_official 573:ad23fe03a082 949 else
mbed_official 573:ad23fe03a082 950 {
mbed_official 573:ad23fe03a082 951 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 952 }
mbed_official 573:ad23fe03a082 953
mbed_official 573:ad23fe03a082 954 /* Process unlocked */
mbed_official 573:ad23fe03a082 955 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 956
mbed_official 573:ad23fe03a082 957 return status;
mbed_official 573:ad23fe03a082 958 }
mbed_official 573:ad23fe03a082 959
mbed_official 573:ad23fe03a082 960 /**
mbed_official 573:ad23fe03a082 961 * @brief Receive an amount of data in no-blocking mode with Interrupt
mbed_official 573:ad23fe03a082 962 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 963 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 964 * @note This function is used only in Indirect Read Mode
mbed_official 573:ad23fe03a082 965 * @retval HAL status
mbed_official 573:ad23fe03a082 966 */
mbed_official 573:ad23fe03a082 967 HAL_StatusTypeDef HAL_QSPI_Receive_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 968 {
mbed_official 573:ad23fe03a082 969 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 970 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 573:ad23fe03a082 971
mbed_official 573:ad23fe03a082 972 /* Process locked */
mbed_official 573:ad23fe03a082 973 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 974
mbed_official 573:ad23fe03a082 975 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 976 {
mbed_official 573:ad23fe03a082 977 if(pData != NULL )
mbed_official 573:ad23fe03a082 978 {
mbed_official 573:ad23fe03a082 979 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 980
mbed_official 573:ad23fe03a082 981 /* Update state */
mbed_official 573:ad23fe03a082 982 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 573:ad23fe03a082 983
mbed_official 573:ad23fe03a082 984 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 985 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 986 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 987 hqspi->pRxBuffPtr = pData;
mbed_official 573:ad23fe03a082 988
mbed_official 573:ad23fe03a082 989 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 573:ad23fe03a082 990 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 573:ad23fe03a082 991
mbed_official 573:ad23fe03a082 992 /* Start the transfer by re-writing the address in AR register */
mbed_official 573:ad23fe03a082 993 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 573:ad23fe03a082 994
mbed_official 573:ad23fe03a082 995 /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */
mbed_official 573:ad23fe03a082 996 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
mbed_official 573:ad23fe03a082 997 }
mbed_official 573:ad23fe03a082 998 else
mbed_official 573:ad23fe03a082 999 {
mbed_official 573:ad23fe03a082 1000 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1001 }
mbed_official 573:ad23fe03a082 1002 }
mbed_official 573:ad23fe03a082 1003 else
mbed_official 573:ad23fe03a082 1004 {
mbed_official 573:ad23fe03a082 1005 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1006 }
mbed_official 573:ad23fe03a082 1007
mbed_official 573:ad23fe03a082 1008 /* Process unlocked */
mbed_official 573:ad23fe03a082 1009 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1010
mbed_official 573:ad23fe03a082 1011 return status;
mbed_official 573:ad23fe03a082 1012 }
mbed_official 573:ad23fe03a082 1013
mbed_official 573:ad23fe03a082 1014 /**
mbed_official 573:ad23fe03a082 1015 * @brief Sends an amount of data in non blocking mode with DMA.
mbed_official 573:ad23fe03a082 1016 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1017 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 1018 * @note This function is used only in Indirect Write Mode
mbed_official 573:ad23fe03a082 1019 * @retval HAL status
mbed_official 573:ad23fe03a082 1020 */
mbed_official 573:ad23fe03a082 1021 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 1022 {
mbed_official 573:ad23fe03a082 1023 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 1024 uint32_t *tmp;
mbed_official 573:ad23fe03a082 1025
mbed_official 573:ad23fe03a082 1026 /* Process locked */
mbed_official 573:ad23fe03a082 1027 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1028
mbed_official 573:ad23fe03a082 1029 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1030 {
mbed_official 573:ad23fe03a082 1031 if(pData != NULL )
mbed_official 573:ad23fe03a082 1032 {
mbed_official 573:ad23fe03a082 1033 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1034
mbed_official 573:ad23fe03a082 1035 /* Update state */
mbed_official 573:ad23fe03a082 1036 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 573:ad23fe03a082 1037
mbed_official 573:ad23fe03a082 1038 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 1039 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1040 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1041 hqspi->pTxBuffPtr = pData;
mbed_official 573:ad23fe03a082 1042
mbed_official 573:ad23fe03a082 1043 /* Configure QSPI: CCR register with functional mode as indirect write */
mbed_official 573:ad23fe03a082 1044 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 1045
mbed_official 573:ad23fe03a082 1046 /* Set the QSPI DMA transfer complete callback */
mbed_official 573:ad23fe03a082 1047 hqspi->hdma->XferCpltCallback = QSPI_DMATxCplt;
mbed_official 573:ad23fe03a082 1048
mbed_official 573:ad23fe03a082 1049 /* Set the QSPI DMA Half transfer complete callback */
mbed_official 573:ad23fe03a082 1050 hqspi->hdma->XferHalfCpltCallback = QSPI_DMATxHalfCplt;
mbed_official 573:ad23fe03a082 1051
mbed_official 573:ad23fe03a082 1052 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1053 hqspi->hdma->XferErrorCallback = QSPI_DMAError;
mbed_official 573:ad23fe03a082 1054
mbed_official 573:ad23fe03a082 1055 /* Configure the direction of the DMA */
mbed_official 573:ad23fe03a082 1056 hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH;
mbed_official 573:ad23fe03a082 1057 MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction);
mbed_official 573:ad23fe03a082 1058
mbed_official 573:ad23fe03a082 1059 /* Enable the QSPI transmit DMA Channel */
mbed_official 573:ad23fe03a082 1060 tmp = (uint32_t*)&pData;
mbed_official 573:ad23fe03a082 1061 HAL_DMA_Start_IT(hqspi->hdma, *(uint32_t*)tmp, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize);
mbed_official 573:ad23fe03a082 1062
mbed_official 573:ad23fe03a082 1063 /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1064 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1065 }
mbed_official 573:ad23fe03a082 1066 else
mbed_official 573:ad23fe03a082 1067 {
mbed_official 573:ad23fe03a082 1068 status = HAL_OK;
mbed_official 573:ad23fe03a082 1069 }
mbed_official 573:ad23fe03a082 1070 }
mbed_official 573:ad23fe03a082 1071 else
mbed_official 573:ad23fe03a082 1072 {
mbed_official 573:ad23fe03a082 1073 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1074 }
mbed_official 573:ad23fe03a082 1075
mbed_official 573:ad23fe03a082 1076 /* Process unlocked */
mbed_official 573:ad23fe03a082 1077 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1078
mbed_official 573:ad23fe03a082 1079 return status;
mbed_official 573:ad23fe03a082 1080 }
mbed_official 573:ad23fe03a082 1081
mbed_official 573:ad23fe03a082 1082 /**
mbed_official 573:ad23fe03a082 1083 * @brief Receives an amount of data in non blocking mode with DMA.
mbed_official 573:ad23fe03a082 1084 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1085 * @param pData: pointer to data buffer.
mbed_official 573:ad23fe03a082 1086 * @note This function is used only in Indirect Read Mode
mbed_official 573:ad23fe03a082 1087 * @retval HAL status
mbed_official 573:ad23fe03a082 1088 */
mbed_official 573:ad23fe03a082 1089 HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 1090 {
mbed_official 573:ad23fe03a082 1091 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 1092 uint32_t *tmp;
mbed_official 573:ad23fe03a082 1093 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 573:ad23fe03a082 1094
mbed_official 573:ad23fe03a082 1095 /* Process locked */
mbed_official 573:ad23fe03a082 1096 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1097
mbed_official 573:ad23fe03a082 1098 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1099 {
mbed_official 573:ad23fe03a082 1100 if(pData != NULL )
mbed_official 573:ad23fe03a082 1101 {
mbed_official 573:ad23fe03a082 1102 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1103
mbed_official 573:ad23fe03a082 1104 /* Update state */
mbed_official 573:ad23fe03a082 1105 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 573:ad23fe03a082 1106
mbed_official 573:ad23fe03a082 1107 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 1108 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1109 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1110 hqspi->pRxBuffPtr = pData;
mbed_official 573:ad23fe03a082 1111
mbed_official 573:ad23fe03a082 1112 /* Set the QSPI DMA transfer complete callback */
mbed_official 573:ad23fe03a082 1113 hqspi->hdma->XferCpltCallback = QSPI_DMARxCplt;
mbed_official 573:ad23fe03a082 1114
mbed_official 573:ad23fe03a082 1115 /* Set the QSPI DMA Half transfer complete callback */
mbed_official 573:ad23fe03a082 1116 hqspi->hdma->XferHalfCpltCallback = QSPI_DMARxHalfCplt;
mbed_official 573:ad23fe03a082 1117
mbed_official 573:ad23fe03a082 1118 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1119 hqspi->hdma->XferErrorCallback = QSPI_DMAError;
mbed_official 573:ad23fe03a082 1120
mbed_official 573:ad23fe03a082 1121 /* Configure the direction of the DMA */
mbed_official 573:ad23fe03a082 1122 hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY;
mbed_official 573:ad23fe03a082 1123 MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction);
mbed_official 573:ad23fe03a082 1124
mbed_official 573:ad23fe03a082 1125 /* Enable the DMA Channel */
mbed_official 573:ad23fe03a082 1126 tmp = (uint32_t*)&pData;
mbed_official 573:ad23fe03a082 1127 HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, *(uint32_t*)tmp, hqspi->RxXferSize);
mbed_official 573:ad23fe03a082 1128
mbed_official 573:ad23fe03a082 1129 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 573:ad23fe03a082 1130 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 573:ad23fe03a082 1131
mbed_official 573:ad23fe03a082 1132 /* Start the transfer by re-writing the address in AR register */
mbed_official 573:ad23fe03a082 1133 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 573:ad23fe03a082 1134
mbed_official 573:ad23fe03a082 1135 /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1136 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1137 }
mbed_official 573:ad23fe03a082 1138 else
mbed_official 573:ad23fe03a082 1139 {
mbed_official 573:ad23fe03a082 1140 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1141 }
mbed_official 573:ad23fe03a082 1142 }
mbed_official 573:ad23fe03a082 1143 else
mbed_official 573:ad23fe03a082 1144 {
mbed_official 573:ad23fe03a082 1145 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1146 }
mbed_official 573:ad23fe03a082 1147
mbed_official 573:ad23fe03a082 1148 /* Process unlocked */
mbed_official 573:ad23fe03a082 1149 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1150
mbed_official 573:ad23fe03a082 1151 return status;
mbed_official 573:ad23fe03a082 1152 }
mbed_official 573:ad23fe03a082 1153
mbed_official 573:ad23fe03a082 1154 /**
mbed_official 573:ad23fe03a082 1155 * @brief Configure the QSPI Automatic Polling Mode in blocking mode.
mbed_official 573:ad23fe03a082 1156 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1157 * @param cmd: structure that contains the command configuration information.
mbed_official 573:ad23fe03a082 1158 * @param cfg: structure that contains the polling configuration information.
mbed_official 573:ad23fe03a082 1159 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 1160 * @note This function is used only in Automatic Polling Mode
mbed_official 573:ad23fe03a082 1161 * @retval HAL status
mbed_official 573:ad23fe03a082 1162 */
mbed_official 573:ad23fe03a082 1163 HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1164 {
mbed_official 573:ad23fe03a082 1165 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1166
mbed_official 573:ad23fe03a082 1167 /* Check the parameters */
mbed_official 573:ad23fe03a082 1168 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 1169 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1170 {
mbed_official 573:ad23fe03a082 1171 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 1172 }
mbed_official 573:ad23fe03a082 1173
mbed_official 573:ad23fe03a082 1174 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 1175 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1176 {
mbed_official 573:ad23fe03a082 1177 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 1178 }
mbed_official 573:ad23fe03a082 1179
mbed_official 573:ad23fe03a082 1180 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 1181 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1182 {
mbed_official 573:ad23fe03a082 1183 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 1184 }
mbed_official 573:ad23fe03a082 1185
mbed_official 573:ad23fe03a082 1186 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 1187 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 1188
mbed_official 573:ad23fe03a082 1189 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 1190 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 1191 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 1192
mbed_official 573:ad23fe03a082 1193 assert_param(IS_QSPI_INTERVAL(cfg->Interval));
mbed_official 573:ad23fe03a082 1194 assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
mbed_official 573:ad23fe03a082 1195 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
mbed_official 573:ad23fe03a082 1196
mbed_official 573:ad23fe03a082 1197 /* Process locked */
mbed_official 573:ad23fe03a082 1198 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1199
mbed_official 573:ad23fe03a082 1200 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1201 {
mbed_official 573:ad23fe03a082 1202
mbed_official 573:ad23fe03a082 1203 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1204
mbed_official 573:ad23fe03a082 1205 /* Update state */
mbed_official 573:ad23fe03a082 1206 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;
mbed_official 573:ad23fe03a082 1207
mbed_official 573:ad23fe03a082 1208 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 1209 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout);
mbed_official 573:ad23fe03a082 1210
mbed_official 573:ad23fe03a082 1211 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 1212 {
mbed_official 573:ad23fe03a082 1213 /* Configure QSPI: PSMAR register with the status match value */
mbed_official 573:ad23fe03a082 1214 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);
mbed_official 573:ad23fe03a082 1215
mbed_official 573:ad23fe03a082 1216 /* Configure QSPI: PSMKR register with the status mask value */
mbed_official 573:ad23fe03a082 1217 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);
mbed_official 573:ad23fe03a082 1218
mbed_official 573:ad23fe03a082 1219 /* Configure QSPI: PIR register with the interval value */
mbed_official 573:ad23fe03a082 1220 WRITE_REG(hqspi->Instance->PIR, cfg->Interval);
mbed_official 573:ad23fe03a082 1221
mbed_official 573:ad23fe03a082 1222 /* Configure QSPI: CR register with Match mode and Automatic stop enabled
mbed_official 573:ad23fe03a082 1223 (otherwise there will be an infinite loop in blocking mode) */
mbed_official 573:ad23fe03a082 1224 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
mbed_official 573:ad23fe03a082 1225 (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE));
mbed_official 573:ad23fe03a082 1226
mbed_official 573:ad23fe03a082 1227 /* Call the configuration function */
mbed_official 573:ad23fe03a082 1228 cmd->NbData = cfg->StatusBytesSize;
mbed_official 573:ad23fe03a082 1229 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
mbed_official 573:ad23fe03a082 1230
mbed_official 573:ad23fe03a082 1231 /* Wait until SM flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 1232 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1233 {
mbed_official 573:ad23fe03a082 1234 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1235 }
mbed_official 573:ad23fe03a082 1236 else
mbed_official 573:ad23fe03a082 1237 {
mbed_official 573:ad23fe03a082 1238 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 573:ad23fe03a082 1239
mbed_official 573:ad23fe03a082 1240 /* Update state */
mbed_official 573:ad23fe03a082 1241 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1242 }
mbed_official 573:ad23fe03a082 1243 }
mbed_official 573:ad23fe03a082 1244 }
mbed_official 573:ad23fe03a082 1245 else
mbed_official 573:ad23fe03a082 1246 {
mbed_official 573:ad23fe03a082 1247 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1248 }
mbed_official 573:ad23fe03a082 1249 /* Process unlocked */
mbed_official 573:ad23fe03a082 1250 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1251
mbed_official 573:ad23fe03a082 1252 /* Return function status */
mbed_official 573:ad23fe03a082 1253 return status;
mbed_official 573:ad23fe03a082 1254 }
mbed_official 573:ad23fe03a082 1255
mbed_official 573:ad23fe03a082 1256 /**
mbed_official 573:ad23fe03a082 1257 * @brief Configure the QSPI Automatic Polling Mode in non-blocking mode.
mbed_official 573:ad23fe03a082 1258 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1259 * @param cmd: structure that contains the command configuration information.
mbed_official 573:ad23fe03a082 1260 * @param cfg: structure that contains the polling configuration information.
mbed_official 573:ad23fe03a082 1261 * @note This function is used only in Automatic Polling Mode
mbed_official 573:ad23fe03a082 1262 * @retval HAL status
mbed_official 573:ad23fe03a082 1263 */
mbed_official 573:ad23fe03a082 1264 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg)
mbed_official 573:ad23fe03a082 1265 {
mbed_official 573:ad23fe03a082 1266 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1267
mbed_official 573:ad23fe03a082 1268 /* Check the parameters */
mbed_official 573:ad23fe03a082 1269 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 1270 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1271 {
mbed_official 573:ad23fe03a082 1272 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 1273 }
mbed_official 573:ad23fe03a082 1274
mbed_official 573:ad23fe03a082 1275 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 1276 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1277 {
mbed_official 573:ad23fe03a082 1278 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 1279 }
mbed_official 573:ad23fe03a082 1280
mbed_official 573:ad23fe03a082 1281 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 1282 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1283 {
mbed_official 573:ad23fe03a082 1284 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 1285 }
mbed_official 573:ad23fe03a082 1286
mbed_official 573:ad23fe03a082 1287 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 1288 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 1289
mbed_official 573:ad23fe03a082 1290 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 1291 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 1292 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 1293
mbed_official 573:ad23fe03a082 1294 assert_param(IS_QSPI_INTERVAL(cfg->Interval));
mbed_official 573:ad23fe03a082 1295 assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
mbed_official 573:ad23fe03a082 1296 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
mbed_official 573:ad23fe03a082 1297 assert_param(IS_QSPI_AUTOMATIC_STOP(cfg->AutomaticStop));
mbed_official 573:ad23fe03a082 1298
mbed_official 573:ad23fe03a082 1299 /* Process locked */
mbed_official 573:ad23fe03a082 1300 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1301
mbed_official 573:ad23fe03a082 1302 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1303 {
mbed_official 573:ad23fe03a082 1304 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1305
mbed_official 573:ad23fe03a082 1306 /* Update state */
mbed_official 573:ad23fe03a082 1307 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;
mbed_official 573:ad23fe03a082 1308
mbed_official 573:ad23fe03a082 1309 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 1310 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 1311
mbed_official 573:ad23fe03a082 1312 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 1313 {
mbed_official 573:ad23fe03a082 1314 /* Configure QSPI: PSMAR register with the status match value */
mbed_official 573:ad23fe03a082 1315 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);
mbed_official 573:ad23fe03a082 1316
mbed_official 573:ad23fe03a082 1317 /* Configure QSPI: PSMKR register with the status mask value */
mbed_official 573:ad23fe03a082 1318 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);
mbed_official 573:ad23fe03a082 1319
mbed_official 573:ad23fe03a082 1320 /* Configure QSPI: PIR register with the interval value */
mbed_official 573:ad23fe03a082 1321 WRITE_REG(hqspi->Instance->PIR, cfg->Interval);
mbed_official 573:ad23fe03a082 1322
mbed_official 573:ad23fe03a082 1323 /* Configure QSPI: CR register with Match mode and Automatic stop mode */
mbed_official 573:ad23fe03a082 1324 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
mbed_official 573:ad23fe03a082 1325 (cfg->MatchMode | cfg->AutomaticStop));
mbed_official 573:ad23fe03a082 1326
mbed_official 573:ad23fe03a082 1327 /* Call the configuration function */
mbed_official 573:ad23fe03a082 1328 cmd->NbData = cfg->StatusBytesSize;
mbed_official 573:ad23fe03a082 1329 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
mbed_official 573:ad23fe03a082 1330
mbed_official 573:ad23fe03a082 1331 /* Enable the QSPI Transfer Error, FIFO threshold and status match Interrupt */
mbed_official 573:ad23fe03a082 1332 __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_FT | QSPI_IT_SM | QSPI_IT_TE));
mbed_official 573:ad23fe03a082 1333 }
mbed_official 573:ad23fe03a082 1334 }
mbed_official 573:ad23fe03a082 1335 else
mbed_official 573:ad23fe03a082 1336 {
mbed_official 573:ad23fe03a082 1337 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1338 }
mbed_official 573:ad23fe03a082 1339
mbed_official 573:ad23fe03a082 1340 /* Process unlocked */
mbed_official 573:ad23fe03a082 1341 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1342
mbed_official 573:ad23fe03a082 1343 /* Return function status */
mbed_official 573:ad23fe03a082 1344 return status;
mbed_official 573:ad23fe03a082 1345 }
mbed_official 573:ad23fe03a082 1346
mbed_official 573:ad23fe03a082 1347 /**
mbed_official 573:ad23fe03a082 1348 * @brief Configure the Memory Mapped mode.
mbed_official 573:ad23fe03a082 1349 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1350 * @param cmd: structure that contains the command configuration information.
mbed_official 573:ad23fe03a082 1351 * @param cfg: structure that contains the memory mapped configuration information.
mbed_official 573:ad23fe03a082 1352 * @note This function is used only in Memory mapped Mode
mbed_official 573:ad23fe03a082 1353 * @retval HAL status
mbed_official 573:ad23fe03a082 1354 */
mbed_official 573:ad23fe03a082 1355 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg)
mbed_official 573:ad23fe03a082 1356 {
mbed_official 573:ad23fe03a082 1357 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1358
mbed_official 573:ad23fe03a082 1359 /* Check the parameters */
mbed_official 573:ad23fe03a082 1360 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 1361 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1362 {
mbed_official 573:ad23fe03a082 1363 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 1364 }
mbed_official 573:ad23fe03a082 1365
mbed_official 573:ad23fe03a082 1366 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 1367 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1368 {
mbed_official 573:ad23fe03a082 1369 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 1370 }
mbed_official 573:ad23fe03a082 1371
mbed_official 573:ad23fe03a082 1372 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 1373 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1374 {
mbed_official 573:ad23fe03a082 1375 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 1376 }
mbed_official 573:ad23fe03a082 1377
mbed_official 573:ad23fe03a082 1378 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 1379 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 1380
mbed_official 573:ad23fe03a082 1381 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 1382 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 1383 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 1384
mbed_official 573:ad23fe03a082 1385 assert_param(IS_QSPI_TIMEOUT_ACTIVATION(cfg->TimeOutActivation));
mbed_official 573:ad23fe03a082 1386
mbed_official 573:ad23fe03a082 1387 /* Process locked */
mbed_official 573:ad23fe03a082 1388 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1389
mbed_official 573:ad23fe03a082 1390 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1391 {
mbed_official 573:ad23fe03a082 1392 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1393
mbed_official 573:ad23fe03a082 1394 /* Update state */
mbed_official 573:ad23fe03a082 1395 hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED;
mbed_official 573:ad23fe03a082 1396
mbed_official 573:ad23fe03a082 1397 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 1398 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 1399
mbed_official 573:ad23fe03a082 1400 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 1401 {
mbed_official 573:ad23fe03a082 1402 /* Configure QSPI: CR register with time out counter enable */
mbed_official 573:ad23fe03a082 1403 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation);
mbed_official 573:ad23fe03a082 1404
mbed_official 573:ad23fe03a082 1405 if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE)
mbed_official 573:ad23fe03a082 1406 {
mbed_official 573:ad23fe03a082 1407 assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod));
mbed_official 573:ad23fe03a082 1408
mbed_official 573:ad23fe03a082 1409 /* Configure QSPI: LPTR register with the low-power time out value */
mbed_official 573:ad23fe03a082 1410 WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod);
mbed_official 573:ad23fe03a082 1411
mbed_official 573:ad23fe03a082 1412 /* Enable the QSPI TimeOut Interrupt */
mbed_official 573:ad23fe03a082 1413 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO);
mbed_official 573:ad23fe03a082 1414 }
mbed_official 573:ad23fe03a082 1415
mbed_official 573:ad23fe03a082 1416 /* Call the configuration function */
mbed_official 573:ad23fe03a082 1417 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED);
mbed_official 573:ad23fe03a082 1418
mbed_official 573:ad23fe03a082 1419 }
mbed_official 573:ad23fe03a082 1420 }
mbed_official 573:ad23fe03a082 1421 else
mbed_official 573:ad23fe03a082 1422 {
mbed_official 573:ad23fe03a082 1423 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1424
mbed_official 573:ad23fe03a082 1425 }
mbed_official 573:ad23fe03a082 1426
mbed_official 573:ad23fe03a082 1427 /* Process unlocked */
mbed_official 573:ad23fe03a082 1428 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1429
mbed_official 573:ad23fe03a082 1430 /* Return function status */
mbed_official 573:ad23fe03a082 1431 return status;
mbed_official 573:ad23fe03a082 1432 }
mbed_official 573:ad23fe03a082 1433
mbed_official 573:ad23fe03a082 1434 /**
mbed_official 573:ad23fe03a082 1435 * @brief Transfer Error callbacks
mbed_official 573:ad23fe03a082 1436 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1437 * @retval None
mbed_official 573:ad23fe03a082 1438 */
mbed_official 573:ad23fe03a082 1439 __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1440 {
mbed_official 573:ad23fe03a082 1441 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1442 the HAL_QSPI_ErrorCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1443 */
mbed_official 573:ad23fe03a082 1444 }
mbed_official 573:ad23fe03a082 1445
mbed_official 573:ad23fe03a082 1446 /**
mbed_official 573:ad23fe03a082 1447 * @brief Command completed callbacks.
mbed_official 573:ad23fe03a082 1448 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1449 * @retval None
mbed_official 573:ad23fe03a082 1450 */
mbed_official 573:ad23fe03a082 1451 __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1452 {
mbed_official 573:ad23fe03a082 1453 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1454 the HAL_QSPI_CmdCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1455 */
mbed_official 573:ad23fe03a082 1456 }
mbed_official 573:ad23fe03a082 1457
mbed_official 573:ad23fe03a082 1458 /**
mbed_official 573:ad23fe03a082 1459 * @brief Rx Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1460 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1461 * @retval None
mbed_official 573:ad23fe03a082 1462 */
mbed_official 573:ad23fe03a082 1463 __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1464 {
mbed_official 573:ad23fe03a082 1465 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1466 the HAL_QSPI_RxCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1467 */
mbed_official 573:ad23fe03a082 1468 }
mbed_official 573:ad23fe03a082 1469
mbed_official 573:ad23fe03a082 1470 /**
mbed_official 573:ad23fe03a082 1471 * @brief Tx Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1472 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1473 * @retval None
mbed_official 573:ad23fe03a082 1474 */
mbed_official 573:ad23fe03a082 1475 __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1476 {
mbed_official 573:ad23fe03a082 1477 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1478 the HAL_QSPI_TxCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1479 */
mbed_official 573:ad23fe03a082 1480 }
mbed_official 573:ad23fe03a082 1481
mbed_official 573:ad23fe03a082 1482 /**
mbed_official 573:ad23fe03a082 1483 * @brief Rx Half Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1484 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1485 * @retval None
mbed_official 573:ad23fe03a082 1486 */
mbed_official 573:ad23fe03a082 1487 __weak void HAL_QSPI_RxHalfCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1488 {
mbed_official 573:ad23fe03a082 1489 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1490 the HAL_QSPI_RxHalfCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1491 */
mbed_official 573:ad23fe03a082 1492 }
mbed_official 573:ad23fe03a082 1493
mbed_official 573:ad23fe03a082 1494 /**
mbed_official 573:ad23fe03a082 1495 * @brief Tx Half Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1496 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1497 * @retval None
mbed_official 573:ad23fe03a082 1498 */
mbed_official 573:ad23fe03a082 1499 __weak void HAL_QSPI_TxHalfCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1500 {
mbed_official 573:ad23fe03a082 1501 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1502 the HAL_QSPI_TxHalfCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1503 */
mbed_official 573:ad23fe03a082 1504 }
mbed_official 573:ad23fe03a082 1505
mbed_official 573:ad23fe03a082 1506 /**
mbed_official 573:ad23fe03a082 1507 * @brief FIFO Threshold callbacks
mbed_official 573:ad23fe03a082 1508 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1509 * @retval None
mbed_official 573:ad23fe03a082 1510 */
mbed_official 573:ad23fe03a082 1511 __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1512 {
mbed_official 573:ad23fe03a082 1513 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1514 the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1515 */
mbed_official 573:ad23fe03a082 1516 }
mbed_official 573:ad23fe03a082 1517
mbed_official 573:ad23fe03a082 1518 /**
mbed_official 573:ad23fe03a082 1519 * @brief Status Match callbacks
mbed_official 573:ad23fe03a082 1520 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1521 * @retval None
mbed_official 573:ad23fe03a082 1522 */
mbed_official 573:ad23fe03a082 1523 __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1524 {
mbed_official 573:ad23fe03a082 1525 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1526 the HAL_QSPI_StatusMatchCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1527 */
mbed_official 573:ad23fe03a082 1528 }
mbed_official 573:ad23fe03a082 1529
mbed_official 573:ad23fe03a082 1530 /**
mbed_official 573:ad23fe03a082 1531 * @brief Timeout callbacks
mbed_official 573:ad23fe03a082 1532 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1533 * @retval None
mbed_official 573:ad23fe03a082 1534 */
mbed_official 573:ad23fe03a082 1535 __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1536 {
mbed_official 573:ad23fe03a082 1537 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1538 the HAL_QSPI_TimeOutCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1539 */
mbed_official 573:ad23fe03a082 1540 }
mbed_official 573:ad23fe03a082 1541
mbed_official 573:ad23fe03a082 1542 /**
mbed_official 573:ad23fe03a082 1543 * @}
mbed_official 573:ad23fe03a082 1544 */
mbed_official 573:ad23fe03a082 1545
mbed_official 573:ad23fe03a082 1546 /** @defgroup QSPI_Exported_Functions_Group3 Peripheral Control and State functions
mbed_official 573:ad23fe03a082 1547 * @brief QSPI control and State functions
mbed_official 573:ad23fe03a082 1548 *
mbed_official 573:ad23fe03a082 1549 @verbatim
mbed_official 573:ad23fe03a082 1550 ===============================================================================
mbed_official 573:ad23fe03a082 1551 ##### Peripheral Control and State functions #####
mbed_official 573:ad23fe03a082 1552 ===============================================================================
mbed_official 573:ad23fe03a082 1553 [..]
mbed_official 573:ad23fe03a082 1554 This subsection provides a set of functions allowing to :
mbed_official 573:ad23fe03a082 1555 (+) Check in run-time the state of the driver.
mbed_official 573:ad23fe03a082 1556 (+) Check the error code set during last operation.
mbed_official 573:ad23fe03a082 1557 (+) Abort any operation.
mbed_official 573:ad23fe03a082 1558 .....
mbed_official 573:ad23fe03a082 1559 @endverbatim
mbed_official 573:ad23fe03a082 1560 * @{
mbed_official 573:ad23fe03a082 1561 */
mbed_official 573:ad23fe03a082 1562
mbed_official 573:ad23fe03a082 1563 /**
mbed_official 573:ad23fe03a082 1564 * @brief Return the QSPI state.
mbed_official 573:ad23fe03a082 1565 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1566 * @retval HAL state
mbed_official 573:ad23fe03a082 1567 */
mbed_official 573:ad23fe03a082 1568 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1569 {
mbed_official 573:ad23fe03a082 1570 return hqspi->State;
mbed_official 573:ad23fe03a082 1571 }
mbed_official 573:ad23fe03a082 1572
mbed_official 573:ad23fe03a082 1573 /**
mbed_official 573:ad23fe03a082 1574 * @brief Return the QSPI error code
mbed_official 573:ad23fe03a082 1575 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1576 * @retval QSPI Error Code
mbed_official 573:ad23fe03a082 1577 */
mbed_official 573:ad23fe03a082 1578 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1579 {
mbed_official 573:ad23fe03a082 1580 return hqspi->ErrorCode;
mbed_official 573:ad23fe03a082 1581 }
mbed_official 573:ad23fe03a082 1582
mbed_official 573:ad23fe03a082 1583 /**
mbed_official 573:ad23fe03a082 1584 * @brief Abort the current transmission
mbed_official 573:ad23fe03a082 1585 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1586 * @retval HAL status
mbed_official 573:ad23fe03a082 1587 */
mbed_official 573:ad23fe03a082 1588 HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1589 {
mbed_official 573:ad23fe03a082 1590 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1591
mbed_official 573:ad23fe03a082 1592 /* Configure QSPI: CR register with Abort request */
mbed_official 573:ad23fe03a082 1593 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT);
mbed_official 573:ad23fe03a082 1594
mbed_official 573:ad23fe03a082 1595 /* Wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 1596 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1597 {
mbed_official 573:ad23fe03a082 1598 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1599 }
mbed_official 573:ad23fe03a082 1600 else
mbed_official 573:ad23fe03a082 1601 {
mbed_official 573:ad23fe03a082 1602 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 1603
mbed_official 573:ad23fe03a082 1604 /* Wait until BUSY flag is reset */
mbed_official 573:ad23fe03a082 1605 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 1606
mbed_official 573:ad23fe03a082 1607 /* Update state */
mbed_official 573:ad23fe03a082 1608 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1609 }
mbed_official 573:ad23fe03a082 1610
mbed_official 573:ad23fe03a082 1611 return status;
mbed_official 573:ad23fe03a082 1612 }
mbed_official 573:ad23fe03a082 1613
mbed_official 573:ad23fe03a082 1614 /** @brief Set QSPI timeout
mbed_official 573:ad23fe03a082 1615 * @param hqspi: QSPI handle.
mbed_official 573:ad23fe03a082 1616 * @param Timeout: Timeout for the QSPI memory access.
mbed_official 573:ad23fe03a082 1617 * @retval None
mbed_official 573:ad23fe03a082 1618 */
mbed_official 573:ad23fe03a082 1619 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1620 {
mbed_official 573:ad23fe03a082 1621 hqspi->Timeout = Timeout;
mbed_official 573:ad23fe03a082 1622 }
mbed_official 573:ad23fe03a082 1623
mbed_official 573:ad23fe03a082 1624 /**
mbed_official 573:ad23fe03a082 1625 * @}
mbed_official 573:ad23fe03a082 1626 */
mbed_official 573:ad23fe03a082 1627
mbed_official 573:ad23fe03a082 1628 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 1629
mbed_official 573:ad23fe03a082 1630 /**
mbed_official 573:ad23fe03a082 1631 * @brief DMA QSPI receive process complete callback.
mbed_official 573:ad23fe03a082 1632 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 1633 * @retval None
mbed_official 573:ad23fe03a082 1634 */
mbed_official 573:ad23fe03a082 1635 static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1636 {
mbed_official 573:ad23fe03a082 1637 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 1638 hqspi->RxXferCount = 0;
mbed_official 573:ad23fe03a082 1639
mbed_official 573:ad23fe03a082 1640 /* Wait for QSPI TC Flag */
mbed_official 573:ad23fe03a082 1641 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1642 {
mbed_official 573:ad23fe03a082 1643 /* Time out Occurred */
mbed_official 573:ad23fe03a082 1644 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 1645 }
mbed_official 573:ad23fe03a082 1646 else
mbed_official 573:ad23fe03a082 1647 {
mbed_official 573:ad23fe03a082 1648 /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1649 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1650
mbed_official 573:ad23fe03a082 1651 /* Disable the DMA channel */
mbed_official 573:ad23fe03a082 1652 HAL_DMA_Abort(hdma);
mbed_official 573:ad23fe03a082 1653
mbed_official 573:ad23fe03a082 1654 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 1655 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 1656
mbed_official 573:ad23fe03a082 1657 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 573:ad23fe03a082 1658 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 1659
mbed_official 573:ad23fe03a082 1660 /* Update state */
mbed_official 573:ad23fe03a082 1661 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1662
mbed_official 573:ad23fe03a082 1663 HAL_QSPI_RxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1664 }
mbed_official 573:ad23fe03a082 1665 }
mbed_official 573:ad23fe03a082 1666
mbed_official 573:ad23fe03a082 1667 /**
mbed_official 573:ad23fe03a082 1668 * @brief DMA QSPI transmit process complete callback.
mbed_official 573:ad23fe03a082 1669 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 1670 * @retval None
mbed_official 573:ad23fe03a082 1671 */
mbed_official 573:ad23fe03a082 1672 static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1673 {
mbed_official 573:ad23fe03a082 1674 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 1675 hqspi->TxXferCount = 0;
mbed_official 573:ad23fe03a082 1676
mbed_official 573:ad23fe03a082 1677 /* Wait for QSPI TC Flag */
mbed_official 573:ad23fe03a082 1678 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1679 {
mbed_official 573:ad23fe03a082 1680 /* Time out Occurred */
mbed_official 573:ad23fe03a082 1681 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 1682 }
mbed_official 573:ad23fe03a082 1683 else
mbed_official 573:ad23fe03a082 1684 {
mbed_official 573:ad23fe03a082 1685 /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1686 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1687
mbed_official 573:ad23fe03a082 1688 /* Disable the DMA channel */
mbed_official 573:ad23fe03a082 1689 HAL_DMA_Abort(hdma);
mbed_official 573:ad23fe03a082 1690
mbed_official 573:ad23fe03a082 1691 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 1692 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 1693
mbed_official 573:ad23fe03a082 1694 /* Clear Busy bit */
mbed_official 573:ad23fe03a082 1695 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 1696
mbed_official 573:ad23fe03a082 1697 /* Update state */
mbed_official 573:ad23fe03a082 1698 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1699
mbed_official 573:ad23fe03a082 1700 HAL_QSPI_TxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1701 }
mbed_official 573:ad23fe03a082 1702 }
mbed_official 573:ad23fe03a082 1703
mbed_official 573:ad23fe03a082 1704 /**
mbed_official 573:ad23fe03a082 1705 * @brief DMA QSPI receive process half complete callback
mbed_official 573:ad23fe03a082 1706 * @param hdma : DMA handle
mbed_official 573:ad23fe03a082 1707 * @retval None
mbed_official 573:ad23fe03a082 1708 */
mbed_official 573:ad23fe03a082 1709 static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1710 {
mbed_official 573:ad23fe03a082 1711 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 573:ad23fe03a082 1712
mbed_official 573:ad23fe03a082 1713 HAL_QSPI_RxHalfCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1714 }
mbed_official 573:ad23fe03a082 1715
mbed_official 573:ad23fe03a082 1716 /**
mbed_official 573:ad23fe03a082 1717 * @brief DMA QSPI transmit process half complete callback
mbed_official 573:ad23fe03a082 1718 * @param hdma : DMA handle
mbed_official 573:ad23fe03a082 1719 * @retval None
mbed_official 573:ad23fe03a082 1720 */
mbed_official 573:ad23fe03a082 1721 static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1722 {
mbed_official 573:ad23fe03a082 1723 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 573:ad23fe03a082 1724
mbed_official 573:ad23fe03a082 1725 HAL_QSPI_TxHalfCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1726 }
mbed_official 573:ad23fe03a082 1727
mbed_official 573:ad23fe03a082 1728 /**
mbed_official 573:ad23fe03a082 1729 * @brief DMA QSPI communication error callback.
mbed_official 573:ad23fe03a082 1730 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 1731 * @retval None
mbed_official 573:ad23fe03a082 1732 */
mbed_official 573:ad23fe03a082 1733 static void QSPI_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1734 {
mbed_official 573:ad23fe03a082 1735 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 1736
mbed_official 573:ad23fe03a082 1737 hqspi->RxXferCount = 0;
mbed_official 573:ad23fe03a082 1738 hqspi->TxXferCount = 0;
mbed_official 573:ad23fe03a082 1739 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 573:ad23fe03a082 1740 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
mbed_official 573:ad23fe03a082 1741
mbed_official 573:ad23fe03a082 1742 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 1743 }
mbed_official 573:ad23fe03a082 1744
mbed_official 573:ad23fe03a082 1745 /**
mbed_official 573:ad23fe03a082 1746 * @brief This function wait a flag state until time out.
mbed_official 573:ad23fe03a082 1747 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1748 * @param Flag: Flag checked
mbed_official 573:ad23fe03a082 1749 * @param State: Value of the flag expected
mbed_official 573:ad23fe03a082 1750 * @param Timeout: Duration of the time out
mbed_official 573:ad23fe03a082 1751 * @retval HAL status
mbed_official 573:ad23fe03a082 1752 */
mbed_official 573:ad23fe03a082 1753 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag,
mbed_official 573:ad23fe03a082 1754 FlagStatus State, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1755 {
mbed_official 573:ad23fe03a082 1756 uint32_t tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1757
mbed_official 573:ad23fe03a082 1758 /* Wait until flag is in expected state */
mbed_official 573:ad23fe03a082 1759 while((FlagStatus)(__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State)
mbed_official 573:ad23fe03a082 1760 {
mbed_official 573:ad23fe03a082 1761 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1762 if (Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1763 {
mbed_official 573:ad23fe03a082 1764 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 573:ad23fe03a082 1765 {
mbed_official 573:ad23fe03a082 1766 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 573:ad23fe03a082 1767 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT;
mbed_official 573:ad23fe03a082 1768
mbed_official 573:ad23fe03a082 1769 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1770 }
mbed_official 573:ad23fe03a082 1771 }
mbed_official 573:ad23fe03a082 1772 }
mbed_official 573:ad23fe03a082 1773 return HAL_OK;
mbed_official 573:ad23fe03a082 1774 }
mbed_official 573:ad23fe03a082 1775
mbed_official 573:ad23fe03a082 1776 /**
mbed_official 573:ad23fe03a082 1777 * @brief This function configures the communication registers
mbed_official 573:ad23fe03a082 1778 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1779 * @param cmd: structure that contains the command configuration information
mbed_official 573:ad23fe03a082 1780 * @param FunctionalMode: functional mode to configured
mbed_official 573:ad23fe03a082 1781 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1782 * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE: Indirect write mode
mbed_official 573:ad23fe03a082 1783 * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_READ: Indirect read mode
mbed_official 573:ad23fe03a082 1784 * @arg QSPI_FUNCTIONAL_MODE_AUTO_POLLING: Automatic polling mode
mbed_official 573:ad23fe03a082 1785 * @arg QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode
mbed_official 573:ad23fe03a082 1786 * @retval None
mbed_official 573:ad23fe03a082 1787 */
mbed_official 573:ad23fe03a082 1788 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode)
mbed_official 573:ad23fe03a082 1789 {
mbed_official 573:ad23fe03a082 1790 assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode));
mbed_official 573:ad23fe03a082 1791
mbed_official 573:ad23fe03a082 1792 if ((cmd->DataMode != QSPI_DATA_NONE) && (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
mbed_official 573:ad23fe03a082 1793 {
mbed_official 573:ad23fe03a082 1794 /* Configure QSPI: DLR register with the number of data to read or write */
mbed_official 573:ad23fe03a082 1795 WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1));
mbed_official 573:ad23fe03a082 1796 }
mbed_official 573:ad23fe03a082 1797
mbed_official 573:ad23fe03a082 1798 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1799 {
mbed_official 573:ad23fe03a082 1800 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1801 {
mbed_official 573:ad23fe03a082 1802 /* Configure QSPI: ABR register with alternate bytes value */
mbed_official 573:ad23fe03a082 1803 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);
mbed_official 573:ad23fe03a082 1804
mbed_official 573:ad23fe03a082 1805 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1806 {
mbed_official 573:ad23fe03a082 1807 /*---- Command with instruction, address and alternate bytes ----*/
mbed_official 573:ad23fe03a082 1808 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1809 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1810 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1811 cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
mbed_official 573:ad23fe03a082 1812 cmd->InstructionMode | cmd->Instruction | FunctionalMode));
mbed_official 573:ad23fe03a082 1813
mbed_official 573:ad23fe03a082 1814 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1815 {
mbed_official 573:ad23fe03a082 1816 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1817 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1818 }
mbed_official 573:ad23fe03a082 1819 }
mbed_official 573:ad23fe03a082 1820 else
mbed_official 573:ad23fe03a082 1821 {
mbed_official 573:ad23fe03a082 1822 /*---- Command with instruction and alternate bytes ----*/
mbed_official 573:ad23fe03a082 1823 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1824 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1825 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1826 cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1827 cmd->Instruction | FunctionalMode));
mbed_official 573:ad23fe03a082 1828 }
mbed_official 573:ad23fe03a082 1829 }
mbed_official 573:ad23fe03a082 1830 else
mbed_official 573:ad23fe03a082 1831 {
mbed_official 573:ad23fe03a082 1832 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1833 {
mbed_official 573:ad23fe03a082 1834 /*---- Command with instruction and address ----*/
mbed_official 573:ad23fe03a082 1835 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1836 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1837 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1838 cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1839 cmd->Instruction | FunctionalMode));
mbed_official 573:ad23fe03a082 1840
mbed_official 573:ad23fe03a082 1841 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1842 {
mbed_official 573:ad23fe03a082 1843 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1844 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1845 }
mbed_official 573:ad23fe03a082 1846 }
mbed_official 573:ad23fe03a082 1847 else
mbed_official 573:ad23fe03a082 1848 {
mbed_official 573:ad23fe03a082 1849 /*---- Command with only instruction ----*/
mbed_official 573:ad23fe03a082 1850 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1851 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1852 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1853 cmd->AddressMode | cmd->InstructionMode | cmd->Instruction |
mbed_official 573:ad23fe03a082 1854 FunctionalMode));
mbed_official 573:ad23fe03a082 1855 }
mbed_official 573:ad23fe03a082 1856 }
mbed_official 573:ad23fe03a082 1857 }
mbed_official 573:ad23fe03a082 1858 else
mbed_official 573:ad23fe03a082 1859 {
mbed_official 573:ad23fe03a082 1860 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1861 {
mbed_official 573:ad23fe03a082 1862 /* Configure QSPI: ABR register with alternate bytes value */
mbed_official 573:ad23fe03a082 1863 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);
mbed_official 573:ad23fe03a082 1864
mbed_official 573:ad23fe03a082 1865 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1866 {
mbed_official 573:ad23fe03a082 1867 /*---- Command with address and alternate bytes ----*/
mbed_official 573:ad23fe03a082 1868 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1869 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1870 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1871 cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
mbed_official 573:ad23fe03a082 1872 cmd->InstructionMode | FunctionalMode));
mbed_official 573:ad23fe03a082 1873
mbed_official 573:ad23fe03a082 1874 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1875 {
mbed_official 573:ad23fe03a082 1876 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1877 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1878 }
mbed_official 573:ad23fe03a082 1879 }
mbed_official 573:ad23fe03a082 1880 else
mbed_official 573:ad23fe03a082 1881 {
mbed_official 573:ad23fe03a082 1882 /*---- Command with only alternate bytes ----*/
mbed_official 573:ad23fe03a082 1883 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1884 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1885 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1886 cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1887 FunctionalMode));
mbed_official 573:ad23fe03a082 1888 }
mbed_official 573:ad23fe03a082 1889 }
mbed_official 573:ad23fe03a082 1890 else
mbed_official 573:ad23fe03a082 1891 {
mbed_official 573:ad23fe03a082 1892 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1893 {
mbed_official 573:ad23fe03a082 1894 /*---- Command with only address ----*/
mbed_official 573:ad23fe03a082 1895 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1896 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1897 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1898 cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1899 FunctionalMode));
mbed_official 573:ad23fe03a082 1900
mbed_official 573:ad23fe03a082 1901 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1902 {
mbed_official 573:ad23fe03a082 1903 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1904 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1905 }
mbed_official 573:ad23fe03a082 1906 }
mbed_official 573:ad23fe03a082 1907 else
mbed_official 573:ad23fe03a082 1908 {
mbed_official 573:ad23fe03a082 1909 /*---- Command with only data phase ----*/
mbed_official 573:ad23fe03a082 1910 if (cmd->DataMode != QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 1911 {
mbed_official 573:ad23fe03a082 1912 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1913 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1914 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1915 cmd->AddressMode | cmd->InstructionMode | FunctionalMode));
mbed_official 573:ad23fe03a082 1916 }
mbed_official 573:ad23fe03a082 1917 }
mbed_official 573:ad23fe03a082 1918 }
mbed_official 573:ad23fe03a082 1919 }
mbed_official 573:ad23fe03a082 1920 }
mbed_official 573:ad23fe03a082 1921 /**
mbed_official 573:ad23fe03a082 1922 * @}
mbed_official 573:ad23fe03a082 1923 */
mbed_official 573:ad23fe03a082 1924
mbed_official 573:ad23fe03a082 1925 #endif /* HAL_QSPI_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 1926 /**
mbed_official 573:ad23fe03a082 1927 * @}
mbed_official 573:ad23fe03a082 1928 */
mbed_official 573:ad23fe03a082 1929
mbed_official 573:ad23fe03a082 1930 /**
mbed_official 573:ad23fe03a082 1931 * @}
mbed_official 573:ad23fe03a082 1932 */
mbed_official 573:ad23fe03a082 1933
mbed_official 573:ad23fe03a082 1934 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/