Paul Paterson / mbed-dev

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targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_gpio.c@150:cd63f849362a, 2016-11-03 (annotated)

Committer:
ptpaterson
Date:
Thu Nov 03 16:21:53 2016 +0000
Revision:
150:cd63f849362a
Parent:
149:156823d33999 
targets LPC11Cxx, LPC15xx:  can_api can_filter function properly returns 0 if handle argument is out of bounds (handle > 32).

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_ll_gpio.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.1
<> 144:ef7eb2e8f9f7 6 * @date 31-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief GPIO LL module driver.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37 #if defined(USE_FULL_LL_DRIVER)
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 40 #include "stm32l4xx_ll_gpio.h"
<> 144:ef7eb2e8f9f7 41 #include "stm32l4xx_ll_bus.h"
<> 144:ef7eb2e8f9f7 42 #ifdef USE_FULL_ASSERT
<> 144:ef7eb2e8f9f7 43 #include "stm32_assert.h"
<> 144:ef7eb2e8f9f7 44 #else
<> 144:ef7eb2e8f9f7 45 #define assert_param(expr) ((void)0U)
<> 144:ef7eb2e8f9f7 46 #endif
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /** @addtogroup STM32L4xx_LL_Driver
<> 144:ef7eb2e8f9f7 49 * @{
<> 144:ef7eb2e8f9f7 50 */
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI)
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /** @addtogroup GPIO_LL
<> 144:ef7eb2e8f9f7 55 * @{
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 62 /** @addtogroup GPIO_LL_Private_Macros
<> 144:ef7eb2e8f9f7 63 * @{
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 #define IS_LL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\
<> 144:ef7eb2e8f9f7 68 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\
<> 144:ef7eb2e8f9f7 69 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
<> 144:ef7eb2e8f9f7 70 ((__VALUE__) == LL_GPIO_MODE_ANALOG))
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\
<> 144:ef7eb2e8f9f7 73 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\
<> 144:ef7eb2e8f9f7 76 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\
<> 144:ef7eb2e8f9f7 77 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\
<> 144:ef7eb2e8f9f7 78 ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH))
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\
<> 144:ef7eb2e8f9f7 81 ((__VALUE__) == LL_GPIO_PULL_UP) ||\
<> 144:ef7eb2e8f9f7 82 ((__VALUE__) == LL_GPIO_PULL_DOWN))
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\
<> 144:ef7eb2e8f9f7 85 ((__VALUE__) == LL_GPIO_AF_1 ) ||\
<> 144:ef7eb2e8f9f7 86 ((__VALUE__) == LL_GPIO_AF_2 ) ||\
<> 144:ef7eb2e8f9f7 87 ((__VALUE__) == LL_GPIO_AF_3 ) ||\
<> 144:ef7eb2e8f9f7 88 ((__VALUE__) == LL_GPIO_AF_4 ) ||\
<> 144:ef7eb2e8f9f7 89 ((__VALUE__) == LL_GPIO_AF_5 ) ||\
<> 144:ef7eb2e8f9f7 90 ((__VALUE__) == LL_GPIO_AF_6 ) ||\
<> 144:ef7eb2e8f9f7 91 ((__VALUE__) == LL_GPIO_AF_7 ) ||\
<> 144:ef7eb2e8f9f7 92 ((__VALUE__) == LL_GPIO_AF_8 ) ||\
<> 144:ef7eb2e8f9f7 93 ((__VALUE__) == LL_GPIO_AF_9 ) ||\
<> 144:ef7eb2e8f9f7 94 ((__VALUE__) == LL_GPIO_AF_10 ) ||\
<> 144:ef7eb2e8f9f7 95 ((__VALUE__) == LL_GPIO_AF_11 ) ||\
<> 144:ef7eb2e8f9f7 96 ((__VALUE__) == LL_GPIO_AF_12 ) ||\
<> 144:ef7eb2e8f9f7 97 ((__VALUE__) == LL_GPIO_AF_13 ) ||\
<> 144:ef7eb2e8f9f7 98 ((__VALUE__) == LL_GPIO_AF_14 ) ||\
<> 144:ef7eb2e8f9f7 99 ((__VALUE__) == LL_GPIO_AF_15 ))
<> 144:ef7eb2e8f9f7 100 /**
<> 144:ef7eb2e8f9f7 101 * @}
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 107 /** @addtogroup GPIO_LL_Exported_Functions
<> 144:ef7eb2e8f9f7 108 * @{
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 /** @addtogroup GPIO_LL_EF_Init
<> 144:ef7eb2e8f9f7 112 * @{
<> 144:ef7eb2e8f9f7 113 */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /**
<> 144:ef7eb2e8f9f7 116 * @brief De-initialize GPIO registers (Registers restored to their default values).
<> 144:ef7eb2e8f9f7 117 * @param GPIOx GPIO Port
<> 144:ef7eb2e8f9f7 118 * @retval An ErrorStatus enumeration value:
<> 144:ef7eb2e8f9f7 119 * - SUCCESS: GPIO registers are de-initialized
<> 144:ef7eb2e8f9f7 120 * - ERROR: Wrong GPIO Port
<> 144:ef7eb2e8f9f7 121 */
<> 144:ef7eb2e8f9f7 122 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
<> 144:ef7eb2e8f9f7 123 {
<> 144:ef7eb2e8f9f7 124 ErrorStatus status = SUCCESS;
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /* Check the parameters */
<> 144:ef7eb2e8f9f7 127 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 /* Force and Release reset on clock of GPIOx Port */
<> 144:ef7eb2e8f9f7 130 if (GPIOx == GPIOA)
<> 144:ef7eb2e8f9f7 131 {
<> 144:ef7eb2e8f9f7 132 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOA);
<> 144:ef7eb2e8f9f7 133 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOA);
<> 144:ef7eb2e8f9f7 134 }
<> 144:ef7eb2e8f9f7 135 else if (GPIOx == GPIOB)
<> 144:ef7eb2e8f9f7 136 {
<> 144:ef7eb2e8f9f7 137 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOB);
<> 144:ef7eb2e8f9f7 138 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOB);
<> 144:ef7eb2e8f9f7 139 }
<> 144:ef7eb2e8f9f7 140 else if (GPIOx == GPIOC)
<> 144:ef7eb2e8f9f7 141 {
<> 144:ef7eb2e8f9f7 142 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOC);
<> 144:ef7eb2e8f9f7 143 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOC);
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145 #if defined(GPIOD)
<> 144:ef7eb2e8f9f7 146 else if (GPIOx == GPIOD)
<> 144:ef7eb2e8f9f7 147 {
<> 144:ef7eb2e8f9f7 148 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOD);
<> 144:ef7eb2e8f9f7 149 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOD);
<> 144:ef7eb2e8f9f7 150 }
<> 144:ef7eb2e8f9f7 151 #endif /* GPIOD */
<> 144:ef7eb2e8f9f7 152 #if defined(GPIOE)
<> 144:ef7eb2e8f9f7 153 else if (GPIOx == GPIOE)
<> 144:ef7eb2e8f9f7 154 {
<> 144:ef7eb2e8f9f7 155 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOE);
<> 144:ef7eb2e8f9f7 156 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOE);
<> 144:ef7eb2e8f9f7 157 }
<> 144:ef7eb2e8f9f7 158 #endif /* GPIOE */
<> 144:ef7eb2e8f9f7 159 #if defined(GPIOF)
<> 144:ef7eb2e8f9f7 160 else if (GPIOx == GPIOF)
<> 144:ef7eb2e8f9f7 161 {
<> 144:ef7eb2e8f9f7 162 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOF);
<> 144:ef7eb2e8f9f7 163 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOF);
<> 144:ef7eb2e8f9f7 164 }
<> 144:ef7eb2e8f9f7 165 #endif /* GPIOF */
<> 144:ef7eb2e8f9f7 166 #if defined(GPIOG)
<> 144:ef7eb2e8f9f7 167 else if (GPIOx == GPIOG)
<> 144:ef7eb2e8f9f7 168 {
<> 144:ef7eb2e8f9f7 169 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOG);
<> 144:ef7eb2e8f9f7 170 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOG);
<> 144:ef7eb2e8f9f7 171 }
<> 144:ef7eb2e8f9f7 172 #endif /* GPIOG */
<> 144:ef7eb2e8f9f7 173 #if defined(GPIOH)
<> 144:ef7eb2e8f9f7 174 else if (GPIOx == GPIOH)
<> 144:ef7eb2e8f9f7 175 {
<> 144:ef7eb2e8f9f7 176 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH);
<> 144:ef7eb2e8f9f7 177 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH);
<> 144:ef7eb2e8f9f7 178 }
<> 144:ef7eb2e8f9f7 179 #endif /* GPIOH */
<> 144:ef7eb2e8f9f7 180 #if defined(GPIOI)
<> 144:ef7eb2e8f9f7 181 else if (GPIOx == GPIOI)
<> 144:ef7eb2e8f9f7 182 {
<> 144:ef7eb2e8f9f7 183 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOI);
<> 144:ef7eb2e8f9f7 184 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOI);
<> 144:ef7eb2e8f9f7 185 }
<> 144:ef7eb2e8f9f7 186 #endif /* GPIOI */
<> 144:ef7eb2e8f9f7 187 else
<> 144:ef7eb2e8f9f7 188 {
<> 144:ef7eb2e8f9f7 189 status = ERROR;
<> 144:ef7eb2e8f9f7 190 }
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 return (status);
<> 144:ef7eb2e8f9f7 193 }
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /**
<> 144:ef7eb2e8f9f7 196 * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
<> 144:ef7eb2e8f9f7 197 * @param GPIOx GPIO Port
<> 144:ef7eb2e8f9f7 198 * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
<> 144:ef7eb2e8f9f7 199 * that contains the configuration information for the specified GPIO peripheral.
<> 144:ef7eb2e8f9f7 200 * @retval An ErrorStatus enumeration value:
<> 144:ef7eb2e8f9f7 201 * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
<> 144:ef7eb2e8f9f7 202 * - ERROR: Not applicable
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
<> 144:ef7eb2e8f9f7 205 {
<> 144:ef7eb2e8f9f7 206 uint32_t pinpos = 0x00000000U;
<> 144:ef7eb2e8f9f7 207 uint32_t currentpin = 0x00000000U;
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /* Check the parameters */
<> 144:ef7eb2e8f9f7 210 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 211 assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
<> 144:ef7eb2e8f9f7 212 assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
<> 144:ef7eb2e8f9f7 213 assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /* ------------------------- Configure the port pins ---------------- */
<> 144:ef7eb2e8f9f7 216 /* Initialize pinpos on first pin set */
<> 144:ef7eb2e8f9f7 217 pinpos = POSITION_VAL(GPIO_InitStruct->Pin);
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /* Configure the port pins */
<> 144:ef7eb2e8f9f7 220 while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
<> 144:ef7eb2e8f9f7 221 {
<> 144:ef7eb2e8f9f7 222 /* Get current io position */
<> 144:ef7eb2e8f9f7 223 currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 if (currentpin)
<> 144:ef7eb2e8f9f7 226 {
<> 144:ef7eb2e8f9f7 227 /* Pin Mode configuration */
<> 144:ef7eb2e8f9f7 228 LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
<> 144:ef7eb2e8f9f7 231 {
<> 144:ef7eb2e8f9f7 232 /* Check Speed mode parameters */
<> 144:ef7eb2e8f9f7 233 assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /* Speed mode configuration */
<> 144:ef7eb2e8f9f7 236 LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
<> 144:ef7eb2e8f9f7 237 }
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Pull-up Pull down resistor configuration*/
<> 144:ef7eb2e8f9f7 240 LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
<> 144:ef7eb2e8f9f7 243 {
<> 144:ef7eb2e8f9f7 244 /* Check Alternate parameter */
<> 144:ef7eb2e8f9f7 245 assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /* Speed mode configuration */
<> 144:ef7eb2e8f9f7 248 if (POSITION_VAL(currentpin) < 0x00000008U)
<> 144:ef7eb2e8f9f7 249 {
<> 144:ef7eb2e8f9f7 250 LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
<> 144:ef7eb2e8f9f7 251 }
<> 144:ef7eb2e8f9f7 252 else
<> 144:ef7eb2e8f9f7 253 {
<> 144:ef7eb2e8f9f7 254 LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
<> 144:ef7eb2e8f9f7 255 }
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257 }
<> 144:ef7eb2e8f9f7 258 pinpos++;
<> 144:ef7eb2e8f9f7 259 }
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
<> 144:ef7eb2e8f9f7 262 {
<> 144:ef7eb2e8f9f7 263 /* Check Output mode parameters */
<> 144:ef7eb2e8f9f7 264 assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /* Output mode configuration*/
<> 144:ef7eb2e8f9f7 267 LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270 return (SUCCESS);
<> 144:ef7eb2e8f9f7 271 }
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
<> 144:ef7eb2e8f9f7 275 * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
<> 144:ef7eb2e8f9f7 276 * whose fields will be set to default values.
<> 144:ef7eb2e8f9f7 277 * @retval None
<> 144:ef7eb2e8f9f7 278 */
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
<> 144:ef7eb2e8f9f7 281 {
<> 144:ef7eb2e8f9f7 282 /* Reset GPIO init structure parameters values */
<> 144:ef7eb2e8f9f7 283 GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL;
<> 144:ef7eb2e8f9f7 284 GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG;
<> 144:ef7eb2e8f9f7 285 GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW;
<> 144:ef7eb2e8f9f7 286 GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
<> 144:ef7eb2e8f9f7 287 GPIO_InitStruct->Pull = LL_GPIO_PULL_NO;
<> 144:ef7eb2e8f9f7 288 GPIO_InitStruct->Alternate = LL_GPIO_AF_0;
<> 144:ef7eb2e8f9f7 289 }
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @}
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /**
<> 144:ef7eb2e8f9f7 300 * @}
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) */
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 /**
<> 144:ef7eb2e8f9f7 306 * @}
<> 144:ef7eb2e8f9f7 307 */
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 #endif /* USE_FULL_LL_DRIVER */
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 312