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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_pwr_ex.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pwr_ex.c@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_pwr_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.0
<> 144:ef7eb2e8f9f7 6 * @date 8-January-2016
<> 144:ef7eb2e8f9f7 7 * @brief Extended PWR HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Power Controller (PWR) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Extended Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 ******************************************************************************
<> 144:ef7eb2e8f9f7 14 * @attention
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 17 *
<> 144:ef7eb2e8f9f7 18 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 19 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 20 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 21 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 23 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 24 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 26 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 27 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 28 *
<> 144:ef7eb2e8f9f7 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 39 *
<> 144:ef7eb2e8f9f7 40 ******************************************************************************
<> 144:ef7eb2e8f9f7 41 */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 44 #include "stm32l0xx_hal.h"
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #ifdef HAL_PWR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 47 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 */
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup PWREx
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /** @addtogroup PWREx_Private
<> 144:ef7eb2e8f9f7 56 * @{
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /** @defgroup PWR_Extended_TimeOut_Value PWREx Flag Setting Time Out Value
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62 #define PWR_FLAG_SETTING_DELAY_US 50
<> 144:ef7eb2e8f9f7 63 /**
<> 144:ef7eb2e8f9f7 64 * @}
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /**
<> 144:ef7eb2e8f9f7 68 * @}
<> 144:ef7eb2e8f9f7 69 */
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /** @addtogroup PWREx_Exported_Functions
<> 144:ef7eb2e8f9f7 73 * @brief Low Power modes configuration functions
<> 144:ef7eb2e8f9f7 74 *
<> 144:ef7eb2e8f9f7 75 @verbatim
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 ===============================================================================
<> 144:ef7eb2e8f9f7 78 ##### Peripheral extended features functions #####
<> 144:ef7eb2e8f9f7 79 ===============================================================================
<> 144:ef7eb2e8f9f7 80 @endverbatim
<> 144:ef7eb2e8f9f7 81 * @{
<> 144:ef7eb2e8f9f7 82 */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /**
<> 144:ef7eb2e8f9f7 85 * @brief Enables the Fast WakeUp from Ultra Low Power mode.
<> 144:ef7eb2e8f9f7 86 * @note This bit works in conjunction with ULP bit.
<> 144:ef7eb2e8f9f7 87 * Means, when ULP = 1 and FWU = 1 :VREFINT startup time is ignored when
<> 144:ef7eb2e8f9f7 88 * exiting from low power mode.
<> 144:ef7eb2e8f9f7 89 * @retval None
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91 void HAL_PWREx_EnableFastWakeUp(void)
<> 144:ef7eb2e8f9f7 92 {
<> 144:ef7eb2e8f9f7 93 /* Enable the fast wake up */
<> 144:ef7eb2e8f9f7 94 SET_BIT(PWR->CR, PWR_CR_FWU);
<> 144:ef7eb2e8f9f7 95 }
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @brief Disables the Fast WakeUp from Ultra Low Power mode.
<> 144:ef7eb2e8f9f7 99 * @retval None
<> 144:ef7eb2e8f9f7 100 */
<> 144:ef7eb2e8f9f7 101 void HAL_PWREx_DisableFastWakeUp(void)
<> 144:ef7eb2e8f9f7 102 {
<> 144:ef7eb2e8f9f7 103 /* Disable the fast wake up */
<> 144:ef7eb2e8f9f7 104 CLEAR_BIT(PWR->CR, PWR_CR_FWU);
<> 144:ef7eb2e8f9f7 105 }
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 /**
<> 144:ef7eb2e8f9f7 108 * @brief Enables the Ultra Low Power mode
<> 144:ef7eb2e8f9f7 109 * @retval None
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111 void HAL_PWREx_EnableUltraLowPower(void)
<> 144:ef7eb2e8f9f7 112 {
<> 144:ef7eb2e8f9f7 113 /* Enable the Ultra Low Power mode */
<> 144:ef7eb2e8f9f7 114 SET_BIT(PWR->CR, PWR_CR_ULP);
<> 144:ef7eb2e8f9f7 115 }
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /**
<> 144:ef7eb2e8f9f7 118 * @brief Disables the Ultra Low Power mode
<> 144:ef7eb2e8f9f7 119 * @retval None
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121 void HAL_PWREx_DisableUltraLowPower(void)
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 /* Disable the Ultra Low Power mode */
<> 144:ef7eb2e8f9f7 124 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
<> 144:ef7eb2e8f9f7 125 }
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /**
<> 144:ef7eb2e8f9f7 128 * @brief Enable the Low Power Run mode.
<> 144:ef7eb2e8f9f7 129 * @note Low power run mode can only be entered when VCORE is in range 2.
<> 144:ef7eb2e8f9f7 130 * In addition, the dynamic voltage scaling must not be used when Low
<> 144:ef7eb2e8f9f7 131 * power run mode is selected. Only Stop and Sleep modes with regulator
<> 144:ef7eb2e8f9f7 132 * configured in Low power mode is allowed when Low power run mode is
<> 144:ef7eb2e8f9f7 133 * selected.
<> 144:ef7eb2e8f9f7 134 * @note The frequency of the system clock must be decreased to not exceed the
<> 144:ef7eb2e8f9f7 135 * frequency of RCC_MSIRANGE_1.
<> 144:ef7eb2e8f9f7 136 * @note In Low power run mode, all I/O pins keep the same state as in Run mode.
<> 144:ef7eb2e8f9f7 137 * @retval None
<> 144:ef7eb2e8f9f7 138 */
<> 144:ef7eb2e8f9f7 139 void HAL_PWREx_EnableLowPowerRunMode(void)
<> 144:ef7eb2e8f9f7 140 {
<> 144:ef7eb2e8f9f7 141 /* Enters the Low Power Run mode */
<> 144:ef7eb2e8f9f7 142 SET_BIT(PWR->CR, PWR_CR_LPSDSR);
<> 144:ef7eb2e8f9f7 143 SET_BIT(PWR->CR, PWR_CR_LPRUN);
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @brief Disable the Low Power Run mode.
<> 144:ef7eb2e8f9f7 148 * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that
<> 144:ef7eb2e8f9f7 149 * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode
<> 144:ef7eb2e8f9f7 150 * returns HAL_TIMEOUT status). The system clock frequency can then be
<> 144:ef7eb2e8f9f7 151 * increased above 2 MHz.
<> 144:ef7eb2e8f9f7 152 * @retval HAL_StatusTypeDef
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
<> 144:ef7eb2e8f9f7 155 {
<> 144:ef7eb2e8f9f7 156 uint32_t wait_loop_index = 0;
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /* Exit the Low Power Run mode */
<> 144:ef7eb2e8f9f7 159 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
<> 144:ef7eb2e8f9f7 160 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /* Wait until REGLPF is reset */
<> 144:ef7eb2e8f9f7 163 wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000));
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF)))
<> 144:ef7eb2e8f9f7 166 {
<> 144:ef7eb2e8f9f7 167 wait_loop_index--;
<> 144:ef7eb2e8f9f7 168 }
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 if (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF))
<> 144:ef7eb2e8f9f7 171 {
<> 144:ef7eb2e8f9f7 172 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 return HAL_OK;
<> 144:ef7eb2e8f9f7 176 }
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /**
<> 144:ef7eb2e8f9f7 179 * @}
<> 144:ef7eb2e8f9f7 180 */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /**
<> 144:ef7eb2e8f9f7 183 * @}
<> 144:ef7eb2e8f9f7 184 */
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /**
<> 144:ef7eb2e8f9f7 187 * @}
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189 #endif /* HAL_PWR_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 192