Paul Paterson / mbed-dev

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/stm32f4xx_hal_conf.h@144:ef7eb2e8f9f7
This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_conf.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.4.4
<> 144:ef7eb2e8f9f7 6 * @date 22-January-2016
<> 144:ef7eb2e8f9f7 7 * @brief HAL configuration template file.
<> 144:ef7eb2e8f9f7 8 * This file should be copied to the application folder and renamed
<> 144:ef7eb2e8f9f7 9 * to stm32f4xx_hal_conf.h.
<> 144:ef7eb2e8f9f7 10 ******************************************************************************
<> 144:ef7eb2e8f9f7 11 * @attention
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 16 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 17 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 19 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 20 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 21 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 22 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 23 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 24 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 33 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 34 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 36 *
<> 144:ef7eb2e8f9f7 37 ******************************************************************************
<> 144:ef7eb2e8f9f7 38 */
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 41 #ifndef __STM32F4xx_HAL_CONF_H
<> 144:ef7eb2e8f9f7 42 #define __STM32F4xx_HAL_CONF_H
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 45 extern "C" {
<> 144:ef7eb2e8f9f7 46 #endif
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 49 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /* ########################## Module Selection ############################## */
<> 144:ef7eb2e8f9f7 52 /**
<> 144:ef7eb2e8f9f7 53 * @brief This is the list of modules to be used in the HAL driver
<> 144:ef7eb2e8f9f7 54 */
<> 144:ef7eb2e8f9f7 55 #define HAL_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 56 #define HAL_ADC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 57 #define HAL_CAN_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 58 #define HAL_CRC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 59 #define HAL_CEC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 60 #define HAL_CRYP_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 61 #define HAL_DAC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 62 #define HAL_DCMI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 63 #define HAL_DMA_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 64 #define HAL_DMA2D_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 65 #define HAL_ETH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 66 #define HAL_FLASH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 67 #define HAL_NAND_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 68 #define HAL_NOR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 69 #define HAL_PCCARD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 70 #define HAL_SRAM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 71 #define HAL_SDRAM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 72 #define HAL_HASH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 73 #define HAL_GPIO_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 74 #define HAL_I2C_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 75 #define HAL_I2S_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 76 #define HAL_IWDG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 77 #define HAL_LTDC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 78 #define HAL_DSI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 79 #define HAL_PWR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 80 #define HAL_QSPI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 81 #define HAL_RCC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 82 #define HAL_RNG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 83 #define HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 84 #define HAL_SAI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 85 #define HAL_SD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 86 #define HAL_SPI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 87 #define HAL_TIM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 88 #define HAL_UART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 89 #define HAL_USART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 90 #define HAL_IRDA_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 91 #define HAL_SMARTCARD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 92 #define HAL_WWDG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 93 #define HAL_CORTEX_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 94 #define HAL_PCD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 95 #define HAL_HCD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 96 #define HAL_FMPI2C_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 97 #define HAL_SPDIFRX_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 98 #define HAL_LPTIM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /* ########################## HSE/HSI Values adaptation ##################### */
<> 144:ef7eb2e8f9f7 101 /**
<> 144:ef7eb2e8f9f7 102 * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
<> 144:ef7eb2e8f9f7 103 * This value is used by the RCC HAL module to compute the system frequency
<> 144:ef7eb2e8f9f7 104 * (when HSE is used as system clock source, directly or through the PLL).
<> 144:ef7eb2e8f9f7 105 */
<> 144:ef7eb2e8f9f7 106 #if !defined (HSE_VALUE)
<> 144:ef7eb2e8f9f7 107 #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
<> 144:ef7eb2e8f9f7 108 #endif /* HSE_VALUE */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 #if !defined (HSE_STARTUP_TIMEOUT)
<> 144:ef7eb2e8f9f7 111 #define HSE_STARTUP_TIMEOUT ((uint32_t)200U) /*!< Time out for HSE start up, in ms */
<> 144:ef7eb2e8f9f7 112 #endif /* HSE_STARTUP_TIMEOUT */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /**
<> 144:ef7eb2e8f9f7 115 * @brief Internal High Speed oscillator (HSI) value.
<> 144:ef7eb2e8f9f7 116 * This value is used by the RCC HAL module to compute the system frequency
<> 144:ef7eb2e8f9f7 117 * (when HSI is used as system clock source, directly or through the PLL).
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119 #if !defined (HSI_VALUE)
<> 144:ef7eb2e8f9f7 120 #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
<> 144:ef7eb2e8f9f7 121 #endif /* HSI_VALUE */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /**
<> 144:ef7eb2e8f9f7 124 * @brief Internal Low Speed oscillator (LSI) value.
<> 144:ef7eb2e8f9f7 125 */
<> 144:ef7eb2e8f9f7 126 #if !defined (LSI_VALUE)
<> 144:ef7eb2e8f9f7 127 #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
<> 144:ef7eb2e8f9f7 128 #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
<> 144:ef7eb2e8f9f7 129 The real value may vary depending on the variations
<> 144:ef7eb2e8f9f7 130 in voltage and temperature.*/
<> 144:ef7eb2e8f9f7 131 /**
<> 144:ef7eb2e8f9f7 132 * @brief External Low Speed oscillator (LSE) value.
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134 #if !defined (LSE_VALUE)
<> 144:ef7eb2e8f9f7 135 #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
<> 144:ef7eb2e8f9f7 136 #endif /* LSE_VALUE */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 #if !defined (LSE_STARTUP_TIMEOUT)
<> 144:ef7eb2e8f9f7 139 #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
<> 144:ef7eb2e8f9f7 140 #endif /* LSE_STARTUP_TIMEOUT */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /**
<> 144:ef7eb2e8f9f7 143 * @brief External clock source for I2S peripheral
<> 144:ef7eb2e8f9f7 144 * This value is used by the I2S HAL module to compute the I2S clock source
<> 144:ef7eb2e8f9f7 145 * frequency, this source is inserted directly through I2S_CKIN pad.
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147 #if !defined (EXTERNAL_CLOCK_VALUE)
<> 144:ef7eb2e8f9f7 148 #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
<> 144:ef7eb2e8f9f7 149 #endif /* EXTERNAL_CLOCK_VALUE */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /* Tip: To avoid modifying this file each time you need to use different HSE,
<> 144:ef7eb2e8f9f7 152 === you can define the HSE value in your toolchain compiler preprocessor. */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /* ########################### System Configuration ######################### */
<> 144:ef7eb2e8f9f7 155 /**
<> 144:ef7eb2e8f9f7 156 * @brief This is the HAL system configuration section
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158 #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
<> 144:ef7eb2e8f9f7 159 #define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */
<> 144:ef7eb2e8f9f7 160 #define USE_RTOS 0U
<> 144:ef7eb2e8f9f7 161 #define PREFETCH_ENABLE 1U
<> 144:ef7eb2e8f9f7 162 #define INSTRUCTION_CACHE_ENABLE 1U
<> 144:ef7eb2e8f9f7 163 #define DATA_CACHE_ENABLE 1U
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /* ########################## Assert Selection ############################## */
<> 144:ef7eb2e8f9f7 166 /**
<> 144:ef7eb2e8f9f7 167 * @brief Uncomment the line below to expanse the "assert_param" macro in the
<> 144:ef7eb2e8f9f7 168 * HAL drivers code
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170 /* #define USE_FULL_ASSERT 1U */
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 /* ################## Ethernet peripheral configuration ##################### */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 /* Section 1 : Ethernet peripheral configuration */
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
<> 144:ef7eb2e8f9f7 177 #define MAC_ADDR0 2U
<> 144:ef7eb2e8f9f7 178 #define MAC_ADDR1 0U
<> 144:ef7eb2e8f9f7 179 #define MAC_ADDR2 0U
<> 144:ef7eb2e8f9f7 180 #define MAC_ADDR3 0U
<> 144:ef7eb2e8f9f7 181 #define MAC_ADDR4 0U
<> 144:ef7eb2e8f9f7 182 #define MAC_ADDR5 0U
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Definition of the Ethernet driver buffers size and count */
<> 144:ef7eb2e8f9f7 185 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
<> 144:ef7eb2e8f9f7 186 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
<> 144:ef7eb2e8f9f7 187 #define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
<> 144:ef7eb2e8f9f7 188 #define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /* Section 2: PHY configuration section */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /* DP83848 PHY Address*/
<> 144:ef7eb2e8f9f7 193 #define DP83848_PHY_ADDRESS 0x01U
<> 144:ef7eb2e8f9f7 194 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
<> 144:ef7eb2e8f9f7 195 #define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
<> 144:ef7eb2e8f9f7 196 /* PHY Configuration delay */
<> 144:ef7eb2e8f9f7 197 #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 #define PHY_READ_TO ((uint32_t)0x0000FFFFU)
<> 144:ef7eb2e8f9f7 200 #define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 /* Section 3: Common PHY Registers */
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 #define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
<> 144:ef7eb2e8f9f7 205 #define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
<> 144:ef7eb2e8f9f7 208 #define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
<> 144:ef7eb2e8f9f7 209 #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
<> 144:ef7eb2e8f9f7 210 #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
<> 144:ef7eb2e8f9f7 211 #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
<> 144:ef7eb2e8f9f7 212 #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
<> 144:ef7eb2e8f9f7 213 #define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
<> 144:ef7eb2e8f9f7 214 #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
<> 144:ef7eb2e8f9f7 215 #define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
<> 144:ef7eb2e8f9f7 216 #define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
<> 144:ef7eb2e8f9f7 219 #define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
<> 144:ef7eb2e8f9f7 220 #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /* Section 4: Extended PHY Registers */
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 #define PHY_SR ((uint16_t)0x0010U) /*!< PHY status register Offset */
<> 144:ef7eb2e8f9f7 225 #define PHY_MICR ((uint16_t)0x0011U) /*!< MII Interrupt Control Register */
<> 144:ef7eb2e8f9f7 226 #define PHY_MISR ((uint16_t)0x0012U) /*!< MII Interrupt Status and Misc. Control Register */
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 #define PHY_LINK_STATUS ((uint16_t)0x0001U) /*!< PHY Link mask */
<> 144:ef7eb2e8f9f7 229 #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
<> 144:ef7eb2e8f9f7 230 #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 #define PHY_MICR_INT_EN ((uint16_t)0x0002U) /*!< PHY Enable interrupts */
<> 144:ef7eb2e8f9f7 233 #define PHY_MICR_INT_OE ((uint16_t)0x0001U) /*!< PHY Enable output interrupt events */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 #define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */
<> 144:ef7eb2e8f9f7 236 #define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 /* ################## SPI peripheral configuration ########################## */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
<> 144:ef7eb2e8f9f7 241 * Activated: CRC code is present inside driver
<> 144:ef7eb2e8f9f7 242 * Deactivated: CRC code cleaned from driver
<> 144:ef7eb2e8f9f7 243 */
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 #define USE_SPI_CRC 1U
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 248 /**
<> 144:ef7eb2e8f9f7 249 * @brief Include module's header file
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 #ifdef HAL_RCC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 253 #include "stm32f4xx_hal_rcc.h"
<> 144:ef7eb2e8f9f7 254 #endif /* HAL_RCC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 #ifdef HAL_GPIO_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 257 #include "stm32f4xx_hal_gpio.h"
<> 144:ef7eb2e8f9f7 258 #endif /* HAL_GPIO_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 #ifdef HAL_DMA_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 261 #include "stm32f4xx_hal_dma.h"
<> 144:ef7eb2e8f9f7 262 #endif /* HAL_DMA_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 #ifdef HAL_CORTEX_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 265 #include "stm32f4xx_hal_cortex.h"
<> 144:ef7eb2e8f9f7 266 #endif /* HAL_CORTEX_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 #ifdef HAL_ADC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 269 #include "stm32f4xx_hal_adc.h"
<> 144:ef7eb2e8f9f7 270 #endif /* HAL_ADC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 #ifdef HAL_CAN_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 273 #include "stm32f4xx_hal_can.h"
<> 144:ef7eb2e8f9f7 274 #endif /* HAL_CAN_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 #ifdef HAL_CRC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 277 #include "stm32f4xx_hal_crc.h"
<> 144:ef7eb2e8f9f7 278 #endif /* HAL_CRC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 #ifdef HAL_CRYP_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 281 #include "stm32f4xx_hal_cryp.h"
<> 144:ef7eb2e8f9f7 282 #endif /* HAL_CRYP_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 #ifdef HAL_DMA2D_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 285 #include "stm32f4xx_hal_dma2d.h"
<> 144:ef7eb2e8f9f7 286 #endif /* HAL_DMA2D_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 #ifdef HAL_DAC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 289 #include "stm32f4xx_hal_dac.h"
<> 144:ef7eb2e8f9f7 290 #endif /* HAL_DAC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 #ifdef HAL_DCMI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 293 #include "stm32f4xx_hal_dcmi.h"
<> 144:ef7eb2e8f9f7 294 #endif /* HAL_DCMI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 #ifdef HAL_ETH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 297 #include "stm32f4xx_hal_eth.h"
<> 144:ef7eb2e8f9f7 298 #endif /* HAL_ETH_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 #ifdef HAL_FLASH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 301 #include "stm32f4xx_hal_flash.h"
<> 144:ef7eb2e8f9f7 302 #endif /* HAL_FLASH_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304 #ifdef HAL_SRAM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 305 #include "stm32f4xx_hal_sram.h"
<> 144:ef7eb2e8f9f7 306 #endif /* HAL_SRAM_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 #ifdef HAL_NOR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 309 #include "stm32f4xx_hal_nor.h"
<> 144:ef7eb2e8f9f7 310 #endif /* HAL_NOR_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 #ifdef HAL_NAND_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 313 #include "stm32f4xx_hal_nand.h"
<> 144:ef7eb2e8f9f7 314 #endif /* HAL_NAND_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 #ifdef HAL_PCCARD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 317 #include "stm32f4xx_hal_pccard.h"
<> 144:ef7eb2e8f9f7 318 #endif /* HAL_PCCARD_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 #ifdef HAL_SDRAM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 321 #include "stm32f4xx_hal_sdram.h"
<> 144:ef7eb2e8f9f7 322 #endif /* HAL_SDRAM_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 #ifdef HAL_HASH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 325 #include "stm32f4xx_hal_hash.h"
<> 144:ef7eb2e8f9f7 326 #endif /* HAL_HASH_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 #ifdef HAL_I2C_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 329 #include "stm32f4xx_hal_i2c.h"
<> 144:ef7eb2e8f9f7 330 #endif /* HAL_I2C_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 #ifdef HAL_I2S_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 333 #include "stm32f4xx_hal_i2s.h"
<> 144:ef7eb2e8f9f7 334 #endif /* HAL_I2S_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 #ifdef HAL_IWDG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 337 #include "stm32f4xx_hal_iwdg.h"
<> 144:ef7eb2e8f9f7 338 #endif /* HAL_IWDG_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 #ifdef HAL_LTDC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 341 #include "stm32f4xx_hal_ltdc.h"
<> 144:ef7eb2e8f9f7 342 #endif /* HAL_LTDC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 #ifdef HAL_PWR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 345 #include "stm32f4xx_hal_pwr.h"
<> 144:ef7eb2e8f9f7 346 #endif /* HAL_PWR_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 #ifdef HAL_RNG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 349 #include "stm32f4xx_hal_rng.h"
<> 144:ef7eb2e8f9f7 350 #endif /* HAL_RNG_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 #ifdef HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 353 #include "stm32f4xx_hal_rtc.h"
<> 144:ef7eb2e8f9f7 354 #endif /* HAL_RTC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 #ifdef HAL_SAI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 357 #include "stm32f4xx_hal_sai.h"
<> 144:ef7eb2e8f9f7 358 #endif /* HAL_SAI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 359
<> 144:ef7eb2e8f9f7 360 #ifdef HAL_SD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 361 #include "stm32f4xx_hal_sd.h"
<> 144:ef7eb2e8f9f7 362 #endif /* HAL_SD_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 #ifdef HAL_SPI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 365 #include "stm32f4xx_hal_spi.h"
<> 144:ef7eb2e8f9f7 366 #endif /* HAL_SPI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368 #ifdef HAL_TIM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 369 #include "stm32f4xx_hal_tim.h"
<> 144:ef7eb2e8f9f7 370 #endif /* HAL_TIM_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 #ifdef HAL_UART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 373 #include "stm32f4xx_hal_uart.h"
<> 144:ef7eb2e8f9f7 374 #endif /* HAL_UART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 #ifdef HAL_USART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 377 #include "stm32f4xx_hal_usart.h"
<> 144:ef7eb2e8f9f7 378 #endif /* HAL_USART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 #ifdef HAL_IRDA_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 381 #include "stm32f4xx_hal_irda.h"
<> 144:ef7eb2e8f9f7 382 #endif /* HAL_IRDA_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 #ifdef HAL_SMARTCARD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 385 #include "stm32f4xx_hal_smartcard.h"
<> 144:ef7eb2e8f9f7 386 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 #ifdef HAL_WWDG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 389 #include "stm32f4xx_hal_wwdg.h"
<> 144:ef7eb2e8f9f7 390 #endif /* HAL_WWDG_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 #ifdef HAL_PCD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 393 #include "stm32f4xx_hal_pcd.h"
<> 144:ef7eb2e8f9f7 394 #endif /* HAL_PCD_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 #ifdef HAL_HCD_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 397 #include "stm32f4xx_hal_hcd.h"
<> 144:ef7eb2e8f9f7 398 #endif /* HAL_HCD_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 #ifdef HAL_DSI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 401 #include "stm32f4xx_hal_dsi.h"
<> 144:ef7eb2e8f9f7 402 #endif /* HAL_DSI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 #ifdef HAL_QSPI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 405 #include "stm32f4xx_hal_qspi.h"
<> 144:ef7eb2e8f9f7 406 #endif /* HAL_QSPI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 407
<> 144:ef7eb2e8f9f7 408 #ifdef HAL_CEC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 409 #include "stm32f4xx_hal_cec.h"
<> 144:ef7eb2e8f9f7 410 #endif /* HAL_CEC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 #ifdef HAL_FMPI2C_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 413 #include "stm32f4xx_hal_fmpi2c.h"
<> 144:ef7eb2e8f9f7 414 #endif /* HAL_FMPI2C_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 #ifdef HAL_SPDIFRX_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 417 #include "stm32f4xx_hal_spdifrx.h"
<> 144:ef7eb2e8f9f7 418 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 #ifdef HAL_LPTIM_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 421 #include "stm32f4xx_hal_lptim.h"
<> 144:ef7eb2e8f9f7 422 #endif /* HAL_LPTIM_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 423
<> 144:ef7eb2e8f9f7 424 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 425 #ifdef USE_FULL_ASSERT
<> 144:ef7eb2e8f9f7 426 /**
<> 144:ef7eb2e8f9f7 427 * @brief The assert_param macro is used for function's parameters check.
<> 144:ef7eb2e8f9f7 428 * @param expr: If expr is false, it calls assert_failed function
<> 144:ef7eb2e8f9f7 429 * which reports the name of the source file and the source
<> 144:ef7eb2e8f9f7 430 * line number of the call that failed.
<> 144:ef7eb2e8f9f7 431 * If expr is true, it returns no value.
<> 144:ef7eb2e8f9f7 432 * @retval None
<> 144:ef7eb2e8f9f7 433 */
<> 144:ef7eb2e8f9f7 434 #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
<> 144:ef7eb2e8f9f7 435 /* Exported functions ------------------------------------------------------- */
<> 144:ef7eb2e8f9f7 436 void assert_failed(uint8_t* file, uint32_t line);
<> 144:ef7eb2e8f9f7 437 #else
<> 144:ef7eb2e8f9f7 438 #define assert_param(expr) ((void)0)
<> 144:ef7eb2e8f9f7 439 #endif /* USE_FULL_ASSERT */
<> 144:ef7eb2e8f9f7 440
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 443 }
<> 144:ef7eb2e8f9f7 444 #endif
<> 144:ef7eb2e8f9f7 445
<> 144:ef7eb2e8f9f7 446 #endif /* __STM32F4xx_HAL_CONF_H */
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/