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targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_tim_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 124:6a4a5b7d7324
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_tim_ex.c |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 15-December-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief TIM HAL module driver. |
| bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
| bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the Timer Extended peripheral: |
| bogdanm | 0:9b334a45a8ff | 10 | * + Time Hall Sensor Interface Initialization |
| bogdanm | 0:9b334a45a8ff | 11 | * + Time Hall Sensor Interface Start |
| bogdanm | 0:9b334a45a8ff | 12 | * + Time Complementary signal bread and dead time configuration |
| bogdanm | 0:9b334a45a8ff | 13 | * + Time Master and Slave synchronization configuration |
| bogdanm | 0:9b334a45a8ff | 14 | * + Timer remapping capabilities configuration |
| bogdanm | 0:9b334a45a8ff | 15 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 16 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 17 | ##### TIMER Extended features ##### |
| bogdanm | 0:9b334a45a8ff | 18 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 19 | [..] |
| bogdanm | 0:9b334a45a8ff | 20 | The Timer Extended features include: |
| bogdanm | 0:9b334a45a8ff | 21 | (#) Complementary outputs with programmable dead-time for : |
| bogdanm | 0:9b334a45a8ff | 22 | (++) Output Compare |
| bogdanm | 0:9b334a45a8ff | 23 | (++) PWM generation (Edge and Center-aligned Mode) |
| bogdanm | 0:9b334a45a8ff | 24 | (++) One-pulse mode output |
| bogdanm | 0:9b334a45a8ff | 25 | (#) Synchronization circuit to control the timer with external signals and to |
| bogdanm | 0:9b334a45a8ff | 26 | interconnect several timers together. |
| bogdanm | 0:9b334a45a8ff | 27 | (#) Break input to put the timer output signals in reset state or in a known state. |
| bogdanm | 0:9b334a45a8ff | 28 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
| bogdanm | 0:9b334a45a8ff | 29 | positioning purposes |
| bogdanm | 0:9b334a45a8ff | 30 | |
| bogdanm | 0:9b334a45a8ff | 31 | ##### How to use this driver ##### |
| bogdanm | 0:9b334a45a8ff | 32 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 33 | [..] |
| bogdanm | 0:9b334a45a8ff | 34 | (#) Initialize the TIM low level resources by implementing the following functions |
| bogdanm | 0:9b334a45a8ff | 35 | depending from feature used : |
| bogdanm | 0:9b334a45a8ff | 36 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
| bogdanm | 0:9b334a45a8ff | 37 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
| bogdanm | 0:9b334a45a8ff | 38 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
| bogdanm | 0:9b334a45a8ff | 39 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() |
| bogdanm | 0:9b334a45a8ff | 40 | |
| bogdanm | 0:9b334a45a8ff | 41 | (#) Initialize the TIM low level resources : |
| bogdanm | 0:9b334a45a8ff | 42 | (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); |
| bogdanm | 0:9b334a45a8ff | 43 | (##) TIM pins configuration |
| bogdanm | 0:9b334a45a8ff | 44 | (+++) Enable the clock for the TIM GPIOs using the following function: |
| bogdanm | 0:9b334a45a8ff | 45 | __HAL_GPIOx_CLK_ENABLE(); |
| bogdanm | 0:9b334a45a8ff | 46 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
| bogdanm | 0:9b334a45a8ff | 47 | |
| bogdanm | 0:9b334a45a8ff | 48 | (#) The external Clock can be configured, if needed (the default clock is the |
| bogdanm | 0:9b334a45a8ff | 49 | internal clock from the APBx), using the following function: |
| bogdanm | 0:9b334a45a8ff | 50 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
| bogdanm | 0:9b334a45a8ff | 51 | any start function. |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | (#) Configure the TIM in the desired functioning mode using one of the |
| bogdanm | 0:9b334a45a8ff | 54 | initialization function of this driver: |
| bogdanm | 0:9b334a45a8ff | 55 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
| bogdanm | 0:9b334a45a8ff | 56 | Timer Hall Sensor Interface and the commutation event with the corresponding |
| bogdanm | 0:9b334a45a8ff | 57 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
| bogdanm | 0:9b334a45a8ff | 58 | with the Hall sensor Interface and another Timer should be used to use |
| bogdanm | 0:9b334a45a8ff | 59 | the commutation event). |
| bogdanm | 0:9b334a45a8ff | 60 | |
| bogdanm | 0:9b334a45a8ff | 61 | (#) Activate the TIM peripheral using one of the start functions: |
| bogdanm | 0:9b334a45a8ff | 62 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT() |
| bogdanm | 0:9b334a45a8ff | 63 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
| bogdanm | 0:9b334a45a8ff | 64 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
| bogdanm | 0:9b334a45a8ff | 65 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
| bogdanm | 0:9b334a45a8ff | 66 | |
| bogdanm | 0:9b334a45a8ff | 67 | |
| bogdanm | 0:9b334a45a8ff | 68 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 69 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 70 | * @attention |
| bogdanm | 0:9b334a45a8ff | 71 | * |
| bogdanm | 0:9b334a45a8ff | 72 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 73 | * |
| bogdanm | 0:9b334a45a8ff | 74 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 75 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 76 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 77 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 78 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 79 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 80 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 81 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 82 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 83 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 84 | * |
| bogdanm | 0:9b334a45a8ff | 85 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 86 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 87 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 88 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 89 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 90 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 91 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 92 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 93 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 94 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 95 | * |
| bogdanm | 0:9b334a45a8ff | 96 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 97 | */ |
| bogdanm | 0:9b334a45a8ff | 98 | |
| bogdanm | 0:9b334a45a8ff | 99 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 100 | #include "stm32f1xx_hal.h" |
| bogdanm | 0:9b334a45a8ff | 101 | |
| bogdanm | 0:9b334a45a8ff | 102 | /** @addtogroup STM32F1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 103 | * @{ |
| bogdanm | 0:9b334a45a8ff | 104 | */ |
| bogdanm | 0:9b334a45a8ff | 105 | |
| bogdanm | 0:9b334a45a8ff | 106 | /** @defgroup TIMEx TIMEx |
| bogdanm | 0:9b334a45a8ff | 107 | * @brief TIM Extended HAL module driver |
| bogdanm | 0:9b334a45a8ff | 108 | * @{ |
| bogdanm | 0:9b334a45a8ff | 109 | */ |
| bogdanm | 0:9b334a45a8ff | 110 | |
| bogdanm | 0:9b334a45a8ff | 111 | #ifdef HAL_TIM_MODULE_ENABLED |
| bogdanm | 0:9b334a45a8ff | 112 | |
| bogdanm | 0:9b334a45a8ff | 113 | /* Private typedef -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 114 | /* Private define ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 115 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 116 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 117 | /* Private function prototypes -----------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 118 | |
| bogdanm | 0:9b334a45a8ff | 119 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
| bogdanm | 0:9b334a45a8ff | 120 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
| bogdanm | 0:9b334a45a8ff | 121 | defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 122 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
| bogdanm | 0:9b334a45a8ff | 123 | * @{ |
| bogdanm | 0:9b334a45a8ff | 124 | */ |
| bogdanm | 0:9b334a45a8ff | 125 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
| bogdanm | 0:9b334a45a8ff | 126 | /** |
| bogdanm | 0:9b334a45a8ff | 127 | * @} |
| bogdanm | 0:9b334a45a8ff | 128 | */ |
| bogdanm | 0:9b334a45a8ff | 129 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
| bogdanm | 0:9b334a45a8ff | 130 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
| bogdanm | 0:9b334a45a8ff | 131 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
| bogdanm | 0:9b334a45a8ff | 132 | |
| bogdanm | 0:9b334a45a8ff | 133 | /* Exported functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 134 | |
| bogdanm | 0:9b334a45a8ff | 135 | /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions |
| bogdanm | 0:9b334a45a8ff | 136 | * @{ |
| bogdanm | 0:9b334a45a8ff | 137 | */ |
| bogdanm | 0:9b334a45a8ff | 138 | |
| bogdanm | 0:9b334a45a8ff | 139 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
| bogdanm | 0:9b334a45a8ff | 140 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
| bogdanm | 0:9b334a45a8ff | 141 | defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 142 | |
| bogdanm | 0:9b334a45a8ff | 143 | /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions |
| bogdanm | 0:9b334a45a8ff | 144 | * @brief Timer Hall Sensor functions |
| bogdanm | 0:9b334a45a8ff | 145 | * |
| bogdanm | 0:9b334a45a8ff | 146 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 147 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 148 | ##### Timer Hall Sensor functions ##### |
| bogdanm | 0:9b334a45a8ff | 149 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 150 | [..] |
| bogdanm | 0:9b334a45a8ff | 151 | This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 152 | (+) Initialize and configure TIM HAL Sensor. |
| bogdanm | 0:9b334a45a8ff | 153 | (+) De-initialize TIM HAL Sensor. |
| bogdanm | 0:9b334a45a8ff | 154 | (+) Start the Hall Sensor Interface. |
| bogdanm | 0:9b334a45a8ff | 155 | (+) Stop the Hall Sensor Interface. |
| bogdanm | 0:9b334a45a8ff | 156 | (+) Start the Hall Sensor Interface and enable interrupts. |
| bogdanm | 0:9b334a45a8ff | 157 | (+) Stop the Hall Sensor Interface and disable interrupts. |
| bogdanm | 0:9b334a45a8ff | 158 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 159 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 160 | |
| bogdanm | 0:9b334a45a8ff | 161 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 162 | * @{ |
| bogdanm | 0:9b334a45a8ff | 163 | */ |
| bogdanm | 0:9b334a45a8ff | 164 | /** |
| bogdanm | 0:9b334a45a8ff | 165 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
| bogdanm | 0:9b334a45a8ff | 166 | * @param htim : TIM Encoder Interface handle |
| bogdanm | 0:9b334a45a8ff | 167 | * @param sConfig : TIM Hall Sensor configuration structure |
| bogdanm | 0:9b334a45a8ff | 168 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 169 | */ |
| bogdanm | 0:9b334a45a8ff | 170 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
| bogdanm | 0:9b334a45a8ff | 171 | { |
| bogdanm | 0:9b334a45a8ff | 172 | TIM_OC_InitTypeDef OC_Config; |
| bogdanm | 0:9b334a45a8ff | 173 | |
| bogdanm | 0:9b334a45a8ff | 174 | /* Check the TIM handle allocation */ |
| bogdanm | 0:9b334a45a8ff | 175 | if(htim == NULL) |
| bogdanm | 0:9b334a45a8ff | 176 | { |
| bogdanm | 0:9b334a45a8ff | 177 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 178 | } |
| bogdanm | 0:9b334a45a8ff | 179 | |
| bogdanm | 0:9b334a45a8ff | 180 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 181 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
| bogdanm | 0:9b334a45a8ff | 182 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
| bogdanm | 0:9b334a45a8ff | 183 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
| bogdanm | 0:9b334a45a8ff | 184 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
| bogdanm | 0:9b334a45a8ff | 185 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
| bogdanm | 0:9b334a45a8ff | 186 | |
| bogdanm | 0:9b334a45a8ff | 187 | if(htim->State == HAL_TIM_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 188 | { |
| bogdanm | 0:9b334a45a8ff | 189 | /* Allocate lock resource and initialize it */ |
| bogdanm | 0:9b334a45a8ff | 190 | htim-> Lock = HAL_UNLOCKED; |
| bogdanm | 0:9b334a45a8ff | 191 | |
| bogdanm | 0:9b334a45a8ff | 192 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
| bogdanm | 0:9b334a45a8ff | 193 | HAL_TIMEx_HallSensor_MspInit(htim); |
| bogdanm | 0:9b334a45a8ff | 194 | } |
| bogdanm | 0:9b334a45a8ff | 195 | |
| bogdanm | 0:9b334a45a8ff | 196 | /* Set the TIM state */ |
| bogdanm | 0:9b334a45a8ff | 197 | htim->State= HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 198 | |
| bogdanm | 0:9b334a45a8ff | 199 | /* Configure the Time base in the Encoder Mode */ |
| bogdanm | 0:9b334a45a8ff | 200 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
| bogdanm | 0:9b334a45a8ff | 201 | |
| bogdanm | 0:9b334a45a8ff | 202 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
| bogdanm | 0:9b334a45a8ff | 203 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
| bogdanm | 0:9b334a45a8ff | 204 | |
| bogdanm | 0:9b334a45a8ff | 205 | /* Reset the IC1PSC Bits */ |
| bogdanm | 0:9b334a45a8ff | 206 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
| bogdanm | 0:9b334a45a8ff | 207 | /* Set the IC1PSC value */ |
| bogdanm | 0:9b334a45a8ff | 208 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
| bogdanm | 0:9b334a45a8ff | 209 | |
| bogdanm | 0:9b334a45a8ff | 210 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
| bogdanm | 0:9b334a45a8ff | 211 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
| bogdanm | 0:9b334a45a8ff | 212 | |
| bogdanm | 0:9b334a45a8ff | 213 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
| bogdanm | 0:9b334a45a8ff | 214 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| bogdanm | 0:9b334a45a8ff | 215 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
| bogdanm | 0:9b334a45a8ff | 216 | |
| bogdanm | 0:9b334a45a8ff | 217 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
| bogdanm | 0:9b334a45a8ff | 218 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
| bogdanm | 0:9b334a45a8ff | 219 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
| bogdanm | 0:9b334a45a8ff | 220 | |
| bogdanm | 0:9b334a45a8ff | 221 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
| bogdanm | 0:9b334a45a8ff | 222 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
| bogdanm | 0:9b334a45a8ff | 223 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
| bogdanm | 0:9b334a45a8ff | 224 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
| bogdanm | 0:9b334a45a8ff | 225 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
| bogdanm | 0:9b334a45a8ff | 226 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
| bogdanm | 0:9b334a45a8ff | 227 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
| bogdanm | 0:9b334a45a8ff | 228 | OC_Config.Pulse = sConfig->Commutation_Delay; |
| bogdanm | 0:9b334a45a8ff | 229 | |
| bogdanm | 0:9b334a45a8ff | 230 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
| bogdanm | 0:9b334a45a8ff | 231 | |
| bogdanm | 0:9b334a45a8ff | 232 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
| bogdanm | 0:9b334a45a8ff | 233 | register to 101 */ |
| bogdanm | 0:9b334a45a8ff | 234 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
| bogdanm | 0:9b334a45a8ff | 235 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
| bogdanm | 0:9b334a45a8ff | 236 | |
| bogdanm | 0:9b334a45a8ff | 237 | /* Initialize the TIM state*/ |
| bogdanm | 0:9b334a45a8ff | 238 | htim->State= HAL_TIM_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 239 | |
| bogdanm | 0:9b334a45a8ff | 240 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 241 | } |
| bogdanm | 0:9b334a45a8ff | 242 | |
| bogdanm | 0:9b334a45a8ff | 243 | /** |
| bogdanm | 0:9b334a45a8ff | 244 | * @brief DeInitializes the TIM Hall Sensor interface |
| bogdanm | 0:9b334a45a8ff | 245 | * @param htim : TIM Hall Sensor handle |
| bogdanm | 0:9b334a45a8ff | 246 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 247 | */ |
| bogdanm | 0:9b334a45a8ff | 248 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 249 | { |
| bogdanm | 0:9b334a45a8ff | 250 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 251 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 252 | |
| bogdanm | 0:9b334a45a8ff | 253 | htim->State = HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 254 | |
| bogdanm | 0:9b334a45a8ff | 255 | /* Disable the TIM Peripheral Clock */ |
| bogdanm | 0:9b334a45a8ff | 256 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 257 | |
| bogdanm | 0:9b334a45a8ff | 258 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
| bogdanm | 0:9b334a45a8ff | 259 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
| bogdanm | 0:9b334a45a8ff | 260 | |
| bogdanm | 0:9b334a45a8ff | 261 | /* Change TIM state */ |
| bogdanm | 0:9b334a45a8ff | 262 | htim->State = HAL_TIM_STATE_RESET; |
| bogdanm | 0:9b334a45a8ff | 263 | |
| bogdanm | 0:9b334a45a8ff | 264 | /* Release Lock */ |
| bogdanm | 0:9b334a45a8ff | 265 | __HAL_UNLOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 266 | |
| bogdanm | 0:9b334a45a8ff | 267 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 268 | } |
| bogdanm | 0:9b334a45a8ff | 269 | |
| bogdanm | 0:9b334a45a8ff | 270 | /** |
| bogdanm | 0:9b334a45a8ff | 271 | * @brief Initializes the TIM Hall Sensor MSP. |
| bogdanm | 0:9b334a45a8ff | 272 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 273 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 274 | */ |
| bogdanm | 0:9b334a45a8ff | 275 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 276 | { |
| bogdanm | 0:9b334a45a8ff | 277 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 278 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 279 | */ |
| bogdanm | 0:9b334a45a8ff | 280 | } |
| bogdanm | 0:9b334a45a8ff | 281 | |
| bogdanm | 0:9b334a45a8ff | 282 | /** |
| bogdanm | 0:9b334a45a8ff | 283 | * @brief DeInitializes TIM Hall Sensor MSP. |
| bogdanm | 0:9b334a45a8ff | 284 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 285 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 286 | */ |
| bogdanm | 0:9b334a45a8ff | 287 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 288 | { |
| bogdanm | 0:9b334a45a8ff | 289 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 290 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 291 | */ |
| bogdanm | 0:9b334a45a8ff | 292 | } |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /** |
| bogdanm | 0:9b334a45a8ff | 295 | * @brief Starts the TIM Hall Sensor Interface. |
| bogdanm | 0:9b334a45a8ff | 296 | * @param htim : TIM Hall Sensor handle |
| bogdanm | 0:9b334a45a8ff | 297 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 298 | */ |
| bogdanm | 0:9b334a45a8ff | 299 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 300 | { |
| bogdanm | 0:9b334a45a8ff | 301 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 302 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 303 | |
| bogdanm | 0:9b334a45a8ff | 304 | /* Enable the Input Capture channel 1 |
| bogdanm | 0:9b334a45a8ff | 305 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| bogdanm | 0:9b334a45a8ff | 306 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 307 | |
| bogdanm | 0:9b334a45a8ff | 308 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 309 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 310 | |
| bogdanm | 0:9b334a45a8ff | 311 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 312 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 313 | } |
| bogdanm | 0:9b334a45a8ff | 314 | |
| bogdanm | 0:9b334a45a8ff | 315 | /** |
| bogdanm | 0:9b334a45a8ff | 316 | * @brief Stops the TIM Hall sensor Interface. |
| bogdanm | 0:9b334a45a8ff | 317 | * @param htim : TIM Hall Sensor handle |
| bogdanm | 0:9b334a45a8ff | 318 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 319 | */ |
| bogdanm | 0:9b334a45a8ff | 320 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 321 | { |
| bogdanm | 0:9b334a45a8ff | 322 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 323 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 324 | |
| bogdanm | 0:9b334a45a8ff | 325 | /* Disable the Input Capture channel 1 |
| bogdanm | 0:9b334a45a8ff | 326 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| bogdanm | 0:9b334a45a8ff | 327 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 328 | |
| bogdanm | 0:9b334a45a8ff | 329 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 330 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 331 | |
| bogdanm | 0:9b334a45a8ff | 332 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 333 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 334 | } |
| bogdanm | 0:9b334a45a8ff | 335 | |
| bogdanm | 0:9b334a45a8ff | 336 | /** |
| bogdanm | 0:9b334a45a8ff | 337 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
| bogdanm | 0:9b334a45a8ff | 338 | * @param htim : TIM Hall Sensor handle |
| bogdanm | 0:9b334a45a8ff | 339 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 340 | */ |
| bogdanm | 0:9b334a45a8ff | 341 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 342 | { |
| bogdanm | 0:9b334a45a8ff | 343 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 344 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 345 | |
| bogdanm | 0:9b334a45a8ff | 346 | /* Enable the capture compare Interrupts 1 event */ |
| bogdanm | 0:9b334a45a8ff | 347 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 348 | |
| bogdanm | 0:9b334a45a8ff | 349 | /* Enable the Input Capture channel 1 |
| bogdanm | 0:9b334a45a8ff | 350 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| bogdanm | 0:9b334a45a8ff | 351 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 352 | |
| bogdanm | 0:9b334a45a8ff | 353 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 354 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 355 | |
| bogdanm | 0:9b334a45a8ff | 356 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 357 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 358 | } |
| bogdanm | 0:9b334a45a8ff | 359 | |
| bogdanm | 0:9b334a45a8ff | 360 | /** |
| bogdanm | 0:9b334a45a8ff | 361 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
| bogdanm | 0:9b334a45a8ff | 362 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 363 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 364 | */ |
| bogdanm | 0:9b334a45a8ff | 365 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 366 | { |
| bogdanm | 0:9b334a45a8ff | 367 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 368 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 369 | |
| bogdanm | 0:9b334a45a8ff | 370 | /* Disable the Input Capture channel 1 |
| bogdanm | 0:9b334a45a8ff | 371 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| bogdanm | 0:9b334a45a8ff | 372 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 373 | |
| bogdanm | 0:9b334a45a8ff | 374 | /* Disable the capture compare Interrupts event */ |
| bogdanm | 0:9b334a45a8ff | 375 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 376 | |
| bogdanm | 0:9b334a45a8ff | 377 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 378 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 379 | |
| bogdanm | 0:9b334a45a8ff | 380 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 381 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 382 | } |
| bogdanm | 0:9b334a45a8ff | 383 | |
| bogdanm | 0:9b334a45a8ff | 384 | /** |
| bogdanm | 0:9b334a45a8ff | 385 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
| bogdanm | 0:9b334a45a8ff | 386 | * @param htim : TIM Hall Sensor handle |
| bogdanm | 0:9b334a45a8ff | 387 | * @param pData : The destination Buffer address. |
| bogdanm | 0:9b334a45a8ff | 388 | * @param Length : The length of data to be transferred from TIM peripheral to memory. |
| bogdanm | 0:9b334a45a8ff | 389 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 390 | */ |
| bogdanm | 0:9b334a45a8ff | 391 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
| bogdanm | 0:9b334a45a8ff | 392 | { |
| bogdanm | 0:9b334a45a8ff | 393 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 394 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 395 | |
| bogdanm | 0:9b334a45a8ff | 396 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| bogdanm | 0:9b334a45a8ff | 397 | { |
| bogdanm | 0:9b334a45a8ff | 398 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 399 | } |
| bogdanm | 0:9b334a45a8ff | 400 | else if((htim->State == HAL_TIM_STATE_READY)) |
| bogdanm | 0:9b334a45a8ff | 401 | { |
| bogdanm | 0:9b334a45a8ff | 402 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| bogdanm | 0:9b334a45a8ff | 403 | { |
| bogdanm | 0:9b334a45a8ff | 404 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 405 | } |
| bogdanm | 0:9b334a45a8ff | 406 | else |
| bogdanm | 0:9b334a45a8ff | 407 | { |
| bogdanm | 0:9b334a45a8ff | 408 | htim->State = HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 409 | } |
| bogdanm | 0:9b334a45a8ff | 410 | } |
| bogdanm | 0:9b334a45a8ff | 411 | /* Enable the Input Capture channel 1 |
| bogdanm | 0:9b334a45a8ff | 412 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| bogdanm | 0:9b334a45a8ff | 413 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 414 | |
| bogdanm | 0:9b334a45a8ff | 415 | /* Set the DMA Input Capture 1 Callback */ |
| bogdanm | 0:9b334a45a8ff | 416 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; |
| bogdanm | 0:9b334a45a8ff | 417 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 418 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 419 | |
| bogdanm | 0:9b334a45a8ff | 420 | /* Enable the DMA channel for Capture 1*/ |
| bogdanm | 0:9b334a45a8ff | 421 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
| bogdanm | 0:9b334a45a8ff | 422 | |
| bogdanm | 0:9b334a45a8ff | 423 | /* Enable the capture compare 1 Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 424 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| bogdanm | 0:9b334a45a8ff | 425 | |
| bogdanm | 0:9b334a45a8ff | 426 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 427 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 428 | |
| bogdanm | 0:9b334a45a8ff | 429 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 430 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 431 | } |
| bogdanm | 0:9b334a45a8ff | 432 | |
| bogdanm | 0:9b334a45a8ff | 433 | /** |
| bogdanm | 0:9b334a45a8ff | 434 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
| bogdanm | 0:9b334a45a8ff | 435 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 436 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 437 | */ |
| bogdanm | 0:9b334a45a8ff | 438 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 439 | { |
| bogdanm | 0:9b334a45a8ff | 440 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 441 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 442 | |
| bogdanm | 0:9b334a45a8ff | 443 | /* Disable the Input Capture channel 1 |
| bogdanm | 0:9b334a45a8ff | 444 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| bogdanm | 0:9b334a45a8ff | 445 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 446 | |
| bogdanm | 0:9b334a45a8ff | 447 | |
| bogdanm | 0:9b334a45a8ff | 448 | /* Disable the capture compare Interrupts 1 event */ |
| bogdanm | 0:9b334a45a8ff | 449 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| bogdanm | 0:9b334a45a8ff | 450 | |
| bogdanm | 0:9b334a45a8ff | 451 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 452 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 453 | |
| bogdanm | 0:9b334a45a8ff | 454 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 455 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 456 | } |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | /** |
| bogdanm | 0:9b334a45a8ff | 459 | * @} |
| bogdanm | 0:9b334a45a8ff | 460 | */ |
| bogdanm | 0:9b334a45a8ff | 461 | |
| bogdanm | 0:9b334a45a8ff | 462 | /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions |
| bogdanm | 0:9b334a45a8ff | 463 | * @brief Timer Complementary Output Compare functions |
| bogdanm | 0:9b334a45a8ff | 464 | * |
| bogdanm | 0:9b334a45a8ff | 465 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 466 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 467 | ##### Timer Complementary Output Compare functions ##### |
| bogdanm | 0:9b334a45a8ff | 468 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 469 | [..] |
| bogdanm | 0:9b334a45a8ff | 470 | This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 471 | (+) Start the Complementary Output Compare/PWM. |
| bogdanm | 0:9b334a45a8ff | 472 | (+) Stop the Complementary Output Compare/PWM. |
| bogdanm | 0:9b334a45a8ff | 473 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
| bogdanm | 0:9b334a45a8ff | 474 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
| bogdanm | 0:9b334a45a8ff | 475 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 476 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 477 | |
| bogdanm | 0:9b334a45a8ff | 478 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 479 | * @{ |
| bogdanm | 0:9b334a45a8ff | 480 | */ |
| bogdanm | 0:9b334a45a8ff | 481 | |
| bogdanm | 0:9b334a45a8ff | 482 | /** |
| bogdanm | 0:9b334a45a8ff | 483 | * @brief Starts the TIM Output Compare signal generation on the complementary |
| bogdanm | 0:9b334a45a8ff | 484 | * output. |
| bogdanm | 0:9b334a45a8ff | 485 | * @param htim : TIM Output Compare handle |
| bogdanm | 0:9b334a45a8ff | 486 | * @param Channel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 487 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 488 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 489 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 490 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 491 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 492 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 493 | */ |
| bogdanm | 0:9b334a45a8ff | 494 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 495 | { |
| bogdanm | 0:9b334a45a8ff | 496 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 497 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 498 | |
| bogdanm | 0:9b334a45a8ff | 499 | /* Enable the Capture compare channel N */ |
| bogdanm | 0:9b334a45a8ff | 500 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 501 | |
| bogdanm | 0:9b334a45a8ff | 502 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 503 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 504 | |
| bogdanm | 0:9b334a45a8ff | 505 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 506 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 507 | |
| bogdanm | 0:9b334a45a8ff | 508 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 509 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 510 | } |
| bogdanm | 0:9b334a45a8ff | 511 | |
| bogdanm | 0:9b334a45a8ff | 512 | /** |
| bogdanm | 0:9b334a45a8ff | 513 | * @brief Stops the TIM Output Compare signal generation on the complementary |
| bogdanm | 0:9b334a45a8ff | 514 | * output. |
| bogdanm | 0:9b334a45a8ff | 515 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 516 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 517 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 518 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 519 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 520 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 521 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 522 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 523 | */ |
| bogdanm | 0:9b334a45a8ff | 524 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 525 | { |
| bogdanm | 0:9b334a45a8ff | 526 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 527 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 528 | |
| bogdanm | 0:9b334a45a8ff | 529 | /* Disable the Capture compare channel N */ |
| bogdanm | 0:9b334a45a8ff | 530 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 531 | |
| bogdanm | 0:9b334a45a8ff | 532 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 533 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 534 | |
| bogdanm | 0:9b334a45a8ff | 535 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 536 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 537 | |
| bogdanm | 0:9b334a45a8ff | 538 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 539 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 540 | } |
| bogdanm | 0:9b334a45a8ff | 541 | |
| bogdanm | 0:9b334a45a8ff | 542 | /** |
| bogdanm | 0:9b334a45a8ff | 543 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
| bogdanm | 0:9b334a45a8ff | 544 | * on the complementary output. |
| bogdanm | 0:9b334a45a8ff | 545 | * @param htim : TIM OC handle |
| bogdanm | 0:9b334a45a8ff | 546 | * @param Channel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 547 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 548 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 549 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 550 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 551 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 552 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 553 | */ |
| bogdanm | 0:9b334a45a8ff | 554 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 555 | { |
| bogdanm | 0:9b334a45a8ff | 556 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 557 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 558 | |
| bogdanm | 0:9b334a45a8ff | 559 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 560 | { |
| bogdanm | 0:9b334a45a8ff | 561 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 562 | { |
| bogdanm | 0:9b334a45a8ff | 563 | /* Enable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 564 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 565 | } |
| bogdanm | 0:9b334a45a8ff | 566 | break; |
| bogdanm | 0:9b334a45a8ff | 567 | |
| bogdanm | 0:9b334a45a8ff | 568 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 569 | { |
| bogdanm | 0:9b334a45a8ff | 570 | /* Enable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 571 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| bogdanm | 0:9b334a45a8ff | 572 | } |
| bogdanm | 0:9b334a45a8ff | 573 | break; |
| bogdanm | 0:9b334a45a8ff | 574 | |
| bogdanm | 0:9b334a45a8ff | 575 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 576 | { |
| bogdanm | 0:9b334a45a8ff | 577 | /* Enable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 578 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
| bogdanm | 0:9b334a45a8ff | 579 | } |
| bogdanm | 0:9b334a45a8ff | 580 | break; |
| bogdanm | 0:9b334a45a8ff | 581 | |
| bogdanm | 0:9b334a45a8ff | 582 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 583 | { |
| bogdanm | 0:9b334a45a8ff | 584 | /* Enable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 585 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
| bogdanm | 0:9b334a45a8ff | 586 | } |
| bogdanm | 0:9b334a45a8ff | 587 | break; |
| bogdanm | 0:9b334a45a8ff | 588 | |
| bogdanm | 0:9b334a45a8ff | 589 | default: |
| bogdanm | 0:9b334a45a8ff | 590 | break; |
| bogdanm | 0:9b334a45a8ff | 591 | } |
| bogdanm | 0:9b334a45a8ff | 592 | |
| bogdanm | 0:9b334a45a8ff | 593 | /* Enable the TIM Break interrupt */ |
| bogdanm | 0:9b334a45a8ff | 594 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
| bogdanm | 0:9b334a45a8ff | 595 | |
| bogdanm | 0:9b334a45a8ff | 596 | /* Enable the Capture compare channel N */ |
| bogdanm | 0:9b334a45a8ff | 597 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 598 | |
| bogdanm | 0:9b334a45a8ff | 599 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 600 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 601 | |
| bogdanm | 0:9b334a45a8ff | 602 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 603 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 604 | |
| bogdanm | 0:9b334a45a8ff | 605 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 606 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 607 | } |
| bogdanm | 0:9b334a45a8ff | 608 | |
| bogdanm | 0:9b334a45a8ff | 609 | /** |
| bogdanm | 0:9b334a45a8ff | 610 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
| bogdanm | 0:9b334a45a8ff | 611 | * on the complementary output. |
| bogdanm | 0:9b334a45a8ff | 612 | * @param htim : TIM Output Compare handle |
| bogdanm | 0:9b334a45a8ff | 613 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 614 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 615 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 616 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 617 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 618 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 619 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 620 | */ |
| bogdanm | 0:9b334a45a8ff | 621 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 622 | { |
| bogdanm | 0:9b334a45a8ff | 623 | uint32_t tmpccer = 0; |
| bogdanm | 0:9b334a45a8ff | 624 | |
| bogdanm | 0:9b334a45a8ff | 625 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 626 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 627 | |
| bogdanm | 0:9b334a45a8ff | 628 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 629 | { |
| bogdanm | 0:9b334a45a8ff | 630 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 631 | { |
| bogdanm | 0:9b334a45a8ff | 632 | /* Disable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 633 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 634 | } |
| bogdanm | 0:9b334a45a8ff | 635 | break; |
| bogdanm | 0:9b334a45a8ff | 636 | |
| bogdanm | 0:9b334a45a8ff | 637 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 638 | { |
| bogdanm | 0:9b334a45a8ff | 639 | /* Disable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 640 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| bogdanm | 0:9b334a45a8ff | 641 | } |
| bogdanm | 0:9b334a45a8ff | 642 | break; |
| bogdanm | 0:9b334a45a8ff | 643 | |
| bogdanm | 0:9b334a45a8ff | 644 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 645 | { |
| bogdanm | 0:9b334a45a8ff | 646 | /* Disable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 647 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
| bogdanm | 0:9b334a45a8ff | 648 | } |
| bogdanm | 0:9b334a45a8ff | 649 | break; |
| bogdanm | 0:9b334a45a8ff | 650 | |
| bogdanm | 0:9b334a45a8ff | 651 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 652 | { |
| bogdanm | 0:9b334a45a8ff | 653 | /* Disable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 654 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
| bogdanm | 0:9b334a45a8ff | 655 | } |
| bogdanm | 0:9b334a45a8ff | 656 | break; |
| bogdanm | 0:9b334a45a8ff | 657 | |
| bogdanm | 0:9b334a45a8ff | 658 | default: |
| bogdanm | 0:9b334a45a8ff | 659 | break; |
| bogdanm | 0:9b334a45a8ff | 660 | } |
| bogdanm | 0:9b334a45a8ff | 661 | |
| bogdanm | 0:9b334a45a8ff | 662 | /* Disable the Capture compare channel N */ |
| bogdanm | 0:9b334a45a8ff | 663 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 664 | |
| bogdanm | 0:9b334a45a8ff | 665 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
| bogdanm | 0:9b334a45a8ff | 666 | tmpccer = htim->Instance->CCER; |
| bogdanm | 0:9b334a45a8ff | 667 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
| bogdanm | 0:9b334a45a8ff | 668 | { |
| bogdanm | 0:9b334a45a8ff | 669 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
| bogdanm | 0:9b334a45a8ff | 670 | } |
| bogdanm | 0:9b334a45a8ff | 671 | |
| bogdanm | 0:9b334a45a8ff | 672 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 673 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 674 | |
| bogdanm | 0:9b334a45a8ff | 675 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 676 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 677 | |
| bogdanm | 0:9b334a45a8ff | 678 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 679 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 680 | } |
| bogdanm | 0:9b334a45a8ff | 681 | |
| bogdanm | 0:9b334a45a8ff | 682 | /** |
| bogdanm | 0:9b334a45a8ff | 683 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
| bogdanm | 0:9b334a45a8ff | 684 | * on the complementary output. |
| bogdanm | 0:9b334a45a8ff | 685 | * @param htim : TIM Output Compare handle |
| bogdanm | 0:9b334a45a8ff | 686 | * @param Channel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 687 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 688 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 689 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 690 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 691 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 692 | * @param pData : The source Buffer address. |
| bogdanm | 0:9b334a45a8ff | 693 | * @param Length : The length of data to be transferred from memory to TIM peripheral |
| bogdanm | 0:9b334a45a8ff | 694 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 695 | */ |
| bogdanm | 0:9b334a45a8ff | 696 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
| bogdanm | 0:9b334a45a8ff | 697 | { |
| bogdanm | 0:9b334a45a8ff | 698 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 699 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 700 | |
| bogdanm | 0:9b334a45a8ff | 701 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| bogdanm | 0:9b334a45a8ff | 702 | { |
| bogdanm | 0:9b334a45a8ff | 703 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 704 | } |
| bogdanm | 0:9b334a45a8ff | 705 | else if((htim->State == HAL_TIM_STATE_READY)) |
| bogdanm | 0:9b334a45a8ff | 706 | { |
| bogdanm | 0:9b334a45a8ff | 707 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| bogdanm | 0:9b334a45a8ff | 708 | { |
| bogdanm | 0:9b334a45a8ff | 709 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 710 | } |
| bogdanm | 0:9b334a45a8ff | 711 | else |
| bogdanm | 0:9b334a45a8ff | 712 | { |
| bogdanm | 0:9b334a45a8ff | 713 | htim->State = HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 714 | } |
| bogdanm | 0:9b334a45a8ff | 715 | } |
| bogdanm | 0:9b334a45a8ff | 716 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 717 | { |
| bogdanm | 0:9b334a45a8ff | 718 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 719 | { |
| bogdanm | 0:9b334a45a8ff | 720 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 721 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 722 | |
| bogdanm | 0:9b334a45a8ff | 723 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 724 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 725 | |
| bogdanm | 0:9b334a45a8ff | 726 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 727 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
| bogdanm | 0:9b334a45a8ff | 728 | |
| bogdanm | 0:9b334a45a8ff | 729 | /* Enable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 730 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| bogdanm | 0:9b334a45a8ff | 731 | } |
| bogdanm | 0:9b334a45a8ff | 732 | break; |
| bogdanm | 0:9b334a45a8ff | 733 | |
| bogdanm | 0:9b334a45a8ff | 734 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 735 | { |
| bogdanm | 0:9b334a45a8ff | 736 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 737 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 738 | |
| bogdanm | 0:9b334a45a8ff | 739 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 740 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 741 | |
| bogdanm | 0:9b334a45a8ff | 742 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 743 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
| bogdanm | 0:9b334a45a8ff | 744 | |
| bogdanm | 0:9b334a45a8ff | 745 | /* Enable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 746 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
| bogdanm | 0:9b334a45a8ff | 747 | } |
| bogdanm | 0:9b334a45a8ff | 748 | break; |
| bogdanm | 0:9b334a45a8ff | 749 | |
| bogdanm | 0:9b334a45a8ff | 750 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 751 | { |
| bogdanm | 0:9b334a45a8ff | 752 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 753 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 754 | |
| bogdanm | 0:9b334a45a8ff | 755 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 756 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 757 | |
| bogdanm | 0:9b334a45a8ff | 758 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 759 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
| bogdanm | 0:9b334a45a8ff | 760 | |
| bogdanm | 0:9b334a45a8ff | 761 | /* Enable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 762 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
| bogdanm | 0:9b334a45a8ff | 763 | } |
| bogdanm | 0:9b334a45a8ff | 764 | break; |
| bogdanm | 0:9b334a45a8ff | 765 | |
| bogdanm | 0:9b334a45a8ff | 766 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 767 | { |
| bogdanm | 0:9b334a45a8ff | 768 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 769 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 770 | |
| bogdanm | 0:9b334a45a8ff | 771 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 772 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 773 | |
| bogdanm | 0:9b334a45a8ff | 774 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 775 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
| bogdanm | 0:9b334a45a8ff | 776 | |
| bogdanm | 0:9b334a45a8ff | 777 | /* Enable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 778 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
| bogdanm | 0:9b334a45a8ff | 779 | } |
| bogdanm | 0:9b334a45a8ff | 780 | break; |
| bogdanm | 0:9b334a45a8ff | 781 | |
| bogdanm | 0:9b334a45a8ff | 782 | default: |
| bogdanm | 0:9b334a45a8ff | 783 | break; |
| bogdanm | 0:9b334a45a8ff | 784 | } |
| bogdanm | 0:9b334a45a8ff | 785 | |
| bogdanm | 0:9b334a45a8ff | 786 | /* Enable the Capture compare channel N */ |
| bogdanm | 0:9b334a45a8ff | 787 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 788 | |
| bogdanm | 0:9b334a45a8ff | 789 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 790 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 791 | |
| bogdanm | 0:9b334a45a8ff | 792 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 793 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 794 | |
| bogdanm | 0:9b334a45a8ff | 795 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 796 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 797 | } |
| bogdanm | 0:9b334a45a8ff | 798 | |
| bogdanm | 0:9b334a45a8ff | 799 | /** |
| bogdanm | 0:9b334a45a8ff | 800 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
| bogdanm | 0:9b334a45a8ff | 801 | * on the complementary output. |
| bogdanm | 0:9b334a45a8ff | 802 | * @param htim : TIM Output Compare handle |
| bogdanm | 0:9b334a45a8ff | 803 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 804 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 805 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 806 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 807 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 808 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 809 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 810 | */ |
| bogdanm | 0:9b334a45a8ff | 811 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 812 | { |
| bogdanm | 0:9b334a45a8ff | 813 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 814 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 815 | |
| bogdanm | 0:9b334a45a8ff | 816 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 817 | { |
| bogdanm | 0:9b334a45a8ff | 818 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 819 | { |
| bogdanm | 0:9b334a45a8ff | 820 | /* Disable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 821 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| bogdanm | 0:9b334a45a8ff | 822 | } |
| bogdanm | 0:9b334a45a8ff | 823 | break; |
| bogdanm | 0:9b334a45a8ff | 824 | |
| bogdanm | 0:9b334a45a8ff | 825 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 826 | { |
| bogdanm | 0:9b334a45a8ff | 827 | /* Disable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 828 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
| bogdanm | 0:9b334a45a8ff | 829 | } |
| bogdanm | 0:9b334a45a8ff | 830 | break; |
| bogdanm | 0:9b334a45a8ff | 831 | |
| bogdanm | 0:9b334a45a8ff | 832 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 833 | { |
| bogdanm | 0:9b334a45a8ff | 834 | /* Disable the TIM Output Compare DMA request */ |
| bogdanm | 0:9b334a45a8ff | 835 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
| bogdanm | 0:9b334a45a8ff | 836 | } |
| bogdanm | 0:9b334a45a8ff | 837 | break; |
| bogdanm | 0:9b334a45a8ff | 838 | |
| bogdanm | 0:9b334a45a8ff | 839 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 840 | { |
| bogdanm | 0:9b334a45a8ff | 841 | /* Disable the TIM Output Compare interrupt */ |
| bogdanm | 0:9b334a45a8ff | 842 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
| bogdanm | 0:9b334a45a8ff | 843 | } |
| bogdanm | 0:9b334a45a8ff | 844 | break; |
| bogdanm | 0:9b334a45a8ff | 845 | |
| bogdanm | 0:9b334a45a8ff | 846 | default: |
| bogdanm | 0:9b334a45a8ff | 847 | break; |
| bogdanm | 0:9b334a45a8ff | 848 | } |
| bogdanm | 0:9b334a45a8ff | 849 | |
| bogdanm | 0:9b334a45a8ff | 850 | /* Disable the Capture compare channel N */ |
| bogdanm | 0:9b334a45a8ff | 851 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 852 | |
| bogdanm | 0:9b334a45a8ff | 853 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 854 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 855 | |
| bogdanm | 0:9b334a45a8ff | 856 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 857 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 858 | |
| bogdanm | 0:9b334a45a8ff | 859 | /* Change the htim state */ |
| bogdanm | 0:9b334a45a8ff | 860 | htim->State = HAL_TIM_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 861 | |
| bogdanm | 0:9b334a45a8ff | 862 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 863 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 864 | } |
| bogdanm | 0:9b334a45a8ff | 865 | |
| bogdanm | 0:9b334a45a8ff | 866 | /** |
| bogdanm | 0:9b334a45a8ff | 867 | * @} |
| bogdanm | 0:9b334a45a8ff | 868 | */ |
| bogdanm | 0:9b334a45a8ff | 869 | |
| bogdanm | 0:9b334a45a8ff | 870 | /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions |
| bogdanm | 0:9b334a45a8ff | 871 | * @brief Timer Complementary PWM functions |
| bogdanm | 0:9b334a45a8ff | 872 | * |
| bogdanm | 0:9b334a45a8ff | 873 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 874 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 875 | ##### Timer Complementary PWM functions ##### |
| bogdanm | 0:9b334a45a8ff | 876 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 877 | [..] |
| bogdanm | 0:9b334a45a8ff | 878 | This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 879 | (+) Start the Complementary PWM. |
| bogdanm | 0:9b334a45a8ff | 880 | (+) Stop the Complementary PWM. |
| bogdanm | 0:9b334a45a8ff | 881 | (+) Start the Complementary PWM and enable interrupts. |
| bogdanm | 0:9b334a45a8ff | 882 | (+) Stop the Complementary PWM and disable interrupts. |
| bogdanm | 0:9b334a45a8ff | 883 | (+) Start the Complementary PWM and enable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 884 | (+) Stop the Complementary PWM and disable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 885 | (+) Start the Complementary Input Capture measurement. |
| bogdanm | 0:9b334a45a8ff | 886 | (+) Stop the Complementary Input Capture. |
| bogdanm | 0:9b334a45a8ff | 887 | (+) Start the Complementary Input Capture and enable interrupts. |
| bogdanm | 0:9b334a45a8ff | 888 | (+) Stop the Complementary Input Capture and disable interrupts. |
| bogdanm | 0:9b334a45a8ff | 889 | (+) Start the Complementary Input Capture and enable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 890 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
| bogdanm | 0:9b334a45a8ff | 891 | (+) Start the Complementary One Pulse generation. |
| bogdanm | 0:9b334a45a8ff | 892 | (+) Stop the Complementary One Pulse. |
| bogdanm | 0:9b334a45a8ff | 893 | (+) Start the Complementary One Pulse and enable interrupts. |
| bogdanm | 0:9b334a45a8ff | 894 | (+) Stop the Complementary One Pulse and disable interrupts. |
| bogdanm | 0:9b334a45a8ff | 895 | |
| bogdanm | 0:9b334a45a8ff | 896 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 897 | * @{ |
| bogdanm | 0:9b334a45a8ff | 898 | */ |
| bogdanm | 0:9b334a45a8ff | 899 | |
| bogdanm | 0:9b334a45a8ff | 900 | /** |
| bogdanm | 0:9b334a45a8ff | 901 | * @brief Starts the PWM signal generation on the complementary output. |
| bogdanm | 0:9b334a45a8ff | 902 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 903 | * @param Channel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 904 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 905 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 906 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 907 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 908 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 909 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 910 | */ |
| bogdanm | 0:9b334a45a8ff | 911 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 912 | { |
| bogdanm | 0:9b334a45a8ff | 913 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 914 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 915 | |
| bogdanm | 0:9b334a45a8ff | 916 | /* Enable the complementary PWM output */ |
| bogdanm | 0:9b334a45a8ff | 917 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 918 | |
| bogdanm | 0:9b334a45a8ff | 919 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 920 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 921 | |
| bogdanm | 0:9b334a45a8ff | 922 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 923 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 924 | |
| bogdanm | 0:9b334a45a8ff | 925 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 926 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 927 | } |
| bogdanm | 0:9b334a45a8ff | 928 | |
| bogdanm | 0:9b334a45a8ff | 929 | /** |
| bogdanm | 0:9b334a45a8ff | 930 | * @brief Stops the PWM signal generation on the complementary output. |
| bogdanm | 0:9b334a45a8ff | 931 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 932 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 933 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 934 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 935 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 936 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 937 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 938 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 939 | */ |
| bogdanm | 0:9b334a45a8ff | 940 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 941 | { |
| bogdanm | 0:9b334a45a8ff | 942 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 943 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 944 | |
| bogdanm | 0:9b334a45a8ff | 945 | /* Disable the complementary PWM output */ |
| bogdanm | 0:9b334a45a8ff | 946 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 947 | |
| bogdanm | 0:9b334a45a8ff | 948 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 949 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 950 | |
| bogdanm | 0:9b334a45a8ff | 951 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 952 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 953 | |
| bogdanm | 0:9b334a45a8ff | 954 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 955 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 956 | } |
| bogdanm | 0:9b334a45a8ff | 957 | |
| bogdanm | 0:9b334a45a8ff | 958 | /** |
| bogdanm | 0:9b334a45a8ff | 959 | * @brief Starts the PWM signal generation in interrupt mode on the |
| bogdanm | 0:9b334a45a8ff | 960 | * complementary output. |
| bogdanm | 0:9b334a45a8ff | 961 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 962 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 963 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 964 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 965 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 966 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 967 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 968 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 969 | */ |
| bogdanm | 0:9b334a45a8ff | 970 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 971 | { |
| bogdanm | 0:9b334a45a8ff | 972 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 973 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 974 | |
| bogdanm | 0:9b334a45a8ff | 975 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 976 | { |
| bogdanm | 0:9b334a45a8ff | 977 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 978 | { |
| bogdanm | 0:9b334a45a8ff | 979 | /* Enable the TIM Capture/Compare 1 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 980 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 981 | } |
| bogdanm | 0:9b334a45a8ff | 982 | break; |
| bogdanm | 0:9b334a45a8ff | 983 | |
| bogdanm | 0:9b334a45a8ff | 984 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 985 | { |
| bogdanm | 0:9b334a45a8ff | 986 | /* Enable the TIM Capture/Compare 2 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 987 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| bogdanm | 0:9b334a45a8ff | 988 | } |
| bogdanm | 0:9b334a45a8ff | 989 | break; |
| bogdanm | 0:9b334a45a8ff | 990 | |
| bogdanm | 0:9b334a45a8ff | 991 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 992 | { |
| bogdanm | 0:9b334a45a8ff | 993 | /* Enable the TIM Capture/Compare 3 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 994 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
| bogdanm | 0:9b334a45a8ff | 995 | } |
| bogdanm | 0:9b334a45a8ff | 996 | break; |
| bogdanm | 0:9b334a45a8ff | 997 | |
| bogdanm | 0:9b334a45a8ff | 998 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 999 | { |
| bogdanm | 0:9b334a45a8ff | 1000 | /* Enable the TIM Capture/Compare 4 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1001 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
| bogdanm | 0:9b334a45a8ff | 1002 | } |
| bogdanm | 0:9b334a45a8ff | 1003 | break; |
| bogdanm | 0:9b334a45a8ff | 1004 | |
| bogdanm | 0:9b334a45a8ff | 1005 | default: |
| bogdanm | 0:9b334a45a8ff | 1006 | break; |
| bogdanm | 0:9b334a45a8ff | 1007 | } |
| bogdanm | 0:9b334a45a8ff | 1008 | |
| bogdanm | 0:9b334a45a8ff | 1009 | /* Enable the TIM Break interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1010 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
| bogdanm | 0:9b334a45a8ff | 1011 | |
| bogdanm | 0:9b334a45a8ff | 1012 | /* Enable the complementary PWM output */ |
| bogdanm | 0:9b334a45a8ff | 1013 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 1014 | |
| bogdanm | 0:9b334a45a8ff | 1015 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1016 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1017 | |
| bogdanm | 0:9b334a45a8ff | 1018 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 1019 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1020 | |
| bogdanm | 0:9b334a45a8ff | 1021 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1022 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1023 | } |
| bogdanm | 0:9b334a45a8ff | 1024 | |
| bogdanm | 0:9b334a45a8ff | 1025 | /** |
| bogdanm | 0:9b334a45a8ff | 1026 | * @brief Stops the PWM signal generation in interrupt mode on the |
| bogdanm | 0:9b334a45a8ff | 1027 | * complementary output. |
| bogdanm | 0:9b334a45a8ff | 1028 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1029 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 1030 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1031 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1032 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1033 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 1034 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 1035 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1036 | */ |
| bogdanm | 0:9b334a45a8ff | 1037 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 1038 | { |
| bogdanm | 0:9b334a45a8ff | 1039 | uint32_t tmpccer = 0; |
| bogdanm | 0:9b334a45a8ff | 1040 | |
| bogdanm | 0:9b334a45a8ff | 1041 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1042 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 1043 | |
| bogdanm | 0:9b334a45a8ff | 1044 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 1045 | { |
| bogdanm | 0:9b334a45a8ff | 1046 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 1047 | { |
| bogdanm | 0:9b334a45a8ff | 1048 | /* Disable the TIM Capture/Compare 1 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1049 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 1050 | } |
| bogdanm | 0:9b334a45a8ff | 1051 | break; |
| bogdanm | 0:9b334a45a8ff | 1052 | |
| bogdanm | 0:9b334a45a8ff | 1053 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 1054 | { |
| bogdanm | 0:9b334a45a8ff | 1055 | /* Disable the TIM Capture/Compare 2 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1056 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| bogdanm | 0:9b334a45a8ff | 1057 | } |
| bogdanm | 0:9b334a45a8ff | 1058 | break; |
| bogdanm | 0:9b334a45a8ff | 1059 | |
| bogdanm | 0:9b334a45a8ff | 1060 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 1061 | { |
| bogdanm | 0:9b334a45a8ff | 1062 | /* Disable the TIM Capture/Compare 3 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1063 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
| bogdanm | 0:9b334a45a8ff | 1064 | } |
| bogdanm | 0:9b334a45a8ff | 1065 | break; |
| bogdanm | 0:9b334a45a8ff | 1066 | |
| bogdanm | 0:9b334a45a8ff | 1067 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 1068 | { |
| bogdanm | 0:9b334a45a8ff | 1069 | /* Disable the TIM Capture/Compare 3 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1070 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
| bogdanm | 0:9b334a45a8ff | 1071 | } |
| bogdanm | 0:9b334a45a8ff | 1072 | break; |
| bogdanm | 0:9b334a45a8ff | 1073 | |
| bogdanm | 0:9b334a45a8ff | 1074 | default: |
| bogdanm | 0:9b334a45a8ff | 1075 | break; |
| bogdanm | 0:9b334a45a8ff | 1076 | } |
| bogdanm | 0:9b334a45a8ff | 1077 | |
| bogdanm | 0:9b334a45a8ff | 1078 | /* Disable the complementary PWM output */ |
| bogdanm | 0:9b334a45a8ff | 1079 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 1080 | |
| bogdanm | 0:9b334a45a8ff | 1081 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
| bogdanm | 0:9b334a45a8ff | 1082 | tmpccer = htim->Instance->CCER; |
| bogdanm | 0:9b334a45a8ff | 1083 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
| bogdanm | 0:9b334a45a8ff | 1084 | { |
| bogdanm | 0:9b334a45a8ff | 1085 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
| bogdanm | 0:9b334a45a8ff | 1086 | } |
| bogdanm | 0:9b334a45a8ff | 1087 | |
| bogdanm | 0:9b334a45a8ff | 1088 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1089 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1090 | |
| bogdanm | 0:9b334a45a8ff | 1091 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 1092 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1093 | |
| bogdanm | 0:9b334a45a8ff | 1094 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1095 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1096 | } |
| bogdanm | 0:9b334a45a8ff | 1097 | |
| bogdanm | 0:9b334a45a8ff | 1098 | /** |
| bogdanm | 0:9b334a45a8ff | 1099 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
| bogdanm | 0:9b334a45a8ff | 1100 | * complementary output |
| bogdanm | 0:9b334a45a8ff | 1101 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1102 | * @param Channel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 1103 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1104 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1105 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1106 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 1107 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 1108 | * @param pData : The source Buffer address. |
| bogdanm | 0:9b334a45a8ff | 1109 | * @param Length : The length of data to be transferred from memory to TIM peripheral |
| bogdanm | 0:9b334a45a8ff | 1110 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1111 | */ |
| bogdanm | 0:9b334a45a8ff | 1112 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
| bogdanm | 0:9b334a45a8ff | 1113 | { |
| bogdanm | 0:9b334a45a8ff | 1114 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1115 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 1116 | |
| bogdanm | 0:9b334a45a8ff | 1117 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| bogdanm | 0:9b334a45a8ff | 1118 | { |
| bogdanm | 0:9b334a45a8ff | 1119 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 1120 | } |
| bogdanm | 0:9b334a45a8ff | 1121 | else if((htim->State == HAL_TIM_STATE_READY)) |
| bogdanm | 0:9b334a45a8ff | 1122 | { |
| bogdanm | 0:9b334a45a8ff | 1123 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| bogdanm | 0:9b334a45a8ff | 1124 | { |
| bogdanm | 0:9b334a45a8ff | 1125 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 1126 | } |
| bogdanm | 0:9b334a45a8ff | 1127 | else |
| bogdanm | 0:9b334a45a8ff | 1128 | { |
| bogdanm | 0:9b334a45a8ff | 1129 | htim->State = HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 1130 | } |
| bogdanm | 0:9b334a45a8ff | 1131 | } |
| bogdanm | 0:9b334a45a8ff | 1132 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 1133 | { |
| bogdanm | 0:9b334a45a8ff | 1134 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 1135 | { |
| bogdanm | 0:9b334a45a8ff | 1136 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 1137 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 1138 | |
| bogdanm | 0:9b334a45a8ff | 1139 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 1140 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 1141 | |
| bogdanm | 0:9b334a45a8ff | 1142 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 1143 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
| bogdanm | 0:9b334a45a8ff | 1144 | |
| bogdanm | 0:9b334a45a8ff | 1145 | /* Enable the TIM Capture/Compare 1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1146 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| bogdanm | 0:9b334a45a8ff | 1147 | } |
| bogdanm | 0:9b334a45a8ff | 1148 | break; |
| bogdanm | 0:9b334a45a8ff | 1149 | |
| bogdanm | 0:9b334a45a8ff | 1150 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 1151 | { |
| bogdanm | 0:9b334a45a8ff | 1152 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 1153 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 1154 | |
| bogdanm | 0:9b334a45a8ff | 1155 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 1156 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 1157 | |
| bogdanm | 0:9b334a45a8ff | 1158 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 1159 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
| bogdanm | 0:9b334a45a8ff | 1160 | |
| bogdanm | 0:9b334a45a8ff | 1161 | /* Enable the TIM Capture/Compare 2 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1162 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
| bogdanm | 0:9b334a45a8ff | 1163 | } |
| bogdanm | 0:9b334a45a8ff | 1164 | break; |
| bogdanm | 0:9b334a45a8ff | 1165 | |
| bogdanm | 0:9b334a45a8ff | 1166 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 1167 | { |
| bogdanm | 0:9b334a45a8ff | 1168 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 1169 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 1170 | |
| bogdanm | 0:9b334a45a8ff | 1171 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 1172 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 1173 | |
| bogdanm | 0:9b334a45a8ff | 1174 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 1175 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
| bogdanm | 0:9b334a45a8ff | 1176 | |
| bogdanm | 0:9b334a45a8ff | 1177 | /* Enable the TIM Capture/Compare 3 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1178 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
| bogdanm | 0:9b334a45a8ff | 1179 | } |
| bogdanm | 0:9b334a45a8ff | 1180 | break; |
| bogdanm | 0:9b334a45a8ff | 1181 | |
| bogdanm | 0:9b334a45a8ff | 1182 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 1183 | { |
| bogdanm | 0:9b334a45a8ff | 1184 | /* Set the DMA Period elapsed callback */ |
| bogdanm | 0:9b334a45a8ff | 1185 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; |
| bogdanm | 0:9b334a45a8ff | 1186 | |
| bogdanm | 0:9b334a45a8ff | 1187 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 1188 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; |
| bogdanm | 0:9b334a45a8ff | 1189 | |
| bogdanm | 0:9b334a45a8ff | 1190 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 1191 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
| bogdanm | 0:9b334a45a8ff | 1192 | |
| bogdanm | 0:9b334a45a8ff | 1193 | /* Enable the TIM Capture/Compare 4 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1194 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
| bogdanm | 0:9b334a45a8ff | 1195 | } |
| bogdanm | 0:9b334a45a8ff | 1196 | break; |
| bogdanm | 0:9b334a45a8ff | 1197 | |
| bogdanm | 0:9b334a45a8ff | 1198 | default: |
| bogdanm | 0:9b334a45a8ff | 1199 | break; |
| bogdanm | 0:9b334a45a8ff | 1200 | } |
| bogdanm | 0:9b334a45a8ff | 1201 | |
| bogdanm | 0:9b334a45a8ff | 1202 | /* Enable the complementary PWM output */ |
| bogdanm | 0:9b334a45a8ff | 1203 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 1204 | |
| bogdanm | 0:9b334a45a8ff | 1205 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1206 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1207 | |
| bogdanm | 0:9b334a45a8ff | 1208 | /* Enable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 1209 | __HAL_TIM_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1210 | |
| bogdanm | 0:9b334a45a8ff | 1211 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1212 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1213 | } |
| bogdanm | 0:9b334a45a8ff | 1214 | |
| bogdanm | 0:9b334a45a8ff | 1215 | /** |
| bogdanm | 0:9b334a45a8ff | 1216 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
| bogdanm | 0:9b334a45a8ff | 1217 | * output |
| bogdanm | 0:9b334a45a8ff | 1218 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1219 | * @param Channel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 1220 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1221 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1222 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1223 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 1224 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 1225 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1226 | */ |
| bogdanm | 0:9b334a45a8ff | 1227 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 1228 | { |
| bogdanm | 0:9b334a45a8ff | 1229 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1230 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| bogdanm | 0:9b334a45a8ff | 1231 | |
| bogdanm | 0:9b334a45a8ff | 1232 | switch (Channel) |
| bogdanm | 0:9b334a45a8ff | 1233 | { |
| bogdanm | 0:9b334a45a8ff | 1234 | case TIM_CHANNEL_1: |
| bogdanm | 0:9b334a45a8ff | 1235 | { |
| bogdanm | 0:9b334a45a8ff | 1236 | /* Disable the TIM Capture/Compare 1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1237 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| bogdanm | 0:9b334a45a8ff | 1238 | } |
| bogdanm | 0:9b334a45a8ff | 1239 | break; |
| bogdanm | 0:9b334a45a8ff | 1240 | |
| bogdanm | 0:9b334a45a8ff | 1241 | case TIM_CHANNEL_2: |
| bogdanm | 0:9b334a45a8ff | 1242 | { |
| bogdanm | 0:9b334a45a8ff | 1243 | /* Disable the TIM Capture/Compare 2 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1244 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
| bogdanm | 0:9b334a45a8ff | 1245 | } |
| bogdanm | 0:9b334a45a8ff | 1246 | break; |
| bogdanm | 0:9b334a45a8ff | 1247 | |
| bogdanm | 0:9b334a45a8ff | 1248 | case TIM_CHANNEL_3: |
| bogdanm | 0:9b334a45a8ff | 1249 | { |
| bogdanm | 0:9b334a45a8ff | 1250 | /* Disable the TIM Capture/Compare 3 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1251 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
| bogdanm | 0:9b334a45a8ff | 1252 | } |
| bogdanm | 0:9b334a45a8ff | 1253 | break; |
| bogdanm | 0:9b334a45a8ff | 1254 | |
| bogdanm | 0:9b334a45a8ff | 1255 | case TIM_CHANNEL_4: |
| bogdanm | 0:9b334a45a8ff | 1256 | { |
| bogdanm | 0:9b334a45a8ff | 1257 | /* Disable the TIM Capture/Compare 4 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 1258 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
| bogdanm | 0:9b334a45a8ff | 1259 | } |
| bogdanm | 0:9b334a45a8ff | 1260 | break; |
| bogdanm | 0:9b334a45a8ff | 1261 | |
| bogdanm | 0:9b334a45a8ff | 1262 | default: |
| bogdanm | 0:9b334a45a8ff | 1263 | break; |
| bogdanm | 0:9b334a45a8ff | 1264 | } |
| bogdanm | 0:9b334a45a8ff | 1265 | |
| bogdanm | 0:9b334a45a8ff | 1266 | /* Disable the complementary PWM output */ |
| bogdanm | 0:9b334a45a8ff | 1267 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 1268 | |
| bogdanm | 0:9b334a45a8ff | 1269 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1270 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1271 | |
| bogdanm | 0:9b334a45a8ff | 1272 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 1273 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1274 | |
| bogdanm | 0:9b334a45a8ff | 1275 | /* Change the htim state */ |
| bogdanm | 0:9b334a45a8ff | 1276 | htim->State = HAL_TIM_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1277 | |
| bogdanm | 0:9b334a45a8ff | 1278 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1279 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1280 | } |
| bogdanm | 0:9b334a45a8ff | 1281 | |
| bogdanm | 0:9b334a45a8ff | 1282 | /** |
| bogdanm | 0:9b334a45a8ff | 1283 | * @} |
| bogdanm | 0:9b334a45a8ff | 1284 | */ |
| bogdanm | 0:9b334a45a8ff | 1285 | |
| bogdanm | 0:9b334a45a8ff | 1286 | /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions |
| bogdanm | 0:9b334a45a8ff | 1287 | * @brief Timer Complementary One Pulse functions |
| bogdanm | 0:9b334a45a8ff | 1288 | * |
| bogdanm | 0:9b334a45a8ff | 1289 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 1290 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1291 | ##### Timer Complementary One Pulse functions ##### |
| bogdanm | 0:9b334a45a8ff | 1292 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1293 | [..] |
| bogdanm | 0:9b334a45a8ff | 1294 | This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 1295 | (+) Start the Complementary One Pulse generation. |
| bogdanm | 0:9b334a45a8ff | 1296 | (+) Stop the Complementary One Pulse. |
| bogdanm | 0:9b334a45a8ff | 1297 | (+) Start the Complementary One Pulse and enable interrupts. |
| bogdanm | 0:9b334a45a8ff | 1298 | (+) Stop the Complementary One Pulse and disable interrupts. |
| bogdanm | 0:9b334a45a8ff | 1299 | |
| bogdanm | 0:9b334a45a8ff | 1300 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 1301 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1302 | */ |
| bogdanm | 0:9b334a45a8ff | 1303 | |
| bogdanm | 0:9b334a45a8ff | 1304 | /** |
| bogdanm | 0:9b334a45a8ff | 1305 | * @brief Starts the TIM One Pulse signal generation on the complemetary |
| bogdanm | 0:9b334a45a8ff | 1306 | * output. |
| bogdanm | 0:9b334a45a8ff | 1307 | * @param htim : TIM One Pulse handle |
| bogdanm | 0:9b334a45a8ff | 1308 | * @param OutputChannel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 1309 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1310 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1311 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1312 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1313 | */ |
| bogdanm | 0:9b334a45a8ff | 1314 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| bogdanm | 0:9b334a45a8ff | 1315 | { |
| bogdanm | 0:9b334a45a8ff | 1316 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1317 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| bogdanm | 0:9b334a45a8ff | 1318 | |
| bogdanm | 0:9b334a45a8ff | 1319 | /* Enable the complementary One Pulse output */ |
| bogdanm | 0:9b334a45a8ff | 1320 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 1321 | |
| bogdanm | 0:9b334a45a8ff | 1322 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1323 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1324 | |
| bogdanm | 0:9b334a45a8ff | 1325 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1326 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1327 | } |
| bogdanm | 0:9b334a45a8ff | 1328 | |
| bogdanm | 0:9b334a45a8ff | 1329 | /** |
| bogdanm | 0:9b334a45a8ff | 1330 | * @brief Stops the TIM One Pulse signal generation on the complementary |
| bogdanm | 0:9b334a45a8ff | 1331 | * output. |
| bogdanm | 0:9b334a45a8ff | 1332 | * @param htim : TIM One Pulse handle |
| bogdanm | 0:9b334a45a8ff | 1333 | * @param OutputChannel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 1334 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1335 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1336 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1337 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1338 | */ |
| bogdanm | 0:9b334a45a8ff | 1339 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| bogdanm | 0:9b334a45a8ff | 1340 | { |
| bogdanm | 0:9b334a45a8ff | 1341 | |
| bogdanm | 0:9b334a45a8ff | 1342 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1343 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| bogdanm | 0:9b334a45a8ff | 1344 | |
| bogdanm | 0:9b334a45a8ff | 1345 | /* Disable the complementary One Pulse output */ |
| bogdanm | 0:9b334a45a8ff | 1346 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 1347 | |
| bogdanm | 0:9b334a45a8ff | 1348 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1349 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1350 | |
| bogdanm | 0:9b334a45a8ff | 1351 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 1352 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1353 | |
| bogdanm | 0:9b334a45a8ff | 1354 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1355 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1356 | } |
| bogdanm | 0:9b334a45a8ff | 1357 | |
| bogdanm | 0:9b334a45a8ff | 1358 | /** |
| bogdanm | 0:9b334a45a8ff | 1359 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
| bogdanm | 0:9b334a45a8ff | 1360 | * complementary channel. |
| bogdanm | 0:9b334a45a8ff | 1361 | * @param htim : TIM One Pulse handle |
| bogdanm | 0:9b334a45a8ff | 1362 | * @param OutputChannel : TIM Channel to be enabled |
| bogdanm | 0:9b334a45a8ff | 1363 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1364 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1365 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1366 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1367 | */ |
| bogdanm | 0:9b334a45a8ff | 1368 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| bogdanm | 0:9b334a45a8ff | 1369 | { |
| bogdanm | 0:9b334a45a8ff | 1370 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1371 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| bogdanm | 0:9b334a45a8ff | 1372 | |
| bogdanm | 0:9b334a45a8ff | 1373 | /* Enable the TIM Capture/Compare 1 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1374 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 1375 | |
| bogdanm | 0:9b334a45a8ff | 1376 | /* Enable the TIM Capture/Compare 2 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1377 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| bogdanm | 0:9b334a45a8ff | 1378 | |
| bogdanm | 0:9b334a45a8ff | 1379 | /* Enable the complementary One Pulse output */ |
| bogdanm | 0:9b334a45a8ff | 1380 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
| bogdanm | 0:9b334a45a8ff | 1381 | |
| bogdanm | 0:9b334a45a8ff | 1382 | /* Enable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1383 | __HAL_TIM_MOE_ENABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1384 | |
| bogdanm | 0:9b334a45a8ff | 1385 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1386 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1387 | } |
| bogdanm | 0:9b334a45a8ff | 1388 | |
| bogdanm | 0:9b334a45a8ff | 1389 | /** |
| bogdanm | 0:9b334a45a8ff | 1390 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
| bogdanm | 0:9b334a45a8ff | 1391 | * complementary channel. |
| bogdanm | 0:9b334a45a8ff | 1392 | * @param htim : TIM One Pulse handle |
| bogdanm | 0:9b334a45a8ff | 1393 | * @param OutputChannel : TIM Channel to be disabled |
| bogdanm | 0:9b334a45a8ff | 1394 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1395 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 1396 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 1397 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1398 | */ |
| bogdanm | 0:9b334a45a8ff | 1399 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| bogdanm | 0:9b334a45a8ff | 1400 | { |
| bogdanm | 0:9b334a45a8ff | 1401 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1402 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| bogdanm | 0:9b334a45a8ff | 1403 | |
| bogdanm | 0:9b334a45a8ff | 1404 | /* Disable the TIM Capture/Compare 1 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1405 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| bogdanm | 0:9b334a45a8ff | 1406 | |
| bogdanm | 0:9b334a45a8ff | 1407 | /* Disable the TIM Capture/Compare 2 interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1408 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| bogdanm | 0:9b334a45a8ff | 1409 | |
| bogdanm | 0:9b334a45a8ff | 1410 | /* Disable the complementary One Pulse output */ |
| bogdanm | 0:9b334a45a8ff | 1411 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
| bogdanm | 0:9b334a45a8ff | 1412 | |
| bogdanm | 0:9b334a45a8ff | 1413 | /* Disable the Main Ouput */ |
| bogdanm | 0:9b334a45a8ff | 1414 | __HAL_TIM_MOE_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1415 | |
| bogdanm | 0:9b334a45a8ff | 1416 | /* Disable the Peripheral */ |
| bogdanm | 0:9b334a45a8ff | 1417 | __HAL_TIM_DISABLE(htim); |
| bogdanm | 0:9b334a45a8ff | 1418 | |
| bogdanm | 0:9b334a45a8ff | 1419 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1420 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1421 | } |
| bogdanm | 0:9b334a45a8ff | 1422 | |
| bogdanm | 0:9b334a45a8ff | 1423 | /** |
| bogdanm | 0:9b334a45a8ff | 1424 | * @} |
| bogdanm | 0:9b334a45a8ff | 1425 | */ |
| bogdanm | 0:9b334a45a8ff | 1426 | |
| bogdanm | 0:9b334a45a8ff | 1427 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
| bogdanm | 0:9b334a45a8ff | 1428 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
| bogdanm | 0:9b334a45a8ff | 1429 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
| bogdanm | 0:9b334a45a8ff | 1430 | |
| bogdanm | 0:9b334a45a8ff | 1431 | /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions |
| bogdanm | 0:9b334a45a8ff | 1432 | * @brief Peripheral Control functions |
| bogdanm | 0:9b334a45a8ff | 1433 | * |
| bogdanm | 0:9b334a45a8ff | 1434 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 1435 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1436 | ##### Peripheral Control functions ##### |
| bogdanm | 0:9b334a45a8ff | 1437 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1438 | [..] |
| bogdanm | 0:9b334a45a8ff | 1439 | This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 1440 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
| bogdanm | 0:9b334a45a8ff | 1441 | (+) Configure Complementary channels, break features and dead time. |
| bogdanm | 0:9b334a45a8ff | 1442 | (+) Configure Master synchronization. |
| bogdanm | 0:9b334a45a8ff | 1443 | |
| bogdanm | 0:9b334a45a8ff | 1444 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 1445 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1446 | */ |
| bogdanm | 0:9b334a45a8ff | 1447 | |
| bogdanm | 0:9b334a45a8ff | 1448 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
| bogdanm | 0:9b334a45a8ff | 1449 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
| bogdanm | 0:9b334a45a8ff | 1450 | defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 1451 | |
| bogdanm | 0:9b334a45a8ff | 1452 | /** |
| bogdanm | 0:9b334a45a8ff | 1453 | * @brief Configure the TIM commutation event sequence. |
| bogdanm | 0:9b334a45a8ff | 1454 | * @note: this function is mandatory to use the commutation event in order to |
| bogdanm | 0:9b334a45a8ff | 1455 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| bogdanm | 0:9b334a45a8ff | 1456 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| bogdanm | 0:9b334a45a8ff | 1457 | * configured in Hall sensor interface, this interface Timer will generate the |
| bogdanm | 0:9b334a45a8ff | 1458 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| bogdanm | 0:9b334a45a8ff | 1459 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| bogdanm | 0:9b334a45a8ff | 1460 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1461 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
| bogdanm | 0:9b334a45a8ff | 1462 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1463 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| bogdanm | 0:9b334a45a8ff | 1464 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| bogdanm | 0:9b334a45a8ff | 1465 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| bogdanm | 0:9b334a45a8ff | 1466 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| bogdanm | 0:9b334a45a8ff | 1467 | * @arg TIM_TS_NONE: No trigger is needed |
| bogdanm | 0:9b334a45a8ff | 1468 | * @param CommutationSource : the Commutation Event source |
| bogdanm | 0:9b334a45a8ff | 1469 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1470 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| bogdanm | 0:9b334a45a8ff | 1471 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| bogdanm | 0:9b334a45a8ff | 1472 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1473 | */ |
| bogdanm | 0:9b334a45a8ff | 1474 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| bogdanm | 0:9b334a45a8ff | 1475 | { |
| bogdanm | 0:9b334a45a8ff | 1476 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1477 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 1478 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| bogdanm | 0:9b334a45a8ff | 1479 | |
| bogdanm | 0:9b334a45a8ff | 1480 | __HAL_LOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1481 | |
| bogdanm | 0:9b334a45a8ff | 1482 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| bogdanm | 0:9b334a45a8ff | 1483 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| bogdanm | 0:9b334a45a8ff | 1484 | { |
| bogdanm | 0:9b334a45a8ff | 1485 | /* Select the Input trigger */ |
| bogdanm | 0:9b334a45a8ff | 1486 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| bogdanm | 0:9b334a45a8ff | 1487 | htim->Instance->SMCR |= InputTrigger; |
| bogdanm | 0:9b334a45a8ff | 1488 | } |
| bogdanm | 0:9b334a45a8ff | 1489 | |
| bogdanm | 0:9b334a45a8ff | 1490 | /* Select the Capture Compare preload feature */ |
| bogdanm | 0:9b334a45a8ff | 1491 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| bogdanm | 0:9b334a45a8ff | 1492 | /* Select the Commutation event source */ |
| bogdanm | 0:9b334a45a8ff | 1493 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| bogdanm | 0:9b334a45a8ff | 1494 | htim->Instance->CR2 |= CommutationSource; |
| bogdanm | 0:9b334a45a8ff | 1495 | |
| bogdanm | 0:9b334a45a8ff | 1496 | __HAL_UNLOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1497 | |
| bogdanm | 0:9b334a45a8ff | 1498 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1499 | } |
| bogdanm | 0:9b334a45a8ff | 1500 | |
| bogdanm | 0:9b334a45a8ff | 1501 | /** |
| bogdanm | 0:9b334a45a8ff | 1502 | * @brief Configure the TIM commutation event sequence with interrupt. |
| bogdanm | 0:9b334a45a8ff | 1503 | * @note: this function is mandatory to use the commutation event in order to |
| bogdanm | 0:9b334a45a8ff | 1504 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| bogdanm | 0:9b334a45a8ff | 1505 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| bogdanm | 0:9b334a45a8ff | 1506 | * configured in Hall sensor interface, this interface Timer will generate the |
| bogdanm | 0:9b334a45a8ff | 1507 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| bogdanm | 0:9b334a45a8ff | 1508 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| bogdanm | 0:9b334a45a8ff | 1509 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1510 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
| bogdanm | 0:9b334a45a8ff | 1511 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1512 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| bogdanm | 0:9b334a45a8ff | 1513 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| bogdanm | 0:9b334a45a8ff | 1514 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| bogdanm | 0:9b334a45a8ff | 1515 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| bogdanm | 0:9b334a45a8ff | 1516 | * @arg TIM_TS_NONE: No trigger is needed |
| bogdanm | 0:9b334a45a8ff | 1517 | * @param CommutationSource : the Commutation Event source |
| bogdanm | 0:9b334a45a8ff | 1518 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1519 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| bogdanm | 0:9b334a45a8ff | 1520 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| bogdanm | 0:9b334a45a8ff | 1521 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1522 | */ |
| bogdanm | 0:9b334a45a8ff | 1523 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| bogdanm | 0:9b334a45a8ff | 1524 | { |
| bogdanm | 0:9b334a45a8ff | 1525 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1526 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 1527 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| bogdanm | 0:9b334a45a8ff | 1528 | |
| bogdanm | 0:9b334a45a8ff | 1529 | __HAL_LOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1530 | |
| bogdanm | 0:9b334a45a8ff | 1531 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| bogdanm | 0:9b334a45a8ff | 1532 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| bogdanm | 0:9b334a45a8ff | 1533 | { |
| bogdanm | 0:9b334a45a8ff | 1534 | /* Select the Input trigger */ |
| bogdanm | 0:9b334a45a8ff | 1535 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| bogdanm | 0:9b334a45a8ff | 1536 | htim->Instance->SMCR |= InputTrigger; |
| bogdanm | 0:9b334a45a8ff | 1537 | } |
| bogdanm | 0:9b334a45a8ff | 1538 | |
| bogdanm | 0:9b334a45a8ff | 1539 | /* Select the Capture Compare preload feature */ |
| bogdanm | 0:9b334a45a8ff | 1540 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| bogdanm | 0:9b334a45a8ff | 1541 | /* Select the Commutation event source */ |
| bogdanm | 0:9b334a45a8ff | 1542 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| bogdanm | 0:9b334a45a8ff | 1543 | htim->Instance->CR2 |= CommutationSource; |
| bogdanm | 0:9b334a45a8ff | 1544 | |
| bogdanm | 0:9b334a45a8ff | 1545 | /* Enable the Commutation Interrupt Request */ |
| bogdanm | 0:9b334a45a8ff | 1546 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
| bogdanm | 0:9b334a45a8ff | 1547 | |
| bogdanm | 0:9b334a45a8ff | 1548 | __HAL_UNLOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1549 | |
| bogdanm | 0:9b334a45a8ff | 1550 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1551 | } |
| bogdanm | 0:9b334a45a8ff | 1552 | |
| bogdanm | 0:9b334a45a8ff | 1553 | /** |
| bogdanm | 0:9b334a45a8ff | 1554 | * @brief Configure the TIM commutation event sequence with DMA. |
| bogdanm | 0:9b334a45a8ff | 1555 | * @note: this function is mandatory to use the commutation event in order to |
| bogdanm | 0:9b334a45a8ff | 1556 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| bogdanm | 0:9b334a45a8ff | 1557 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| bogdanm | 0:9b334a45a8ff | 1558 | * configured in Hall sensor interface, this interface Timer will generate the |
| bogdanm | 0:9b334a45a8ff | 1559 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| bogdanm | 0:9b334a45a8ff | 1560 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| bogdanm | 0:9b334a45a8ff | 1561 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
| bogdanm | 0:9b334a45a8ff | 1562 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1563 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
| bogdanm | 0:9b334a45a8ff | 1564 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1565 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| bogdanm | 0:9b334a45a8ff | 1566 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| bogdanm | 0:9b334a45a8ff | 1567 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| bogdanm | 0:9b334a45a8ff | 1568 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| bogdanm | 0:9b334a45a8ff | 1569 | * @arg TIM_TS_NONE: No trigger is needed |
| bogdanm | 0:9b334a45a8ff | 1570 | * @param CommutationSource : the Commutation Event source |
| bogdanm | 0:9b334a45a8ff | 1571 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1572 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| bogdanm | 0:9b334a45a8ff | 1573 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| bogdanm | 0:9b334a45a8ff | 1574 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1575 | */ |
| bogdanm | 0:9b334a45a8ff | 1576 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| bogdanm | 0:9b334a45a8ff | 1577 | { |
| bogdanm | 0:9b334a45a8ff | 1578 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1579 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 1580 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| bogdanm | 0:9b334a45a8ff | 1581 | |
| bogdanm | 0:9b334a45a8ff | 1582 | __HAL_LOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1583 | |
| bogdanm | 0:9b334a45a8ff | 1584 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| bogdanm | 0:9b334a45a8ff | 1585 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| bogdanm | 0:9b334a45a8ff | 1586 | { |
| bogdanm | 0:9b334a45a8ff | 1587 | /* Select the Input trigger */ |
| bogdanm | 0:9b334a45a8ff | 1588 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| bogdanm | 0:9b334a45a8ff | 1589 | htim->Instance->SMCR |= InputTrigger; |
| bogdanm | 0:9b334a45a8ff | 1590 | } |
| bogdanm | 0:9b334a45a8ff | 1591 | |
| bogdanm | 0:9b334a45a8ff | 1592 | /* Select the Capture Compare preload feature */ |
| bogdanm | 0:9b334a45a8ff | 1593 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| bogdanm | 0:9b334a45a8ff | 1594 | /* Select the Commutation event source */ |
| bogdanm | 0:9b334a45a8ff | 1595 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| bogdanm | 0:9b334a45a8ff | 1596 | htim->Instance->CR2 |= CommutationSource; |
| bogdanm | 0:9b334a45a8ff | 1597 | |
| bogdanm | 0:9b334a45a8ff | 1598 | /* Enable the Commutation DMA Request */ |
| bogdanm | 0:9b334a45a8ff | 1599 | /* Set the DMA Commutation Callback */ |
| bogdanm | 0:9b334a45a8ff | 1600 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; |
| bogdanm | 0:9b334a45a8ff | 1601 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 1602 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; |
| bogdanm | 0:9b334a45a8ff | 1603 | |
| bogdanm | 0:9b334a45a8ff | 1604 | /* Enable the Commutation DMA Request */ |
| bogdanm | 0:9b334a45a8ff | 1605 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
| bogdanm | 0:9b334a45a8ff | 1606 | |
| bogdanm | 0:9b334a45a8ff | 1607 | __HAL_UNLOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1608 | |
| bogdanm | 0:9b334a45a8ff | 1609 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1610 | } |
| bogdanm | 0:9b334a45a8ff | 1611 | |
| bogdanm | 0:9b334a45a8ff | 1612 | /** |
| bogdanm | 0:9b334a45a8ff | 1613 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
| bogdanm | 0:9b334a45a8ff | 1614 | * and the AOE(automatic output enable). |
| bogdanm | 0:9b334a45a8ff | 1615 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1616 | * @param sBreakDeadTimeConfig : pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that |
| bogdanm | 0:9b334a45a8ff | 1617 | * contains the BDTR Register configuration information for the TIM peripheral. |
| bogdanm | 0:9b334a45a8ff | 1618 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1619 | */ |
| bogdanm | 0:9b334a45a8ff | 1620 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
| bogdanm | 0:9b334a45a8ff | 1621 | TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) |
| bogdanm | 0:9b334a45a8ff | 1622 | { |
| bogdanm | 0:9b334a45a8ff | 1623 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1624 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 1625 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
| bogdanm | 0:9b334a45a8ff | 1626 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
| bogdanm | 0:9b334a45a8ff | 1627 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
| bogdanm | 0:9b334a45a8ff | 1628 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
| bogdanm | 0:9b334a45a8ff | 1629 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
| bogdanm | 0:9b334a45a8ff | 1630 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
| bogdanm | 0:9b334a45a8ff | 1631 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
| bogdanm | 0:9b334a45a8ff | 1632 | |
| bogdanm | 0:9b334a45a8ff | 1633 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 1634 | __HAL_LOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1635 | |
| bogdanm | 0:9b334a45a8ff | 1636 | htim->State = HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 1637 | |
| bogdanm | 0:9b334a45a8ff | 1638 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
| bogdanm | 0:9b334a45a8ff | 1639 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
| bogdanm | 0:9b334a45a8ff | 1640 | htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode | |
| bogdanm | 0:9b334a45a8ff | 1641 | sBreakDeadTimeConfig->OffStateIDLEMode | |
| bogdanm | 0:9b334a45a8ff | 1642 | sBreakDeadTimeConfig->LockLevel | |
| bogdanm | 0:9b334a45a8ff | 1643 | sBreakDeadTimeConfig->DeadTime | |
| bogdanm | 0:9b334a45a8ff | 1644 | sBreakDeadTimeConfig->BreakState | |
| bogdanm | 0:9b334a45a8ff | 1645 | sBreakDeadTimeConfig->BreakPolarity | |
| bogdanm | 0:9b334a45a8ff | 1646 | sBreakDeadTimeConfig->AutomaticOutput; |
| bogdanm | 0:9b334a45a8ff | 1647 | |
| bogdanm | 0:9b334a45a8ff | 1648 | |
| bogdanm | 0:9b334a45a8ff | 1649 | htim->State = HAL_TIM_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1650 | |
| bogdanm | 0:9b334a45a8ff | 1651 | __HAL_UNLOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1652 | |
| bogdanm | 0:9b334a45a8ff | 1653 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1654 | } |
| bogdanm | 0:9b334a45a8ff | 1655 | |
| bogdanm | 0:9b334a45a8ff | 1656 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
| bogdanm | 0:9b334a45a8ff | 1657 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
| bogdanm | 0:9b334a45a8ff | 1658 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
| bogdanm | 0:9b334a45a8ff | 1659 | |
| bogdanm | 0:9b334a45a8ff | 1660 | /** |
| bogdanm | 0:9b334a45a8ff | 1661 | * @brief Configures the TIM in master mode. |
| bogdanm | 0:9b334a45a8ff | 1662 | * @param htim : TIM handle. |
| bogdanm | 0:9b334a45a8ff | 1663 | * @param sMasterConfig : pointer to a TIM_MasterConfigTypeDef structure that |
| bogdanm | 0:9b334a45a8ff | 1664 | * contains the selected trigger output (TRGO) and the Master/Slave |
| bogdanm | 0:9b334a45a8ff | 1665 | * mode. |
| bogdanm | 0:9b334a45a8ff | 1666 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1667 | */ |
| bogdanm | 0:9b334a45a8ff | 1668 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
| bogdanm | 0:9b334a45a8ff | 1669 | { |
| bogdanm | 0:9b334a45a8ff | 1670 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1671 | assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); |
| bogdanm | 0:9b334a45a8ff | 1672 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
| bogdanm | 0:9b334a45a8ff | 1673 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
| bogdanm | 0:9b334a45a8ff | 1674 | |
| bogdanm | 0:9b334a45a8ff | 1675 | __HAL_LOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1676 | |
| bogdanm | 0:9b334a45a8ff | 1677 | htim->State = HAL_TIM_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 1678 | |
| bogdanm | 0:9b334a45a8ff | 1679 | /* Reset the MMS Bits */ |
| bogdanm | 0:9b334a45a8ff | 1680 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
| bogdanm | 0:9b334a45a8ff | 1681 | /* Select the TRGO source */ |
| bogdanm | 0:9b334a45a8ff | 1682 | htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; |
| bogdanm | 0:9b334a45a8ff | 1683 | |
| bogdanm | 0:9b334a45a8ff | 1684 | /* Reset the MSM Bit */ |
| bogdanm | 0:9b334a45a8ff | 1685 | htim->Instance->SMCR &= ~TIM_SMCR_MSM; |
| bogdanm | 0:9b334a45a8ff | 1686 | /* Set or Reset the MSM Bit */ |
| bogdanm | 0:9b334a45a8ff | 1687 | htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; |
| bogdanm | 0:9b334a45a8ff | 1688 | |
| bogdanm | 0:9b334a45a8ff | 1689 | htim->State = HAL_TIM_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1690 | |
| bogdanm | 0:9b334a45a8ff | 1691 | __HAL_UNLOCK(htim); |
| bogdanm | 0:9b334a45a8ff | 1692 | |
| bogdanm | 0:9b334a45a8ff | 1693 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1694 | } |
| bogdanm | 0:9b334a45a8ff | 1695 | |
| bogdanm | 0:9b334a45a8ff | 1696 | /** |
| bogdanm | 0:9b334a45a8ff | 1697 | * @} |
| bogdanm | 0:9b334a45a8ff | 1698 | */ |
| bogdanm | 0:9b334a45a8ff | 1699 | |
| bogdanm | 0:9b334a45a8ff | 1700 | /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions |
| bogdanm | 0:9b334a45a8ff | 1701 | * @brief Extension Callbacks functions |
| bogdanm | 0:9b334a45a8ff | 1702 | * |
| bogdanm | 0:9b334a45a8ff | 1703 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 1704 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1705 | ##### Extension Callbacks functions ##### |
| bogdanm | 0:9b334a45a8ff | 1706 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1707 | [..] |
| bogdanm | 0:9b334a45a8ff | 1708 | This section provides Extension TIM callback functions: |
| bogdanm | 0:9b334a45a8ff | 1709 | (+) Timer Commutation callback |
| bogdanm | 0:9b334a45a8ff | 1710 | (+) Timer Break callback |
| bogdanm | 0:9b334a45a8ff | 1711 | |
| bogdanm | 0:9b334a45a8ff | 1712 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 1713 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1714 | */ |
| bogdanm | 0:9b334a45a8ff | 1715 | |
| bogdanm | 0:9b334a45a8ff | 1716 | /** |
| bogdanm | 0:9b334a45a8ff | 1717 | * @brief Hall commutation changed callback in non blocking mode |
| bogdanm | 0:9b334a45a8ff | 1718 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1719 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1720 | */ |
| bogdanm | 0:9b334a45a8ff | 1721 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 1722 | { |
| bogdanm | 0:9b334a45a8ff | 1723 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 1724 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 1725 | */ |
| bogdanm | 0:9b334a45a8ff | 1726 | } |
| bogdanm | 0:9b334a45a8ff | 1727 | |
| bogdanm | 0:9b334a45a8ff | 1728 | /** |
| bogdanm | 0:9b334a45a8ff | 1729 | * @brief Hall Break detection callback in non blocking mode |
| bogdanm | 0:9b334a45a8ff | 1730 | * @param htim : TIM handle |
| bogdanm | 0:9b334a45a8ff | 1731 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1732 | */ |
| bogdanm | 0:9b334a45a8ff | 1733 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 1734 | { |
| bogdanm | 0:9b334a45a8ff | 1735 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 1736 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 1737 | */ |
| bogdanm | 0:9b334a45a8ff | 1738 | } |
| bogdanm | 0:9b334a45a8ff | 1739 | |
| bogdanm | 0:9b334a45a8ff | 1740 | /** |
| bogdanm | 0:9b334a45a8ff | 1741 | * @brief TIM DMA Commutation callback. |
| bogdanm | 0:9b334a45a8ff | 1742 | * @param hdma : pointer to DMA handle. |
| bogdanm | 0:9b334a45a8ff | 1743 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1744 | */ |
| bogdanm | 0:9b334a45a8ff | 1745 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 1746 | { |
| bogdanm | 0:9b334a45a8ff | 1747 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 1748 | |
| bogdanm | 0:9b334a45a8ff | 1749 | htim->State= HAL_TIM_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1750 | |
| bogdanm | 0:9b334a45a8ff | 1751 | HAL_TIMEx_CommutationCallback(htim); |
| bogdanm | 0:9b334a45a8ff | 1752 | } |
| bogdanm | 0:9b334a45a8ff | 1753 | |
| bogdanm | 0:9b334a45a8ff | 1754 | /** |
| bogdanm | 0:9b334a45a8ff | 1755 | * @} |
| bogdanm | 0:9b334a45a8ff | 1756 | */ |
| bogdanm | 0:9b334a45a8ff | 1757 | |
| bogdanm | 0:9b334a45a8ff | 1758 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
| bogdanm | 0:9b334a45a8ff | 1759 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
| bogdanm | 0:9b334a45a8ff | 1760 | defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 1761 | |
| bogdanm | 0:9b334a45a8ff | 1762 | /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions |
| bogdanm | 0:9b334a45a8ff | 1763 | * @brief Extension Peripheral State functions |
| bogdanm | 0:9b334a45a8ff | 1764 | * |
| bogdanm | 0:9b334a45a8ff | 1765 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 1766 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1767 | ##### Extension Peripheral State functions ##### |
| bogdanm | 0:9b334a45a8ff | 1768 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 1769 | [..] |
| bogdanm | 0:9b334a45a8ff | 1770 | This subsection permit to get in run-time the status of the peripheral |
| bogdanm | 0:9b334a45a8ff | 1771 | and the data flow. |
| bogdanm | 0:9b334a45a8ff | 1772 | |
| bogdanm | 0:9b334a45a8ff | 1773 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 1774 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1775 | */ |
| bogdanm | 0:9b334a45a8ff | 1776 | |
| bogdanm | 0:9b334a45a8ff | 1777 | /** |
| bogdanm | 0:9b334a45a8ff | 1778 | * @brief Return the TIM Hall Sensor interface state |
| bogdanm | 0:9b334a45a8ff | 1779 | * @param htim : TIM Hall Sensor handle |
| bogdanm | 0:9b334a45a8ff | 1780 | * @retval HAL state |
| bogdanm | 0:9b334a45a8ff | 1781 | */ |
| bogdanm | 0:9b334a45a8ff | 1782 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
| bogdanm | 0:9b334a45a8ff | 1783 | { |
| bogdanm | 0:9b334a45a8ff | 1784 | return htim->State; |
| bogdanm | 0:9b334a45a8ff | 1785 | } |
| bogdanm | 0:9b334a45a8ff | 1786 | |
| bogdanm | 0:9b334a45a8ff | 1787 | /** |
| bogdanm | 0:9b334a45a8ff | 1788 | * @} |
| bogdanm | 0:9b334a45a8ff | 1789 | */ |
| bogdanm | 0:9b334a45a8ff | 1790 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
| bogdanm | 0:9b334a45a8ff | 1791 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
| bogdanm | 0:9b334a45a8ff | 1792 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
| bogdanm | 0:9b334a45a8ff | 1793 | |
| bogdanm | 0:9b334a45a8ff | 1794 | /** |
| bogdanm | 0:9b334a45a8ff | 1795 | * @} |
| bogdanm | 0:9b334a45a8ff | 1796 | */ |
| bogdanm | 0:9b334a45a8ff | 1797 | |
| bogdanm | 0:9b334a45a8ff | 1798 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
| bogdanm | 0:9b334a45a8ff | 1799 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
| bogdanm | 0:9b334a45a8ff | 1800 | defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 1801 | |
| bogdanm | 0:9b334a45a8ff | 1802 | /** @addtogroup TIMEx_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 1803 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1804 | */ |
| bogdanm | 0:9b334a45a8ff | 1805 | |
| bogdanm | 0:9b334a45a8ff | 1806 | /** |
| bogdanm | 0:9b334a45a8ff | 1807 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
| bogdanm | 0:9b334a45a8ff | 1808 | * @param TIMx to select the TIM peripheral |
| bogdanm | 0:9b334a45a8ff | 1809 | * @param Channel : specifies the TIM Channel |
| bogdanm | 0:9b334a45a8ff | 1810 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1811 | * @arg TIM_Channel_1: TIM Channel 1 |
| bogdanm | 0:9b334a45a8ff | 1812 | * @arg TIM_Channel_2: TIM Channel 2 |
| bogdanm | 0:9b334a45a8ff | 1813 | * @arg TIM_Channel_3: TIM Channel 3 |
| bogdanm | 0:9b334a45a8ff | 1814 | * @param ChannelNState : specifies the TIM Channel CCxNE bit new state. |
| bogdanm | 0:9b334a45a8ff | 1815 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
| bogdanm | 0:9b334a45a8ff | 1816 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1817 | */ |
| bogdanm | 0:9b334a45a8ff | 1818 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
| bogdanm | 0:9b334a45a8ff | 1819 | { |
| bogdanm | 0:9b334a45a8ff | 1820 | uint32_t tmp = 0; |
| bogdanm | 0:9b334a45a8ff | 1821 | |
| bogdanm | 0:9b334a45a8ff | 1822 | tmp = TIM_CCER_CC1NE << Channel; |
| bogdanm | 0:9b334a45a8ff | 1823 | |
| bogdanm | 0:9b334a45a8ff | 1824 | /* Reset the CCxNE Bit */ |
| bogdanm | 0:9b334a45a8ff | 1825 | TIMx->CCER &= ~tmp; |
| bogdanm | 0:9b334a45a8ff | 1826 | |
| bogdanm | 0:9b334a45a8ff | 1827 | /* Set or reset the CCxNE Bit */ |
| bogdanm | 0:9b334a45a8ff | 1828 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
| bogdanm | 0:9b334a45a8ff | 1829 | } |
| bogdanm | 0:9b334a45a8ff | 1830 | |
| bogdanm | 0:9b334a45a8ff | 1831 | /** |
| bogdanm | 0:9b334a45a8ff | 1832 | * @} |
| bogdanm | 0:9b334a45a8ff | 1833 | */ |
| bogdanm | 0:9b334a45a8ff | 1834 | |
| bogdanm | 0:9b334a45a8ff | 1835 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
| bogdanm | 0:9b334a45a8ff | 1836 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
| bogdanm | 0:9b334a45a8ff | 1837 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
| bogdanm | 0:9b334a45a8ff | 1838 | |
| bogdanm | 0:9b334a45a8ff | 1839 | #endif /* HAL_TIM_MODULE_ENABLED */ |
| bogdanm | 0:9b334a45a8ff | 1840 | /** |
| bogdanm | 0:9b334a45a8ff | 1841 | * @} |
| bogdanm | 0:9b334a45a8ff | 1842 | */ |
| bogdanm | 0:9b334a45a8ff | 1843 | |
| bogdanm | 0:9b334a45a8ff | 1844 | /** |
| bogdanm | 0:9b334a45a8ff | 1845 | * @} |
| bogdanm | 0:9b334a45a8ff | 1846 | */ |
| bogdanm | 0:9b334a45a8ff | 1847 | |
| bogdanm | 0:9b334a45a8ff | 1848 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |