Function generator code modified to work on the Freescale KL25Z

Dependencies:   mbed

Fork of AD9850 function generator SPI driver by Liam G

Embed: (wiki syntax)

« Back to documentation index

Show/hide line numbers main.cpp Source File

main.cpp

00001 // MBED driver for AD9850 digital synthesizer using hacked SPI interface
00002 // Original code by Liam Goudge Sept 2013
00003 // Modified for KL25Z by Mike Richards Oct 2013
00004 
00005 #include "mbed.h"
00006 
00007 
00008 SPI device (PTD2, PTD3, PTD1); // Set the KL25Z SPI pins
00009 DigitalOut CS(PTD0); // Use pin PTD0 as a fake Chip select
00010 DigitalOut ADReset(PTA13); // Use Pin PTA13 as the reset line for AD9850
00011 
00012 
00013 Serial pc(USBTX, USBRX); // tx, rx for debug terminal
00014 
00015 int reverseBits (int source)
00016 {
00017 // Unfortunately need to invert bit order of the desired frequency setting since MBED only allows for MSB first from SPI. We need LSB first for AD9850
00018     int mask=0;;
00019     int i=0;
00020     int target=0;
00021     int bitTarget=0x80000000; // Hard-wired for 32-bit inversion
00022 
00023     for (i=0;i<32;i++) { // ditto
00024         mask=1<<i;   
00025         bitTarget=1<<(31-i); // ditto
00026 
00027         if (source & mask)
00028             target=target | bitTarget;
00029     } 
00030     return target;
00031 }    
00032      
00033 void writeSPI(int frq, int phase)
00034 {           
00035 // Send the 40-bit packet. NB: KL25Z only supports 8-bit SPI so send five 8-bit packets
00036     
00037     device.format(8,0); // 8-bits per packet, mode 0 (CPOL=0 CPHA=0)
00038     device.frequency(1000000); //SPI clock set to 1MHz
00039 
00040     wait_ms(1);
00041 
00042     // First do chip select. Need to use a GPIO to fake the chip select since MBED doesn't allow to set positive logic CS signal
00043     CS=1; // assert chip select (a.k.a FQ_UD frequency update input to AD9850)
00044     wait_ms(1);
00045     CS=0;
00046         
00047     device.write(frq>>24); // Write upper 8-bits
00048     device.write(frq>>16);
00049     device.write(frq>>8);
00050     device.write(frq); // Now the last 8 bits
00051     device.write(phase); // This is phase and factory settings byte
00052 
00053     // Now pulse FQ_UD again to load the word into the DDS
00054     CS=0;
00055     wait_ms(1);
00056     CS=1;
00057     wait_ms(1);
00058     CS=0;
00059 }
00060     
00061 
00062 int main()
00063 {
00064     // This routine produces a continuous frequency sweep
00065     int targetFrq=0x147AE148; // Frequency word = ([Desired freq in MHz] * 34.3597384)
00066     int increment=0xD6B; //100Hz step
00067     
00068     // Reset the AD9850. Active high logic. Minimum reset period 5 clock cycles (5/125MHz)
00069     ADReset=0;
00070     wait_ms(5);
00071     ADReset=1;
00072     wait_ms(5);
00073     ADReset=0;
00074     
00075     while(1)
00076     {
00077     
00078     
00079    
00080    while (targetFrq<0x148bFFFF) // up to 10.001MHz
00081     {
00082         writeSPI(reverseBits(targetFrq),0); // Don't use phase so set to zero.
00083         targetFrq=targetFrq+increment;
00084         //wait_ms(200);
00085         }
00086         
00087     while (targetFrq>0x147AE148) // down to 10MHz
00088     {
00089         writeSPI(reverseBits(targetFrq),0);
00090         targetFrq=targetFrq-increment;
00091         //wait_ms(200);
00092         }  
00093     
00094     }      
00095         
00096         
00097 }