Adapted to Lora Semtech + Nucleo
Dependents: LoRaWAN-lmic-app LoRaWAN-lmic-app LoRaWAN-test-10secs LoRaPersonalizedDeviceForEverynet ... more
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lpc_phy.h
00001 /********************************************************************** 00002 * $Id$ lpc_phy.h 2011-11-20 00003 *//** 00004 * @file lpc_phy.h 00005 * @brief Common PHY definitions used with all PHYs 00006 * @version 1.0 00007 * @date 20 Nov. 2011 00008 * @author NXP MCU SW Application Team 00009 * 00010 * Copyright(C) 2011, NXP Semiconductor 00011 * All rights reserved. 00012 * 00013 *********************************************************************** 00014 * Software that is described herein is for illustrative purposes only 00015 * which provides customers with programming information regarding the 00016 * products. This software is supplied "AS IS" without any warranties. 00017 * NXP Semiconductors assumes no responsibility or liability for the 00018 * use of the software, conveys no license or title under any patent, 00019 * copyright, or mask work right to the product. NXP Semiconductors 00020 * reserves the right to make changes in the software without 00021 * notification. NXP Semiconductors also make no representation or 00022 * warranty that such application will be suitable for the specified 00023 * use without further testing or modification. 00024 **********************************************************************/ 00025 00026 #ifndef __LPC_PHY_H_ 00027 #define __LPC_PHY_H_ 00028 00029 #include "lwip/opt.h" 00030 #include "lwip/err.h" 00031 #include "lwip/netif.h" 00032 00033 #ifdef __cplusplus 00034 extern "C" 00035 { 00036 #endif 00037 00038 /* These PHY functions are usually part of the EMAC driver */ 00039 00040 /** \brief Phy status update state machine 00041 * 00042 * This function provides a state machine for maintaining the PHY 00043 * status without blocking. It must be occasionally called for the 00044 * PHY status to be maintained. 00045 * 00046 * \param[in] netif NETIF structure 00047 */ 00048 s32_t lpc_phy_sts_sm(struct netif *netif); 00049 00050 /** \brief Initialize the PHY 00051 * 00052 * This function initializes the PHY. It will block until complete. 00053 * This function is called as part of the EMAC driver 00054 * initialization. Configuration of the PHY at startup is 00055 * controlled by setting up configuration defines in lpc_phy.h. 00056 * 00057 * \param[in] netif NETIF structure 00058 * \return ERR_OK if the setup was successful, otherwise ERR_TIMEOUT 00059 */ 00060 err_t lpc_phy_init(struct netif *netif); 00061 00062 /** \brief Write a value via the MII link (non-blocking) 00063 * 00064 * This function will write a value on the MII link interface to a PHY 00065 * or a connected device. The function will return immediately without 00066 * a status. Status needs to be polled later to determine if the write 00067 * was successful. 00068 * 00069 * \param[in] PhyReg PHY register to write to 00070 * \param[in] Value Value to write 00071 */ 00072 void lpc_mii_write_noblock(u32_t PhyReg, u32_t Value); 00073 00074 /** \brief Write a value via the MII link (blocking) 00075 * 00076 * This function will write a value on the MII link interface to a PHY 00077 * or a connected device. The function will block until complete. 00078 * 00079 * \param[in] PhyReg PHY register to write to 00080 * \param[in] Value Value to write 00081 * \returns 0 if the write was successful, otherwise !0 00082 */ 00083 err_t lpc_mii_write(u32_t PhyReg, u32_t Value); 00084 00085 /** \brief Reads current MII link busy status 00086 * 00087 * This function will return the current MII link busy status and is meant to 00088 * be used with non-blocking functions for monitor PHY status such as 00089 * connection state. 00090 * 00091 * \returns !0 if the MII link is busy, otherwise 0 00092 */ 00093 u32_t lpc_mii_is_busy(void); 00094 00095 /** \brief Starts a read operation via the MII link (non-blocking) 00096 * 00097 * This function returns the current value in the MII data register. It is 00098 * meant to be used with the non-blocking oeprations. This value should 00099 * only be read after a non-block read command has been issued and the 00100 * MII status has been determined to be good. 00101 * 00102 * \returns The current value in the MII value register 00103 */ 00104 u32_t lpc_mii_read_data(void); 00105 00106 /** \brief Starts a read operation via the MII link (non-blocking) 00107 * 00108 * This function will start a read operation on the MII link interface 00109 * from a PHY or a connected device. The function will not block and 00110 * the status mist be polled until complete. Once complete, the data 00111 * can be read. 00112 * 00113 * \param[in] PhyReg PHY register to read from 00114 */ 00115 err_t lpc_mii_read(u32_t PhyReg, u32_t *data); 00116 00117 /** \brief Read a value via the MII link (blocking) 00118 * 00119 * This function will read a value on the MII link interface from a PHY 00120 * or a connected device. The function will block until complete. 00121 * 00122 * \param[in] PhyReg PHY register to read from 00123 * \param[in] data Pointer to where to save data read via MII 00124 * \returns 0 if the read was successful, otherwise !0 00125 */ 00126 void lpc_mii_read_noblock(u32_t PhyReg); 00127 00128 /** 00129 * This function provides a method for the PHY to setup the EMAC 00130 * for the PHY negotiated duplex mode. 00131 * 00132 * @param[in] full_duplex 0 = half duplex, 1 = full duplex 00133 */ 00134 void lpc_emac_set_duplex(int full_duplex); 00135 00136 /** 00137 * This function provides a method for the PHY to setup the EMAC 00138 * for the PHY negotiated bit rate. 00139 * 00140 * @param[in] mbs_100 0 = 10mbs mode, 1 = 100mbs mode 00141 */ 00142 void lpc_emac_set_speed(int mbs_100); 00143 00144 #ifdef __cplusplus 00145 } 00146 #endif 00147 00148 #endif /* __LPC_PHY_H_ */ 00149 00150 /* --------------------------------- End Of File ------------------------------ */
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