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targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/xdot_low_power.c@181:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
181:57724642e740
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 181:57724642e740 1 /* mbed Microcontroller Library
AnnaBridge 181:57724642e740 2 *******************************************************************************
AnnaBridge 181:57724642e740 3 * Copyright (c) 2016, MultiTech Systems
AnnaBridge 181:57724642e740 4 * All rights reserved.
AnnaBridge 181:57724642e740 5 *
AnnaBridge 181:57724642e740 6 * Redistribution and use in source and binary forms, with or without
AnnaBridge 181:57724642e740 7 * modification, are permitted provided that the following conditions are met:
AnnaBridge 181:57724642e740 8 *
AnnaBridge 181:57724642e740 9 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 181:57724642e740 10 * this list of conditions and the following disclaimer.
AnnaBridge 181:57724642e740 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 181:57724642e740 12 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 181:57724642e740 13 * and/or other materials provided with the distribution.
AnnaBridge 181:57724642e740 14 * 3. Neither the name of MultiTech nor the names of its contributors
AnnaBridge 181:57724642e740 15 * may be used to endorse or promote products derived from this software
AnnaBridge 181:57724642e740 16 * without specific prior written permission.
AnnaBridge 181:57724642e740 17 *
AnnaBridge 181:57724642e740 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 181:57724642e740 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 181:57724642e740 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 181:57724642e740 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 181:57724642e740 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 181:57724642e740 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 181:57724642e740 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 181:57724642e740 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 181:57724642e740 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 181:57724642e740 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 181:57724642e740 28 *******************************************************************************
AnnaBridge 181:57724642e740 29 */
AnnaBridge 181:57724642e740 30
AnnaBridge 181:57724642e740 31 #include "xdot_low_power.h"
AnnaBridge 181:57724642e740 32 #include "stdio.h"
AnnaBridge 181:57724642e740 33 #include "mbed_debug.h"
AnnaBridge 181:57724642e740 34
AnnaBridge 181:57724642e740 35 static uint32_t portA[6];
AnnaBridge 181:57724642e740 36 static uint32_t portB[6];
AnnaBridge 181:57724642e740 37 static uint32_t portC[6];
AnnaBridge 181:57724642e740 38 static uint32_t portH[6];
AnnaBridge 181:57724642e740 39
AnnaBridge 181:57724642e740 40 void xdot_disable_systick_int() {
AnnaBridge 181:57724642e740 41 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
AnnaBridge 181:57724642e740 42 }
AnnaBridge 181:57724642e740 43
AnnaBridge 181:57724642e740 44 void xdot_enable_systick_int() {
AnnaBridge 181:57724642e740 45 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
AnnaBridge 181:57724642e740 46 }
AnnaBridge 181:57724642e740 47
AnnaBridge 181:57724642e740 48 void xdot_save_gpio_state() {
AnnaBridge 181:57724642e740 49 portA[0] = GPIOA->MODER;
AnnaBridge 181:57724642e740 50 portA[1] = GPIOA->OTYPER;
AnnaBridge 181:57724642e740 51 portA[2] = GPIOA->OSPEEDR;
AnnaBridge 181:57724642e740 52 portA[3] = GPIOA->PUPDR;
AnnaBridge 181:57724642e740 53 portA[4] = GPIOA->AFR[0];
AnnaBridge 181:57724642e740 54 portA[5] = GPIOA->AFR[1];
AnnaBridge 181:57724642e740 55
AnnaBridge 181:57724642e740 56 portB[0] = GPIOB->MODER;
AnnaBridge 181:57724642e740 57 portB[1] = GPIOB->OTYPER;
AnnaBridge 181:57724642e740 58 portB[2] = GPIOB->OSPEEDR;
AnnaBridge 181:57724642e740 59 portB[3] = GPIOB->PUPDR;
AnnaBridge 181:57724642e740 60 portB[4] = GPIOB->AFR[0];
AnnaBridge 181:57724642e740 61 portB[5] = GPIOB->AFR[1];
AnnaBridge 181:57724642e740 62
AnnaBridge 181:57724642e740 63 portC[0] = GPIOC->MODER;
AnnaBridge 181:57724642e740 64 portC[1] = GPIOC->OTYPER;
AnnaBridge 181:57724642e740 65 portC[2] = GPIOC->OSPEEDR;
AnnaBridge 181:57724642e740 66 portC[3] = GPIOC->PUPDR;
AnnaBridge 181:57724642e740 67 portC[4] = GPIOC->AFR[0];
AnnaBridge 181:57724642e740 68 portC[5] = GPIOC->AFR[1];
AnnaBridge 181:57724642e740 69
AnnaBridge 181:57724642e740 70 portH[0] = GPIOH->MODER;
AnnaBridge 181:57724642e740 71 portH[1] = GPIOH->OTYPER;
AnnaBridge 181:57724642e740 72 portH[2] = GPIOH->OSPEEDR;
AnnaBridge 181:57724642e740 73 portH[3] = GPIOH->PUPDR;
AnnaBridge 181:57724642e740 74 portH[4] = GPIOH->AFR[0];
AnnaBridge 181:57724642e740 75 portH[5] = GPIOH->AFR[1];
AnnaBridge 181:57724642e740 76 }
AnnaBridge 181:57724642e740 77
AnnaBridge 181:57724642e740 78 void xdot_restore_gpio_state() {
AnnaBridge 181:57724642e740 79 GPIOA->MODER = portA[0];
AnnaBridge 181:57724642e740 80 GPIOA->OTYPER = portA[1];
AnnaBridge 181:57724642e740 81 GPIOA->OSPEEDR = portA[2];
AnnaBridge 181:57724642e740 82 GPIOA->PUPDR = portA[3];
AnnaBridge 181:57724642e740 83 GPIOA->AFR[0] = portA[4];
AnnaBridge 181:57724642e740 84 GPIOA->AFR[1] = portA[5];
AnnaBridge 181:57724642e740 85
AnnaBridge 181:57724642e740 86 GPIOB->MODER = portB[0];
AnnaBridge 181:57724642e740 87 GPIOB->OTYPER = portB[1];
AnnaBridge 181:57724642e740 88 GPIOB->OSPEEDR = portB[2];
AnnaBridge 181:57724642e740 89 GPIOB->PUPDR = portB[3];
AnnaBridge 181:57724642e740 90 GPIOB->AFR[0] = portB[4];
AnnaBridge 181:57724642e740 91 GPIOB->AFR[1] = portB[5];
AnnaBridge 181:57724642e740 92
AnnaBridge 181:57724642e740 93 GPIOC->MODER = portC[0];
AnnaBridge 181:57724642e740 94 GPIOC->OTYPER = portC[1];
AnnaBridge 181:57724642e740 95 GPIOC->OSPEEDR = portC[2];
AnnaBridge 181:57724642e740 96 GPIOC->PUPDR = portC[3];
AnnaBridge 181:57724642e740 97 GPIOC->AFR[0] = portC[4];
AnnaBridge 181:57724642e740 98 GPIOC->AFR[1] = portC[5];
AnnaBridge 181:57724642e740 99
AnnaBridge 181:57724642e740 100 GPIOH->MODER = portH[0];
AnnaBridge 181:57724642e740 101 GPIOH->OTYPER = portH[1];
AnnaBridge 181:57724642e740 102 GPIOH->OSPEEDR = portH[2];
AnnaBridge 181:57724642e740 103 GPIOH->PUPDR = portH[3];
AnnaBridge 181:57724642e740 104 GPIOH->AFR[0] = portH[4];
AnnaBridge 181:57724642e740 105 GPIOH->AFR[1] = portH[5];
AnnaBridge 181:57724642e740 106 }
AnnaBridge 181:57724642e740 107
AnnaBridge 181:57724642e740 108 void xdot_enter_stop_mode() {
AnnaBridge 181:57724642e740 109 GPIO_InitTypeDef GPIO_InitStruct;
AnnaBridge 181:57724642e740 110
AnnaBridge 181:57724642e740 111 // disable ADC and DAC - they can consume power in stop mode
AnnaBridge 181:57724642e740 112 ADC1->CR2 &= ~ADC_CR2_ADON;
AnnaBridge 181:57724642e740 113 ADC->CCR &= ~ADC_CCR_TSVREFE;
AnnaBridge 181:57724642e740 114 DAC->CR &= ~DAC_CR_EN1;
AnnaBridge 181:57724642e740 115 DAC->CR &= ~DAC_CR_EN2;
AnnaBridge 181:57724642e740 116
AnnaBridge 181:57724642e740 117 // enable ULP and enable fast wakeup
AnnaBridge 181:57724642e740 118 HAL_PWREx_EnableUltraLowPower();
AnnaBridge 181:57724642e740 119 HAL_PWREx_EnableFastWakeUp();
AnnaBridge 181:57724642e740 120
AnnaBridge 181:57724642e740 121 // disable HSI, MSI, and LSI if they are running
AnnaBridge 181:57724642e740 122 if (RCC->CR & RCC_CR_HSION) {
AnnaBridge 181:57724642e740 123 RCC->CR &= ~RCC_CR_HSION;
AnnaBridge 181:57724642e740 124 }
AnnaBridge 181:57724642e740 125 if (RCC->CR & RCC_CR_MSION) {
AnnaBridge 181:57724642e740 126 RCC->CR &= ~RCC_CR_MSION;
AnnaBridge 181:57724642e740 127 }
AnnaBridge 181:57724642e740 128 if (RCC->CSR & RCC_CSR_LSION) {
AnnaBridge 181:57724642e740 129 RCC->CSR &= ~RCC_CSR_LSION;
AnnaBridge 181:57724642e740 130 }
AnnaBridge 181:57724642e740 131
AnnaBridge 181:57724642e740 132 // configure USBTX & USBRX, LORA SPI, LORA_DIO, LORA_RESET, Secure Element, crystal pins, and SWD pins to analog nopull
AnnaBridge 181:57724642e740 133 // the application must do the same with WAKE, GPIO*, UART1_*, I2C_*, and SPI_*
AnnaBridge 181:57724642e740 134
AnnaBridge 181:57724642e740 135 // GPIO Ports Clock Enable
AnnaBridge 181:57724642e740 136 __GPIOA_CLK_ENABLE();
AnnaBridge 181:57724642e740 137 __GPIOB_CLK_ENABLE();
AnnaBridge 181:57724642e740 138 __GPIOC_CLK_ENABLE();
AnnaBridge 181:57724642e740 139 __GPIOH_CLK_ENABLE();
AnnaBridge 181:57724642e740 140
AnnaBridge 181:57724642e740 141 // USBTX & USBRX to analog nopull
AnnaBridge 181:57724642e740 142 GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3;
AnnaBridge 181:57724642e740 143 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 144 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 145 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 146
AnnaBridge 181:57724642e740 147 // LORA_RESET to analog nopull
AnnaBridge 181:57724642e740 148 GPIO_InitStruct.Pin = GPIO_PIN_1;
AnnaBridge 181:57724642e740 149 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 150 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 151 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 152
AnnaBridge 181:57724642e740 153 // LORA_MISO to analog nopull
AnnaBridge 181:57724642e740 154 GPIO_InitStruct.Pin = GPIO_PIN_4;
AnnaBridge 181:57724642e740 155 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 156 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 157 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 158
AnnaBridge 181:57724642e740 159 // LORA_SCK & LORA_MOSI to input pulldown - additional current draw if left floating
AnnaBridge 181:57724642e740 160 GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_5;
AnnaBridge 181:57724642e740 161 GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
AnnaBridge 181:57724642e740 162 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
AnnaBridge 181:57724642e740 163 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 164
AnnaBridge 181:57724642e740 165 // LORA_NSS to analog nopull
AnnaBridge 181:57724642e740 166 GPIO_InitStruct.Pin = GPIO_PIN_15;
AnnaBridge 181:57724642e740 167 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 168 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 169 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 170
AnnaBridge 181:57724642e740 171 // LORA_DIO0 - LORA_DIO2 to analog nopull
AnnaBridge 181:57724642e740 172 GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8;
AnnaBridge 181:57724642e740 173 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 174 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 175 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 176
AnnaBridge 181:57724642e740 177 // LORA_DIO3 - LORA_DIO4 to analog nopull
AnnaBridge 181:57724642e740 178 GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7;
AnnaBridge 181:57724642e740 179 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 180 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 181 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 182
AnnaBridge 181:57724642e740 183 // SE_CTRL, SE_IO, & SE_CLK to analog nopull
AnnaBridge 181:57724642e740 184 GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_10 | GPIO_PIN_11;
AnnaBridge 181:57724642e740 185 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 186 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 187 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 188
AnnaBridge 181:57724642e740 189 // SE_RESET to analog nopull
AnnaBridge 181:57724642e740 190 GPIO_InitStruct.Pin = GPIO_PIN_13;
AnnaBridge 181:57724642e740 191 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 192 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 193 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 194
AnnaBridge 181:57724642e740 195 // SWDIO & SWCLK to analog nopull
AnnaBridge 181:57724642e740 196 GPIO_InitStruct.Pin = GPIO_PIN_13 | GPIO_PIN_14;
AnnaBridge 181:57724642e740 197 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 198 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 199 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 200
AnnaBridge 181:57724642e740 201 // OSC32_IN & OSC32_OUT to analog nopull
AnnaBridge 181:57724642e740 202 GPIO_InitStruct.Pin = GPIO_PIN_14 | GPIO_PIN_15;
AnnaBridge 181:57724642e740 203 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 204 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 205 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 206
AnnaBridge 181:57724642e740 207 // OSC_IN & OSC_OUT to analog nopull
AnnaBridge 181:57724642e740 208 GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
AnnaBridge 181:57724642e740 209 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
AnnaBridge 181:57724642e740 210 GPIO_InitStruct.Pull = GPIO_NOPULL;
AnnaBridge 181:57724642e740 211 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
AnnaBridge 181:57724642e740 212
AnnaBridge 181:57724642e740 213 // done configuring pins to analog nopull
AnnaBridge 181:57724642e740 214
AnnaBridge 181:57724642e740 215 // make sure wakeup flag is cleared
AnnaBridge 181:57724642e740 216 PWR->CR |= PWR_CR_CWUF;
AnnaBridge 181:57724642e740 217
AnnaBridge 181:57724642e740 218 // enter stop mode - don't execute past here until woken up
AnnaBridge 181:57724642e740 219 HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
AnnaBridge 181:57724642e740 220
AnnaBridge 181:57724642e740 221 RCC_ClkInitTypeDef RCC_ClkInitStruct;
AnnaBridge 181:57724642e740 222 RCC_OscInitTypeDef HSERCC_OscInitStruct;
AnnaBridge 181:57724642e740 223 /* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */
AnnaBridge 181:57724642e740 224 HSERCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
AnnaBridge 181:57724642e740 225 HSERCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 24 MHz xtal on OSC_IN/OSC_OUT */
AnnaBridge 181:57724642e740 226 HSERCC_OscInitStruct.HSIState = RCC_HSI_OFF;
AnnaBridge 181:57724642e740 227 // SYSCLK = 32 MHz ((24 MHz * 4) / 3)
AnnaBridge 181:57724642e740 228 // USBCLK = 48 MHz ((24 MHz * 4) / 2) --> USB OK
AnnaBridge 181:57724642e740 229 HSERCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
AnnaBridge 181:57724642e740 230 HSERCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
AnnaBridge 181:57724642e740 231 HSERCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
AnnaBridge 181:57724642e740 232 HSERCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3;
AnnaBridge 181:57724642e740 233 if (HAL_RCC_OscConfig(&HSERCC_OscInitStruct) != HAL_OK) {
AnnaBridge 181:57724642e740 234 debug("OSC initialization failed - initiating soft reset\r\n");
AnnaBridge 181:57724642e740 235 NVIC_SystemReset();
AnnaBridge 181:57724642e740 236 }
AnnaBridge 181:57724642e740 237
AnnaBridge 181:57724642e740 238 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
AnnaBridge 181:57724642e740 239 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
AnnaBridge 181:57724642e740 240 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
AnnaBridge 181:57724642e740 241 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz
AnnaBridge 181:57724642e740 242 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz
AnnaBridge 181:57724642e740 243 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz
AnnaBridge 181:57724642e740 244 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
AnnaBridge 181:57724642e740 245 debug("PLL initialization failed - initiating soft reset\r\n");
AnnaBridge 181:57724642e740 246 NVIC_SystemReset();
AnnaBridge 181:57724642e740 247 }
AnnaBridge 181:57724642e740 248
AnnaBridge 181:57724642e740 249 /* Enable the HSI for ADC peripherals */
AnnaBridge 181:57724642e740 250 RCC_OscInitTypeDef HSIRCC_OscInitStruct;
AnnaBridge 181:57724642e740 251 HAL_RCC_GetOscConfig(&HSIRCC_OscInitStruct);
AnnaBridge 181:57724642e740 252 if ( HSIRCC_OscInitStruct.HSIState != RCC_HSI_ON ) {
AnnaBridge 181:57724642e740 253 HSIRCC_OscInitStruct.HSIState = RCC_HSI_ON;
AnnaBridge 181:57724642e740 254 HSIRCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
AnnaBridge 181:57724642e740 255 HSIRCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
AnnaBridge 181:57724642e740 256 HAL_StatusTypeDef ret = HAL_RCC_OscConfig(&HSIRCC_OscInitStruct);
AnnaBridge 181:57724642e740 257 if ( ret != HAL_OK ) {
AnnaBridge 181:57724642e740 258 debug("HSI initialization failed - ADC will not function properly\r\n");
AnnaBridge 181:57724642e740 259 }
AnnaBridge 181:57724642e740 260 }
AnnaBridge 181:57724642e740 261
AnnaBridge 181:57724642e740 262 SystemCoreClockUpdate();
AnnaBridge 181:57724642e740 263
AnnaBridge 181:57724642e740 264 // clear wakeup flag in power control register
AnnaBridge 181:57724642e740 265 PWR->CR |= PWR_CR_CWUF;
AnnaBridge 181:57724642e740 266
AnnaBridge 181:57724642e740 267 // enable the ADC and DAC
AnnaBridge 181:57724642e740 268 ADC->CCR |= ADC_CCR_TSVREFE;
AnnaBridge 181:57724642e740 269 ADC1->CR2 |= ADC_CR2_ADON;
AnnaBridge 181:57724642e740 270 DAC->CR |= DAC_CR_EN1;
AnnaBridge 181:57724642e740 271 DAC->CR |= DAC_CR_EN2;
AnnaBridge 181:57724642e740 272 }
AnnaBridge 181:57724642e740 273
AnnaBridge 181:57724642e740 274 void xdot_enter_standby_mode() {
AnnaBridge 181:57724642e740 275 // enable ULP and enable fast wakeup
AnnaBridge 181:57724642e740 276 HAL_PWREx_EnableUltraLowPower();
AnnaBridge 181:57724642e740 277 HAL_PWREx_EnableFastWakeUp();
AnnaBridge 181:57724642e740 278
AnnaBridge 181:57724642e740 279 // disable HSI, MSI, and LSI if they are running
AnnaBridge 181:57724642e740 280 if (RCC->CR & RCC_CR_HSION)
AnnaBridge 181:57724642e740 281 RCC->CR &= ~RCC_CR_HSION;
AnnaBridge 181:57724642e740 282 if (RCC->CR & RCC_CR_MSION)
AnnaBridge 181:57724642e740 283 RCC->CR &= ~RCC_CR_MSION;
AnnaBridge 181:57724642e740 284 if (RCC->CSR & RCC_CSR_LSION)
AnnaBridge 181:57724642e740 285 RCC->CSR &= ~RCC_CSR_LSION;
AnnaBridge 181:57724642e740 286
AnnaBridge 181:57724642e740 287
AnnaBridge 181:57724642e740 288 // make sure wakeup and standby flags are cleared
AnnaBridge 181:57724642e740 289 PWR->CR |= PWR_CR_CWUF;
AnnaBridge 181:57724642e740 290 PWR->CR |= PWR_CR_CSBF;
AnnaBridge 181:57724642e740 291
AnnaBridge 181:57724642e740 292 // enter standby mode
AnnaBridge 181:57724642e740 293 HAL_PWR_EnterSTANDBYMode();
AnnaBridge 181:57724642e740 294 }
AnnaBridge 181:57724642e740 295
AnnaBridge 181:57724642e740 296 void xdot_enable_standby_wake_pin() {
AnnaBridge 181:57724642e740 297 HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);
AnnaBridge 181:57724642e740 298 }
AnnaBridge 181:57724642e740 299
AnnaBridge 181:57724642e740 300 void xdot_disable_standby_wake_pin() {
AnnaBridge 181:57724642e740 301 HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1);
AnnaBridge 181:57724642e740 302 }