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targets/hal/TARGET_NXP/TARGET_LPC81X/us_ticker.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include <stddef.h>
bogdanm 0:9b334a45a8ff 17 #include "us_ticker_api.h"
bogdanm 0:9b334a45a8ff 18 #include "PeripheralNames.h"
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 //New, using MRT instead of SCT, needed to free up SCT for PWM
bogdanm 0:9b334a45a8ff 21 //Ported from LPC824 libs
bogdanm 0:9b334a45a8ff 22 static int us_ticker_inited = 0;
bogdanm 0:9b334a45a8ff 23 static int us_ticker_interrupt_inited = 0;
bogdanm 0:9b334a45a8ff 24 unsigned int ticker_fullcount_us;
bogdanm 0:9b334a45a8ff 25 unsigned long int ticker_expired_count_us = 0;
bogdanm 0:9b334a45a8ff 26 int MRT_Clock_MHz;
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 #define US_TICKER_TIMER_IRQn MRT_IRQn
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 void us_ticker_init(void) {
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 if (us_ticker_inited)
bogdanm 0:9b334a45a8ff 33 return;
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 us_ticker_inited = 1;
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 // Calculate MRT clock value (MRT has no prescaler)
bogdanm 0:9b334a45a8ff 38 MRT_Clock_MHz = (SystemCoreClock / 1000000);
bogdanm 0:9b334a45a8ff 39 // Calculate fullcounter value in us (MRT has 31 bits and clock is 30 MHz)
bogdanm 0:9b334a45a8ff 40 ticker_fullcount_us = 0x80000000UL/MRT_Clock_MHz;
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 // Enable the MRT clock
bogdanm 0:9b334a45a8ff 43 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 // Clear peripheral reset the MRT
bogdanm 0:9b334a45a8ff 46 LPC_SYSCON->PRESETCTRL |= (1 << 7);
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
bogdanm 0:9b334a45a8ff 49 LPC_MRT->INTVAL0 = 0xFFFFFFFFUL;
bogdanm 0:9b334a45a8ff 50 // Enable Ch0 interrupt, Mode 0 is Repeat Interrupt
bogdanm 0:9b334a45a8ff 51 LPC_MRT->CTRL0 = (0x0 << 1) | (0x1 << 0);
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
bogdanm 0:9b334a45a8ff 54 LPC_MRT->INTVAL1 = 0x80000000UL;
bogdanm 0:9b334a45a8ff 55 // Disable ch1 interrupt, Mode 0 is Repeat Interrupt
bogdanm 0:9b334a45a8ff 56 LPC_MRT->CTRL1 = (0x0 << 1) | (0x0 << 0);
bogdanm 0:9b334a45a8ff 57 }
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 void us_ticker_interrupt_init(void) {
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 if (us_ticker_interrupt_inited)
bogdanm 0:9b334a45a8ff 62 return;
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 us_ticker_interrupt_inited = 1;
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 // Set MRT interrupt vector
bogdanm 0:9b334a45a8ff 67 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
bogdanm 0:9b334a45a8ff 68 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 //TIMER0 is used for us ticker and timers (Timer, wait(), wait_us() etc)
bogdanm 0:9b334a45a8ff 72 uint32_t us_ticker_read() {
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 if (!us_ticker_inited)
bogdanm 0:9b334a45a8ff 75 us_ticker_init();
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 // Generate ticker value
bogdanm 0:9b334a45a8ff 78 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
bogdanm 0:9b334a45a8ff 79 // Calculate expected value using current count and number of expired times to mimic a 32bit timer @ 1 MHz
bogdanm 0:9b334a45a8ff 80 //
bogdanm 0:9b334a45a8ff 81 // ticker_expired_count_us
bogdanm 0:9b334a45a8ff 82 // The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
bogdanm 0:9b334a45a8ff 83 // corrects that back to us counts.
bogdanm 0:9b334a45a8ff 84 //
bogdanm 0:9b334a45a8ff 85 // (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz
bogdanm 0:9b334a45a8ff 86 // The counter is a 31bit downcounter from 7FFFFFFF so correct to actual count-up value and correct
bogdanm 0:9b334a45a8ff 87 // for 30 counts per us.
bogdanm 0:9b334a45a8ff 88 //
bogdanm 0:9b334a45a8ff 89 // Added up these 2 parts result in current us time returned as 32 bits.
bogdanm 0:9b334a45a8ff 90 return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz + ticker_expired_count_us;
bogdanm 0:9b334a45a8ff 91 }
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 //TIMER1 is used for Timestamped interrupts (Ticker(), Timeout())
bogdanm 0:9b334a45a8ff 94 void us_ticker_set_interrupt(timestamp_t timestamp) {
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 if (!us_ticker_interrupt_inited)
bogdanm 0:9b334a45a8ff 97 us_ticker_interrupt_init();
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
bogdanm 0:9b334a45a8ff 100 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
bogdanm 0:9b334a45a8ff 101 // Note: The MRT has less counter headroom available than the typical mbed 32bit timer @ 1 MHz.
bogdanm 0:9b334a45a8ff 102 // The calculated counter interval until the next timestamp will be truncated and an
bogdanm 0:9b334a45a8ff 103 // 'early' interrupt will be generated in case the max required count interval exceeds
bogdanm 0:9b334a45a8ff 104 // the available 31 bits space. However, the mbed us_ticker interrupt handler will
bogdanm 0:9b334a45a8ff 105 // check current time against the next scheduled timestamp and simply re-issue the
bogdanm 0:9b334a45a8ff 106 // same interrupt again when needed. The calculated counter interval will now be smaller.
bogdanm 0:9b334a45a8ff 107 LPC_MRT->INTVAL1 = (((timestamp - us_ticker_read()) * MRT_Clock_MHz) | 0x80000000UL);
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 // Enable interrupt
bogdanm 0:9b334a45a8ff 110 LPC_MRT->CTRL1 |= 1;
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 //Disable Timestamped interrupts triggered by TIMER1
bogdanm 0:9b334a45a8ff 114 void us_ticker_disable_interrupt() {
bogdanm 0:9b334a45a8ff 115 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
bogdanm 0:9b334a45a8ff 116 LPC_MRT->CTRL1 &= ~1;
bogdanm 0:9b334a45a8ff 117 }
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 void us_ticker_clear_interrupt() {
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
bogdanm 0:9b334a45a8ff 122 if (LPC_MRT->STAT1 & 1)
bogdanm 0:9b334a45a8ff 123 LPC_MRT->STAT1 = 1;
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 //Timer0 for us counter (31 bits downcounter @ SystemCoreClock)
bogdanm 0:9b334a45a8ff 126 if (LPC_MRT->STAT0 & 1) {
bogdanm 0:9b334a45a8ff 127 LPC_MRT->STAT0 = 1;
bogdanm 0:9b334a45a8ff 128 // ticker_expired_count_us = (ticker_expired * 0x80000000UL) / MRT_Clock_MHz
bogdanm 0:9b334a45a8ff 129 // The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
bogdanm 0:9b334a45a8ff 130 // the multiplication/division corrects that back to us counts.
bogdanm 0:9b334a45a8ff 131 ticker_expired_count_us += ticker_fullcount_us;
bogdanm 0:9b334a45a8ff 132 }
bogdanm 0:9b334a45a8ff 133 }