PJ12 MP3 oled96*64 dht22 infraredTemp

Dependencies:   mbed DHT ssd1331

Committer:
pingnpp
Date:
Wed Dec 19 08:17:47 2018 +0000
Revision:
0:c250dad6f7f2
PJ12_device

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pingnpp 0:c250dad6f7f2 1 #pragma once
pingnpp 0:c250dad6f7f2 2
pingnpp 0:c250dad6f7f2 3 namespace gy906 {
pingnpp 0:c250dad6f7f2 4 //const int default_addr = 0x5a;
pingnpp 0:c250dad6f7f2 5 const int default_addr = 0x00;
pingnpp 0:c250dad6f7f2 6 namespace opcode {
pingnpp 0:c250dad6f7f2 7 const int eeprom_access = 0x20;
pingnpp 0:c250dad6f7f2 8 const int ram_access = 0x00;
pingnpp 0:c250dad6f7f2 9 const int read_flags = 0xf0;
pingnpp 0:c250dad6f7f2 10 const int sleep = 0xff;
pingnpp 0:c250dad6f7f2 11 const int read_mask = 0x80;
pingnpp 0:c250dad6f7f2 12 const int write_mask = 0x00;
pingnpp 0:c250dad6f7f2 13 }
pingnpp 0:c250dad6f7f2 14 namespace eeprom {
pingnpp 0:c250dad6f7f2 15 const int T0_max = 0x00;
pingnpp 0:c250dad6f7f2 16 const int T0_min = 0x01;
pingnpp 0:c250dad6f7f2 17 const int PWMCTRL = 0x02;
pingnpp 0:c250dad6f7f2 18 const int Ta_range = 0x03;
pingnpp 0:c250dad6f7f2 19 const int EC_coef = 0x04;
pingnpp 0:c250dad6f7f2 20 const int config_reg1 = 0x05;
pingnpp 0:c250dad6f7f2 21 const int SMBus_addr = 0x0e;
pingnpp 0:c250dad6f7f2 22 const int id1 = 0x1c;
pingnpp 0:c250dad6f7f2 23 const int id2 = 0x1d;
pingnpp 0:c250dad6f7f2 24 const int id3 = 0x1e;
pingnpp 0:c250dad6f7f2 25 const int id4 = 0x1f;
pingnpp 0:c250dad6f7f2 26 }
pingnpp 0:c250dad6f7f2 27 namespace ram {
pingnpp 0:c250dad6f7f2 28 const int ir1 = 0x04;
pingnpp 0:c250dad6f7f2 29 const int ir2 = 0x05;
pingnpp 0:c250dad6f7f2 30 const int T_ambient = 0x06;
pingnpp 0:c250dad6f7f2 31 const int T_obj1 = 0x07;
pingnpp 0:c250dad6f7f2 32 const int T_obj2 = 0x08;
pingnpp 0:c250dad6f7f2 33 }
pingnpp 0:c250dad6f7f2 34 }