Revision 1:9cb4854ab263, committed 2015-07-01

Comitter:

phsfan

Date:

Wed Jul 01 00:45:54 2015 +0000

Parent:

0:90cbfc14fcb7

Commit message:

test build

Changed in this revision

diff -r 90cbfc14fcb7 -r 9cb4854ab263 main.cpp
--- a/main.cpp	Mon May 11 15:15:44 2015 +0000
+++ b/main.cpp	Wed Jul 01 00:45:54 2015 +0000
@@ -2,42 +2,47 @@
  * select: Nucleo F401RE
  */
 #include "mbed.h"
+#include "phs_f405.h"
+
+//#define BAUD 120000
+#define BAUD 9600
 
 Serial pc(PB_6, PB_7);
 
-Serial phs(PA_2, PA_3);
-DigitalOut rts(PA_1);
-DigitalIn cts(PA_0);
+ShieldSerial ser(BAUD); // PC_12, PD_2
+DigitalIn pwron(PC_5), regon(PC_4);
+DigitalOut state(PB_1);
 
-DigitalOut led1(PC_6), led2(PC_7);
-DigitalOut pwr1(PC_9);
-DigitalIn pwr2(PA_8);
+Serial phs(PA_2, PA_3);
+DigitalOut rts(PA_1), dsr(PA_5);
+DigitalIn cts(PA_0), dcd(PA_7), dtr(PA_6), ri(PA_4);
+PhsReset reset; // PB_11
 
+DigitalOut power(PC_9);
+DigitalOut led1(PC_7), led2(PC_6);
 
 int main() {
-    pc.baud(115200);
-    phs.baud(120000);
-    pwr1 = 0; // DCDC enable
-    pwr2.mode(PullUp);
-    GPIOB->MODER = (GPIOB->MODER & ~(3<<22)) | (1<<22); // PB_11 output
-    GPIOB->OTYPER = (1<<11); // open drain
-    GPIOB->ODR &= ~(1<<11); // reser=0
-//    phs.set_flow_control(Serial::RTSCTS, PA_1, PA_0);
+    pwron.mode(PullUp);
+    regon.mode(PullDown);
+    reset = 0;
+    power = 0; // DCDC on
+    led1 = 0;
+    led2 = 0;
+    phs.baud(BAUD);
     cts.mode(PullUp);
-    rts = 0;
-    wait_ms(100);
-    GPIOB->MODER &= ~(3<<22); // PB_11 input
-    GPIOB->PUPDR = (GPIOB->MODER & ~(3<<22)) | (1<<22); // pullup
-
-    pc.printf("*** PHSShield STM32F405\r\n");    
-
+    dsr = rts = 1;
+    wait_ms(200);
+ 
     for (;;) {
-        if (phs.readable()) {
-            pc.putc(phs.getc());
+        if (phs.readable() && ser.writeable()) {
+            ser.putc(phs.getc());
         }
-        if (pc.readable()) {
-            phs.putc(pc.getc());
+        if (ser.readable() && phs.writeable()) {
+            phs.putc(ser.getc());
         }
-        led2 = cts;
+
+        reset = pwron;
+        led2 = pwron;
+        dsr = rts = regon;
     }
 }

diff -r 90cbfc14fcb7 -r 9cb4854ab263 mbed.bld
--- a/mbed.bld	Mon May 11 15:15:44 2015 +0000
+++ b/mbed.bld	Wed Jul 01 00:45:54 2015 +0000
@@ -1,1 +1,1 @@
-http://mbed.org/users/mbed_official/code/mbed/builds/8ab26030e058
\ No newline at end of file
+http://mbed.org/users/mbed_official/code/mbed/builds/487b796308b0
\ No newline at end of file

diff -r 90cbfc14fcb7 -r 9cb4854ab263 phs_f405.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/phs_f405.cpp	Wed Jul 01 00:45:54 2015 +0000
@@ -0,0 +1,84 @@
+#include "phs_f405.h"
+#include "stm32f4xx_hal.h"
+#include <cstdarg>
+
+
+void PhsReset::write (int value) {
+    __GPIOB_CLK_ENABLE();
+    if (value) {
+        GPIOB->MODER &= ~(3<<22); // PB_11 input
+        GPIOB->PUPDR = (GPIOB->PUPDR & ~(3<<22)) | (1<<22); // pullup
+        GPIOB->OTYPER &= ~(1<<11); // push pull
+        GPIOB->BSRRL = (1<<11); // reser=1
+    } else {
+        GPIOB->MODER = (GPIOB->MODER & ~(3<<22)) | (1<<22); // PB_11 output
+        GPIOB->PUPDR &= ~(3<<22); // pull none
+        GPIOB->OTYPER |= (1<<11); // open drain
+        GPIOB->BSRRH = (1<<11); // reser=0
+    }
+}
+
+int PhsReset::read () {
+    int status;
+    status = (GPIOB->ODR & (1<<11)) ? 1 : 0;
+    return status;
+}
+
+
+#define STRING_STACK_LIMIT 256
+#define UART5_BASE            (APB1PERIPH_BASE + 0x5000)
+#define UART5               ((USART_TypeDef *) UART5_BASE)
+#define  RCC_APB1ENR_UART5EN                 ((uint32_t)0x00100000)
+#define __UART5_CLK_ENABLE()   (RCC->APB1ENR |= (RCC_APB1ENR_UART5EN))
+#define GPIO_AF8_UART5         ((uint8_t)0x08) 
+
+ShieldSerial::ShieldSerial (int baud) {
+    __UART5_CLK_ENABLE();
+
+    UartHandle.Instance = (USART_TypeDef *)UART5;
+    UartHandle.Init.BaudRate   = baud;
+    UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+    UartHandle.Init.StopBits   = UART_STOPBITS_1;
+    UartHandle.Init.Parity     = UART_PARITY_NONE;
+    UartHandle.Init.HwFlowCtl  = UART_HWCONTROL_NONE;
+    UartHandle.Init.Mode = UART_MODE_TX_RX;
+    if (HAL_UART_Init(&UartHandle) != HAL_OK) {
+        mbed_die();
+    }
+
+    __GPIOC_CLK_ENABLE();
+    __GPIOD_CLK_ENABLE();
+    GPIO_InitTypeDef  GPIO_InitStruct;
+    GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull      = GPIO_PULLUP;
+    GPIO_InitStruct.Speed     = GPIO_SPEED_FAST;
+    GPIO_InitStruct.Pin       = GPIO_PIN_12;
+    GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); // TX
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); // RX
+}
+
+int ShieldSerial::getc () {
+    while (!readable());
+    return (int)(UartHandle.Instance->DR & 0x1FF);
+}
+
+int ShieldSerial::putc (int c) {
+    while (!writeable());
+    UartHandle.Instance->DR = (uint32_t)(c & 0x1FF);
+    return 0;
+}
+
+int ShieldSerial::readable () {
+    int status;
+    status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) ? 1 : 0);
+    return status;
+}
+
+int ShieldSerial::writeable () {
+    int status;
+    status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE) != RESET) ? 1 : 0);
+    return status;
+}

diff -r 90cbfc14fcb7 -r 9cb4854ab263 phs_f405.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/phs_f405.h	Wed Jul 01 00:45:54 2015 +0000
@@ -0,0 +1,38 @@
+#ifndef _phs_f405_h_
+#define _phs_f405_h_
+
+#include "mbed.h"
+
+class PhsReset {
+public:
+    void write (int value);
+    int read ();
+
+    PhsReset& operator= (int value) {
+        write(value);
+        return *this;
+    }
+
+    PhsReset& operator= (PhsReset& rhs) {
+        write(rhs.read());
+        return *this;
+    }
+
+    operator int() {
+        return read();
+    }
+};
+
+
+class ShieldSerial {
+public:
+    ShieldSerial (int baud);
+    int getc ();
+    int putc (int c);
+    int readable ();
+    int writeable ();
+protected:
+    UART_HandleTypeDef UartHandle;
+};
+
+#endif