GPIO toggle test on NUCLEO F411RE DigitalOut 4.46MHz, 11210msec BSRRL/BSRRH register 20.8MHz, 2402msec Bit banding 15.6MHz, 3203msec
GPIO toggle test on NUCLEO F411RE
- DigitalOut 4.46MHz, 11210msec
- BSRRL/BSRRH register 20.8MHz, 2402msec
- Bit banding 15.6MHz, 3203msec
Revision 1:02a561139720, committed 2017-09-07
- Comitter:
- peu605
- Date:
- Thu Sep 07 14:53:32 2017 +0000
- Parent:
- 0:ab159002ec37
- Commit message:
- change to BSRR
Changed in this revision
main.cpp | Show annotated file Show diff for this revision Revisions of this file |
mbed.bld | Show annotated file Show diff for this revision Revisions of this file |
diff -r ab159002ec37 -r 02a561139720 main.cpp --- a/main.cpp Mon Jan 26 10:31:24 2015 +0000 +++ b/main.cpp Thu Sep 07 14:53:32 2017 +0000 @@ -14,7 +14,7 @@ #define BITBAND_PERIPH(addr, bit) \ (volatile uint32_t*)(PERIPH_BB_BASE+((uint32_t)addr-PERIPH_BASE)*32+(bit*4)) -#define LOOP_COUNT 10000001 +#define LOOP_COUNT 10000000 PinName pinName = D10; DigitalOut dout(pinName, 0); @@ -22,7 +22,8 @@ Serial pc(SERIAL_TX, SERIAL_RX); GPIO_TypeDef *gpio_port_reg; -volatile uint32_t gpio_reg_mask; +volatile uint32_t gpio_reg_set_mask; +volatile uint32_t gpio_reg_reset_mask; volatile uint32_t *bb_gpio_port; void digitalOutTest(); @@ -35,7 +36,8 @@ //set gpio port addresses and masks uint32_t port_index = (uint32_t) pinName >> 4; gpio_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (port_index << 10)); - gpio_reg_mask = 1 << ((uint32_t) pinName & 0xf); + gpio_reg_set_mask = 1 << ((uint32_t) pinName & 0xf); + gpio_reg_reset_mask = gpio_reg_set_mask << 16; // set bit band addresses uint8_t port_bit = (uint32_t) pinName & 0xf; @@ -57,7 +59,7 @@ uint32_t l = LOOP_COUNT; int t1 = t.read_ms(); - while(--l) { + while(l--) { dout = 1; dout = 0; dout = 1; @@ -80,17 +82,18 @@ uint32_t l = LOOP_COUNT; int t1 = t.read_ms(); - while(--l) { - gpio_port_reg->BSRRL = gpio_reg_mask; - gpio_port_reg->BSRRH = gpio_reg_mask; - gpio_port_reg->BSRRL = gpio_reg_mask; - gpio_port_reg->BSRRH = gpio_reg_mask; - gpio_port_reg->BSRRL = gpio_reg_mask; - gpio_port_reg->BSRRH = gpio_reg_mask; - gpio_port_reg->BSRRL = gpio_reg_mask; - gpio_port_reg->BSRRH = gpio_reg_mask; - gpio_port_reg->BSRRL = gpio_reg_mask; - gpio_port_reg->BSRRH = gpio_reg_mask; +// __asm("ALIGN 4"); + while(l--) { + gpio_port_reg->BSRR = gpio_reg_set_mask; + gpio_port_reg->BSRR = gpio_reg_reset_mask; + gpio_port_reg->BSRR = gpio_reg_set_mask; + gpio_port_reg->BSRR = gpio_reg_reset_mask; + gpio_port_reg->BSRR = gpio_reg_set_mask; + gpio_port_reg->BSRR = gpio_reg_reset_mask; + gpio_port_reg->BSRR = gpio_reg_set_mask; + gpio_port_reg->BSRR = gpio_reg_reset_mask; + gpio_port_reg->BSRR = gpio_reg_set_mask; + gpio_port_reg->BSRR = gpio_reg_reset_mask; } int t2 = t.read_ms(); @@ -103,7 +106,8 @@ uint32_t l = LOOP_COUNT; int t1 = t.read_ms(); - while(--l) { +// __asm(".align 4"); + while(l--) { *bb_gpio_port = 1; *bb_gpio_port = 0; *bb_gpio_port = 1;
diff -r ab159002ec37 -r 02a561139720 mbed.bld --- a/mbed.bld Mon Jan 26 10:31:24 2015 +0000 +++ b/mbed.bld Thu Sep 07 14:53:32 2017 +0000 @@ -1,1 +1,1 @@ -http://mbed.org/users/mbed_official/code/mbed/builds/4fc01daae5a5 \ No newline at end of file +https://mbed.org/users/mbed_official/code/mbed/builds/a330f0fddbec \ No newline at end of file