Thierry Pébayle / mbed-STM32F030K6

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Thu Apr 16 11:45:13 2015 +0100
Revision:
514:7668256dbe61
Child:
536:c48d7048ab6e
Synchronized with git revision 29ab478a78892415a3c721cdc20b1755b7b01ba1

Full URL: https://github.com/mbedmicro/mbed/commit/29ab478a78892415a3c721cdc20b1755b7b01ba1/

LPC824, SSCI824 - Add GCC_ARM exporter support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 514:7668256dbe61 1 /*******************************************************************************
mbed_official 514:7668256dbe61 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 514:7668256dbe61 3 *
mbed_official 514:7668256dbe61 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 514:7668256dbe61 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 514:7668256dbe61 6 * to deal in the Software without restriction, including without limitation
mbed_official 514:7668256dbe61 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 514:7668256dbe61 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 514:7668256dbe61 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 514:7668256dbe61 10 *
mbed_official 514:7668256dbe61 11 * The above copyright notice and this permission notice shall be included
mbed_official 514:7668256dbe61 12 * in all copies or substantial portions of the Software.
mbed_official 514:7668256dbe61 13 *
mbed_official 514:7668256dbe61 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 514:7668256dbe61 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 514:7668256dbe61 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 514:7668256dbe61 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 514:7668256dbe61 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 514:7668256dbe61 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 514:7668256dbe61 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 514:7668256dbe61 21 *
mbed_official 514:7668256dbe61 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 514:7668256dbe61 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 514:7668256dbe61 24 * Products, Inc. Branding Policy.
mbed_official 514:7668256dbe61 25 *
mbed_official 514:7668256dbe61 26 * The mere transfer of this software does not imply any licenses
mbed_official 514:7668256dbe61 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 514:7668256dbe61 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 514:7668256dbe61 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 514:7668256dbe61 30 * ownership rights.
mbed_official 514:7668256dbe61 31 *******************************************************************************
mbed_official 514:7668256dbe61 32 */
mbed_official 514:7668256dbe61 33
mbed_official 514:7668256dbe61 34 #include "rtc_api.h"
mbed_official 514:7668256dbe61 35 #include "cmsis.h"
mbed_official 514:7668256dbe61 36 #include "rtc_regs.h"
mbed_official 514:7668256dbe61 37 #include "pwrseq_regs.h"
mbed_official 514:7668256dbe61 38 #include "clkman_regs.h"
mbed_official 514:7668256dbe61 39
mbed_official 514:7668256dbe61 40 static int rtc_inited = 0;
mbed_official 514:7668256dbe61 41 static volatile uint32_t overflow_cnt = 0;
mbed_official 514:7668256dbe61 42 static uint32_t overflow_alarm = 0;
mbed_official 514:7668256dbe61 43
mbed_official 514:7668256dbe61 44 //******************************************************************************
mbed_official 514:7668256dbe61 45 static void overflow_handler(void)
mbed_official 514:7668256dbe61 46 {
mbed_official 514:7668256dbe61 47 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS;
mbed_official 514:7668256dbe61 48 overflow_cnt++;
mbed_official 514:7668256dbe61 49
mbed_official 514:7668256dbe61 50 if (overflow_cnt == overflow_alarm) {
mbed_official 514:7668256dbe61 51 // Enable the comparator interrupt for the alarm
mbed_official 514:7668256dbe61 52 MXC_RTCTMR->inten |= MXC_F_RTC_INTEN_COMP0;
mbed_official 514:7668256dbe61 53 }
mbed_official 514:7668256dbe61 54 }
mbed_official 514:7668256dbe61 55
mbed_official 514:7668256dbe61 56 //******************************************************************************
mbed_official 514:7668256dbe61 57 static void alarm_handler(void)
mbed_official 514:7668256dbe61 58 {
mbed_official 514:7668256dbe61 59 MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0;
mbed_official 514:7668256dbe61 60 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS;
mbed_official 514:7668256dbe61 61 }
mbed_official 514:7668256dbe61 62
mbed_official 514:7668256dbe61 63 //******************************************************************************
mbed_official 514:7668256dbe61 64 void rtc_init(void)
mbed_official 514:7668256dbe61 65 {
mbed_official 514:7668256dbe61 66 if(rtc_inited) {
mbed_official 514:7668256dbe61 67 return;
mbed_official 514:7668256dbe61 68 }
mbed_official 514:7668256dbe61 69 rtc_inited = 1;
mbed_official 514:7668256dbe61 70
mbed_official 514:7668256dbe61 71 // Enable the clock to the synchronizer
mbed_official 514:7668256dbe61 72 MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
mbed_official 514:7668256dbe61 73
mbed_official 514:7668256dbe61 74 // Enable the clock to the RTC
mbed_official 514:7668256dbe61 75 MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN;
mbed_official 514:7668256dbe61 76
mbed_official 514:7668256dbe61 77 // Set the divider from the 4kHz clock
mbed_official 514:7668256dbe61 78 MXC_RTCTMR->prescale = MXC_E_RTC_PRESCALE_DIV_2_0;
mbed_official 514:7668256dbe61 79
mbed_official 514:7668256dbe61 80 // Enable the overflow interrupt
mbed_official 514:7668256dbe61 81 MXC_RTCTMR->inten |= MXC_F_RTC_FLAGS_OVERFLOW;
mbed_official 514:7668256dbe61 82
mbed_official 514:7668256dbe61 83 // Prepare interrupt handlers
mbed_official 514:7668256dbe61 84 NVIC_SetVector(RTC0_IRQn, (uint32_t)alarm_handler);
mbed_official 514:7668256dbe61 85 NVIC_EnableIRQ(RTC0_IRQn);
mbed_official 514:7668256dbe61 86 NVIC_SetVector(RTC3_IRQn, (uint32_t)overflow_handler);
mbed_official 514:7668256dbe61 87 NVIC_EnableIRQ(RTC3_IRQn);
mbed_official 514:7668256dbe61 88
mbed_official 514:7668256dbe61 89 // Enable the RTC
mbed_official 514:7668256dbe61 90 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE;
mbed_official 514:7668256dbe61 91 }
mbed_official 514:7668256dbe61 92
mbed_official 514:7668256dbe61 93 //******************************************************************************
mbed_official 514:7668256dbe61 94 void rtc_free(void)
mbed_official 514:7668256dbe61 95 {
mbed_official 514:7668256dbe61 96 if (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE) {
mbed_official 514:7668256dbe61 97 // Clear and disable RTC
mbed_official 514:7668256dbe61 98 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_CLEAR;
mbed_official 514:7668256dbe61 99 MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE;
mbed_official 514:7668256dbe61 100
mbed_official 514:7668256dbe61 101 // Wait for pending transactions
mbed_official 514:7668256dbe61 102 while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
mbed_official 514:7668256dbe61 103 }
mbed_official 514:7668256dbe61 104
mbed_official 514:7668256dbe61 105 // Disable the clock to the RTC
mbed_official 514:7668256dbe61 106 MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP);
mbed_official 514:7668256dbe61 107
mbed_official 514:7668256dbe61 108 // Disable the clock to the synchronizer
mbed_official 514:7668256dbe61 109 MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_DISABLED;
mbed_official 514:7668256dbe61 110 }
mbed_official 514:7668256dbe61 111
mbed_official 514:7668256dbe61 112 //******************************************************************************
mbed_official 514:7668256dbe61 113 int rtc_isenabled(void)
mbed_official 514:7668256dbe61 114 {
mbed_official 514:7668256dbe61 115 return (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE);
mbed_official 514:7668256dbe61 116 }
mbed_official 514:7668256dbe61 117
mbed_official 514:7668256dbe61 118 //******************************************************************************
mbed_official 514:7668256dbe61 119 time_t rtc_read(void)
mbed_official 514:7668256dbe61 120 {
mbed_official 514:7668256dbe61 121 unsigned int shift_amt;
mbed_official 514:7668256dbe61 122 uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt;
mbed_official 514:7668256dbe61 123
mbed_official 514:7668256dbe61 124 // Account for a change in the default prescaler
mbed_official 514:7668256dbe61 125 shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
mbed_official 514:7668256dbe61 126
mbed_official 514:7668256dbe61 127 // Ensure coherency between overflow_cnt and timer
mbed_official 514:7668256dbe61 128 do {
mbed_official 514:7668256dbe61 129 ovf_cnt_1 = overflow_cnt;
mbed_official 514:7668256dbe61 130 timer_cnt = MXC_RTCTMR->timer;
mbed_official 514:7668256dbe61 131 ovf_cnt_2 = overflow_cnt;
mbed_official 514:7668256dbe61 132 } while (ovf_cnt_1 != ovf_cnt_2);
mbed_official 514:7668256dbe61 133
mbed_official 514:7668256dbe61 134 return (timer_cnt >> shift_amt) + (ovf_cnt_1 << (32 - shift_amt));
mbed_official 514:7668256dbe61 135 }
mbed_official 514:7668256dbe61 136
mbed_official 514:7668256dbe61 137 //******************************************************************************
mbed_official 514:7668256dbe61 138 uint64_t rtc_read_us(void)
mbed_official 514:7668256dbe61 139 {
mbed_official 514:7668256dbe61 140 unsigned int shift_amt;
mbed_official 514:7668256dbe61 141 uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt;
mbed_official 514:7668256dbe61 142 uint64_t currentUs;
mbed_official 514:7668256dbe61 143
mbed_official 514:7668256dbe61 144 // Account for a change in the default prescaler
mbed_official 514:7668256dbe61 145 shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
mbed_official 514:7668256dbe61 146
mbed_official 514:7668256dbe61 147 // Ensure coherency between overflow_cnt and timer
mbed_official 514:7668256dbe61 148 do {
mbed_official 514:7668256dbe61 149 ovf_cnt_1 = overflow_cnt;
mbed_official 514:7668256dbe61 150 timer_cnt = MXC_RTCTMR->timer;
mbed_official 514:7668256dbe61 151 ovf_cnt_2 = overflow_cnt;
mbed_official 514:7668256dbe61 152 } while (ovf_cnt_1 != ovf_cnt_2);
mbed_official 514:7668256dbe61 153
mbed_official 514:7668256dbe61 154 currentUs = (((uint64_t)timer_cnt * 1000000) >> shift_amt) + (((uint64_t)ovf_cnt_1 * 1000000) << (32 - shift_amt));
mbed_official 514:7668256dbe61 155
mbed_official 514:7668256dbe61 156 return currentUs;
mbed_official 514:7668256dbe61 157 }
mbed_official 514:7668256dbe61 158
mbed_official 514:7668256dbe61 159 //******************************************************************************
mbed_official 514:7668256dbe61 160 void rtc_write(time_t t)
mbed_official 514:7668256dbe61 161 {
mbed_official 514:7668256dbe61 162 // Account for a change in the default prescaler
mbed_official 514:7668256dbe61 163 unsigned int shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
mbed_official 514:7668256dbe61 164
mbed_official 514:7668256dbe61 165 MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE; // disable the timer while updating
mbed_official 514:7668256dbe61 166 MXC_RTCTMR->timer = t << shift_amt;
mbed_official 514:7668256dbe61 167 overflow_cnt = t >> (32 - shift_amt);
mbed_official 514:7668256dbe61 168 MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE; // enable the timer while updating
mbed_official 514:7668256dbe61 169 }
mbed_official 514:7668256dbe61 170
mbed_official 514:7668256dbe61 171 //******************************************************************************
mbed_official 514:7668256dbe61 172 void rtc_set_wakeup(uint64_t wakeupUs)
mbed_official 514:7668256dbe61 173 {
mbed_official 514:7668256dbe61 174 // Account for a change in the default prescaler
mbed_official 514:7668256dbe61 175 unsigned int shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
mbed_official 514:7668256dbe61 176
mbed_official 514:7668256dbe61 177 // Disable the alarm while it is prepared
mbed_official 514:7668256dbe61 178 MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0;
mbed_official 514:7668256dbe61 179 MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_COMP0; // clear interrupt
mbed_official 514:7668256dbe61 180
mbed_official 514:7668256dbe61 181 overflow_alarm = (wakeupUs >> (32 - shift_amt)) / 1000000;
mbed_official 514:7668256dbe61 182
mbed_official 514:7668256dbe61 183 if (overflow_alarm == overflow_cnt) {
mbed_official 514:7668256dbe61 184 MXC_RTCTMR->comp[0] = (wakeupUs << shift_amt) / 1000000;
mbed_official 514:7668256dbe61 185 MXC_RTCTMR->inten |= MXC_F_RTC_INTEN_COMP0;
mbed_official 514:7668256dbe61 186 }
mbed_official 514:7668256dbe61 187
mbed_official 514:7668256dbe61 188 // Enable wakeup from RTC
mbed_official 514:7668256dbe61 189 MXC_PWRSEQ->msk_flags &= ~(MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER | MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0);
mbed_official 514:7668256dbe61 190 }