Thierry Pébayle / mbed-STM32F030K6

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targets/hal/TARGET_NXP/TARGET_LPC82X/us_ticker.c@337:6ed01c00b962, 2014-10-06 (annotated)

Committer:
mbed_official
Date:
Mon Oct 06 10:00:08 2014 +0100
Revision:
337:6ed01c00b962
Child:
509:53fc1beb5664
Synchronized with git revision b30176a071a49d95914b97d2ab98240f3a1e2cae



Full URL: https://github.com/mbedmicro/mbed/commit/b30176a071a49d95914b97d2ab98240f3a1e2cae/



Platform: LPC824 - new platform addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 337:6ed01c00b962 1 /* mbed Microcontroller Library
mbed_official 337:6ed01c00b962 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 337:6ed01c00b962 3 *
mbed_official 337:6ed01c00b962 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 337:6ed01c00b962 5 * you may not use this file except in compliance with the License.
mbed_official 337:6ed01c00b962 6 * You may obtain a copy of the License at
mbed_official 337:6ed01c00b962 7 *
mbed_official 337:6ed01c00b962 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 337:6ed01c00b962 9 *
mbed_official 337:6ed01c00b962 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 337:6ed01c00b962 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 337:6ed01c00b962 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 337:6ed01c00b962 13 * See the License for the specific language governing permissions and
mbed_official 337:6ed01c00b962 14 * limitations under the License.
mbed_official 337:6ed01c00b962 15 */
mbed_official 337:6ed01c00b962 16 #include <stddef.h>
mbed_official 337:6ed01c00b962 17 #include "us_ticker_api.h"
mbed_official 337:6ed01c00b962 18 #include "PeripheralNames.h"
mbed_official 337:6ed01c00b962 19
mbed_official 337:6ed01c00b962 20 static int us_ticker_inited = 0;
mbed_official 337:6ed01c00b962 21 static int ticker_expired = 0;
mbed_official 337:6ed01c00b962 22
mbed_official 337:6ed01c00b962 23 #define US_TICKER_TIMER_IRQn MRT_IRQn
mbed_official 337:6ed01c00b962 24 #define MRT_CLOCK_MHZ 30
mbed_official 337:6ed01c00b962 25
mbed_official 337:6ed01c00b962 26 void us_ticker_init(void)
mbed_official 337:6ed01c00b962 27 {
mbed_official 337:6ed01c00b962 28 if (us_ticker_inited)
mbed_official 337:6ed01c00b962 29 return;
mbed_official 337:6ed01c00b962 30
mbed_official 337:6ed01c00b962 31 us_ticker_inited = 1;
mbed_official 337:6ed01c00b962 32
mbed_official 337:6ed01c00b962 33 // Enable the MRT clock
mbed_official 337:6ed01c00b962 34 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);
mbed_official 337:6ed01c00b962 35
mbed_official 337:6ed01c00b962 36 // Clear peripheral reset the MRT
mbed_official 337:6ed01c00b962 37 LPC_SYSCON->PRESETCTRL |= (1 << 7);
mbed_official 337:6ed01c00b962 38
mbed_official 337:6ed01c00b962 39 // Force load interval value
mbed_official 337:6ed01c00b962 40 LPC_MRT->INTVAL0 = 0xFFFFFFFFUL;
mbed_official 337:6ed01c00b962 41 // Enable ch0 interrupt
mbed_official 337:6ed01c00b962 42 LPC_MRT->CTRL0 = 1;
mbed_official 337:6ed01c00b962 43
mbed_official 337:6ed01c00b962 44 // Force load interval value
mbed_official 337:6ed01c00b962 45 LPC_MRT->INTVAL1 = 0x80000000UL;
mbed_official 337:6ed01c00b962 46 // Disable ch1 interrupt
mbed_official 337:6ed01c00b962 47 LPC_MRT->CTRL1 = 0;
mbed_official 337:6ed01c00b962 48
mbed_official 337:6ed01c00b962 49 // Set MRT interrupt vector
mbed_official 337:6ed01c00b962 50 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
mbed_official 337:6ed01c00b962 51 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 337:6ed01c00b962 52 }
mbed_official 337:6ed01c00b962 53
mbed_official 337:6ed01c00b962 54 uint32_t us_ticker_read()
mbed_official 337:6ed01c00b962 55 {
mbed_official 337:6ed01c00b962 56 if (!us_ticker_inited)
mbed_official 337:6ed01c00b962 57 us_ticker_init();
mbed_official 337:6ed01c00b962 58
mbed_official 337:6ed01c00b962 59 // Generate ticker value
mbed_official 337:6ed01c00b962 60 // MRT source clock is SystemCoreClock (30MHz) and 31-bit down count timer
mbed_official 337:6ed01c00b962 61 // Calculate expected value using number of expired times
mbed_official 337:6ed01c00b962 62 return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_CLOCK_MHZ + (ticker_expired * (0x80000000UL/MRT_CLOCK_MHZ));
mbed_official 337:6ed01c00b962 63 }
mbed_official 337:6ed01c00b962 64
mbed_official 337:6ed01c00b962 65
mbed_official 337:6ed01c00b962 66 void us_ticker_set_interrupt(timestamp_t timestamp)
mbed_official 337:6ed01c00b962 67 {
mbed_official 337:6ed01c00b962 68 // Force load interval value
mbed_official 337:6ed01c00b962 69 LPC_MRT->INTVAL1 = (((timestamp - us_ticker_read()) * MRT_CLOCK_MHZ) | 0x80000000UL);
mbed_official 337:6ed01c00b962 70
mbed_official 337:6ed01c00b962 71 // Enable interrupt
mbed_official 337:6ed01c00b962 72 LPC_MRT->CTRL1 |= 1;
mbed_official 337:6ed01c00b962 73 }
mbed_official 337:6ed01c00b962 74
mbed_official 337:6ed01c00b962 75 void us_ticker_disable_interrupt()
mbed_official 337:6ed01c00b962 76 {
mbed_official 337:6ed01c00b962 77 LPC_MRT->CTRL1 &= ~1;
mbed_official 337:6ed01c00b962 78 }
mbed_official 337:6ed01c00b962 79
mbed_official 337:6ed01c00b962 80 void us_ticker_clear_interrupt()
mbed_official 337:6ed01c00b962 81 {
mbed_official 337:6ed01c00b962 82 if (LPC_MRT->STAT1 & 1)
mbed_official 337:6ed01c00b962 83 LPC_MRT->STAT1 = 1;
mbed_official 337:6ed01c00b962 84
mbed_official 337:6ed01c00b962 85 if (LPC_MRT->STAT0 & 1) {
mbed_official 337:6ed01c00b962 86 LPC_MRT->STAT0 = 1;
mbed_official 337:6ed01c00b962 87 ticker_expired++;
mbed_official 337:6ed01c00b962 88 }
mbed_official 337:6ed01c00b962 89 }