Romain Ardino / Mbed OS ProjetER4

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Dependencies:   Servo pourtibo driver_mbed_TH02

MFRC522.cpp@64:b57da430b53c, 2022-03-08 (annotated)

Committer:
paparoms
Date:
Tue Mar 08 11:01:51 2022 +0000
Revision:
64:b57da430b53c
dd

Who changed what in which revision?

UserRevisionLine numberNew contents of line
paparoms 64:b57da430b53c 1 /*
paparoms 64:b57da430b53c 2 * MFRC522.cpp - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
paparoms 64:b57da430b53c 3 * _Please_ see the comments in MFRC522.h - they give useful hints and background.
paparoms 64:b57da430b53c 4 * Released into the public domain.
paparoms 64:b57da430b53c 5 */
paparoms 64:b57da430b53c 6
paparoms 64:b57da430b53c 7 #include "MFRC522.h"
paparoms 64:b57da430b53c 8
paparoms 64:b57da430b53c 9 static const char* const _TypeNamePICC[] =
paparoms 64:b57da430b53c 10 {
paparoms 64:b57da430b53c 11 "Unknown type",
paparoms 64:b57da430b53c 12 "PICC compliant with ISO/IEC 14443-4",
paparoms 64:b57da430b53c 13 "PICC compliant with ISO/IEC 18092 (NFC)",
paparoms 64:b57da430b53c 14 "MIFARE Mini, 320 bytes",
paparoms 64:b57da430b53c 15 "MIFARE 1KB",
paparoms 64:b57da430b53c 16 "MIFARE 4KB",
paparoms 64:b57da430b53c 17 "MIFARE Ultralight or Ultralight C",
paparoms 64:b57da430b53c 18 "MIFARE Plus",
paparoms 64:b57da430b53c 19 "MIFARE TNP3XXX",
paparoms 64:b57da430b53c 20
paparoms 64:b57da430b53c 21 /* not complete UID */
paparoms 64:b57da430b53c 22 "SAK indicates UID is not complete"
paparoms 64:b57da430b53c 23 };
paparoms 64:b57da430b53c 24
paparoms 64:b57da430b53c 25 static const char* const _ErrorMessage[] =
paparoms 64:b57da430b53c 26 {
paparoms 64:b57da430b53c 27 "Unknown error",
paparoms 64:b57da430b53c 28 "Success",
paparoms 64:b57da430b53c 29 "Error in communication",
paparoms 64:b57da430b53c 30 "Collision detected",
paparoms 64:b57da430b53c 31 "Timeout in communication",
paparoms 64:b57da430b53c 32 "A buffer is not big enough",
paparoms 64:b57da430b53c 33 "Internal error in the code, should not happen",
paparoms 64:b57da430b53c 34 "Invalid argument",
paparoms 64:b57da430b53c 35 "The CRC_A does not match",
paparoms 64:b57da430b53c 36 "A MIFARE PICC responded with NAK"
paparoms 64:b57da430b53c 37 };
paparoms 64:b57da430b53c 38
paparoms 64:b57da430b53c 39 #define MFRC522_MaxPICCs (sizeof(_TypeNamePICC)/sizeof(_TypeNamePICC[0]))
paparoms 64:b57da430b53c 40 #define MFRC522_MaxError (sizeof(_ErrorMessage)/sizeof(_ErrorMessage[0]))
paparoms 64:b57da430b53c 41
paparoms 64:b57da430b53c 42 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 43 // Functions for setting up the driver
paparoms 64:b57da430b53c 44 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 45
paparoms 64:b57da430b53c 46 /**
paparoms 64:b57da430b53c 47 * Constructor.
paparoms 64:b57da430b53c 48 * Prepares the output pins.
paparoms 64:b57da430b53c 49 */
paparoms 64:b57da430b53c 50 MFRC522::MFRC522(PinName mosi,
paparoms 64:b57da430b53c 51 PinName miso,
paparoms 64:b57da430b53c 52 PinName sclk,
paparoms 64:b57da430b53c 53 PinName cs,
paparoms 64:b57da430b53c 54 PinName reset) : m_SPI(mosi, miso, sclk), m_CS(cs), m_RESET(reset)
paparoms 64:b57da430b53c 55 {
paparoms 64:b57da430b53c 56 /* Configure SPI bus */
paparoms 64:b57da430b53c 57 m_SPI.format(8, 0);
paparoms 64:b57da430b53c 58 m_SPI.frequency(8000000);
paparoms 64:b57da430b53c 59
paparoms 64:b57da430b53c 60 /* Release SPI-CS pin */
paparoms 64:b57da430b53c 61 m_CS = 1;
paparoms 64:b57da430b53c 62
paparoms 64:b57da430b53c 63 /* Release RESET pin */
paparoms 64:b57da430b53c 64 m_RESET = 1;
paparoms 64:b57da430b53c 65 } // End constructor
paparoms 64:b57da430b53c 66
paparoms 64:b57da430b53c 67
paparoms 64:b57da430b53c 68 /**
paparoms 64:b57da430b53c 69 * Destructor.
paparoms 64:b57da430b53c 70 */
paparoms 64:b57da430b53c 71 MFRC522::~MFRC522()
paparoms 64:b57da430b53c 72 {
paparoms 64:b57da430b53c 73
paparoms 64:b57da430b53c 74 }
paparoms 64:b57da430b53c 75
paparoms 64:b57da430b53c 76
paparoms 64:b57da430b53c 77 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 78 // Basic interface functions for communicating with the MFRC522
paparoms 64:b57da430b53c 79 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 80
paparoms 64:b57da430b53c 81 /**
paparoms 64:b57da430b53c 82 * Writes a byte to the specified register in the MFRC522 chip.
paparoms 64:b57da430b53c 83 * The interface is described in the datasheet section 8.1.2.
paparoms 64:b57da430b53c 84 */
paparoms 64:b57da430b53c 85 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t value)
paparoms 64:b57da430b53c 86 {
paparoms 64:b57da430b53c 87 m_CS = 0; /* Select SPI Chip MFRC522 */
paparoms 64:b57da430b53c 88
paparoms 64:b57da430b53c 89 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
paparoms 64:b57da430b53c 90 (void) m_SPI.write(reg & 0x7E);
paparoms 64:b57da430b53c 91 (void) m_SPI.write(value);
paparoms 64:b57da430b53c 92
paparoms 64:b57da430b53c 93 m_CS = 1; /* Release SPI Chip MFRC522 */
paparoms 64:b57da430b53c 94 } // End PCD_WriteRegister()
paparoms 64:b57da430b53c 95
paparoms 64:b57da430b53c 96 /**
paparoms 64:b57da430b53c 97 * Writes a number of bytes to the specified register in the MFRC522 chip.
paparoms 64:b57da430b53c 98 * The interface is described in the datasheet section 8.1.2.
paparoms 64:b57da430b53c 99 */
paparoms 64:b57da430b53c 100 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t count, uint8_t *values)
paparoms 64:b57da430b53c 101 {
paparoms 64:b57da430b53c 102 m_CS = 0; /* Select SPI Chip MFRC522 */
paparoms 64:b57da430b53c 103
paparoms 64:b57da430b53c 104 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
paparoms 64:b57da430b53c 105 (void) m_SPI.write(reg & 0x7E);
paparoms 64:b57da430b53c 106 for (uint8_t index = 0; index < count; index++)
paparoms 64:b57da430b53c 107 {
paparoms 64:b57da430b53c 108 (void) m_SPI.write(values[index]);
paparoms 64:b57da430b53c 109 }
paparoms 64:b57da430b53c 110
paparoms 64:b57da430b53c 111 m_CS = 1; /* Release SPI Chip MFRC522 */
paparoms 64:b57da430b53c 112 } // End PCD_WriteRegister()
paparoms 64:b57da430b53c 113
paparoms 64:b57da430b53c 114 /**
paparoms 64:b57da430b53c 115 * Reads a byte from the specified register in the MFRC522 chip.
paparoms 64:b57da430b53c 116 * The interface is described in the datasheet section 8.1.2.
paparoms 64:b57da430b53c 117 */
paparoms 64:b57da430b53c 118 uint8_t MFRC522::PCD_ReadRegister(uint8_t reg)
paparoms 64:b57da430b53c 119 {
paparoms 64:b57da430b53c 120 uint8_t value;
paparoms 64:b57da430b53c 121 m_CS = 0; /* Select SPI Chip MFRC522 */
paparoms 64:b57da430b53c 122
paparoms 64:b57da430b53c 123 // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
paparoms 64:b57da430b53c 124 (void) m_SPI.write(0x80 | reg);
paparoms 64:b57da430b53c 125
paparoms 64:b57da430b53c 126 // Read the value back. Send 0 to stop reading.
paparoms 64:b57da430b53c 127 value = m_SPI.write(0);
paparoms 64:b57da430b53c 128
paparoms 64:b57da430b53c 129 m_CS = 1; /* Release SPI Chip MFRC522 */
paparoms 64:b57da430b53c 130
paparoms 64:b57da430b53c 131 return value;
paparoms 64:b57da430b53c 132 } // End PCD_ReadRegister()
paparoms 64:b57da430b53c 133
paparoms 64:b57da430b53c 134 /**
paparoms 64:b57da430b53c 135 * Reads a number of bytes from the specified register in the MFRC522 chip.
paparoms 64:b57da430b53c 136 * The interface is described in the datasheet section 8.1.2.
paparoms 64:b57da430b53c 137 */
paparoms 64:b57da430b53c 138 void MFRC522::PCD_ReadRegister(uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign)
paparoms 64:b57da430b53c 139 {
paparoms 64:b57da430b53c 140 if (count == 0) { return; }
paparoms 64:b57da430b53c 141
paparoms 64:b57da430b53c 142 uint8_t address = 0x80 | reg; // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
paparoms 64:b57da430b53c 143 uint8_t index = 0; // Index in values array.
paparoms 64:b57da430b53c 144
paparoms 64:b57da430b53c 145 m_CS = 0; /* Select SPI Chip MFRC522 */
paparoms 64:b57da430b53c 146 count--; // One read is performed outside of the loop
paparoms 64:b57da430b53c 147 (void) m_SPI.write(address); // Tell MFRC522 which address we want to read
paparoms 64:b57da430b53c 148
paparoms 64:b57da430b53c 149 while (index < count)
paparoms 64:b57da430b53c 150 {
paparoms 64:b57da430b53c 151 if ((index == 0) && rxAlign) // Only update bit positions rxAlign..7 in values[0]
paparoms 64:b57da430b53c 152 {
paparoms 64:b57da430b53c 153 // Create bit mask for bit positions rxAlign..7
paparoms 64:b57da430b53c 154 uint8_t mask = 0;
paparoms 64:b57da430b53c 155 for (uint8_t i = rxAlign; i <= 7; i++)
paparoms 64:b57da430b53c 156 {
paparoms 64:b57da430b53c 157 mask |= (1 << i);
paparoms 64:b57da430b53c 158 }
paparoms 64:b57da430b53c 159
paparoms 64:b57da430b53c 160 // Read value and tell that we want to read the same address again.
paparoms 64:b57da430b53c 161 uint8_t value = m_SPI.write(address);
paparoms 64:b57da430b53c 162
paparoms 64:b57da430b53c 163 // Apply mask to both current value of values[0] and the new data in value.
paparoms 64:b57da430b53c 164 values[0] = (values[index] & ~mask) | (value & mask);
paparoms 64:b57da430b53c 165 }
paparoms 64:b57da430b53c 166 else
paparoms 64:b57da430b53c 167 {
paparoms 64:b57da430b53c 168 // Read value and tell that we want to read the same address again.
paparoms 64:b57da430b53c 169 values[index] = m_SPI.write(address);
paparoms 64:b57da430b53c 170 }
paparoms 64:b57da430b53c 171
paparoms 64:b57da430b53c 172 index++;
paparoms 64:b57da430b53c 173 }
paparoms 64:b57da430b53c 174
paparoms 64:b57da430b53c 175 values[index] = m_SPI.write(0); // Read the final byte. Send 0 to stop reading.
paparoms 64:b57da430b53c 176
paparoms 64:b57da430b53c 177 m_CS = 1; /* Release SPI Chip MFRC522 */
paparoms 64:b57da430b53c 178 } // End PCD_ReadRegister()
paparoms 64:b57da430b53c 179
paparoms 64:b57da430b53c 180 /**
paparoms 64:b57da430b53c 181 * Sets the bits given in mask in register reg.
paparoms 64:b57da430b53c 182 */
paparoms 64:b57da430b53c 183 void MFRC522::PCD_SetRegisterBits(uint8_t reg, uint8_t mask)
paparoms 64:b57da430b53c 184 {
paparoms 64:b57da430b53c 185 uint8_t tmp = PCD_ReadRegister(reg);
paparoms 64:b57da430b53c 186 PCD_WriteRegister(reg, tmp | mask); // set bit mask
paparoms 64:b57da430b53c 187 } // End PCD_SetRegisterBitMask()
paparoms 64:b57da430b53c 188
paparoms 64:b57da430b53c 189 /**
paparoms 64:b57da430b53c 190 * Clears the bits given in mask from register reg.
paparoms 64:b57da430b53c 191 */
paparoms 64:b57da430b53c 192 void MFRC522::PCD_ClrRegisterBits(uint8_t reg, uint8_t mask)
paparoms 64:b57da430b53c 193 {
paparoms 64:b57da430b53c 194 uint8_t tmp = PCD_ReadRegister(reg);
paparoms 64:b57da430b53c 195 PCD_WriteRegister(reg, tmp & (~mask)); // clear bit mask
paparoms 64:b57da430b53c 196 } // End PCD_ClearRegisterBitMask()
paparoms 64:b57da430b53c 197
paparoms 64:b57da430b53c 198
paparoms 64:b57da430b53c 199 /**
paparoms 64:b57da430b53c 200 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
paparoms 64:b57da430b53c 201 */
paparoms 64:b57da430b53c 202 uint8_t MFRC522::PCD_CalculateCRC(uint8_t *data, uint8_t length, uint8_t *result)
paparoms 64:b57da430b53c 203 {
paparoms 64:b57da430b53c 204 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
paparoms 64:b57da430b53c 205 PCD_WriteRegister(DivIrqReg, 0x04); // Clear the CRCIRq interrupt request bit
paparoms 64:b57da430b53c 206 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
paparoms 64:b57da430b53c 207 PCD_WriteRegister(FIFODataReg, length, data); // Write data to the FIFO
paparoms 64:b57da430b53c 208 PCD_WriteRegister(CommandReg, PCD_CalcCRC); // Start the calculation
paparoms 64:b57da430b53c 209
paparoms 64:b57da430b53c 210 // Wait for the CRC calculation to complete. Each iteration of the while-loop takes 17.73us.
paparoms 64:b57da430b53c 211 uint16_t i = 5000;
paparoms 64:b57da430b53c 212 uint8_t n;
paparoms 64:b57da430b53c 213 while (1)
paparoms 64:b57da430b53c 214 {
paparoms 64:b57da430b53c 215 n = PCD_ReadRegister(DivIrqReg); // DivIrqReg[7..0] bits are: Set2 reserved reserved MfinActIRq reserved CRCIRq reserved reserved
paparoms 64:b57da430b53c 216 if (n & 0x04)
paparoms 64:b57da430b53c 217 {
paparoms 64:b57da430b53c 218 // CRCIRq bit set - calculation done
paparoms 64:b57da430b53c 219 break;
paparoms 64:b57da430b53c 220 }
paparoms 64:b57da430b53c 221
paparoms 64:b57da430b53c 222 if (--i == 0)
paparoms 64:b57da430b53c 223 {
paparoms 64:b57da430b53c 224 // The emergency break. We will eventually terminate on this one after 89ms.
paparoms 64:b57da430b53c 225 // Communication with the MFRC522 might be down.
paparoms 64:b57da430b53c 226 return STATUS_TIMEOUT;
paparoms 64:b57da430b53c 227 }
paparoms 64:b57da430b53c 228 }
paparoms 64:b57da430b53c 229
paparoms 64:b57da430b53c 230 // Stop calculating CRC for new content in the FIFO.
paparoms 64:b57da430b53c 231 PCD_WriteRegister(CommandReg, PCD_Idle);
paparoms 64:b57da430b53c 232
paparoms 64:b57da430b53c 233 // Transfer the result from the registers to the result buffer
paparoms 64:b57da430b53c 234 result[0] = PCD_ReadRegister(CRCResultRegL);
paparoms 64:b57da430b53c 235 result[1] = PCD_ReadRegister(CRCResultRegH);
paparoms 64:b57da430b53c 236 return STATUS_OK;
paparoms 64:b57da430b53c 237 } // End PCD_CalculateCRC()
paparoms 64:b57da430b53c 238
paparoms 64:b57da430b53c 239
paparoms 64:b57da430b53c 240 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 241 // Functions for manipulating the MFRC522
paparoms 64:b57da430b53c 242 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 243
paparoms 64:b57da430b53c 244 /**
paparoms 64:b57da430b53c 245 * Initializes the MFRC522 chip.
paparoms 64:b57da430b53c 246 */
paparoms 64:b57da430b53c 247 void MFRC522::PCD_Init()
paparoms 64:b57da430b53c 248 {
paparoms 64:b57da430b53c 249 /* Reset MFRC522 */
paparoms 64:b57da430b53c 250 m_RESET = 0;
paparoms 64:b57da430b53c 251 wait_ms(10);
paparoms 64:b57da430b53c 252 m_RESET = 1;
paparoms 64:b57da430b53c 253
paparoms 64:b57da430b53c 254 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
paparoms 64:b57da430b53c 255 wait_ms(50);
paparoms 64:b57da430b53c 256
paparoms 64:b57da430b53c 257 // When communicating with a PICC we need a timeout if something goes wrong.
paparoms 64:b57da430b53c 258 // f_timer = 13.56 MHz / (2*TPreScaler+1) where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo].
paparoms 64:b57da430b53c 259 // TPrescaler_Hi are the four low bits in TModeReg. TPrescaler_Lo is TPrescalerReg.
paparoms 64:b57da430b53c 260 PCD_WriteRegister(TModeReg, 0x80); // TAuto=1; timer starts automatically at the end of the transmission in all communication modes at all speeds
paparoms 64:b57da430b53c 261 PCD_WriteRegister(TPrescalerReg, 0xA9); // TPreScaler = TModeReg[3..0]:TPrescalerReg, ie 0x0A9 = 169 => f_timer=40kHz, ie a timer period of 25us.
paparoms 64:b57da430b53c 262 PCD_WriteRegister(TReloadRegH, 0x03); // Reload timer with 0x3E8 = 1000, ie 25ms before timeout.
paparoms 64:b57da430b53c 263 PCD_WriteRegister(TReloadRegL, 0xE8);
paparoms 64:b57da430b53c 264
paparoms 64:b57da430b53c 265 PCD_WriteRegister(TxASKReg, 0x40); // Default 0x00. Force a 100 % ASK modulation independent of the ModGsPReg register setting
paparoms 64:b57da430b53c 266 PCD_WriteRegister(ModeReg, 0x3D); // Default 0x3F. Set the preset value for the CRC coprocessor for the CalcCRC command to 0x6363 (ISO 14443-3 part 6.2.4)
paparoms 64:b57da430b53c 267
paparoms 64:b57da430b53c 268 PCD_WriteRegister(RFCfgReg, (0x07<<4)); // Set Rx Gain to max
paparoms 64:b57da430b53c 269
paparoms 64:b57da430b53c 270 PCD_AntennaOn(); // Enable the antenna driver pins TX1 and TX2 (they were disabled by the reset)
paparoms 64:b57da430b53c 271 } // End PCD_Init()
paparoms 64:b57da430b53c 272
paparoms 64:b57da430b53c 273 /**
paparoms 64:b57da430b53c 274 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
paparoms 64:b57da430b53c 275 */
paparoms 64:b57da430b53c 276 void MFRC522::PCD_Reset()
paparoms 64:b57da430b53c 277 {
paparoms 64:b57da430b53c 278 PCD_WriteRegister(CommandReg, PCD_SoftReset); // Issue the SoftReset command.
paparoms 64:b57da430b53c 279 // The datasheet does not mention how long the SoftRest command takes to complete.
paparoms 64:b57da430b53c 280 // But the MFRC522 might have been in soft power-down mode (triggered by bit 4 of CommandReg)
paparoms 64:b57da430b53c 281 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
paparoms 64:b57da430b53c 282 wait_ms(50);
paparoms 64:b57da430b53c 283
paparoms 64:b57da430b53c 284 // Wait for the PowerDown bit in CommandReg to be cleared
paparoms 64:b57da430b53c 285 while (PCD_ReadRegister(CommandReg) & (1<<4))
paparoms 64:b57da430b53c 286 {
paparoms 64:b57da430b53c 287 // PCD still restarting - unlikely after waiting 50ms, but better safe than sorry.
paparoms 64:b57da430b53c 288 }
paparoms 64:b57da430b53c 289 } // End PCD_Reset()
paparoms 64:b57da430b53c 290
paparoms 64:b57da430b53c 291 /**
paparoms 64:b57da430b53c 292 * Turns the antenna on by enabling pins TX1 and TX2.
paparoms 64:b57da430b53c 293 * After a reset these pins disabled.
paparoms 64:b57da430b53c 294 */
paparoms 64:b57da430b53c 295 void MFRC522::PCD_AntennaOn()
paparoms 64:b57da430b53c 296 {
paparoms 64:b57da430b53c 297 uint8_t value = PCD_ReadRegister(TxControlReg);
paparoms 64:b57da430b53c 298 if ((value & 0x03) != 0x03)
paparoms 64:b57da430b53c 299 {
paparoms 64:b57da430b53c 300 PCD_WriteRegister(TxControlReg, value | 0x03);
paparoms 64:b57da430b53c 301 }
paparoms 64:b57da430b53c 302 } // End PCD_AntennaOn()
paparoms 64:b57da430b53c 303
paparoms 64:b57da430b53c 304 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 305 // Functions for communicating with PICCs
paparoms 64:b57da430b53c 306 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 307
paparoms 64:b57da430b53c 308 /**
paparoms 64:b57da430b53c 309 * Executes the Transceive command.
paparoms 64:b57da430b53c 310 * CRC validation can only be done if backData and backLen are specified.
paparoms 64:b57da430b53c 311 */
paparoms 64:b57da430b53c 312 uint8_t MFRC522::PCD_TransceiveData(uint8_t *sendData,
paparoms 64:b57da430b53c 313 uint8_t sendLen,
paparoms 64:b57da430b53c 314 uint8_t *backData,
paparoms 64:b57da430b53c 315 uint8_t *backLen,
paparoms 64:b57da430b53c 316 uint8_t *validBits,
paparoms 64:b57da430b53c 317 uint8_t rxAlign,
paparoms 64:b57da430b53c 318 bool checkCRC)
paparoms 64:b57da430b53c 319 {
paparoms 64:b57da430b53c 320 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
paparoms 64:b57da430b53c 321 return PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, sendData, sendLen, backData, backLen, validBits, rxAlign, checkCRC);
paparoms 64:b57da430b53c 322 } // End PCD_TransceiveData()
paparoms 64:b57da430b53c 323
paparoms 64:b57da430b53c 324 /**
paparoms 64:b57da430b53c 325 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
paparoms 64:b57da430b53c 326 * CRC validation can only be done if backData and backLen are specified.
paparoms 64:b57da430b53c 327 */
paparoms 64:b57da430b53c 328 uint8_t MFRC522::PCD_CommunicateWithPICC(uint8_t command,
paparoms 64:b57da430b53c 329 uint8_t waitIRq,
paparoms 64:b57da430b53c 330 uint8_t *sendData,
paparoms 64:b57da430b53c 331 uint8_t sendLen,
paparoms 64:b57da430b53c 332 uint8_t *backData,
paparoms 64:b57da430b53c 333 uint8_t *backLen,
paparoms 64:b57da430b53c 334 uint8_t *validBits,
paparoms 64:b57da430b53c 335 uint8_t rxAlign,
paparoms 64:b57da430b53c 336 bool checkCRC)
paparoms 64:b57da430b53c 337 {
paparoms 64:b57da430b53c 338 uint8_t n, _validBits = 0;
paparoms 64:b57da430b53c 339 uint32_t i;
paparoms 64:b57da430b53c 340
paparoms 64:b57da430b53c 341 // Prepare values for BitFramingReg
paparoms 64:b57da430b53c 342 uint8_t txLastBits = validBits ? *validBits : 0;
paparoms 64:b57da430b53c 343 uint8_t bitFraming = (rxAlign << 4) + txLastBits; // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
paparoms 64:b57da430b53c 344
paparoms 64:b57da430b53c 345 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
paparoms 64:b57da430b53c 346 PCD_WriteRegister(ComIrqReg, 0x7F); // Clear all seven interrupt request bits
paparoms 64:b57da430b53c 347 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
paparoms 64:b57da430b53c 348 PCD_WriteRegister(FIFODataReg, sendLen, sendData); // Write sendData to the FIFO
paparoms 64:b57da430b53c 349 PCD_WriteRegister(BitFramingReg, bitFraming); // Bit adjustments
paparoms 64:b57da430b53c 350 PCD_WriteRegister(CommandReg, command); // Execute the command
paparoms 64:b57da430b53c 351 if (command == PCD_Transceive)
paparoms 64:b57da430b53c 352 {
paparoms 64:b57da430b53c 353 PCD_SetRegisterBits(BitFramingReg, 0x80); // StartSend=1, transmission of data starts
paparoms 64:b57da430b53c 354 }
paparoms 64:b57da430b53c 355
paparoms 64:b57da430b53c 356 // Wait for the command to complete.
paparoms 64:b57da430b53c 357 // In PCD_Init() we set the TAuto flag in TModeReg. This means the timer automatically starts when the PCD stops transmitting.
paparoms 64:b57da430b53c 358 // Each iteration of the do-while-loop takes 17.86us.
paparoms 64:b57da430b53c 359 i = 2000;
paparoms 64:b57da430b53c 360 while (1)
paparoms 64:b57da430b53c 361 {
paparoms 64:b57da430b53c 362 n = PCD_ReadRegister(ComIrqReg); // ComIrqReg[7..0] bits are: Set1 TxIRq RxIRq IdleIRq HiAlertIRq LoAlertIRq ErrIRq TimerIRq
paparoms 64:b57da430b53c 363 if (n & waitIRq)
paparoms 64:b57da430b53c 364 { // One of the interrupts that signal success has been set.
paparoms 64:b57da430b53c 365 break;
paparoms 64:b57da430b53c 366 }
paparoms 64:b57da430b53c 367
paparoms 64:b57da430b53c 368 if (n & 0x01)
paparoms 64:b57da430b53c 369 { // Timer interrupt - nothing received in 25ms
paparoms 64:b57da430b53c 370 return STATUS_TIMEOUT;
paparoms 64:b57da430b53c 371 }
paparoms 64:b57da430b53c 372
paparoms 64:b57da430b53c 373 if (--i == 0)
paparoms 64:b57da430b53c 374 { // The emergency break. If all other condions fail we will eventually terminate on this one after 35.7ms. Communication with the MFRC522 might be down.
paparoms 64:b57da430b53c 375 return STATUS_TIMEOUT;
paparoms 64:b57da430b53c 376 }
paparoms 64:b57da430b53c 377 }
paparoms 64:b57da430b53c 378
paparoms 64:b57da430b53c 379 // Stop now if any errors except collisions were detected.
paparoms 64:b57da430b53c 380 uint8_t errorRegValue = PCD_ReadRegister(ErrorReg); // ErrorReg[7..0] bits are: WrErr TempErr reserved BufferOvfl CollErr CRCErr ParityErr ProtocolErr
paparoms 64:b57da430b53c 381 if (errorRegValue & 0x13)
paparoms 64:b57da430b53c 382 { // BufferOvfl ParityErr ProtocolErr
paparoms 64:b57da430b53c 383 return STATUS_ERROR;
paparoms 64:b57da430b53c 384 }
paparoms 64:b57da430b53c 385
paparoms 64:b57da430b53c 386 // If the caller wants data back, get it from the MFRC522.
paparoms 64:b57da430b53c 387 if (backData && backLen)
paparoms 64:b57da430b53c 388 {
paparoms 64:b57da430b53c 389 n = PCD_ReadRegister(FIFOLevelReg); // Number of bytes in the FIFO
paparoms 64:b57da430b53c 390 if (n > *backLen)
paparoms 64:b57da430b53c 391 {
paparoms 64:b57da430b53c 392 return STATUS_NO_ROOM;
paparoms 64:b57da430b53c 393 }
paparoms 64:b57da430b53c 394
paparoms 64:b57da430b53c 395 *backLen = n; // Number of bytes returned
paparoms 64:b57da430b53c 396 PCD_ReadRegister(FIFODataReg, n, backData, rxAlign); // Get received data from FIFO
paparoms 64:b57da430b53c 397 _validBits = PCD_ReadRegister(ControlReg) & 0x07; // RxLastBits[2:0] indicates the number of valid bits in the last received byte. If this value is 000b, the whole byte is valid.
paparoms 64:b57da430b53c 398 if (validBits)
paparoms 64:b57da430b53c 399 {
paparoms 64:b57da430b53c 400 *validBits = _validBits;
paparoms 64:b57da430b53c 401 }
paparoms 64:b57da430b53c 402 }
paparoms 64:b57da430b53c 403
paparoms 64:b57da430b53c 404 // Tell about collisions
paparoms 64:b57da430b53c 405 if (errorRegValue & 0x08)
paparoms 64:b57da430b53c 406 { // CollErr
paparoms 64:b57da430b53c 407 return STATUS_COLLISION;
paparoms 64:b57da430b53c 408 }
paparoms 64:b57da430b53c 409
paparoms 64:b57da430b53c 410 // Perform CRC_A validation if requested.
paparoms 64:b57da430b53c 411 if (backData && backLen && checkCRC)
paparoms 64:b57da430b53c 412 {
paparoms 64:b57da430b53c 413 // In this case a MIFARE Classic NAK is not OK.
paparoms 64:b57da430b53c 414 if ((*backLen == 1) && (_validBits == 4))
paparoms 64:b57da430b53c 415 {
paparoms 64:b57da430b53c 416 return STATUS_MIFARE_NACK;
paparoms 64:b57da430b53c 417 }
paparoms 64:b57da430b53c 418
paparoms 64:b57da430b53c 419 // We need at least the CRC_A value and all 8 bits of the last byte must be received.
paparoms 64:b57da430b53c 420 if ((*backLen < 2) || (_validBits != 0))
paparoms 64:b57da430b53c 421 {
paparoms 64:b57da430b53c 422 return STATUS_CRC_WRONG;
paparoms 64:b57da430b53c 423 }
paparoms 64:b57da430b53c 424
paparoms 64:b57da430b53c 425 // Verify CRC_A - do our own calculation and store the control in controlBuffer.
paparoms 64:b57da430b53c 426 uint8_t controlBuffer[2];
paparoms 64:b57da430b53c 427 n = PCD_CalculateCRC(&backData[0], *backLen - 2, &controlBuffer[0]);
paparoms 64:b57da430b53c 428 if (n != STATUS_OK)
paparoms 64:b57da430b53c 429 {
paparoms 64:b57da430b53c 430 return n;
paparoms 64:b57da430b53c 431 }
paparoms 64:b57da430b53c 432
paparoms 64:b57da430b53c 433 if ((backData[*backLen - 2] != controlBuffer[0]) || (backData[*backLen - 1] != controlBuffer[1]))
paparoms 64:b57da430b53c 434 {
paparoms 64:b57da430b53c 435 return STATUS_CRC_WRONG;
paparoms 64:b57da430b53c 436 }
paparoms 64:b57da430b53c 437 }
paparoms 64:b57da430b53c 438
paparoms 64:b57da430b53c 439 return STATUS_OK;
paparoms 64:b57da430b53c 440 } // End PCD_CommunicateWithPICC()
paparoms 64:b57da430b53c 441
paparoms 64:b57da430b53c 442 /*
paparoms 64:b57da430b53c 443 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
paparoms 64:b57da430b53c 444 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
paparoms 64:b57da430b53c 445 */
paparoms 64:b57da430b53c 446 uint8_t MFRC522::PICC_RequestA(uint8_t *bufferATQA, uint8_t *bufferSize)
paparoms 64:b57da430b53c 447 {
paparoms 64:b57da430b53c 448 return PICC_REQA_or_WUPA(PICC_CMD_REQA, bufferATQA, bufferSize);
paparoms 64:b57da430b53c 449 } // End PICC_RequestA()
paparoms 64:b57da430b53c 450
paparoms 64:b57da430b53c 451 /**
paparoms 64:b57da430b53c 452 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
paparoms 64:b57da430b53c 453 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
paparoms 64:b57da430b53c 454 */
paparoms 64:b57da430b53c 455 uint8_t MFRC522::PICC_WakeupA(uint8_t *bufferATQA, uint8_t *bufferSize)
paparoms 64:b57da430b53c 456 {
paparoms 64:b57da430b53c 457 return PICC_REQA_or_WUPA(PICC_CMD_WUPA, bufferATQA, bufferSize);
paparoms 64:b57da430b53c 458 } // End PICC_WakeupA()
paparoms 64:b57da430b53c 459
paparoms 64:b57da430b53c 460 /*
paparoms 64:b57da430b53c 461 * Transmits REQA or WUPA commands.
paparoms 64:b57da430b53c 462 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
paparoms 64:b57da430b53c 463 */
paparoms 64:b57da430b53c 464 uint8_t MFRC522::PICC_REQA_or_WUPA(uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize)
paparoms 64:b57da430b53c 465 {
paparoms 64:b57da430b53c 466 uint8_t validBits;
paparoms 64:b57da430b53c 467 uint8_t status;
paparoms 64:b57da430b53c 468
paparoms 64:b57da430b53c 469 if (bufferATQA == NULL || *bufferSize < 2)
paparoms 64:b57da430b53c 470 { // The ATQA response is 2 bytes long.
paparoms 64:b57da430b53c 471 return STATUS_NO_ROOM;
paparoms 64:b57da430b53c 472 }
paparoms 64:b57da430b53c 473
paparoms 64:b57da430b53c 474 // ValuesAfterColl=1 => Bits received after collision are cleared.
paparoms 64:b57da430b53c 475 PCD_ClrRegisterBits(CollReg, 0x80);
paparoms 64:b57da430b53c 476
paparoms 64:b57da430b53c 477 // For REQA and WUPA we need the short frame format
paparoms 64:b57da430b53c 478 // - transmit only 7 bits of the last (and only) byte. TxLastBits = BitFramingReg[2..0]
paparoms 64:b57da430b53c 479 validBits = 7;
paparoms 64:b57da430b53c 480
paparoms 64:b57da430b53c 481 status = PCD_TransceiveData(&command, 1, bufferATQA, bufferSize, &validBits);
paparoms 64:b57da430b53c 482 if (status != STATUS_OK)
paparoms 64:b57da430b53c 483 {
paparoms 64:b57da430b53c 484 return status;
paparoms 64:b57da430b53c 485 }
paparoms 64:b57da430b53c 486
paparoms 64:b57da430b53c 487 if ((*bufferSize != 2) || (validBits != 0))
paparoms 64:b57da430b53c 488 { // ATQA must be exactly 16 bits.
paparoms 64:b57da430b53c 489 return STATUS_ERROR;
paparoms 64:b57da430b53c 490 }
paparoms 64:b57da430b53c 491
paparoms 64:b57da430b53c 492 return STATUS_OK;
paparoms 64:b57da430b53c 493 } // End PICC_REQA_or_WUPA()
paparoms 64:b57da430b53c 494
paparoms 64:b57da430b53c 495 /*
paparoms 64:b57da430b53c 496 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
paparoms 64:b57da430b53c 497 */
paparoms 64:b57da430b53c 498 uint8_t MFRC522::PICC_Select(Uid *uid, uint8_t validBits)
paparoms 64:b57da430b53c 499 {
paparoms 64:b57da430b53c 500 bool uidComplete;
paparoms 64:b57da430b53c 501 bool selectDone;
paparoms 64:b57da430b53c 502 bool useCascadeTag;
paparoms 64:b57da430b53c 503 uint8_t cascadeLevel = 1;
paparoms 64:b57da430b53c 504 uint8_t result;
paparoms 64:b57da430b53c 505 uint8_t count;
paparoms 64:b57da430b53c 506 uint8_t index;
paparoms 64:b57da430b53c 507 uint8_t uidIndex; // The first index in uid->uidByte[] that is used in the current Cascade Level.
paparoms 64:b57da430b53c 508 uint8_t currentLevelKnownBits; // The number of known UID bits in the current Cascade Level.
paparoms 64:b57da430b53c 509 uint8_t buffer[9]; // The SELECT/ANTICOLLISION commands uses a 7 byte standard frame + 2 bytes CRC_A
paparoms 64:b57da430b53c 510 uint8_t bufferUsed; // The number of bytes used in the buffer, ie the number of bytes to transfer to the FIFO.
paparoms 64:b57da430b53c 511 uint8_t rxAlign; // Used in BitFramingReg. Defines the bit position for the first bit received.
paparoms 64:b57da430b53c 512 uint8_t txLastBits; // Used in BitFramingReg. The number of valid bits in the last transmitted byte.
paparoms 64:b57da430b53c 513 uint8_t *responseBuffer;
paparoms 64:b57da430b53c 514 uint8_t responseLength;
paparoms 64:b57da430b53c 515
paparoms 64:b57da430b53c 516 // Description of buffer structure:
paparoms 64:b57da430b53c 517 // Byte 0: SEL Indicates the Cascade Level: PICC_CMD_SEL_CL1, PICC_CMD_SEL_CL2 or PICC_CMD_SEL_CL3
paparoms 64:b57da430b53c 518 // Byte 1: NVB Number of Valid Bits (in complete command, not just the UID): High nibble: complete bytes, Low nibble: Extra bits.
paparoms 64:b57da430b53c 519 // Byte 2: UID-data or CT See explanation below. CT means Cascade Tag.
paparoms 64:b57da430b53c 520 // Byte 3: UID-data
paparoms 64:b57da430b53c 521 // Byte 4: UID-data
paparoms 64:b57da430b53c 522 // Byte 5: UID-data
paparoms 64:b57da430b53c 523 // Byte 6: BCC Block Check Character - XOR of bytes 2-5
paparoms 64:b57da430b53c 524 // Byte 7: CRC_A
paparoms 64:b57da430b53c 525 // Byte 8: CRC_A
paparoms 64:b57da430b53c 526 // The BCC and CRC_A is only transmitted if we know all the UID bits of the current Cascade Level.
paparoms 64:b57da430b53c 527 //
paparoms 64:b57da430b53c 528 // Description of bytes 2-5: (Section 6.5.4 of the ISO/IEC 14443-3 draft: UID contents and cascade levels)
paparoms 64:b57da430b53c 529 // UID size Cascade level Byte2 Byte3 Byte4 Byte5
paparoms 64:b57da430b53c 530 // ======== ============= ===== ===== ===== =====
paparoms 64:b57da430b53c 531 // 4 bytes 1 uid0 uid1 uid2 uid3
paparoms 64:b57da430b53c 532 // 7 bytes 1 CT uid0 uid1 uid2
paparoms 64:b57da430b53c 533 // 2 uid3 uid4 uid5 uid6
paparoms 64:b57da430b53c 534 // 10 bytes 1 CT uid0 uid1 uid2
paparoms 64:b57da430b53c 535 // 2 CT uid3 uid4 uid5
paparoms 64:b57da430b53c 536 // 3 uid6 uid7 uid8 uid9
paparoms 64:b57da430b53c 537
paparoms 64:b57da430b53c 538 // Sanity checks
paparoms 64:b57da430b53c 539 if (validBits > 80)
paparoms 64:b57da430b53c 540 {
paparoms 64:b57da430b53c 541 return STATUS_INVALID;
paparoms 64:b57da430b53c 542 }
paparoms 64:b57da430b53c 543
paparoms 64:b57da430b53c 544 // Prepare MFRC522
paparoms 64:b57da430b53c 545 // ValuesAfterColl=1 => Bits received after collision are cleared.
paparoms 64:b57da430b53c 546 PCD_ClrRegisterBits(CollReg, 0x80);
paparoms 64:b57da430b53c 547
paparoms 64:b57da430b53c 548 // Repeat Cascade Level loop until we have a complete UID.
paparoms 64:b57da430b53c 549 uidComplete = false;
paparoms 64:b57da430b53c 550 while ( ! uidComplete)
paparoms 64:b57da430b53c 551 {
paparoms 64:b57da430b53c 552 // Set the Cascade Level in the SEL byte, find out if we need to use the Cascade Tag in byte 2.
paparoms 64:b57da430b53c 553 switch (cascadeLevel)
paparoms 64:b57da430b53c 554 {
paparoms 64:b57da430b53c 555 case 1:
paparoms 64:b57da430b53c 556 buffer[0] = PICC_CMD_SEL_CL1;
paparoms 64:b57da430b53c 557 uidIndex = 0;
paparoms 64:b57da430b53c 558 useCascadeTag = validBits && (uid->size > 4); // When we know that the UID has more than 4 bytes
paparoms 64:b57da430b53c 559 break;
paparoms 64:b57da430b53c 560
paparoms 64:b57da430b53c 561 case 2:
paparoms 64:b57da430b53c 562 buffer[0] = PICC_CMD_SEL_CL2;
paparoms 64:b57da430b53c 563 uidIndex = 3;
paparoms 64:b57da430b53c 564 useCascadeTag = validBits && (uid->size > 7); // When we know that the UID has more than 7 bytes
paparoms 64:b57da430b53c 565 break;
paparoms 64:b57da430b53c 566
paparoms 64:b57da430b53c 567 case 3:
paparoms 64:b57da430b53c 568 buffer[0] = PICC_CMD_SEL_CL3;
paparoms 64:b57da430b53c 569 uidIndex = 6;
paparoms 64:b57da430b53c 570 useCascadeTag = false; // Never used in CL3.
paparoms 64:b57da430b53c 571 break;
paparoms 64:b57da430b53c 572
paparoms 64:b57da430b53c 573 default:
paparoms 64:b57da430b53c 574 return STATUS_INTERNAL_ERROR;
paparoms 64:b57da430b53c 575 //break;
paparoms 64:b57da430b53c 576 }
paparoms 64:b57da430b53c 577
paparoms 64:b57da430b53c 578 // How many UID bits are known in this Cascade Level?
paparoms 64:b57da430b53c 579 if(validBits > (8 * uidIndex))
paparoms 64:b57da430b53c 580 {
paparoms 64:b57da430b53c 581 currentLevelKnownBits = validBits - (8 * uidIndex);
paparoms 64:b57da430b53c 582 }
paparoms 64:b57da430b53c 583 else
paparoms 64:b57da430b53c 584 {
paparoms 64:b57da430b53c 585 currentLevelKnownBits = 0;
paparoms 64:b57da430b53c 586 }
paparoms 64:b57da430b53c 587
paparoms 64:b57da430b53c 588 // Copy the known bits from uid->uidByte[] to buffer[]
paparoms 64:b57da430b53c 589 index = 2; // destination index in buffer[]
paparoms 64:b57da430b53c 590 if (useCascadeTag)
paparoms 64:b57da430b53c 591 {
paparoms 64:b57da430b53c 592 buffer[index++] = PICC_CMD_CT;
paparoms 64:b57da430b53c 593 }
paparoms 64:b57da430b53c 594
paparoms 64:b57da430b53c 595 uint8_t bytesToCopy = currentLevelKnownBits / 8 + (currentLevelKnownBits % 8 ? 1 : 0); // The number of bytes needed to represent the known bits for this level.
paparoms 64:b57da430b53c 596 if (bytesToCopy)
paparoms 64:b57da430b53c 597 {
paparoms 64:b57da430b53c 598 // Max 4 bytes in each Cascade Level. Only 3 left if we use the Cascade Tag
paparoms 64:b57da430b53c 599 uint8_t maxBytes = useCascadeTag ? 3 : 4;
paparoms 64:b57da430b53c 600 if (bytesToCopy > maxBytes)
paparoms 64:b57da430b53c 601 {
paparoms 64:b57da430b53c 602 bytesToCopy = maxBytes;
paparoms 64:b57da430b53c 603 }
paparoms 64:b57da430b53c 604
paparoms 64:b57da430b53c 605 for (count = 0; count < bytesToCopy; count++)
paparoms 64:b57da430b53c 606 {
paparoms 64:b57da430b53c 607 buffer[index++] = uid->uidByte[uidIndex + count];
paparoms 64:b57da430b53c 608 }
paparoms 64:b57da430b53c 609 }
paparoms 64:b57da430b53c 610
paparoms 64:b57da430b53c 611 // Now that the data has been copied we need to include the 8 bits in CT in currentLevelKnownBits
paparoms 64:b57da430b53c 612 if (useCascadeTag)
paparoms 64:b57da430b53c 613 {
paparoms 64:b57da430b53c 614 currentLevelKnownBits += 8;
paparoms 64:b57da430b53c 615 }
paparoms 64:b57da430b53c 616
paparoms 64:b57da430b53c 617 // Repeat anti collision loop until we can transmit all UID bits + BCC and receive a SAK - max 32 iterations.
paparoms 64:b57da430b53c 618 selectDone = false;
paparoms 64:b57da430b53c 619 while ( ! selectDone)
paparoms 64:b57da430b53c 620 {
paparoms 64:b57da430b53c 621 // Find out how many bits and bytes to send and receive.
paparoms 64:b57da430b53c 622 if (currentLevelKnownBits >= 32)
paparoms 64:b57da430b53c 623 { // All UID bits in this Cascade Level are known. This is a SELECT.
paparoms 64:b57da430b53c 624 //Serial.print("SELECT: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
paparoms 64:b57da430b53c 625 buffer[1] = 0x70; // NVB - Number of Valid Bits: Seven whole bytes
paparoms 64:b57da430b53c 626
paparoms 64:b57da430b53c 627 // Calulate BCC - Block Check Character
paparoms 64:b57da430b53c 628 buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5];
paparoms 64:b57da430b53c 629
paparoms 64:b57da430b53c 630 // Calculate CRC_A
paparoms 64:b57da430b53c 631 result = PCD_CalculateCRC(buffer, 7, &buffer[7]);
paparoms 64:b57da430b53c 632 if (result != STATUS_OK)
paparoms 64:b57da430b53c 633 {
paparoms 64:b57da430b53c 634 return result;
paparoms 64:b57da430b53c 635 }
paparoms 64:b57da430b53c 636
paparoms 64:b57da430b53c 637 txLastBits = 0; // 0 => All 8 bits are valid.
paparoms 64:b57da430b53c 638 bufferUsed = 9;
paparoms 64:b57da430b53c 639
paparoms 64:b57da430b53c 640 // Store response in the last 3 bytes of buffer (BCC and CRC_A - not needed after tx)
paparoms 64:b57da430b53c 641 responseBuffer = &buffer[6];
paparoms 64:b57da430b53c 642 responseLength = 3;
paparoms 64:b57da430b53c 643 }
paparoms 64:b57da430b53c 644 else
paparoms 64:b57da430b53c 645 { // This is an ANTICOLLISION.
paparoms 64:b57da430b53c 646 //Serial.print("ANTICOLLISION: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
paparoms 64:b57da430b53c 647 txLastBits = currentLevelKnownBits % 8;
paparoms 64:b57da430b53c 648 count = currentLevelKnownBits / 8; // Number of whole bytes in the UID part.
paparoms 64:b57da430b53c 649 index = 2 + count; // Number of whole bytes: SEL + NVB + UIDs
paparoms 64:b57da430b53c 650 buffer[1] = (index << 4) + txLastBits; // NVB - Number of Valid Bits
paparoms 64:b57da430b53c 651 bufferUsed = index + (txLastBits ? 1 : 0);
paparoms 64:b57da430b53c 652
paparoms 64:b57da430b53c 653 // Store response in the unused part of buffer
paparoms 64:b57da430b53c 654 responseBuffer = &buffer[index];
paparoms 64:b57da430b53c 655 responseLength = sizeof(buffer) - index;
paparoms 64:b57da430b53c 656 }
paparoms 64:b57da430b53c 657
paparoms 64:b57da430b53c 658 // Set bit adjustments
paparoms 64:b57da430b53c 659 rxAlign = txLastBits; // Having a seperate variable is overkill. But it makes the next line easier to read.
paparoms 64:b57da430b53c 660 PCD_WriteRegister(BitFramingReg, (rxAlign << 4) + txLastBits); // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
paparoms 64:b57da430b53c 661
paparoms 64:b57da430b53c 662 // Transmit the buffer and receive the response.
paparoms 64:b57da430b53c 663 result = PCD_TransceiveData(buffer, bufferUsed, responseBuffer, &responseLength, &txLastBits, rxAlign);
paparoms 64:b57da430b53c 664 if (result == STATUS_COLLISION)
paparoms 64:b57da430b53c 665 { // More than one PICC in the field => collision.
paparoms 64:b57da430b53c 666 result = PCD_ReadRegister(CollReg); // CollReg[7..0] bits are: ValuesAfterColl reserved CollPosNotValid CollPos[4:0]
paparoms 64:b57da430b53c 667 if (result & 0x20)
paparoms 64:b57da430b53c 668 { // CollPosNotValid
paparoms 64:b57da430b53c 669 return STATUS_COLLISION; // Without a valid collision position we cannot continue
paparoms 64:b57da430b53c 670 }
paparoms 64:b57da430b53c 671
paparoms 64:b57da430b53c 672 uint8_t collisionPos = result & 0x1F; // Values 0-31, 0 means bit 32.
paparoms 64:b57da430b53c 673 if (collisionPos == 0)
paparoms 64:b57da430b53c 674 {
paparoms 64:b57da430b53c 675 collisionPos = 32;
paparoms 64:b57da430b53c 676 }
paparoms 64:b57da430b53c 677
paparoms 64:b57da430b53c 678 if (collisionPos <= currentLevelKnownBits)
paparoms 64:b57da430b53c 679 { // No progress - should not happen
paparoms 64:b57da430b53c 680 return STATUS_INTERNAL_ERROR;
paparoms 64:b57da430b53c 681 }
paparoms 64:b57da430b53c 682
paparoms 64:b57da430b53c 683 // Choose the PICC with the bit set.
paparoms 64:b57da430b53c 684 currentLevelKnownBits = collisionPos;
paparoms 64:b57da430b53c 685 count = (currentLevelKnownBits - 1) % 8; // The bit to modify
paparoms 64:b57da430b53c 686 index = 1 + (currentLevelKnownBits / 8) + (count ? 1 : 0); // First byte is index 0.
paparoms 64:b57da430b53c 687 buffer[index] |= (1 << count);
paparoms 64:b57da430b53c 688 }
paparoms 64:b57da430b53c 689 else if (result != STATUS_OK)
paparoms 64:b57da430b53c 690 {
paparoms 64:b57da430b53c 691 return result;
paparoms 64:b57da430b53c 692 }
paparoms 64:b57da430b53c 693 else
paparoms 64:b57da430b53c 694 { // STATUS_OK
paparoms 64:b57da430b53c 695 if (currentLevelKnownBits >= 32)
paparoms 64:b57da430b53c 696 { // This was a SELECT.
paparoms 64:b57da430b53c 697 selectDone = true; // No more anticollision
paparoms 64:b57da430b53c 698 // We continue below outside the while.
paparoms 64:b57da430b53c 699 }
paparoms 64:b57da430b53c 700 else
paparoms 64:b57da430b53c 701 { // This was an ANTICOLLISION.
paparoms 64:b57da430b53c 702 // We now have all 32 bits of the UID in this Cascade Level
paparoms 64:b57da430b53c 703 currentLevelKnownBits = 32;
paparoms 64:b57da430b53c 704 // Run loop again to do the SELECT.
paparoms 64:b57da430b53c 705 }
paparoms 64:b57da430b53c 706 }
paparoms 64:b57da430b53c 707 } // End of while ( ! selectDone)
paparoms 64:b57da430b53c 708
paparoms 64:b57da430b53c 709 // We do not check the CBB - it was constructed by us above.
paparoms 64:b57da430b53c 710
paparoms 64:b57da430b53c 711 // Copy the found UID bytes from buffer[] to uid->uidByte[]
paparoms 64:b57da430b53c 712 index = (buffer[2] == PICC_CMD_CT) ? 3 : 2; // source index in buffer[]
paparoms 64:b57da430b53c 713 bytesToCopy = (buffer[2] == PICC_CMD_CT) ? 3 : 4;
paparoms 64:b57da430b53c 714 for (count = 0; count < bytesToCopy; count++)
paparoms 64:b57da430b53c 715 {
paparoms 64:b57da430b53c 716 uid->uidByte[uidIndex + count] = buffer[index++];
paparoms 64:b57da430b53c 717 }
paparoms 64:b57da430b53c 718
paparoms 64:b57da430b53c 719 // Check response SAK (Select Acknowledge)
paparoms 64:b57da430b53c 720 if (responseLength != 3 || txLastBits != 0)
paparoms 64:b57da430b53c 721 { // SAK must be exactly 24 bits (1 byte + CRC_A).
paparoms 64:b57da430b53c 722 return STATUS_ERROR;
paparoms 64:b57da430b53c 723 }
paparoms 64:b57da430b53c 724
paparoms 64:b57da430b53c 725 // Verify CRC_A - do our own calculation and store the control in buffer[2..3] - those bytes are not needed anymore.
paparoms 64:b57da430b53c 726 result = PCD_CalculateCRC(responseBuffer, 1, &buffer[2]);
paparoms 64:b57da430b53c 727 if (result != STATUS_OK)
paparoms 64:b57da430b53c 728 {
paparoms 64:b57da430b53c 729 return result;
paparoms 64:b57da430b53c 730 }
paparoms 64:b57da430b53c 731
paparoms 64:b57da430b53c 732 if ((buffer[2] != responseBuffer[1]) || (buffer[3] != responseBuffer[2]))
paparoms 64:b57da430b53c 733 {
paparoms 64:b57da430b53c 734 return STATUS_CRC_WRONG;
paparoms 64:b57da430b53c 735 }
paparoms 64:b57da430b53c 736
paparoms 64:b57da430b53c 737 if (responseBuffer[0] & 0x04)
paparoms 64:b57da430b53c 738 { // Cascade bit set - UID not complete yes
paparoms 64:b57da430b53c 739 cascadeLevel++;
paparoms 64:b57da430b53c 740 }
paparoms 64:b57da430b53c 741 else
paparoms 64:b57da430b53c 742 {
paparoms 64:b57da430b53c 743 uidComplete = true;
paparoms 64:b57da430b53c 744 uid->sak = responseBuffer[0];
paparoms 64:b57da430b53c 745 }
paparoms 64:b57da430b53c 746 } // End of while ( ! uidComplete)
paparoms 64:b57da430b53c 747
paparoms 64:b57da430b53c 748 // Set correct uid->size
paparoms 64:b57da430b53c 749 uid->size = 3 * cascadeLevel + 1;
paparoms 64:b57da430b53c 750
paparoms 64:b57da430b53c 751 return STATUS_OK;
paparoms 64:b57da430b53c 752 } // End PICC_Select()
paparoms 64:b57da430b53c 753
paparoms 64:b57da430b53c 754 /*
paparoms 64:b57da430b53c 755 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
paparoms 64:b57da430b53c 756 */
paparoms 64:b57da430b53c 757 uint8_t MFRC522::PICC_HaltA()
paparoms 64:b57da430b53c 758 {
paparoms 64:b57da430b53c 759 uint8_t result;
paparoms 64:b57da430b53c 760 uint8_t buffer[4];
paparoms 64:b57da430b53c 761
paparoms 64:b57da430b53c 762 // Build command buffer
paparoms 64:b57da430b53c 763 buffer[0] = PICC_CMD_HLTA;
paparoms 64:b57da430b53c 764 buffer[1] = 0;
paparoms 64:b57da430b53c 765
paparoms 64:b57da430b53c 766 // Calculate CRC_A
paparoms 64:b57da430b53c 767 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
paparoms 64:b57da430b53c 768 if (result == STATUS_OK)
paparoms 64:b57da430b53c 769 {
paparoms 64:b57da430b53c 770 // Send the command.
paparoms 64:b57da430b53c 771 // The standard says:
paparoms 64:b57da430b53c 772 // If the PICC responds with any modulation during a period of 1 ms after the end of the frame containing the
paparoms 64:b57da430b53c 773 // HLTA command, this response shall be interpreted as 'not acknowledge'.
paparoms 64:b57da430b53c 774 // We interpret that this way: Only STATUS_TIMEOUT is an success.
paparoms 64:b57da430b53c 775 result = PCD_TransceiveData(buffer, sizeof(buffer), NULL, 0);
paparoms 64:b57da430b53c 776 if (result == STATUS_TIMEOUT)
paparoms 64:b57da430b53c 777 {
paparoms 64:b57da430b53c 778 result = STATUS_OK;
paparoms 64:b57da430b53c 779 }
paparoms 64:b57da430b53c 780 else if (result == STATUS_OK)
paparoms 64:b57da430b53c 781 { // That is ironically NOT ok in this case ;-)
paparoms 64:b57da430b53c 782 result = STATUS_ERROR;
paparoms 64:b57da430b53c 783 }
paparoms 64:b57da430b53c 784 }
paparoms 64:b57da430b53c 785
paparoms 64:b57da430b53c 786 return result;
paparoms 64:b57da430b53c 787 } // End PICC_HaltA()
paparoms 64:b57da430b53c 788
paparoms 64:b57da430b53c 789
paparoms 64:b57da430b53c 790 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 791 // Functions for communicating with MIFARE PICCs
paparoms 64:b57da430b53c 792 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 793
paparoms 64:b57da430b53c 794 /*
paparoms 64:b57da430b53c 795 * Executes the MFRC522 MFAuthent command.
paparoms 64:b57da430b53c 796 */
paparoms 64:b57da430b53c 797 uint8_t MFRC522::PCD_Authenticate(uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid)
paparoms 64:b57da430b53c 798 {
paparoms 64:b57da430b53c 799 uint8_t i, waitIRq = 0x10; // IdleIRq
paparoms 64:b57da430b53c 800
paparoms 64:b57da430b53c 801 // Build command buffer
paparoms 64:b57da430b53c 802 uint8_t sendData[12];
paparoms 64:b57da430b53c 803 sendData[0] = command;
paparoms 64:b57da430b53c 804 sendData[1] = blockAddr;
paparoms 64:b57da430b53c 805
paparoms 64:b57da430b53c 806 for (i = 0; i < MF_KEY_SIZE; i++)
paparoms 64:b57da430b53c 807 { // 6 key bytes
paparoms 64:b57da430b53c 808 sendData[2+i] = key->keyByte[i];
paparoms 64:b57da430b53c 809 }
paparoms 64:b57da430b53c 810
paparoms 64:b57da430b53c 811 for (i = 0; i < 4; i++)
paparoms 64:b57da430b53c 812 { // The first 4 bytes of the UID
paparoms 64:b57da430b53c 813 sendData[8+i] = uid->uidByte[i];
paparoms 64:b57da430b53c 814 }
paparoms 64:b57da430b53c 815
paparoms 64:b57da430b53c 816 // Start the authentication.
paparoms 64:b57da430b53c 817 return PCD_CommunicateWithPICC(PCD_MFAuthent, waitIRq, &sendData[0], sizeof(sendData));
paparoms 64:b57da430b53c 818 } // End PCD_Authenticate()
paparoms 64:b57da430b53c 819
paparoms 64:b57da430b53c 820 /*
paparoms 64:b57da430b53c 821 * Used to exit the PCD from its authenticated state.
paparoms 64:b57da430b53c 822 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
paparoms 64:b57da430b53c 823 */
paparoms 64:b57da430b53c 824 void MFRC522::PCD_StopCrypto1()
paparoms 64:b57da430b53c 825 {
paparoms 64:b57da430b53c 826 // Clear MFCrypto1On bit
paparoms 64:b57da430b53c 827 PCD_ClrRegisterBits(Status2Reg, 0x08); // Status2Reg[7..0] bits are: TempSensClear I2CForceHS reserved reserved MFCrypto1On ModemState[2:0]
paparoms 64:b57da430b53c 828 } // End PCD_StopCrypto1()
paparoms 64:b57da430b53c 829
paparoms 64:b57da430b53c 830 /*
paparoms 64:b57da430b53c 831 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
paparoms 64:b57da430b53c 832 */
paparoms 64:b57da430b53c 833 uint8_t MFRC522::MIFARE_Read(uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize)
paparoms 64:b57da430b53c 834 {
paparoms 64:b57da430b53c 835 uint8_t result = STATUS_NO_ROOM;
paparoms 64:b57da430b53c 836
paparoms 64:b57da430b53c 837 // Sanity check
paparoms 64:b57da430b53c 838 if ((buffer == NULL) || (*bufferSize < 18))
paparoms 64:b57da430b53c 839 {
paparoms 64:b57da430b53c 840 return result;
paparoms 64:b57da430b53c 841 }
paparoms 64:b57da430b53c 842
paparoms 64:b57da430b53c 843 // Build command buffer
paparoms 64:b57da430b53c 844 buffer[0] = PICC_CMD_MF_READ;
paparoms 64:b57da430b53c 845 buffer[1] = blockAddr;
paparoms 64:b57da430b53c 846
paparoms 64:b57da430b53c 847 // Calculate CRC_A
paparoms 64:b57da430b53c 848 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
paparoms 64:b57da430b53c 849 if (result != STATUS_OK)
paparoms 64:b57da430b53c 850 {
paparoms 64:b57da430b53c 851 return result;
paparoms 64:b57da430b53c 852 }
paparoms 64:b57da430b53c 853
paparoms 64:b57da430b53c 854 // Transmit the buffer and receive the response, validate CRC_A.
paparoms 64:b57da430b53c 855 return PCD_TransceiveData(buffer, 4, buffer, bufferSize, NULL, 0, true);
paparoms 64:b57da430b53c 856 } // End MIFARE_Read()
paparoms 64:b57da430b53c 857
paparoms 64:b57da430b53c 858 /*
paparoms 64:b57da430b53c 859 * Writes 16 bytes to the active PICC.
paparoms 64:b57da430b53c 860 */
paparoms 64:b57da430b53c 861 uint8_t MFRC522::MIFARE_Write(uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize)
paparoms 64:b57da430b53c 862 {
paparoms 64:b57da430b53c 863 uint8_t result;
paparoms 64:b57da430b53c 864
paparoms 64:b57da430b53c 865 // Sanity check
paparoms 64:b57da430b53c 866 if (buffer == NULL || bufferSize < 16)
paparoms 64:b57da430b53c 867 {
paparoms 64:b57da430b53c 868 return STATUS_INVALID;
paparoms 64:b57da430b53c 869 }
paparoms 64:b57da430b53c 870
paparoms 64:b57da430b53c 871 // Mifare Classic protocol requires two communications to perform a write.
paparoms 64:b57da430b53c 872 // Step 1: Tell the PICC we want to write to block blockAddr.
paparoms 64:b57da430b53c 873 uint8_t cmdBuffer[2];
paparoms 64:b57da430b53c 874 cmdBuffer[0] = PICC_CMD_MF_WRITE;
paparoms 64:b57da430b53c 875 cmdBuffer[1] = blockAddr;
paparoms 64:b57da430b53c 876 // Adds CRC_A and checks that the response is MF_ACK.
paparoms 64:b57da430b53c 877 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
paparoms 64:b57da430b53c 878 if (result != STATUS_OK)
paparoms 64:b57da430b53c 879 {
paparoms 64:b57da430b53c 880 return result;
paparoms 64:b57da430b53c 881 }
paparoms 64:b57da430b53c 882
paparoms 64:b57da430b53c 883 // Step 2: Transfer the data
paparoms 64:b57da430b53c 884 // Adds CRC_A and checks that the response is MF_ACK.
paparoms 64:b57da430b53c 885 result = PCD_MIFARE_Transceive(buffer, bufferSize);
paparoms 64:b57da430b53c 886 if (result != STATUS_OK)
paparoms 64:b57da430b53c 887 {
paparoms 64:b57da430b53c 888 return result;
paparoms 64:b57da430b53c 889 }
paparoms 64:b57da430b53c 890
paparoms 64:b57da430b53c 891 return STATUS_OK;
paparoms 64:b57da430b53c 892 } // End MIFARE_Write()
paparoms 64:b57da430b53c 893
paparoms 64:b57da430b53c 894 /*
paparoms 64:b57da430b53c 895 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
paparoms 64:b57da430b53c 896 */
paparoms 64:b57da430b53c 897 uint8_t MFRC522::MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize)
paparoms 64:b57da430b53c 898 {
paparoms 64:b57da430b53c 899 uint8_t result;
paparoms 64:b57da430b53c 900
paparoms 64:b57da430b53c 901 // Sanity check
paparoms 64:b57da430b53c 902 if (buffer == NULL || bufferSize < 4)
paparoms 64:b57da430b53c 903 {
paparoms 64:b57da430b53c 904 return STATUS_INVALID;
paparoms 64:b57da430b53c 905 }
paparoms 64:b57da430b53c 906
paparoms 64:b57da430b53c 907 // Build commmand buffer
paparoms 64:b57da430b53c 908 uint8_t cmdBuffer[6];
paparoms 64:b57da430b53c 909 cmdBuffer[0] = PICC_CMD_UL_WRITE;
paparoms 64:b57da430b53c 910 cmdBuffer[1] = page;
paparoms 64:b57da430b53c 911 memcpy(&cmdBuffer[2], buffer, 4);
paparoms 64:b57da430b53c 912
paparoms 64:b57da430b53c 913 // Perform the write
paparoms 64:b57da430b53c 914 result = PCD_MIFARE_Transceive(cmdBuffer, 6); // Adds CRC_A and checks that the response is MF_ACK.
paparoms 64:b57da430b53c 915 if (result != STATUS_OK)
paparoms 64:b57da430b53c 916 {
paparoms 64:b57da430b53c 917 return result;
paparoms 64:b57da430b53c 918 }
paparoms 64:b57da430b53c 919
paparoms 64:b57da430b53c 920 return STATUS_OK;
paparoms 64:b57da430b53c 921 } // End MIFARE_Ultralight_Write()
paparoms 64:b57da430b53c 922
paparoms 64:b57da430b53c 923 /*
paparoms 64:b57da430b53c 924 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
paparoms 64:b57da430b53c 925 */
paparoms 64:b57da430b53c 926 uint8_t MFRC522::MIFARE_Decrement(uint8_t blockAddr, uint32_t delta)
paparoms 64:b57da430b53c 927 {
paparoms 64:b57da430b53c 928 return MIFARE_TwoStepHelper(PICC_CMD_MF_DECREMENT, blockAddr, delta);
paparoms 64:b57da430b53c 929 } // End MIFARE_Decrement()
paparoms 64:b57da430b53c 930
paparoms 64:b57da430b53c 931 /*
paparoms 64:b57da430b53c 932 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
paparoms 64:b57da430b53c 933 */
paparoms 64:b57da430b53c 934 uint8_t MFRC522::MIFARE_Increment(uint8_t blockAddr, uint32_t delta)
paparoms 64:b57da430b53c 935 {
paparoms 64:b57da430b53c 936 return MIFARE_TwoStepHelper(PICC_CMD_MF_INCREMENT, blockAddr, delta);
paparoms 64:b57da430b53c 937 } // End MIFARE_Increment()
paparoms 64:b57da430b53c 938
paparoms 64:b57da430b53c 939 /**
paparoms 64:b57da430b53c 940 * MIFARE Restore copies the value of the addressed block into a volatile memory.
paparoms 64:b57da430b53c 941 */
paparoms 64:b57da430b53c 942 uint8_t MFRC522::MIFARE_Restore(uint8_t blockAddr)
paparoms 64:b57da430b53c 943 {
paparoms 64:b57da430b53c 944 // The datasheet describes Restore as a two step operation, but does not explain what data to transfer in step 2.
paparoms 64:b57da430b53c 945 // Doing only a single step does not work, so I chose to transfer 0L in step two.
paparoms 64:b57da430b53c 946 return MIFARE_TwoStepHelper(PICC_CMD_MF_RESTORE, blockAddr, 0L);
paparoms 64:b57da430b53c 947 } // End MIFARE_Restore()
paparoms 64:b57da430b53c 948
paparoms 64:b57da430b53c 949 /*
paparoms 64:b57da430b53c 950 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
paparoms 64:b57da430b53c 951 */
paparoms 64:b57da430b53c 952 uint8_t MFRC522::MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data)
paparoms 64:b57da430b53c 953 {
paparoms 64:b57da430b53c 954 uint8_t result;
paparoms 64:b57da430b53c 955 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
paparoms 64:b57da430b53c 956
paparoms 64:b57da430b53c 957 // Step 1: Tell the PICC the command and block address
paparoms 64:b57da430b53c 958 cmdBuffer[0] = command;
paparoms 64:b57da430b53c 959 cmdBuffer[1] = blockAddr;
paparoms 64:b57da430b53c 960
paparoms 64:b57da430b53c 961 // Adds CRC_A and checks that the response is MF_ACK.
paparoms 64:b57da430b53c 962 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
paparoms 64:b57da430b53c 963 if (result != STATUS_OK)
paparoms 64:b57da430b53c 964 {
paparoms 64:b57da430b53c 965 return result;
paparoms 64:b57da430b53c 966 }
paparoms 64:b57da430b53c 967
paparoms 64:b57da430b53c 968 // Step 2: Transfer the data
paparoms 64:b57da430b53c 969 // Adds CRC_A and accept timeout as success.
paparoms 64:b57da430b53c 970 result = PCD_MIFARE_Transceive((uint8_t *) &data, 4, true);
paparoms 64:b57da430b53c 971 if (result != STATUS_OK)
paparoms 64:b57da430b53c 972 {
paparoms 64:b57da430b53c 973 return result;
paparoms 64:b57da430b53c 974 }
paparoms 64:b57da430b53c 975
paparoms 64:b57da430b53c 976 return STATUS_OK;
paparoms 64:b57da430b53c 977 } // End MIFARE_TwoStepHelper()
paparoms 64:b57da430b53c 978
paparoms 64:b57da430b53c 979 /*
paparoms 64:b57da430b53c 980 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
paparoms 64:b57da430b53c 981 */
paparoms 64:b57da430b53c 982 uint8_t MFRC522::MIFARE_Transfer(uint8_t blockAddr)
paparoms 64:b57da430b53c 983 {
paparoms 64:b57da430b53c 984 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
paparoms 64:b57da430b53c 985
paparoms 64:b57da430b53c 986 // Tell the PICC we want to transfer the result into block blockAddr.
paparoms 64:b57da430b53c 987 cmdBuffer[0] = PICC_CMD_MF_TRANSFER;
paparoms 64:b57da430b53c 988 cmdBuffer[1] = blockAddr;
paparoms 64:b57da430b53c 989
paparoms 64:b57da430b53c 990 // Adds CRC_A and checks that the response is MF_ACK.
paparoms 64:b57da430b53c 991 return PCD_MIFARE_Transceive(cmdBuffer, 2);
paparoms 64:b57da430b53c 992 } // End MIFARE_Transfer()
paparoms 64:b57da430b53c 993
paparoms 64:b57da430b53c 994
paparoms 64:b57da430b53c 995 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 996 // Support functions
paparoms 64:b57da430b53c 997 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 998
paparoms 64:b57da430b53c 999 /*
paparoms 64:b57da430b53c 1000 * Wrapper for MIFARE protocol communication.
paparoms 64:b57da430b53c 1001 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
paparoms 64:b57da430b53c 1002 */
paparoms 64:b57da430b53c 1003 uint8_t MFRC522::PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout)
paparoms 64:b57da430b53c 1004 {
paparoms 64:b57da430b53c 1005 uint8_t result;
paparoms 64:b57da430b53c 1006 uint8_t cmdBuffer[18]; // We need room for 16 bytes data and 2 bytes CRC_A.
paparoms 64:b57da430b53c 1007
paparoms 64:b57da430b53c 1008 // Sanity check
paparoms 64:b57da430b53c 1009 if (sendData == NULL || sendLen > 16)
paparoms 64:b57da430b53c 1010 {
paparoms 64:b57da430b53c 1011 return STATUS_INVALID;
paparoms 64:b57da430b53c 1012 }
paparoms 64:b57da430b53c 1013
paparoms 64:b57da430b53c 1014 // Copy sendData[] to cmdBuffer[] and add CRC_A
paparoms 64:b57da430b53c 1015 memcpy(cmdBuffer, sendData, sendLen);
paparoms 64:b57da430b53c 1016 result = PCD_CalculateCRC(cmdBuffer, sendLen, &cmdBuffer[sendLen]);
paparoms 64:b57da430b53c 1017 if (result != STATUS_OK)
paparoms 64:b57da430b53c 1018 {
paparoms 64:b57da430b53c 1019 return result;
paparoms 64:b57da430b53c 1020 }
paparoms 64:b57da430b53c 1021
paparoms 64:b57da430b53c 1022 sendLen += 2;
paparoms 64:b57da430b53c 1023
paparoms 64:b57da430b53c 1024 // Transceive the data, store the reply in cmdBuffer[]
paparoms 64:b57da430b53c 1025 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
paparoms 64:b57da430b53c 1026 uint8_t cmdBufferSize = sizeof(cmdBuffer);
paparoms 64:b57da430b53c 1027 uint8_t validBits = 0;
paparoms 64:b57da430b53c 1028 result = PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, cmdBuffer, sendLen, cmdBuffer, &cmdBufferSize, &validBits);
paparoms 64:b57da430b53c 1029 if (acceptTimeout && result == STATUS_TIMEOUT)
paparoms 64:b57da430b53c 1030 {
paparoms 64:b57da430b53c 1031 return STATUS_OK;
paparoms 64:b57da430b53c 1032 }
paparoms 64:b57da430b53c 1033
paparoms 64:b57da430b53c 1034 if (result != STATUS_OK)
paparoms 64:b57da430b53c 1035 {
paparoms 64:b57da430b53c 1036 return result;
paparoms 64:b57da430b53c 1037 }
paparoms 64:b57da430b53c 1038
paparoms 64:b57da430b53c 1039 // The PICC must reply with a 4 bit ACK
paparoms 64:b57da430b53c 1040 if (cmdBufferSize != 1 || validBits != 4)
paparoms 64:b57da430b53c 1041 {
paparoms 64:b57da430b53c 1042 return STATUS_ERROR;
paparoms 64:b57da430b53c 1043 }
paparoms 64:b57da430b53c 1044
paparoms 64:b57da430b53c 1045 if (cmdBuffer[0] != MF_ACK)
paparoms 64:b57da430b53c 1046 {
paparoms 64:b57da430b53c 1047 return STATUS_MIFARE_NACK;
paparoms 64:b57da430b53c 1048 }
paparoms 64:b57da430b53c 1049
paparoms 64:b57da430b53c 1050 return STATUS_OK;
paparoms 64:b57da430b53c 1051 } // End PCD_MIFARE_Transceive()
paparoms 64:b57da430b53c 1052
paparoms 64:b57da430b53c 1053
paparoms 64:b57da430b53c 1054 /*
paparoms 64:b57da430b53c 1055 * Translates the SAK (Select Acknowledge) to a PICC type.
paparoms 64:b57da430b53c 1056 */
paparoms 64:b57da430b53c 1057 uint8_t MFRC522::PICC_GetType(uint8_t sak)
paparoms 64:b57da430b53c 1058 {
paparoms 64:b57da430b53c 1059 uint8_t retType = PICC_TYPE_UNKNOWN;
paparoms 64:b57da430b53c 1060
paparoms 64:b57da430b53c 1061 if (sak & 0x04)
paparoms 64:b57da430b53c 1062 { // UID not complete
paparoms 64:b57da430b53c 1063 retType = PICC_TYPE_NOT_COMPLETE;
paparoms 64:b57da430b53c 1064 }
paparoms 64:b57da430b53c 1065 else
paparoms 64:b57da430b53c 1066 {
paparoms 64:b57da430b53c 1067 switch (sak)
paparoms 64:b57da430b53c 1068 {
paparoms 64:b57da430b53c 1069 case 0x09: retType = PICC_TYPE_MIFARE_MINI; break;
paparoms 64:b57da430b53c 1070 case 0x08: retType = PICC_TYPE_MIFARE_1K; break;
paparoms 64:b57da430b53c 1071 case 0x18: retType = PICC_TYPE_MIFARE_4K; break;
paparoms 64:b57da430b53c 1072 case 0x00: retType = PICC_TYPE_MIFARE_UL; break;
paparoms 64:b57da430b53c 1073 case 0x10:
paparoms 64:b57da430b53c 1074 case 0x11: retType = PICC_TYPE_MIFARE_PLUS; break;
paparoms 64:b57da430b53c 1075 case 0x01: retType = PICC_TYPE_TNP3XXX; break;
paparoms 64:b57da430b53c 1076 default:
paparoms 64:b57da430b53c 1077 if (sak & 0x20)
paparoms 64:b57da430b53c 1078 {
paparoms 64:b57da430b53c 1079 retType = PICC_TYPE_ISO_14443_4;
paparoms 64:b57da430b53c 1080 }
paparoms 64:b57da430b53c 1081 else if (sak & 0x40)
paparoms 64:b57da430b53c 1082 {
paparoms 64:b57da430b53c 1083 retType = PICC_TYPE_ISO_18092;
paparoms 64:b57da430b53c 1084 }
paparoms 64:b57da430b53c 1085 break;
paparoms 64:b57da430b53c 1086 }
paparoms 64:b57da430b53c 1087 }
paparoms 64:b57da430b53c 1088
paparoms 64:b57da430b53c 1089 return (retType);
paparoms 64:b57da430b53c 1090 } // End PICC_GetType()
paparoms 64:b57da430b53c 1091
paparoms 64:b57da430b53c 1092 /*
paparoms 64:b57da430b53c 1093 * Returns a string pointer to the PICC type name.
paparoms 64:b57da430b53c 1094 */
paparoms 64:b57da430b53c 1095 char* MFRC522::PICC_GetTypeName(uint8_t piccType)
paparoms 64:b57da430b53c 1096 {
paparoms 64:b57da430b53c 1097 if(piccType == PICC_TYPE_NOT_COMPLETE)
paparoms 64:b57da430b53c 1098 {
paparoms 64:b57da430b53c 1099 piccType = MFRC522_MaxPICCs - 1;
paparoms 64:b57da430b53c 1100 }
paparoms 64:b57da430b53c 1101
paparoms 64:b57da430b53c 1102 return((char *) _TypeNamePICC[piccType]);
paparoms 64:b57da430b53c 1103 } // End PICC_GetTypeName()
paparoms 64:b57da430b53c 1104
paparoms 64:b57da430b53c 1105 /*
paparoms 64:b57da430b53c 1106 * Returns a string pointer to a status code name.
paparoms 64:b57da430b53c 1107 */
paparoms 64:b57da430b53c 1108 char* MFRC522::GetStatusCodeName(uint8_t code)
paparoms 64:b57da430b53c 1109 {
paparoms 64:b57da430b53c 1110 return((char *) _ErrorMessage[code]);
paparoms 64:b57da430b53c 1111 } // End GetStatusCodeName()
paparoms 64:b57da430b53c 1112
paparoms 64:b57da430b53c 1113 /*
paparoms 64:b57da430b53c 1114 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
paparoms 64:b57da430b53c 1115 */
paparoms 64:b57da430b53c 1116 void MFRC522::MIFARE_SetAccessBits(uint8_t *accessBitBuffer,
paparoms 64:b57da430b53c 1117 uint8_t g0,
paparoms 64:b57da430b53c 1118 uint8_t g1,
paparoms 64:b57da430b53c 1119 uint8_t g2,
paparoms 64:b57da430b53c 1120 uint8_t g3)
paparoms 64:b57da430b53c 1121 {
paparoms 64:b57da430b53c 1122 uint8_t c1 = ((g3 & 4) << 1) | ((g2 & 4) << 0) | ((g1 & 4) >> 1) | ((g0 & 4) >> 2);
paparoms 64:b57da430b53c 1123 uint8_t c2 = ((g3 & 2) << 2) | ((g2 & 2) << 1) | ((g1 & 2) << 0) | ((g0 & 2) >> 1);
paparoms 64:b57da430b53c 1124 uint8_t c3 = ((g3 & 1) << 3) | ((g2 & 1) << 2) | ((g1 & 1) << 1) | ((g0 & 1) << 0);
paparoms 64:b57da430b53c 1125
paparoms 64:b57da430b53c 1126 accessBitBuffer[0] = (~c2 & 0xF) << 4 | (~c1 & 0xF);
paparoms 64:b57da430b53c 1127 accessBitBuffer[1] = c1 << 4 | (~c3 & 0xF);
paparoms 64:b57da430b53c 1128 accessBitBuffer[2] = c3 << 4 | c2;
paparoms 64:b57da430b53c 1129 } // End MIFARE_SetAccessBits()
paparoms 64:b57da430b53c 1130
paparoms 64:b57da430b53c 1131 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 1132 // Convenience functions - does not add extra functionality
paparoms 64:b57da430b53c 1133 /////////////////////////////////////////////////////////////////////////////////////
paparoms 64:b57da430b53c 1134
paparoms 64:b57da430b53c 1135 /*
paparoms 64:b57da430b53c 1136 * Returns true if a PICC responds to PICC_CMD_REQA.
paparoms 64:b57da430b53c 1137 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
paparoms 64:b57da430b53c 1138 */
paparoms 64:b57da430b53c 1139 bool MFRC522::PICC_IsNewCardPresent(void)
paparoms 64:b57da430b53c 1140 {
paparoms 64:b57da430b53c 1141 uint8_t bufferATQA[2];
paparoms 64:b57da430b53c 1142 uint8_t bufferSize = sizeof(bufferATQA);
paparoms 64:b57da430b53c 1143 uint8_t result = PICC_RequestA(bufferATQA, &bufferSize);
paparoms 64:b57da430b53c 1144 return ((result == STATUS_OK) || (result == STATUS_COLLISION));
paparoms 64:b57da430b53c 1145 } // End PICC_IsNewCardPresent()
paparoms 64:b57da430b53c 1146
paparoms 64:b57da430b53c 1147 /*
paparoms 64:b57da430b53c 1148 * Simple wrapper around PICC_Select.
paparoms 64:b57da430b53c 1149 */
paparoms 64:b57da430b53c 1150 bool MFRC522::PICC_ReadCardSerial(void)
paparoms 64:b57da430b53c 1151 {
paparoms 64:b57da430b53c 1152 uint8_t result = PICC_Select(&uid);
paparoms 64:b57da430b53c 1153 return (result == STATUS_OK);
paparoms 64:b57da430b53c 1154 } // End PICC_ReadCardSerial()