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targets/hal/TARGET_NXP/TARGET_LPC82X/rom_i2c_8xx.h@148:161ebc35dc3a, 2016-09-28 (annotated)

Committer:
olympux
Date:
Wed Sep 28 20:59:47 2016 +0000
Revision:
148:161ebc35dc3a
Parent:
144:ef7eb2e8f9f7 
RTC working

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * @brief LPC8xx I2C ROM API declarations and functions
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * @note
<> 144:ef7eb2e8f9f7 5 * Copyright(C) NXP Semiconductors, 2012
<> 144:ef7eb2e8f9f7 6 * All rights reserved.
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * @par
<> 144:ef7eb2e8f9f7 9 * Software that is described herein is for illustrative purposes only
<> 144:ef7eb2e8f9f7 10 * which provides customers with programming information regarding the
<> 144:ef7eb2e8f9f7 11 * LPC products. This software is supplied "AS IS" without any warranties of
<> 144:ef7eb2e8f9f7 12 * any kind, and NXP Semiconductors and its licensor disclaim any and
<> 144:ef7eb2e8f9f7 13 * all warranties, express or implied, including all implied warranties of
<> 144:ef7eb2e8f9f7 14 * merchantability, fitness for a particular purpose and non-infringement of
<> 144:ef7eb2e8f9f7 15 * intellectual property rights. NXP Semiconductors assumes no responsibility
<> 144:ef7eb2e8f9f7 16 * or liability for the use of the software, conveys no license or rights under any
<> 144:ef7eb2e8f9f7 17 * patent, copyright, mask work right, or any other intellectual property rights in
<> 144:ef7eb2e8f9f7 18 * or to any products. NXP Semiconductors reserves the right to make changes
<> 144:ef7eb2e8f9f7 19 * in the software without notification. NXP Semiconductors also makes no
<> 144:ef7eb2e8f9f7 20 * representation or warranty that such application will be suitable for the
<> 144:ef7eb2e8f9f7 21 * specified use without further testing or modification.
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @par
<> 144:ef7eb2e8f9f7 24 * Permission to use, copy, modify, and distribute this software and its
<> 144:ef7eb2e8f9f7 25 * documentation is hereby granted, under NXP Semiconductors' and its
<> 144:ef7eb2e8f9f7 26 * licensor's relevant copyrights in the software, without fee, provided that it
<> 144:ef7eb2e8f9f7 27 * is used in conjunction with NXP Semiconductors microcontrollers. This
<> 144:ef7eb2e8f9f7 28 * copyright, permission, and disclaimer notice must appear in all copies of
<> 144:ef7eb2e8f9f7 29 * this code.
<> 144:ef7eb2e8f9f7 30 */
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 #ifndef __ROM_I2C_8XX_H_
<> 144:ef7eb2e8f9f7 33 #define __ROM_I2C_8XX_H_
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 36 extern "C" {
<> 144:ef7eb2e8f9f7 37 #endif
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 /** @defgroup CHIP_I2CROM_8XX CHIP: LPC8xx I2C ROM API declarations and functions
<> 144:ef7eb2e8f9f7 40 * @ingroup CHIP_8XX_Drivers
<> 144:ef7eb2e8f9f7 41 * @{
<> 144:ef7eb2e8f9f7 42 */
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /**
<> 144:ef7eb2e8f9f7 45 * @brief LPC8xx I2C ROM driver handle structure
<> 144:ef7eb2e8f9f7 46 */
<> 144:ef7eb2e8f9f7 47 typedef void *I2C_HANDLE_T;
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 typedef uint32_t ErrorCode_t;
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /**
<> 144:ef7eb2e8f9f7 52 * @brief LPC8xx I2C ROM driver callback function
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54 typedef void (*I2C_CALLBK_T)(uint32_t err_code, uint32_t n);
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /**
<> 144:ef7eb2e8f9f7 57 * LPC8xx I2C ROM driver parameter structure
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59 typedef struct I2C_PARAM {
<> 144:ef7eb2e8f9f7 60 uint32_t num_bytes_send; /*!< No. of bytes to send */
<> 144:ef7eb2e8f9f7 61 uint32_t num_bytes_rec; /*!< No. of bytes to receive */
<> 144:ef7eb2e8f9f7 62 uint8_t *buffer_ptr_send; /*!< Pointer to send buffer */
<> 144:ef7eb2e8f9f7 63 uint8_t *buffer_ptr_rec; /*!< Pointer to receive buffer */
<> 144:ef7eb2e8f9f7 64 I2C_CALLBK_T func_pt; /*!< Callback function */
<> 144:ef7eb2e8f9f7 65 uint8_t stop_flag; /*!< Stop flag */
<> 144:ef7eb2e8f9f7 66 uint8_t dummy[3];
<> 144:ef7eb2e8f9f7 67 } I2C_PARAM_T;
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 /**
<> 144:ef7eb2e8f9f7 70 * LPC8xx I2C ROM driver result structure
<> 144:ef7eb2e8f9f7 71 */
<> 144:ef7eb2e8f9f7 72 typedef struct I2C_RESULT {
<> 144:ef7eb2e8f9f7 73 uint32_t n_bytes_sent; /*!< No. of bytes sent */
<> 144:ef7eb2e8f9f7 74 uint32_t n_bytes_recd; /*!< No. of bytes received */
<> 144:ef7eb2e8f9f7 75 } I2C_RESULT_T;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /**
<> 144:ef7eb2e8f9f7 78 * LPC8xx I2C ROM driver modes enum
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80 typedef enum CHIP_I2C_MODE {
<> 144:ef7eb2e8f9f7 81 IDLE, /*!< IDLE state */
<> 144:ef7eb2e8f9f7 82 MASTER_SEND, /*!< Master send state */
<> 144:ef7eb2e8f9f7 83 MASTER_RECEIVE, /*!< Master Receive state */
<> 144:ef7eb2e8f9f7 84 SLAVE_SEND, /*!< Slave send state */
<> 144:ef7eb2e8f9f7 85 SLAVE_RECEIVE /*!< Slave receive state */
<> 144:ef7eb2e8f9f7 86 } CHIP_I2C_MODE_T;
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /**
<> 144:ef7eb2e8f9f7 89 * LPC8xx I2C ROM driver APIs structure
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91 typedef struct I2CD_API {
<> 144:ef7eb2e8f9f7 92 /*!< Interrupt Support Routine */
<> 144:ef7eb2e8f9f7 93 void (*i2c_isr_handler)(I2C_HANDLE_T *handle);
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /*!< MASTER functions */
<> 144:ef7eb2e8f9f7 96 ErrorCode_t (*i2c_master_transmit_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 97 ErrorCode_t (*i2c_master_receive_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 98 ErrorCode_t (*i2c_master_tx_rx_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 99 ErrorCode_t (*i2c_master_transmit_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 100 ErrorCode_t (*i2c_master_receive_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 101 ErrorCode_t (*i2c_master_tx_rx_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 /*!< SLAVE functions */
<> 144:ef7eb2e8f9f7 104 ErrorCode_t (*i2c_slave_receive_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 105 ErrorCode_t (*i2c_slave_transmit_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 106 ErrorCode_t (*i2c_slave_receive_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 107 ErrorCode_t (*i2c_slave_transmit_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
<> 144:ef7eb2e8f9f7 108 ErrorCode_t (*i2c_set_slave_addr)(I2C_HANDLE_T *handle, uint32_t slave_addr_0_3, uint32_t slave_mask_0_3);
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /*!< OTHER support functions */
<> 144:ef7eb2e8f9f7 111 uint32_t (*i2c_get_mem_size)(void);
<> 144:ef7eb2e8f9f7 112 I2C_HANDLE_T * (*i2c_setup)( uint32_t i2c_base_addr, uint32_t * start_of_ram);
<> 144:ef7eb2e8f9f7 113 ErrorCode_t (*i2c_set_bitrate)(I2C_HANDLE_T *handle, uint32_t p_clk_in_hz, uint32_t bitrate_in_bps);
<> 144:ef7eb2e8f9f7 114 uint32_t (*i2c_get_firmware_version)(void);
<> 144:ef7eb2e8f9f7 115 CHIP_I2C_MODE_T (*i2c_get_status)(I2C_HANDLE_T *handle);
<> 144:ef7eb2e8f9f7 116 ErrorCode_t (*i2c_set_timeout)(I2C_HANDLE_T *handle, uint32_t timeout);
<> 144:ef7eb2e8f9f7 117 } I2CD_API_T;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /**
<> 144:ef7eb2e8f9f7 120 * @}
<> 144:ef7eb2e8f9f7 121 */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 124 }
<> 144:ef7eb2e8f9f7 125 #endif
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 #endif /* __ROM_I2C_8XX_H_ */