spi_api.h

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2006-2013 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 #ifndef MBED_SPI_API_H
00017 #define MBED_SPI_API_H
00018 
00019 #include "device.h"
00020 #include "dma_api.h"
00021 #include "buffer.h"
00022 
00023 #if DEVICE_SPI
00024 
00025 #define SPI_EVENT_ERROR       (1 << 1)
00026 #define SPI_EVENT_COMPLETE    (1 << 2)
00027 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
00028 #define SPI_EVENT_ALL         (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
00029 
00030 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
00031 
00032 #define SPI_FILL_WORD         (0xFFFF)
00033 
00034 #if DEVICE_SPI_ASYNCH
00035 /** Asynch SPI HAL structure
00036  */
00037 typedef struct {
00038     struct spi_s spi;        /**< Target specific SPI structure */
00039     struct buffer_s tx_buff; /**< Tx buffer */
00040     struct buffer_s rx_buff; /**< Rx buffer */
00041 } spi_t;
00042 
00043 #else
00044 /** Non-asynch SPI HAL structure
00045  */
00046 typedef struct spi_s spi_t;
00047 
00048 #endif
00049 
00050 #ifdef __cplusplus
00051 extern "C" {
00052 #endif
00053 
00054 /**
00055  * \defgroup hal_GeneralSPI SPI Configuration Functions
00056  * @{
00057  */
00058 
00059 /** Initialize the SPI peripheral
00060  *
00061  * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
00062  * @param[out] obj  The SPI object to initialize
00063  * @param[in]  mosi The pin to use for MOSI
00064  * @param[in]  miso The pin to use for MISO
00065  * @param[in]  sclk The pin to use for SCLK
00066  * @param[in]  ssel The pin to use for SSEL
00067  */
00068 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
00069 
00070 /** Release a SPI object
00071  *
00072  * TODO: spi_free is currently unimplemented
00073  * This will require reference counting at the C++ level to be safe
00074  *
00075  * Return the pins owned by the SPI object to their reset state
00076  * Disable the SPI peripheral
00077  * Disable the SPI clock
00078  * @param[in] obj The SPI object to deinitialize
00079  */
00080 void spi_free(spi_t *obj);
00081 
00082 /** Configure the SPI format
00083  *
00084  * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
00085  * The default bit order is MSB.
00086  * @param[in,out] obj   The SPI object to configure
00087  * @param[in]     bits  The number of bits per frame
00088  * @param[in]     mode  The SPI mode (clock polarity, phase, and shift direction)
00089  * @param[in]     slave Zero for master mode or non-zero for slave mode
00090  */
00091 void spi_format(spi_t *obj, int bits, int mode, int slave);
00092 
00093 /** Set the SPI baud rate
00094  *
00095  * Actual frequency may differ from the desired frequency due to available dividers and bus clock
00096  * Configures the SPI peripheral's baud rate
00097  * @param[in,out] obj The SPI object to configure
00098  * @param[in]     hz  The baud rate in Hz
00099  */
00100 void spi_frequency(spi_t *obj, int hz);
00101 
00102 /**@}*/
00103 /**
00104  * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
00105  * @{
00106  */
00107 
00108 /** Write a byte out in master mode and receive a value
00109  *
00110  * @param[in] obj   The SPI peripheral to use for sending
00111  * @param[in] value The value to send
00112  * @return Returns the value received during send
00113  */
00114 int  spi_master_write(spi_t *obj, int value);
00115 
00116 /** Check if a value is available to read
00117  *
00118  * @param[in] obj The SPI peripheral to check
00119  * @return non-zero if a value is available
00120  */
00121 int  spi_slave_receive(spi_t *obj);
00122 
00123 /** Get a received value out of the SPI receive buffer in slave mode
00124  *
00125  * Blocks until a value is available
00126  * @param[in] obj The SPI peripheral to read
00127  * @return The value received
00128  */
00129 int  spi_slave_read(spi_t *obj);
00130 
00131 /** Write a value to the SPI peripheral in slave mode
00132  *
00133  * Blocks until the SPI peripheral can be written to
00134  * @param[in] obj   The SPI peripheral to write
00135  * @param[in] value The value to write
00136  */
00137 void spi_slave_write(spi_t *obj, int value);
00138 
00139 /** Checks if the specified SPI peripheral is in use
00140  *
00141  * @param[in] obj The SPI peripheral to check
00142  * @return non-zero if the peripheral is currently transmitting
00143  */
00144 int  spi_busy(spi_t *obj);
00145 
00146 /** Get the module number
00147  *
00148  * @param[in] obj The SPI peripheral to check
00149  * @return The module number
00150  */
00151 uint8_t spi_get_module(spi_t *obj);
00152 
00153 /**@}*/
00154 
00155 #if DEVICE_SPI_ASYNCH
00156 /**
00157  * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
00158  * @{
00159  */
00160 
00161 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
00162  *
00163  * @param[in] obj       The SPI object that holds the transfer information
00164  * @param[in] tx        The transmit buffer
00165  * @param[in] tx_length The number of bytes to transmit
00166  * @param[in] rx        The receive buffer
00167  * @param[in] rx_length The number of bytes to receive
00168  * @param[in] bit_width The bit width of buffer words
00169  * @param[in] event     The logical OR of events to be registered
00170  * @param[in] handler   SPI interrupt handler
00171  * @param[in] hint      A suggestion for how to use DMA with this transfer
00172  */
00173 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
00174 
00175 /** The asynchronous IRQ handler
00176  *
00177  * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
00178  * conditions, such as buffer overflows or transfer complete.
00179  * @param[in] obj     The SPI object that holds the transfer information
00180  * @return Event flags if a transfer termination condition was met; otherwise 0.
00181  */
00182 uint32_t spi_irq_handler_asynch(spi_t *obj);
00183 
00184 /** Attempts to determine if the SPI peripheral is already in use
00185  *
00186  * If a temporary DMA channel has been allocated, peripheral is in use.
00187  * If a permanent DMA channel has been allocated, check if the DMA channel is in use.  If not, proceed as though no DMA
00188  * channel were allocated.
00189  * If no DMA channel is allocated, check whether tx and rx buffers have been assigned.  For each assigned buffer, check
00190  * if the corresponding buffer position is less than the buffer length.  If buffers do not indicate activity, check if
00191  * there are any bytes in the FIFOs.
00192  * @param[in] obj The SPI object to check for activity
00193  * @return Non-zero if the SPI port is active or zero if it is not.
00194  */
00195 uint8_t spi_active(spi_t *obj);
00196 
00197 /** Abort an SPI transfer
00198  *
00199  * @param obj The SPI peripheral to stop
00200  */
00201 void spi_abort_asynch(spi_t *obj);
00202 
00203 
00204 #endif
00205 
00206 /**@}*/
00207 
00208 #ifdef __cplusplus
00209 }
00210 #endif // __cplusplus
00211 
00212 #endif // SPI_DEVICE
00213 
00214 #endif // MBED_SPI_API_H