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Dependents: AT45DB161D SPIFLASH_AT45DB n-bed_AT45DB161E AT45DB161D
at45db161d.h
00001 /** 00002 * @file at45db161d.h 00003 * @brief AT45DB161D module 00004 **/ 00005 #ifndef AT45DB161D_H 00006 #define AT45DB161D_H 00007 00008 #include "mbed.h" 00009 00010 extern "C" { 00011 00012 //#include <avr/pgmspace.h> 00013 #include <inttypes.h> 00014 //#include "WConstants.h" 00015 00016 }; 00017 00018 #include "at45db161d_commands.h" 00019 00020 /** 00021 * @defgroup AT45DB161D AT45DB161D module 00022 * @{ 00023 **/ 00024 00025 /** 00026 * @defgroup SPI SPI pinout and transfert function 00027 * @{ 00028 **/ 00029 #ifndef SPI 00030 /** 00031 * @defgroup SPI_Pinout SPI pinout 00032 * @{ 00033 **/ 00034 /** Serial input (SI) **/ 00035 #define DATAOUT 11 00036 /** Serial output (SO) **/ 00037 #define DATAIN 12 00038 /** Serial clock (SCK) **/ 00039 #define SPICLOCK 13 00040 /** Chip select (CS) **/ 00041 #define SLAVESELECT 10 00042 /** Reset (Reset) **/ 00043 #define RESET 8 00044 /** Write protect (WP) **/ 00045 #define WP 7 00046 /** 00047 * @} 00048 **/ 00049 00050 /** 00051 * @fn inline uint8_t spi_transfer(uint8_t data) 00052 * @brief Transfer a byte via spi 00053 * @param data Data to transfer via SPI 00054 * @return The content of the SPI data register (SPDR) 00055 **/ 00056 /* 00057 inline uint8_t spi_transfer(uint8_t data) 00058 { 00059 SPDR = data; 00060 while(!(SPSR & (1 << SPIF))) ; 00061 return SPDR; 00062 } 00063 */ 00064 #define spi_transfer(data) _spi.write(data) 00065 00066 /** De-assert CS **/ 00067 //#define DF_CS_inactive digitalWrite(SLAVESELECT,HIGH) 00068 #define DF_CS_inactive _cs = 1 00069 /** Assert CS **/ 00070 //#define DF_CS_active digitalWrite(SLAVESELECT,LOW) 00071 #define DF_CS_active _cs = 0 00072 00073 #endif /* SPI */ 00074 /** 00075 * @} 00076 **/ 00077 00078 /** 00079 * @defgroup STATUS_REGISTER_FORMAT Status register format 00080 * @{ 00081 **/ 00082 /** 00083 * Ready/busy status is indicated using bit 7 of the status register. 00084 * If bit 7 is a 1, then the device is not busy and is ready to accept 00085 * the next command. If bit 7 is a 0, then the device is in a busy 00086 * state. 00087 **/ 00088 #define READY_BUSY 0x80 00089 /** 00090 * Result of the most recent Memory Page to Buffer Compare operation. 00091 * If this bit is equal to 0, then the data in the main memory page 00092 * matches the data in the buffer. If it's 1 then at least 1 byte in 00093 * the main memory page does not match the data in the buffer. 00094 **/ 00095 #define COMPARE 0x40 00096 /** 00097 * Bit 1 in the Status Register is used to provide information to the 00098 * user whether or not the sector protection has been enabled or 00099 * disabled, either by software-controlled method or 00100 * hardware-controlled method. 1 means that the sector protection has 00101 * been enabled and 0 that it has been disabled. 00102 **/ 00103 #define PROTECT 0x02 00104 /** 00105 * Bit 0 indicates wether the page size of the main memory array is 00106 * configured for "power of 2" binary page size (512 bytes) (bit=1) or 00107 * standard DataFlash page size (528 bytes) (bit=0). 00108 **/ 00109 #define PAGE_SIZE 0x01 00110 /** 00111 * Bits 5, 4, 3 and 2 indicates the device density. The decimal value 00112 * of these four binary bits does not equate to the device density; the 00113 * four bits represent a combinational code relating to differing 00114 * densities of DataFlash devices. The device density is not the same 00115 * as the density code indicated in the JEDEC device ID information. 00116 * The device density is provided only for backward compatibility. 00117 **/ 00118 #define DEVICE_DENSITY 0x2C 00119 /** 00120 * @} 00121 **/ 00122 00123 /** 00124 * @brief at45db161d module 00125 * @todo 00126 * - TESTS! 00127 * - Protection and Security Commands 00128 * - Auto Page Rewrite through Buffer 1 00129 * - Auto Page Rewrite through Buffer 2 00130 **/ 00131 class ATD45DB161D 00132 { 00133 public: 00134 /** 00135 * @brief ID structure 00136 * This structure contains various informations about the 00137 * dataflash chip being used. 00138 **/ 00139 struct ID 00140 { 00141 uint8_t manufacturer; /**< Manufacturer id **/ 00142 uint8_t device[2]; /**< Device id **/ 00143 uint8_t extendedInfoLength; /**< Extended device information string length **/ 00144 }; 00145 00146 public: 00147 /** CTOR **/ 00148 ATD45DB161D(PinName mosi, PinName miso, PinName sclk, PinName cs); 00149 ATD45DB161D(SPI &spi, PinName cs); 00150 /** DTOR **/ 00151 ~ATD45DB161D(); 00152 00153 /** Setup SPI and pinout **/ 00154 void Init(); 00155 00156 /** 00157 * Read status register 00158 * @return The content of the status register 00159 * **/ 00160 uint8_t ReadStatusRegister(); 00161 00162 /** 00163 * Read Manufacturer and Device ID 00164 * @note if id.extendedInfoLength is not equal to zero, 00165 * successive calls to spi_transfer(0xff) will return 00166 * the extended device information string bytes. 00167 * @param id Pointer to the ID structure to initialize 00168 **/ 00169 void ReadManufacturerAndDeviceID(struct ATD45DB161D::ID *id); 00170 00171 /** 00172 * A main memory page read allows the user to read data directly from 00173 * any one of the 4096 pages in the main memory, bypassing both of the 00174 * data buffers and leaving the contents of the buffers unchanged. 00175 * @param page Page of the main memory to read 00176 * @param offset Starting byte address within the page 00177 **/ 00178 void ReadMainMemoryPage(uint16_t page, uint16_t offset); 00179 00180 /** 00181 * Sequentially read a continuous stream of data. 00182 * @param page Page of the main memory where the sequential read will start 00183 * @param offset Starting byte address within the page 00184 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false). 00185 * @note The legacy mode is not currently supported 00186 * @warning UNTESTED 00187 **/ 00188 void ContinuousArrayRead(uint16_t page, uint16_t offset, uint8_t low); 00189 00190 /** 00191 * Read the content of one of the SRAM data buffers (in low or high speed mode). 00192 * @param bufferNum Buffer to read (1 or 2) 00193 * @param offset Starting byte within the buffer 00194 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false). 00195 **/ 00196 void BufferRead(uint8_t bufferNum, uint16_t offset, uint8_t low); 00197 00198 /** 00199 * Write data to one of the SRAM data buffers. Any further call to 00200 * spi_tranfer will return bytes contained in the data buffer until 00201 * a low-to-high transition is detected on the CS pin. If the end of 00202 * the data buffer is reached, the device will wrap around back to the 00203 * beginning of the buffer. 00204 * @param bufferNum Buffer to read (1 or 2) 00205 * @param offset Starting byte within the buffer 00206 **/ 00207 void BufferWrite(uint8_t bufferNum, uint16_t offset); 00208 00209 /** 00210 * Transfer data from buffer 1 or 2 to main memory page. 00211 * @param bufferNum Buffer to use (1 or 2) 00212 * @param page Page where the content of the buffer will transfered 00213 * @param erase If set the page will be first erased before the buffer transfer. 00214 * @note If erase is equal to zero, the page must have been previously erased using one of the erase command (Page or Block Erase). 00215 **/ 00216 void BufferToPage(uint8_t bufferNum, uint16_t page, uint8_t erase); 00217 00218 /** 00219 * Transfer a page of data from main memory to buffer 1 or 2. 00220 * @param page Main memory page to transfer 00221 * @param buffer Buffer (1 or 2) where the data will be written 00222 **/ 00223 void PageToBuffer(uint16_t page, uint8_t bufferNum); 00224 00225 /** 00226 * Erase a page in the main memory array. 00227 * @param page Page to erase 00228 * @warning UNTESTED 00229 **/ 00230 void PageErase(uint16_t page); 00231 00232 /** 00233 * Erase a block of eight pages at one time. 00234 * @param block Index of the block to erase 00235 * @warning UNTESTED 00236 **/ 00237 void BlockErase(uint16_t block); 00238 00239 /** 00240 * Erase a sector in main memory. There are 16 sector on the 00241 * at45db161d and only one can be erased at one time. 00242 * @param sector Sector to erase 00243 * @warning UNTESTED 00244 **/ 00245 void SectoreErase(uint8_t sector); 00246 00247 /** 00248 * Erase the entire chip memory. Sectors proteced or locked down will 00249 * not be erased. 00250 * @warning UNTESTED 00251 **/ 00252 void ChipErase(); 00253 00254 /** 00255 * This a combination of Buffer Write and Buffer to Page with 00256 * Built-in Erase. 00257 * @note You must call EndAndWait in order to start transfering data from buffer to page 00258 * @param page Page where the content of the buffer will transfered 00259 * @param offset Starting byte address within the buffer 00260 * @param bufferNum Buffer to use (1 or 2) 00261 * @warning UNTESTED 00262 **/ 00263 void BeginPageWriteThroughBuffer(uint16_t page, uint16_t offset, uint8_t bufferNum); 00264 00265 /** 00266 * Perform a low-to-high transition on the CS pin and then poll 00267 * the status register to check if the dataflash is busy. 00268 **/ 00269 void EndAndWait(); 00270 00271 /** 00272 * Compare a page of data in main memory to the data in buffer 1 or 2. 00273 * @param page Page to test 00274 * @param bufferNum Buffer number 00275 * @return 00276 * - 1 if the page and the buffer contains the same data 00277 * - 0 else 00278 * @warning UNTESTED 00279 **/ 00280 int8_t ComparePageToBuffer(uint16_t page, uint8_t bufferNum); 00281 00282 /** 00283 * Put the device into the lowest power consumption mode. 00284 * Once the device has entered the Deep Power-down mode, all 00285 * instructions are ignored except the Resume from Deep 00286 * Power-down command. 00287 * @warning UNTESTED 00288 **/ 00289 void DeepPowerDown(); 00290 00291 /** 00292 * Takes the device out of Deep Power-down mode. 00293 * @warning UNTESTED 00294 **/ 00295 void ResumeFromDeepPowerDown(); 00296 00297 private: 00298 /* Nothing atm but who knows... */ 00299 00300 SPI _spi; 00301 DigitalOut _cs; 00302 }; 00303 00304 /** 00305 * @} 00306 **/ 00307 00308 #endif /* AT45DB161D_H */
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