Serial RAM (SPI SRAM) library 23K256, 23LC1024 (Microchip) see: http://mbed.org/users/okini3939/notebook/extend-memory/

Dependents:   SPIRAM_23LC1024_FIFO

Revision:
0:69ea2af1d9af
Child:
1:5a261b6a88af
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/SerRAM.h	Mon Jan 07 14:30:06 2013 +0000
@@ -0,0 +1,116 @@
+/*
+ * Serial RAM (SPI SRAM) library
+ * Copyright (c) 2013 Hiroshi Suga
+ * Released under the MIT License: http://mbed.org/license/mit
+ */
+
+/** @file
+ * @brief Serial RAM (SPI SRAM) library
+ *   23K256, 23LC1024 (Microchip)
+ *   support FIFO
+ *   support DMA http://mbed.org/users/AjK/code/MODDMA/
+ */
+
+#ifndef __SerRAM_h__
+#define __SerRAM_h__
+
+#if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
+//#define RAM_USE_DMA
+#define RAM_DMA_SIZE 64
+#endif
+
+#define RAM_USE_FIFO
+#define RAM_FIFO_NUM 20
+
+#include "mbed.h"
+
+#ifdef RAM_USE_DMA
+#include "MODDMA.h"
+#endif
+
+class SerRAM {
+public:
+    /**
+     * @param mosi MOSI port (p5, p10)
+     * @param miso MISO port (p6, p11)
+     * @param sck SCK port (p7, p12)
+     * @param cs CS port
+     * @param size Memory size (Kbits) default: 256
+     */
+    SerRAM (PinName mosi, PinName miso, PinName sck, PinName cs, int size = 256);
+    SerRAM (SPI& spi, PinName cs, int size = 256);
+
+    /**
+     * @param addr address
+     * @param dat data
+     * @return 0:success, -1:failure
+     */
+    int write (int addr, int dat);
+    /**
+     * @param addr address
+     * @param buf buffer
+     * @param len length
+     * @param async block (DMA)
+     * @return >=0:success, -1:failure
+     */
+    int write (int addr, char *buf, int len, int async = 0);
+    /**
+     * @param addr address
+     * @return data
+     */
+    int read (int addr);
+    /**
+     * @param addr address
+     * @param buf buffer
+     * @param len length
+     * @param async block (DMA)
+     * @return 0:success, -1:failure
+     */
+    int read (int addr, char *buf, int len, int async = 0);
+
+    int setStatus (int status);
+    int getStatus ();
+
+#ifdef RAM_USE_FIFO
+    int fifoAlloc (int size);
+    int fifoPut (int n, char dat);
+    int fifoPut (int n, char *buf, int len);
+    int fifoGet (int n, char *dat);
+    int fifoGet (int n, char *buf, int len);
+    int fifoAvailable (int n);
+    int fifoUse (int n);
+    void fifoClear (int n);
+#endif
+
+private:
+    SPI _spi;
+    DigitalOut _cs;
+    int _size;
+    int _alloc;
+
+#ifdef RAM_USE_DMA
+    void tc0_callback ();
+    void tc1_callback ();
+    void err_callback ();
+
+    __IO uint32_t *ssp_dmacr;
+    MODDMA dma;
+    MODDMA_Config *dmacfg0, *dmacfg1;
+    MODDMA::GPDMA_CONNECTION dmacon0, dmacon1;
+    volatile int dmaexit;
+#endif
+
+#ifdef RAM_USE_FIFO
+    int fifo_num;
+    struct {
+        char *buf_w, *buf_r;
+        int size;
+        int addr_w, addr_r;
+        int addr2_w, addr2_r;
+        int ram;
+        int ram_w, ram_r;
+    } fifo[RAM_FIFO_NUM];
+#endif
+};
+
+#endif