see: http://mbed.org/users/okini3939/notebook/low-power-lpc81x/

Committer:
okini3939
Date:
Fri Jun 07 22:47:35 2013 +0000
Revision:
1:f336c9774f7a
Parent:
0:349dc3aae37a
fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 1:f336c9774f7a 1 /*
okini3939 1:f336c9774f7a 2 * Can not be compiled with mbed.org.
okini3939 1:f336c9774f7a 3 * I used MDK-ARM Lite + LPC-LINK2.
okini3939 0:349dc3aae37a 4 */
okini3939 0:349dc3aae37a 5
okini3939 0:349dc3aae37a 6 #include "LPC8xx.h"
okini3939 0:349dc3aae37a 7
okini3939 0:349dc3aae37a 8 void SwitchMatrix_Init (void);
okini3939 0:349dc3aae37a 9
okini3939 0:349dc3aae37a 10 void sleep () {
okini3939 0:349dc3aae37a 11 LPC_PMU->PCON = 0;
okini3939 0:349dc3aae37a 12 SCB->SCR &= ~(1<<2);
okini3939 0:349dc3aae37a 13 __WFI();
okini3939 0:349dc3aae37a 14 }
okini3939 0:349dc3aae37a 15
okini3939 0:349dc3aae37a 16 void deep_sleep () {
okini3939 0:349dc3aae37a 17 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
okini3939 0:349dc3aae37a 18 LPC_PMU->PCON = (1<<0);
okini3939 0:349dc3aae37a 19 SCB->SCR |= (1<<2);
okini3939 0:349dc3aae37a 20 __WFI();
okini3939 0:349dc3aae37a 21 }
okini3939 0:349dc3aae37a 22
okini3939 0:349dc3aae37a 23 void power_down () {
okini3939 0:349dc3aae37a 24 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
okini3939 0:349dc3aae37a 25 LPC_PMU->PCON = (2<<0);
okini3939 0:349dc3aae37a 26 SCB->SCR |= (1<<2);
okini3939 0:349dc3aae37a 27 __WFI();
okini3939 0:349dc3aae37a 28 }
okini3939 0:349dc3aae37a 29
okini3939 0:349dc3aae37a 30 void WKT_IRQHandler () {
okini3939 0:349dc3aae37a 31 if (LPC_WKT->CTRL & (1<<1)) {
okini3939 0:349dc3aae37a 32 LPC_GPIO_PORT->CLR0 = (1<<7); // R on
okini3939 0:349dc3aae37a 33 LPC_WKT->CTRL |= (1<<2)|(1<<1);
okini3939 0:349dc3aae37a 34 } else {
okini3939 0:349dc3aae37a 35 LPC_GPIO_PORT->CLR0 = (1<<17); // G on
okini3939 0:349dc3aae37a 36 }
okini3939 0:349dc3aae37a 37 }
okini3939 0:349dc3aae37a 38
okini3939 0:349dc3aae37a 39 int main(void) {
okini3939 0:349dc3aae37a 40 int i;
okini3939 0:349dc3aae37a 41
okini3939 0:349dc3aae37a 42 SwitchMatrix_Init();
okini3939 0:349dc3aae37a 43
okini3939 0:349dc3aae37a 44 // GPIO
okini3939 0:349dc3aae37a 45 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6);
okini3939 0:349dc3aae37a 46 LPC_GPIO_PORT->DIR0 = (1<<17)|(1<<16)|(1<<7);
okini3939 0:349dc3aae37a 47 LPC_GPIO_PORT->SET0 = (1<<17)|(1<<16)|(1<<7);
okini3939 0:349dc3aae37a 48 LPC_GPIO_PORT->CLR0 = (1<<16); // B on
okini3939 0:349dc3aae37a 49 for (i = 0; i < 500000; i ++) __NOP();
okini3939 0:349dc3aae37a 50 LPC_GPIO_PORT->SET0 = (1<<16); // B off
okini3939 0:349dc3aae37a 51
okini3939 0:349dc3aae37a 52 // WKT
okini3939 0:349dc3aae37a 53 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<9);
okini3939 0:349dc3aae37a 54 LPC_SYSCON->PRESETCTRL &= ~(1<<9);
okini3939 0:349dc3aae37a 55 LPC_SYSCON->PRESETCTRL |= (1<<9);
okini3939 0:349dc3aae37a 56 LPC_PMU->DPDCTRL |= (1<<2);
okini3939 0:349dc3aae37a 57 LPC_SYSCON->STARTERP1 |= (1<<15);
okini3939 0:349dc3aae37a 58 LPC_WKT->CTRL = (1<<2)|(1<<1)|(1<<0);
okini3939 0:349dc3aae37a 59 LPC_WKT->COUNT = 10000 * 3;
okini3939 0:349dc3aae37a 60 NVIC_EnableIRQ(WKT_IRQn);
okini3939 0:349dc3aae37a 61 __enable_irq();
okini3939 0:349dc3aae37a 62
okini3939 0:349dc3aae37a 63 // sleep();
okini3939 0:349dc3aae37a 64 // deep_sleep();
okini3939 0:349dc3aae37a 65 power_down();
okini3939 0:349dc3aae37a 66
okini3939 0:349dc3aae37a 67 for (i = 0; i < 500000; i ++) __NOP();
okini3939 0:349dc3aae37a 68 LPC_GPIO_PORT->SET0 = (1<<7); // R off
okini3939 0:349dc3aae37a 69 for (;;) {
okini3939 0:349dc3aae37a 70 __NOP();
okini3939 0:349dc3aae37a 71 }
okini3939 0:349dc3aae37a 72 }