Suga koubou / Mbed 2 deprecated Drone_air

DJI NAZA-M controller (multi copter side) see: https://developer.mbed.org/users/okini3939/notebook/drone/

Dependencies:   FutabaSBUS NECnfc mbed

PowerControl/PowerControl.h@1:32cd1cf5d5b1, 2016-05-19 (annotated)

Committer:
okini3939
Date:
Thu May 19 08:59:45 2016 +0000
Revision:
1:32cd1cf5d5b1
Parent:
0:4a37291f07ca 
1st build;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:4a37291f07ca 1 /* mbed PowerControl Library
okini3939 0:4a37291f07ca 2 * Copyright (c) 2010 Michael Wei
okini3939 0:4a37291f07ca 3 */
okini3939 0:4a37291f07ca 4
okini3939 0:4a37291f07ca 5 #ifndef MBED_POWERCONTROL_H
okini3939 0:4a37291f07ca 6 #define MBED_POWERCONTROL_H
okini3939 0:4a37291f07ca 7
okini3939 0:4a37291f07ca 8 //shouldn't have to include, but fixes weird problems with defines
okini3939 0:4a37291f07ca 9 #include "mbed.h"
okini3939 0:4a37291f07ca 10
okini3939 0:4a37291f07ca 11 //System Control Register
okini3939 0:4a37291f07ca 12 // bit 0: Reserved
okini3939 0:4a37291f07ca 13 // bit 1: Sleep on Exit
okini3939 0:4a37291f07ca 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
okini3939 0:4a37291f07ca 15 // bit 2: Deep Sleep
okini3939 0:4a37291f07ca 16 #define LPC1768_SCR_SLEEPDEEP 0x4
okini3939 0:4a37291f07ca 17 // bit 3: Resereved
okini3939 0:4a37291f07ca 18 // bit 4: Send on Pending
okini3939 0:4a37291f07ca 19 #define LPC1768_SCR_SEVONPEND 0x10
okini3939 0:4a37291f07ca 20 // bit 5-31: Reserved
okini3939 0:4a37291f07ca 21
okini3939 0:4a37291f07ca 22 //Power Control Register
okini3939 0:4a37291f07ca 23 // bit 0: Power mode control bit 0 (power-down mode)
okini3939 0:4a37291f07ca 24 #define LPC1768_PCON_PM0 0x1
okini3939 0:4a37291f07ca 25 // bit 1: Power mode control bit 1 (deep power-down mode)
okini3939 0:4a37291f07ca 26 #define LPC1768_PCON_PM1 0x2
okini3939 0:4a37291f07ca 27 // bit 2: Brown-out reduced power mode
okini3939 0:4a37291f07ca 28 #define LPC1768_PCON_BODRPM 0x4
okini3939 0:4a37291f07ca 29 // bit 3: Brown-out global disable
okini3939 0:4a37291f07ca 30 #define LPC1768_PCON_BOGD 0x8
okini3939 0:4a37291f07ca 31 // bit 4: Brown-out reset disable
okini3939 0:4a37291f07ca 32 #define LPC1768_PCON_BORD 0x10
okini3939 0:4a37291f07ca 33 // bit 5-7 : Reserved
okini3939 0:4a37291f07ca 34 // bit 8: Sleep Mode Entry Flag
okini3939 0:4a37291f07ca 35 #define LPC1768_PCON_SMFLAG 0x100
okini3939 0:4a37291f07ca 36 // bit 9: Deep Sleep Entry Flag
okini3939 0:4a37291f07ca 37 #define LPC1768_PCON_DSFLAG 0x200
okini3939 0:4a37291f07ca 38 // bit 10: Power Down Entry Flag
okini3939 0:4a37291f07ca 39 #define LPC1768_PCON_PDFLAG 0x400
okini3939 0:4a37291f07ca 40 // bit 11: Deep Power Down Entry Flag
okini3939 0:4a37291f07ca 41 #define LPC1768_PCON_DPDFLAG 0x800
okini3939 0:4a37291f07ca 42 // bit 12-31: Reserved
okini3939 0:4a37291f07ca 43
okini3939 0:4a37291f07ca 44 //"Sleep Mode" (WFI).
okini3939 0:4a37291f07ca 45 inline void Sleep(void)
okini3939 0:4a37291f07ca 46 {
okini3939 0:4a37291f07ca 47 __WFI();
okini3939 0:4a37291f07ca 48 }
okini3939 0:4a37291f07ca 49
okini3939 0:4a37291f07ca 50 //"Deep Sleep" Mode
okini3939 0:4a37291f07ca 51 inline void DeepSleep(void)
okini3939 0:4a37291f07ca 52 {
okini3939 0:4a37291f07ca 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
okini3939 0:4a37291f07ca 54 __WFI();
okini3939 0:4a37291f07ca 55 }
okini3939 0:4a37291f07ca 56
okini3939 0:4a37291f07ca 57 //"Power-Down" Mode
okini3939 0:4a37291f07ca 58 inline void PowerDown(void)
okini3939 0:4a37291f07ca 59 {
okini3939 0:4a37291f07ca 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
okini3939 0:4a37291f07ca 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
okini3939 0:4a37291f07ca 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
okini3939 0:4a37291f07ca 63 __WFI();
okini3939 0:4a37291f07ca 64 //reset back to normal
okini3939 0:4a37291f07ca 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
okini3939 0:4a37291f07ca 66 }
okini3939 0:4a37291f07ca 67
okini3939 0:4a37291f07ca 68 //"Deep Power-Down" Mode
okini3939 0:4a37291f07ca 69 inline void DeepPowerDown(void)
okini3939 0:4a37291f07ca 70 {
okini3939 0:4a37291f07ca 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
okini3939 0:4a37291f07ca 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
okini3939 0:4a37291f07ca 73 __WFI();
okini3939 0:4a37291f07ca 74 //reset back to normal
okini3939 0:4a37291f07ca 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
okini3939 0:4a37291f07ca 76 }
okini3939 0:4a37291f07ca 77
okini3939 0:4a37291f07ca 78 //shut down BOD during power-down/deep sleep
okini3939 0:4a37291f07ca 79 inline void BrownOut_ReducedPowerMode_Enable(void)
okini3939 0:4a37291f07ca 80 {
okini3939 0:4a37291f07ca 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
okini3939 0:4a37291f07ca 82 }
okini3939 0:4a37291f07ca 83
okini3939 0:4a37291f07ca 84 //turn on BOD during power-down/deep sleep
okini3939 0:4a37291f07ca 85 inline void BrownOut_ReducedPowerMode_Disable(void)
okini3939 0:4a37291f07ca 86 {
okini3939 0:4a37291f07ca 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
okini3939 0:4a37291f07ca 88 }
okini3939 0:4a37291f07ca 89
okini3939 0:4a37291f07ca 90 //turn off brown out circutry
okini3939 0:4a37291f07ca 91 inline void BrownOut_Global_Disable(void)
okini3939 0:4a37291f07ca 92 {
okini3939 0:4a37291f07ca 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
okini3939 0:4a37291f07ca 94 }
okini3939 0:4a37291f07ca 95
okini3939 0:4a37291f07ca 96 //turn on brown out circutry
okini3939 0:4a37291f07ca 97 inline void BrownOut_Global_Enable(void)
okini3939 0:4a37291f07ca 98 {
okini3939 0:4a37291f07ca 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
okini3939 0:4a37291f07ca 100 }
okini3939 0:4a37291f07ca 101
okini3939 0:4a37291f07ca 102 //turn off brown out reset circutry
okini3939 0:4a37291f07ca 103 inline void BrownOut_Reset_Disable(void)
okini3939 0:4a37291f07ca 104 {
okini3939 0:4a37291f07ca 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
okini3939 0:4a37291f07ca 106 }
okini3939 0:4a37291f07ca 107
okini3939 0:4a37291f07ca 108 //turn on brown outreset circutry
okini3939 0:4a37291f07ca 109 inline void BrownOut_Reset_Enable(void)
okini3939 0:4a37291f07ca 110 {
okini3939 0:4a37291f07ca 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
okini3939 0:4a37291f07ca 112 }
okini3939 0:4a37291f07ca 113 //Peripheral Control Register
okini3939 0:4a37291f07ca 114 // bit 0: Reserved
okini3939 0:4a37291f07ca 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
okini3939 0:4a37291f07ca 116 #define LPC1768_PCONP_PCTIM0 0x2
okini3939 0:4a37291f07ca 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
okini3939 0:4a37291f07ca 118 #define LPC1768_PCONP_PCTIM1 0x4
okini3939 0:4a37291f07ca 119 // bit 3: PCUART0: UART 0 power/clock enable
okini3939 0:4a37291f07ca 120 #define LPC1768_PCONP_PCUART0 0x8
okini3939 0:4a37291f07ca 121 // bit 4: PCUART1: UART 1 power/clock enable
okini3939 0:4a37291f07ca 122 #define LPC1768_PCONP_PCUART1 0x10
okini3939 0:4a37291f07ca 123 // bit 5: Reserved
okini3939 0:4a37291f07ca 124 // bit 6: PCPWM1: PWM 1 power/clock enable
okini3939 0:4a37291f07ca 125 #define LPC1768_PCONP_PCPWM1 0x40
okini3939 0:4a37291f07ca 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
okini3939 0:4a37291f07ca 127 #define LPC1768_PCONP_PCI2C0 0x80
okini3939 0:4a37291f07ca 128 // bit 8: PCSPI: SPI interface power/clock enable
okini3939 0:4a37291f07ca 129 #define LPC1768_PCONP_PCSPI 0x100
okini3939 0:4a37291f07ca 130 // bit 9: PCRTC: RTC power/clock enable
okini3939 0:4a37291f07ca 131 #define LPC1768_PCONP_PCRTC 0x200
okini3939 0:4a37291f07ca 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
okini3939 0:4a37291f07ca 133 #define LPC1768_PCONP_PCSSP1 0x400
okini3939 0:4a37291f07ca 134 // bit 11: Reserved
okini3939 0:4a37291f07ca 135 // bit 12: PCADC: A/D converter power/clock enable
okini3939 0:4a37291f07ca 136 #define LPC1768_PCONP_PCADC 0x1000
okini3939 0:4a37291f07ca 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
okini3939 0:4a37291f07ca 138 #define LPC1768_PCONP_PCCAN1 0x2000
okini3939 0:4a37291f07ca 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
okini3939 0:4a37291f07ca 140 #define LPC1768_PCONP_PCCAN2 0x4000
okini3939 0:4a37291f07ca 141 // bit 15: PCGPIO: GPIOs power/clock enable
okini3939 0:4a37291f07ca 142 #define LPC1768_PCONP_PCGPIO 0x8000
okini3939 0:4a37291f07ca 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
okini3939 0:4a37291f07ca 144 #define LPC1768_PCONP_PCRIT 0x10000
okini3939 0:4a37291f07ca 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
okini3939 0:4a37291f07ca 146 #define LPC1768_PCONP_PCMCPWM 0x20000
okini3939 0:4a37291f07ca 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
okini3939 0:4a37291f07ca 148 #define LPC1768_PCONP_PCQEI 0x40000
okini3939 0:4a37291f07ca 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
okini3939 0:4a37291f07ca 150 #define LPC1768_PCONP_PCI2C1 0x80000
okini3939 0:4a37291f07ca 151 // bit 20: Reserved
okini3939 0:4a37291f07ca 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
okini3939 0:4a37291f07ca 153 #define LPC1768_PCONP_PCSSP0 0x200000
okini3939 0:4a37291f07ca 154 // bit 22: PCTIM2: Timer 2 power/clock enable
okini3939 0:4a37291f07ca 155 #define LPC1768_PCONP_PCTIM2 0x400000
okini3939 0:4a37291f07ca 156 // bit 23: PCTIM3: Timer 3 power/clock enable
okini3939 0:4a37291f07ca 157 #define LPC1768_PCONP_PCQTIM3 0x800000
okini3939 0:4a37291f07ca 158 // bit 24: PCUART2: UART 2 power/clock enable
okini3939 0:4a37291f07ca 159 #define LPC1768_PCONP_PCUART2 0x1000000
okini3939 0:4a37291f07ca 160 // bit 25: PCUART3: UART 3 power/clock enable
okini3939 0:4a37291f07ca 161 #define LPC1768_PCONP_PCUART3 0x2000000
okini3939 0:4a37291f07ca 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
okini3939 0:4a37291f07ca 163 #define LPC1768_PCONP_PCI2C2 0x4000000
okini3939 0:4a37291f07ca 164 // bit 27: PCI2S: I2S interface power/clock enable
okini3939 0:4a37291f07ca 165 #define LPC1768_PCONP_PCI2S 0x8000000
okini3939 0:4a37291f07ca 166 // bit 28: Reserved
okini3939 0:4a37291f07ca 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
okini3939 0:4a37291f07ca 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
okini3939 0:4a37291f07ca 169 // bit 30: PCENET: Ethernet block power/clock enable
okini3939 0:4a37291f07ca 170 #define LPC1768_PCONP_PCENET 0x40000000
okini3939 0:4a37291f07ca 171 // bit 31: PCUSB: USB interface power/clock enable
okini3939 0:4a37291f07ca 172 #define LPC1768_PCONP_PCUSB 0x80000000
okini3939 0:4a37291f07ca 173
okini3939 0:4a37291f07ca 174 //Powers Up specified Peripheral(s)
okini3939 0:4a37291f07ca 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
okini3939 0:4a37291f07ca 176 {
okini3939 0:4a37291f07ca 177 return LPC_SC->PCONP |= bitMask;
okini3939 0:4a37291f07ca 178 }
okini3939 0:4a37291f07ca 179
okini3939 0:4a37291f07ca 180 //Powers Down specified Peripheral(s)
okini3939 0:4a37291f07ca 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
okini3939 0:4a37291f07ca 182 {
okini3939 0:4a37291f07ca 183 return LPC_SC->PCONP &= ~bitMask;
okini3939 0:4a37291f07ca 184 }
okini3939 0:4a37291f07ca 185
okini3939 0:4a37291f07ca 186 //returns if the peripheral is on or off
okini3939 0:4a37291f07ca 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
okini3939 0:4a37291f07ca 188 {
okini3939 0:4a37291f07ca 189 return (LPC_SC->PCONP & peripheral) ? true : false;
okini3939 0:4a37291f07ca 190 }
okini3939 0:4a37291f07ca 191
okini3939 0:4a37291f07ca 192 #endif