ads1248.h

00001 #ifndef ADS1248_H
00002 #define ADS1248_H
00003 #include "PerifConfig.h"
00004 
00005     #define DS1248_CS                               ads1259_pin_CS
00006     #define DS1248_START                            ads1259_pin_Start
00007     #define DS1248_DRDY                             ads1259_pin_Drdy
00008         
00009     #define DS1248_WAKEUP_COMMAND                   0x00
00010     #define DS1248_SLEEP_COMMAND                    0x02
00011     #define DS1248_SYNC_COMMAND                     0x04
00012     #define DS1248_RESET_COMMAND                    0x06
00013     #define DS1248_NOP_COMMAND                      0xFF
00014     #define DS1248_RDATA_COMMAND                    0x12
00015     #define DS1248_RDATAC_COMMAND                   0x14
00016     #define DS1248_SDATAC_COMMAND                   0x16
00017 
00018     #define DS1248_RREG_COMMAND                     0x20
00019     #define DS1248_WREG_COMMAND                     0x40
00020 
00021     #define DS1248_SYSOCAL_COMMAND                  0x60
00022     #define DS1248_SYSGCAL_COMMAND                  0x61
00023     #define DS1248_SELFOCAL_COMMAND                 0x62
00024 
00025     #define DS1248_RESTRICTED_COMMAND               0xF1
00026 
00027     // Регистры
00028     
00029     #define DS1248_REGISTER_MUX0                    0x00
00030     #define DS1248_REGISTER_VBIAS                   0x01
00031     #define DS1248_REGISTER_MUX1                    0x02
00032     #define DS1248_REGISTER_SYS0                    0x03
00033     #define DS1248_REGISTER_OFC0                    0x04
00034     #define DS1248_REGISTER_OFC1                    0x05
00035     #define DS1248_REGISTER_OFC2                    0x06
00036     #define DS1248_REGISTER_FSC0                    0x07
00037     #define DS1248_REGISTER_FSC1                    0x08
00038     #define DS1248_REGISTER_FSC2                    0x09
00039     #define DS1248_REGISTER_IDAC0                   0x0A
00040     #define DS1248_REGISTER_IDAC1                   0x0B
00041     #define DS1248_REGISTER_GPIOCFG                 0x0C
00042     #define DS1248_REGISTER_GPIOCDIR                0x0D
00043     #define DS1248_REGISTER_GPIODAT                 0x0E
00044 
00045     // Настройки регисторов
00046     
00047     #define SET_REGISTER_MUX0                       0x01       
00048     #define SET_REGISTER_MUX1                       0x30
00049     #define SET_REGISTER_SYS0                       0x08
00050     #define SET_REGISTER_IDAC0                      0x04
00051     #define SET_REGISTER_IDAC1                      0xF9
00052     #define SET_REGISTER_GPIOCFG                    0x00
00053 
00054 #define DR5                 0
00055 #define DR10                1
00056 #define DR20                2
00057 #define DR40                3
00058 #define DR80                4
00059 #define DR160               5
00060 #define DR320               6
00061 #define DR640               7
00062 #define DR1000              8
00063 #define DR2000              9
00064 
00065 #define PGA_1               0
00066 #define PGA_2               1
00067 #define PGA_4               2
00068 #define PGA_8               3
00069 #define PGA_16              4
00070 #define PGA_32              5
00071 #define PGA_64              6
00072 #define PGA_128             7
00073 
00074 
00075     typedef union{
00076         struct{
00077             uint8_t
00078             MUX_SN:3,
00079             MUX_SP:3,
00080             BCS:2;
00081         };
00082         struct{
00083 
00084         };
00085         uint8_t all;
00086     }MUX0_t;
00087 
00088     typedef union{
00089         struct{
00090             uint8_t
00091             VBIAS0:1,
00092             VBIAS1:1,
00093             VBIAS2:1,
00094             VBIAS3:1,
00095             VBIAS4:1,
00096             VBIAS5:1,
00097             VBIAS6:1,
00098             VBIAS7:1;
00099         };
00100         uint8_t all;
00101     }VBIAS_t;
00102 
00103     typedef union{
00104         struct{
00105             uint8_t
00106             MUXCAL:3,
00107             REFSELT:2,
00108             VREFCON:2,
00109             CLKSTAT:1;
00110         };
00111         struct{
00112             
00113         };
00114         uint8_t all;
00115     }MUX1_t;
00116 
00117     typedef union{
00118         struct{
00119             uint8_t
00120             DR:4,
00121             PGA:3,
00122             :1;
00123         };
00124         struct{
00125 
00126         };
00127         uint8_t all;
00128     }SYS0_t;
00129 
00130     typedef union{
00131         struct{
00132         uint8_t
00133         OFC0,
00134         OFC1,
00135         OFC2;
00136         };
00137         uint32_t all;
00138     }OFC_t;
00139 
00140     typedef union{
00141         struct{
00142         uint8_t
00143         FSC0,
00144         FSC1,
00145         FSC2;
00146         };
00147         uint32_t all;
00148     }FSC_t;
00149 
00150     typedef union{
00151         struct{
00152             uint8_t
00153             IMAG:3,
00154             DRDY_MODE:1,
00155             ID:4;  
00156         };
00157         struct{
00158 
00159         };
00160         uint8_t all;
00161     }IDAC0_t;
00162 
00163     typedef union{
00164         struct{
00165             uint8_t
00166             I2DIR:4,
00167             I1DIR:4;
00168         };
00169         struct{
00170 
00171         };
00172         uint8_t all;
00173     }IDAC1_t;
00174 
00175     typedef union{
00176         struct{
00177             uint8_t
00178             IOCFG0:1,
00179             IOCFG1:1,
00180             IOCFG2:1,
00181             IOCFG3:1,
00182             IOCFG4:1,
00183             IOCFG5:1,
00184             IOCFG6:1,
00185             IOCFG7:1;
00186         };
00187         uint8_t all;
00188     }GPIOCFG_t;
00189 
00190     typedef union{
00191         struct{
00192             uint8_t
00193             IODIR0:1,
00194             IODIR1:1,
00195             IODIR2:1,
00196             IODIR3:1,
00197             IODIR4:1,
00198             IODIR5:1,
00199             IODIR6:1,
00200             IODIR7:1;
00201         };
00202         uint8_t all;
00203     }GPIODIR_t;
00204 
00205     typedef union{
00206         struct{
00207             uint8_t
00208             IODAT0:1,
00209             IODAT1:1,
00210             IODAT2:1,
00211             IODAT3:1,
00212             IODAT4:1,
00213             IODAT5:1,
00214             IODAT6:1,
00215             IODAT7:1;
00216         };
00217         uint8_t all;
00218     }GPIODAT_t;
00219     
00220     //архетип устройства
00221     typedef struct{
00222         MUX0_t MUX0;
00223         VBIAS_t VBIAS;
00224         MUX1_t MUX1;
00225         SYS0_t SYS0;
00226         OFC_t OFC;
00227         FSC_t FSC;
00228         IDAC0_t IDAC0;
00229         IDAC1_t IDAC1;
00230         GPIOCFG_t GPIOCFG;
00231         GPIODIR_t GPIODIR;
00232         GPIODAT_t GPIODAT;
00233         struct {//хранение настроек калибровки
00234             float k,b;
00235         }Calibr;
00236     }ADS1248_t;
00237     
00238     
00239     
00240     unsigned char ADS1248SleepCommand( void );
00241     
00242     unsigned char ADS1248WakeupCommand( void );
00243     
00244     unsigned char ADS1248ReadRegister( unsigned char reg, unsigned char num );
00245     
00246     unsigned char ADS1248WriteRegister( unsigned char reg, unsigned char num, unsigned char data );
00247     
00248     unsigned char ADS1248StartConversion( void );
00249     
00250     unsigned long ADS1248ReadData( ADS1248_t * ads );
00251     
00252     unsigned char ADS1248SettingReg ( ADS1248_t * ads );
00253     
00254     unsigned long ADS1248ReadCalibratedData(ADS1248_t * ads);
00255     void ADS1248CalibrateSoft(ADS1248_t * ads, float (*btf)(unsigned char *));
00256 
00257 #endif /*ADS1248_H*/
00258