philippe s. / mbed-dev

Fork of mbed-dev by mbed official

Committer:
neurofun
Date:
Tue Feb 23 21:59:35 2016 +0000
Revision:
70:b3a5af880266
Parent:
0:9b334a45a8ff
Edited DAC routines to allow for the simultaneous use of three channels from two DACs as seen on the STM32F334R8 and STM32F303K8. Edited ADC routines to allow for the simultaneous use of more than one ADC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f30x_i2c.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.1.0
bogdanm 0:9b334a45a8ff 6 * @date 27-February-2014
bogdanm 0:9b334a45a8ff 7 * @brief This file contains all the functions prototypes for the I2C firmware
bogdanm 0:9b334a45a8ff 8 * library.
bogdanm 0:9b334a45a8ff 9 ******************************************************************************
bogdanm 0:9b334a45a8ff 10 * @attention
bogdanm 0:9b334a45a8ff 11 *
bogdanm 0:9b334a45a8ff 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 15 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 17 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 20 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 22 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 23 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 24 *
bogdanm 0:9b334a45a8ff 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 *
bogdanm 0:9b334a45a8ff 36 ******************************************************************************
bogdanm 0:9b334a45a8ff 37 */
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 40 #ifndef __STM32F30x_I2C_H
bogdanm 0:9b334a45a8ff 41 #define __STM32F30x_I2C_H
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 44 extern "C" {
bogdanm 0:9b334a45a8ff 45 #endif
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 48 #include "stm32f30x.h"
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /** @addtogroup STM32F30x_StdPeriph_Driver
bogdanm 0:9b334a45a8ff 51 * @{
bogdanm 0:9b334a45a8ff 52 */
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /** @addtogroup I2C
bogdanm 0:9b334a45a8ff 55 * @{
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 /**
bogdanm 0:9b334a45a8ff 61 * @brief I2C Init structure definition
bogdanm 0:9b334a45a8ff 62 */
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 typedef struct
bogdanm 0:9b334a45a8ff 65 {
bogdanm 0:9b334a45a8ff 66 uint32_t I2C_Timing; /*!< Specifies the I2C_TIMINGR_register value.
bogdanm 0:9b334a45a8ff 67 This parameter calculated by referring to I2C initialization
bogdanm 0:9b334a45a8ff 68 section in Reference manual*/
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 uint32_t I2C_AnalogFilter; /*!< Enables or disables analog noise filter.
bogdanm 0:9b334a45a8ff 71 This parameter can be a value of @ref I2C_Analog_Filter */
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 uint32_t I2C_DigitalFilter; /*!< Configures the digital noise filter.
bogdanm 0:9b334a45a8ff 74 This parameter can be a number between 0x00 and 0x0F */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 uint32_t I2C_Mode; /*!< Specifies the I2C mode.
bogdanm 0:9b334a45a8ff 77 This parameter can be a value of @ref I2C_mode */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 uint32_t I2C_OwnAddress1; /*!< Specifies the device own address 1.
bogdanm 0:9b334a45a8ff 80 This parameter can be a 7-bit or 10-bit address */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 uint32_t I2C_Ack; /*!< Enables or disables the acknowledgement.
bogdanm 0:9b334a45a8ff 83 This parameter can be a value of @ref I2C_acknowledgement */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 uint32_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
bogdanm 0:9b334a45a8ff 86 This parameter can be a value of @ref I2C_acknowledged_address */
bogdanm 0:9b334a45a8ff 87 }I2C_InitTypeDef;
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /** @defgroup I2C_Exported_Constants
bogdanm 0:9b334a45a8ff 93 * @{
bogdanm 0:9b334a45a8ff 94 */
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
bogdanm 0:9b334a45a8ff 97 ((PERIPH) == I2C2))
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /** @defgroup I2C_Analog_Filter
bogdanm 0:9b334a45a8ff 100 * @{
bogdanm 0:9b334a45a8ff 101 */
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 #define I2C_AnalogFilter_Enable ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 104 #define I2C_AnalogFilter_Disable I2C_CR1_ANFOFF
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_AnalogFilter_Enable) || \
bogdanm 0:9b334a45a8ff 107 ((FILTER) == I2C_AnalogFilter_Disable))
bogdanm 0:9b334a45a8ff 108 /**
bogdanm 0:9b334a45a8ff 109 * @}
bogdanm 0:9b334a45a8ff 110 */
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 /** @defgroup I2C_Digital_Filter
bogdanm 0:9b334a45a8ff 113 * @{
bogdanm 0:9b334a45a8ff 114 */
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
bogdanm 0:9b334a45a8ff 117 /**
bogdanm 0:9b334a45a8ff 118 * @}
bogdanm 0:9b334a45a8ff 119 */
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /** @defgroup I2C_mode
bogdanm 0:9b334a45a8ff 122 * @{
bogdanm 0:9b334a45a8ff 123 */
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 #define I2C_Mode_I2C ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 126 #define I2C_Mode_SMBusDevice I2C_CR1_SMBDEN
bogdanm 0:9b334a45a8ff 127 #define I2C_Mode_SMBusHost I2C_CR1_SMBHEN
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
bogdanm 0:9b334a45a8ff 130 ((MODE) == I2C_Mode_SMBusDevice) || \
bogdanm 0:9b334a45a8ff 131 ((MODE) == I2C_Mode_SMBusHost))
bogdanm 0:9b334a45a8ff 132 /**
bogdanm 0:9b334a45a8ff 133 * @}
bogdanm 0:9b334a45a8ff 134 */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 /** @defgroup I2C_acknowledgement
bogdanm 0:9b334a45a8ff 137 * @{
bogdanm 0:9b334a45a8ff 138 */
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 #define I2C_Ack_Enable ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 141 #define I2C_Ack_Disable I2C_CR2_NACK
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 #define IS_I2C_ACK(ACK) (((ACK) == I2C_Ack_Enable) || \
bogdanm 0:9b334a45a8ff 144 ((ACK) == I2C_Ack_Disable))
bogdanm 0:9b334a45a8ff 145 /**
bogdanm 0:9b334a45a8ff 146 * @}
bogdanm 0:9b334a45a8ff 147 */
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 /** @defgroup I2C_acknowledged_address
bogdanm 0:9b334a45a8ff 150 * @{
bogdanm 0:9b334a45a8ff 151 */
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 #define I2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 154 #define I2C_AcknowledgedAddress_10bit I2C_OAR1_OA1MODE
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
bogdanm 0:9b334a45a8ff 157 ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
bogdanm 0:9b334a45a8ff 158 /**
bogdanm 0:9b334a45a8ff 159 * @}
bogdanm 0:9b334a45a8ff 160 */
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 /** @defgroup I2C_own_address1
bogdanm 0:9b334a45a8ff 163 * @{
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
bogdanm 0:9b334a45a8ff 167 /**
bogdanm 0:9b334a45a8ff 168 * @}
bogdanm 0:9b334a45a8ff 169 */
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 /** @defgroup I2C_transfer_direction
bogdanm 0:9b334a45a8ff 172 * @{
bogdanm 0:9b334a45a8ff 173 */
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 #define I2C_Direction_Transmitter ((uint16_t)0x0000)
bogdanm 0:9b334a45a8ff 176 #define I2C_Direction_Receiver ((uint16_t)0x0400)
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
bogdanm 0:9b334a45a8ff 179 ((DIRECTION) == I2C_Direction_Receiver))
bogdanm 0:9b334a45a8ff 180 /**
bogdanm 0:9b334a45a8ff 181 * @}
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /** @defgroup I2C_DMA_transfer_requests
bogdanm 0:9b334a45a8ff 185 * @{
bogdanm 0:9b334a45a8ff 186 */
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 #define I2C_DMAReq_Tx I2C_CR1_TXDMAEN
bogdanm 0:9b334a45a8ff 189 #define I2C_DMAReq_Rx I2C_CR1_RXDMAEN
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 #define IS_I2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00))
bogdanm 0:9b334a45a8ff 192 /**
bogdanm 0:9b334a45a8ff 193 * @}
bogdanm 0:9b334a45a8ff 194 */
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 /** @defgroup I2C_slave_address
bogdanm 0:9b334a45a8ff 197 * @{
bogdanm 0:9b334a45a8ff 198 */
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 #define IS_I2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF)
bogdanm 0:9b334a45a8ff 201 /**
bogdanm 0:9b334a45a8ff 202 * @}
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 /** @defgroup I2C_own_address2
bogdanm 0:9b334a45a8ff 207 * @{
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 /**
bogdanm 0:9b334a45a8ff 213 * @}
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 /** @defgroup I2C_own_address2_mask
bogdanm 0:9b334a45a8ff 217 * @{
bogdanm 0:9b334a45a8ff 218 */
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 #define I2C_OA2_NoMask ((uint8_t)0x00)
bogdanm 0:9b334a45a8ff 221 #define I2C_OA2_Mask01 ((uint8_t)0x01)
bogdanm 0:9b334a45a8ff 222 #define I2C_OA2_Mask02 ((uint8_t)0x02)
bogdanm 0:9b334a45a8ff 223 #define I2C_OA2_Mask03 ((uint8_t)0x03)
bogdanm 0:9b334a45a8ff 224 #define I2C_OA2_Mask04 ((uint8_t)0x04)
bogdanm 0:9b334a45a8ff 225 #define I2C_OA2_Mask05 ((uint8_t)0x05)
bogdanm 0:9b334a45a8ff 226 #define I2C_OA2_Mask06 ((uint8_t)0x06)
bogdanm 0:9b334a45a8ff 227 #define I2C_OA2_Mask07 ((uint8_t)0x07)
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NoMask) || \
bogdanm 0:9b334a45a8ff 230 ((MASK) == I2C_OA2_Mask01) || \
bogdanm 0:9b334a45a8ff 231 ((MASK) == I2C_OA2_Mask02) || \
bogdanm 0:9b334a45a8ff 232 ((MASK) == I2C_OA2_Mask03) || \
bogdanm 0:9b334a45a8ff 233 ((MASK) == I2C_OA2_Mask04) || \
bogdanm 0:9b334a45a8ff 234 ((MASK) == I2C_OA2_Mask05) || \
bogdanm 0:9b334a45a8ff 235 ((MASK) == I2C_OA2_Mask06) || \
bogdanm 0:9b334a45a8ff 236 ((MASK) == I2C_OA2_Mask07))
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /**
bogdanm 0:9b334a45a8ff 239 * @}
bogdanm 0:9b334a45a8ff 240 */
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 /** @defgroup I2C_timeout
bogdanm 0:9b334a45a8ff 243 * @{
bogdanm 0:9b334a45a8ff 244 */
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 #define IS_I2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF)
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /**
bogdanm 0:9b334a45a8ff 249 * @}
bogdanm 0:9b334a45a8ff 250 */
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 /** @defgroup I2C_registers
bogdanm 0:9b334a45a8ff 253 * @{
bogdanm 0:9b334a45a8ff 254 */
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 #define I2C_Register_CR1 ((uint8_t)0x00)
bogdanm 0:9b334a45a8ff 257 #define I2C_Register_CR2 ((uint8_t)0x04)
bogdanm 0:9b334a45a8ff 258 #define I2C_Register_OAR1 ((uint8_t)0x08)
bogdanm 0:9b334a45a8ff 259 #define I2C_Register_OAR2 ((uint8_t)0x0C)
bogdanm 0:9b334a45a8ff 260 #define I2C_Register_TIMINGR ((uint8_t)0x10)
bogdanm 0:9b334a45a8ff 261 #define I2C_Register_TIMEOUTR ((uint8_t)0x14)
bogdanm 0:9b334a45a8ff 262 #define I2C_Register_ISR ((uint8_t)0x18)
bogdanm 0:9b334a45a8ff 263 #define I2C_Register_ICR ((uint8_t)0x1C)
bogdanm 0:9b334a45a8ff 264 #define I2C_Register_PECR ((uint8_t)0x20)
bogdanm 0:9b334a45a8ff 265 #define I2C_Register_RXDR ((uint8_t)0x24)
bogdanm 0:9b334a45a8ff 266 #define I2C_Register_TXDR ((uint8_t)0x28)
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
bogdanm 0:9b334a45a8ff 269 ((REGISTER) == I2C_Register_CR2) || \
bogdanm 0:9b334a45a8ff 270 ((REGISTER) == I2C_Register_OAR1) || \
bogdanm 0:9b334a45a8ff 271 ((REGISTER) == I2C_Register_OAR2) || \
bogdanm 0:9b334a45a8ff 272 ((REGISTER) == I2C_Register_TIMINGR) || \
bogdanm 0:9b334a45a8ff 273 ((REGISTER) == I2C_Register_TIMEOUTR) || \
bogdanm 0:9b334a45a8ff 274 ((REGISTER) == I2C_Register_ISR) || \
bogdanm 0:9b334a45a8ff 275 ((REGISTER) == I2C_Register_ICR) || \
bogdanm 0:9b334a45a8ff 276 ((REGISTER) == I2C_Register_PECR) || \
bogdanm 0:9b334a45a8ff 277 ((REGISTER) == I2C_Register_RXDR) || \
bogdanm 0:9b334a45a8ff 278 ((REGISTER) == I2C_Register_TXDR))
bogdanm 0:9b334a45a8ff 279 /**
bogdanm 0:9b334a45a8ff 280 * @}
bogdanm 0:9b334a45a8ff 281 */
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 /** @defgroup I2C_interrupts_definition
bogdanm 0:9b334a45a8ff 284 * @{
bogdanm 0:9b334a45a8ff 285 */
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 #define I2C_IT_ERRI I2C_CR1_ERRIE
bogdanm 0:9b334a45a8ff 288 #define I2C_IT_TCI I2C_CR1_TCIE
bogdanm 0:9b334a45a8ff 289 #define I2C_IT_STOPI I2C_CR1_STOPIE
bogdanm 0:9b334a45a8ff 290 #define I2C_IT_NACKI I2C_CR1_NACKIE
bogdanm 0:9b334a45a8ff 291 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
bogdanm 0:9b334a45a8ff 292 #define I2C_IT_RXI I2C_CR1_RXIE
bogdanm 0:9b334a45a8ff 293 #define I2C_IT_TXI I2C_CR1_TXIE
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00))
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 /**
bogdanm 0:9b334a45a8ff 298 * @}
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 /** @defgroup I2C_flags_definition
bogdanm 0:9b334a45a8ff 302 * @{
bogdanm 0:9b334a45a8ff 303 */
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 #define I2C_FLAG_TXE I2C_ISR_TXE
bogdanm 0:9b334a45a8ff 306 #define I2C_FLAG_TXIS I2C_ISR_TXIS
bogdanm 0:9b334a45a8ff 307 #define I2C_FLAG_RXNE I2C_ISR_RXNE
bogdanm 0:9b334a45a8ff 308 #define I2C_FLAG_ADDR I2C_ISR_ADDR
bogdanm 0:9b334a45a8ff 309 #define I2C_FLAG_NACKF I2C_ISR_NACKF
bogdanm 0:9b334a45a8ff 310 #define I2C_FLAG_STOPF I2C_ISR_STOPF
bogdanm 0:9b334a45a8ff 311 #define I2C_FLAG_TC I2C_ISR_TC
bogdanm 0:9b334a45a8ff 312 #define I2C_FLAG_TCR I2C_ISR_TCR
bogdanm 0:9b334a45a8ff 313 #define I2C_FLAG_BERR I2C_ISR_BERR
bogdanm 0:9b334a45a8ff 314 #define I2C_FLAG_ARLO I2C_ISR_ARLO
bogdanm 0:9b334a45a8ff 315 #define I2C_FLAG_OVR I2C_ISR_OVR
bogdanm 0:9b334a45a8ff 316 #define I2C_FLAG_PECERR I2C_ISR_PECERR
bogdanm 0:9b334a45a8ff 317 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
bogdanm 0:9b334a45a8ff 318 #define I2C_FLAG_ALERT I2C_ISR_ALERT
bogdanm 0:9b334a45a8ff 319 #define I2C_FLAG_BUSY I2C_ISR_BUSY
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00))
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_TXIS) || \
bogdanm 0:9b334a45a8ff 324 ((FLAG) == I2C_FLAG_RXNE) || ((FLAG) == I2C_FLAG_ADDR) || \
bogdanm 0:9b334a45a8ff 325 ((FLAG) == I2C_FLAG_NACKF) || ((FLAG) == I2C_FLAG_STOPF) || \
bogdanm 0:9b334a45a8ff 326 ((FLAG) == I2C_FLAG_TC) || ((FLAG) == I2C_FLAG_TCR) || \
bogdanm 0:9b334a45a8ff 327 ((FLAG) == I2C_FLAG_BERR) || ((FLAG) == I2C_FLAG_ARLO) || \
bogdanm 0:9b334a45a8ff 328 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_PECERR) || \
bogdanm 0:9b334a45a8ff 329 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_ALERT) || \
bogdanm 0:9b334a45a8ff 330 ((FLAG) == I2C_FLAG_BUSY))
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /**
bogdanm 0:9b334a45a8ff 333 * @}
bogdanm 0:9b334a45a8ff 334 */
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 /** @defgroup I2C_interrupts_definition
bogdanm 0:9b334a45a8ff 338 * @{
bogdanm 0:9b334a45a8ff 339 */
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 #define I2C_IT_TXIS I2C_ISR_TXIS
bogdanm 0:9b334a45a8ff 342 #define I2C_IT_RXNE I2C_ISR_RXNE
bogdanm 0:9b334a45a8ff 343 #define I2C_IT_ADDR I2C_ISR_ADDR
bogdanm 0:9b334a45a8ff 344 #define I2C_IT_NACKF I2C_ISR_NACKF
bogdanm 0:9b334a45a8ff 345 #define I2C_IT_STOPF I2C_ISR_STOPF
bogdanm 0:9b334a45a8ff 346 #define I2C_IT_TC I2C_ISR_TC
bogdanm 0:9b334a45a8ff 347 #define I2C_IT_TCR I2C_ISR_TCR
bogdanm 0:9b334a45a8ff 348 #define I2C_IT_BERR I2C_ISR_BERR
bogdanm 0:9b334a45a8ff 349 #define I2C_IT_ARLO I2C_ISR_ARLO
bogdanm 0:9b334a45a8ff 350 #define I2C_IT_OVR I2C_ISR_OVR
bogdanm 0:9b334a45a8ff 351 #define I2C_IT_PECERR I2C_ISR_PECERR
bogdanm 0:9b334a45a8ff 352 #define I2C_IT_TIMEOUT I2C_ISR_TIMEOUT
bogdanm 0:9b334a45a8ff 353 #define I2C_IT_ALERT I2C_ISR_ALERT
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00))
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_TXIS) || ((IT) == I2C_IT_RXNE) || \
bogdanm 0:9b334a45a8ff 358 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_NACKF) || \
bogdanm 0:9b334a45a8ff 359 ((IT) == I2C_IT_STOPF) || ((IT) == I2C_IT_TC) || \
bogdanm 0:9b334a45a8ff 360 ((IT) == I2C_IT_TCR) || ((IT) == I2C_IT_BERR) || \
bogdanm 0:9b334a45a8ff 361 ((IT) == I2C_IT_ARLO) || ((IT) == I2C_IT_OVR) || \
bogdanm 0:9b334a45a8ff 362 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_TIMEOUT) || \
bogdanm 0:9b334a45a8ff 363 ((IT) == I2C_IT_ALERT))
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /**
bogdanm 0:9b334a45a8ff 367 * @}
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369
bogdanm 0:9b334a45a8ff 370 /** @defgroup I2C_ReloadEndMode_definition
bogdanm 0:9b334a45a8ff 371 * @{
bogdanm 0:9b334a45a8ff 372 */
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374 #define I2C_Reload_Mode I2C_CR2_RELOAD
bogdanm 0:9b334a45a8ff 375 #define I2C_AutoEnd_Mode I2C_CR2_AUTOEND
bogdanm 0:9b334a45a8ff 376 #define I2C_SoftEnd_Mode ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 377
bogdanm 0:9b334a45a8ff 378
bogdanm 0:9b334a45a8ff 379 #define IS_RELOAD_END_MODE(MODE) (((MODE) == I2C_Reload_Mode) || \
bogdanm 0:9b334a45a8ff 380 ((MODE) == I2C_AutoEnd_Mode) || \
bogdanm 0:9b334a45a8ff 381 ((MODE) == I2C_SoftEnd_Mode))
bogdanm 0:9b334a45a8ff 382
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /**
bogdanm 0:9b334a45a8ff 385 * @}
bogdanm 0:9b334a45a8ff 386 */
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 /** @defgroup I2C_StartStopMode_definition
bogdanm 0:9b334a45a8ff 389 * @{
bogdanm 0:9b334a45a8ff 390 */
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 #define I2C_No_StartStop ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 393 #define I2C_Generate_Stop I2C_CR2_STOP
bogdanm 0:9b334a45a8ff 394 #define I2C_Generate_Start_Read (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
bogdanm 0:9b334a45a8ff 395 #define I2C_Generate_Start_Write I2C_CR2_START
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 #define IS_START_STOP_MODE(MODE) (((MODE) == I2C_Generate_Stop) || \
bogdanm 0:9b334a45a8ff 399 ((MODE) == I2C_Generate_Start_Read) || \
bogdanm 0:9b334a45a8ff 400 ((MODE) == I2C_Generate_Start_Write) || \
bogdanm 0:9b334a45a8ff 401 ((MODE) == I2C_No_StartStop))
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 /**
bogdanm 0:9b334a45a8ff 405 * @}
bogdanm 0:9b334a45a8ff 406 */
bogdanm 0:9b334a45a8ff 407
bogdanm 0:9b334a45a8ff 408 /**
bogdanm 0:9b334a45a8ff 409 * @}
bogdanm 0:9b334a45a8ff 410 */
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 413 /* Exported functions ------------------------------------------------------- */
bogdanm 0:9b334a45a8ff 414
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 /* Initialization and Configuration functions *********************************/
bogdanm 0:9b334a45a8ff 417 void I2C_DeInit(I2C_TypeDef* I2Cx);
bogdanm 0:9b334a45a8ff 418 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
bogdanm 0:9b334a45a8ff 419 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
bogdanm 0:9b334a45a8ff 420 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 421 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx);
bogdanm 0:9b334a45a8ff 422 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 423 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 424 void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 425 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 426 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask);
bogdanm 0:9b334a45a8ff 427 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 428 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 429 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address);
bogdanm 0:9b334a45a8ff 430 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 /* Communications handling functions ******************************************/
bogdanm 0:9b334a45a8ff 433 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 434 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 435 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes);
bogdanm 0:9b334a45a8ff 436 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction);
bogdanm 0:9b334a45a8ff 437 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 438 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 439 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 440 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 441 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx);
bogdanm 0:9b334a45a8ff 442 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx);
bogdanm 0:9b334a45a8ff 443 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode);
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 /* SMBUS management functions ************************************************/
bogdanm 0:9b334a45a8ff 446 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 447 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 448 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 449 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 450 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout);
bogdanm 0:9b334a45a8ff 451 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout);
bogdanm 0:9b334a45a8ff 452 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 453 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 454 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 /* I2C registers management functions *****************************************/
bogdanm 0:9b334a45a8ff 457 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
bogdanm 0:9b334a45a8ff 458
bogdanm 0:9b334a45a8ff 459 /* Data transfers management functions ****************************************/
bogdanm 0:9b334a45a8ff 460 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
bogdanm 0:9b334a45a8ff 461 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 /* DMA transfers management functions *****************************************/
bogdanm 0:9b334a45a8ff 464 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 /* Interrupts and flags management functions **********************************/
bogdanm 0:9b334a45a8ff 467 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
bogdanm 0:9b334a45a8ff 468 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
bogdanm 0:9b334a45a8ff 469 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
bogdanm 0:9b334a45a8ff 470 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 474 }
bogdanm 0:9b334a45a8ff 475 #endif
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 #endif /*__STM32F30x_I2C_H */
bogdanm 0:9b334a45a8ff 478
bogdanm 0:9b334a45a8ff 479 /**
bogdanm 0:9b334a45a8ff 480 * @}
bogdanm 0:9b334a45a8ff 481 */
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 /**
bogdanm 0:9b334a45a8ff 484 * @}
bogdanm 0:9b334a45a8ff 485 */
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/