Milen Pavlov / XRange_mbed_src

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Dependents:   XRangePingPong XRange-LoRaWAN-lmic-app lora-transceiver

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_irda.c@339:ac6f3fd999f3, 2016-01-07 (annotated)

Committer:
netblocks
Date:
Thu Jan 07 13:01:25 2016 +0000
Revision:
339:ac6f3fd999f3
Parent:
335:b4678b054027 
HSE_VALUE set for XTAL 16Mhz

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 335:b4678b054027 1 /**
dudmuck 335:b4678b054027 2 ******************************************************************************
dudmuck 335:b4678b054027 3 * @file stm32l1xx_hal_irda.c
dudmuck 335:b4678b054027 4 * @author MCD Application Team
dudmuck 335:b4678b054027 5 * @version V1.0.0
dudmuck 335:b4678b054027 6 * @date 5-September-2014
dudmuck 335:b4678b054027 7 * @brief IRDA HAL module driver.
dudmuck 335:b4678b054027 8 * This file provides firmware functions to manage the following
dudmuck 335:b4678b054027 9 * functionalities of the IrDA SIR ENDEC block (IrDA):
dudmuck 335:b4678b054027 10 * + Initialization and de-initialization functions
dudmuck 335:b4678b054027 11 * + IO operation functions
dudmuck 335:b4678b054027 12 * + Peripheral State and Errors functions
dudmuck 335:b4678b054027 13 * + Peripheral Control functions
dudmuck 335:b4678b054027 14 *
dudmuck 335:b4678b054027 15 @verbatim
dudmuck 335:b4678b054027 16 ==============================================================================
dudmuck 335:b4678b054027 17 ##### How to use this driver #####
dudmuck 335:b4678b054027 18 ==============================================================================
dudmuck 335:b4678b054027 19 [..]
dudmuck 335:b4678b054027 20 The IRDA HAL driver can be used as follows:
dudmuck 335:b4678b054027 21
dudmuck 335:b4678b054027 22 (#) Declare a IRDA_HandleTypeDef handle structure.
dudmuck 335:b4678b054027 23 (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API:
dudmuck 335:b4678b054027 24 (##) Enable the USARTx interface clock.
dudmuck 335:b4678b054027 25 (##) IRDA pins configuration:
dudmuck 335:b4678b054027 26 (+++) Enable the clock for the IRDA GPIOs.
dudmuck 335:b4678b054027 27 (+++) Configure these IRDA pins as alternate function pull-up.
dudmuck 335:b4678b054027 28 (##) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT()
dudmuck 335:b4678b054027 29 and HAL_IRDA_Receive_IT() APIs):
dudmuck 335:b4678b054027 30 (+++) Configure the USARTx interrupt priority.
dudmuck 335:b4678b054027 31 (+++) Enable the NVIC USART IRQ handle.
dudmuck 335:b4678b054027 32 (##) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA()
dudmuck 335:b4678b054027 33 and HAL_IRDA_Receive_DMA() APIs):
dudmuck 335:b4678b054027 34 (+++) Declare a DMA handle structure for the Tx/Rx channel.
dudmuck 335:b4678b054027 35 (+++) Enable the DMAx interface clock.
dudmuck 335:b4678b054027 36 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
dudmuck 335:b4678b054027 37 (+++) Configure the DMA Tx/Rx channel.
dudmuck 335:b4678b054027 38 (+++) Associate the initilalized DMA handle to the IRDA DMA Tx/Rx handle.
dudmuck 335:b4678b054027 39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
dudmuck 335:b4678b054027 40
dudmuck 335:b4678b054027 41 (#) Program the Baud Rate, Word Length, Parity, IrDA Mode, Prescaler
dudmuck 335:b4678b054027 42 and Mode(Receiver/Transmitter) in the hirda Init structure.
dudmuck 335:b4678b054027 43
dudmuck 335:b4678b054027 44 (#) Initialize the IRDA registers by calling the HAL_IRDA_Init() API:
dudmuck 335:b4678b054027 45 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
dudmuck 335:b4678b054027 46 by calling the customed HAL_IRDA_MspInit() API.
dudmuck 335:b4678b054027 47
dudmuck 335:b4678b054027 48 -@@- The specific IRDA interrupts (Transmission complete interrupt,
dudmuck 335:b4678b054027 49 RXNE interrupt and Error Interrupts) will be managed using the macros
dudmuck 335:b4678b054027 50 __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
dudmuck 335:b4678b054027 51
dudmuck 335:b4678b054027 52 (#) Three operation modes are available within this driver :
dudmuck 335:b4678b054027 53
dudmuck 335:b4678b054027 54 *** Polling mode IO operation ***
dudmuck 335:b4678b054027 55 =================================
dudmuck 335:b4678b054027 56 [..]
dudmuck 335:b4678b054027 57 (+) Send an amount of data in blocking mode using HAL_IRDA_Transmit()
dudmuck 335:b4678b054027 58 (+) Receive an amount of data in blocking mode using HAL_IRDA_Receive()
dudmuck 335:b4678b054027 59
dudmuck 335:b4678b054027 60 *** Interrupt mode IO operation ***
dudmuck 335:b4678b054027 61 ===================================
dudmuck 335:b4678b054027 62 [..]
dudmuck 335:b4678b054027 63 (+) Send an amount of data in non blocking mode using HAL_IRDA_Transmit_IT()
dudmuck 335:b4678b054027 64 (+) At transmission end of transfer HAL_IRDA_TxCpltCallback is executed and user can
dudmuck 335:b4678b054027 65 add his own code by customization of function pointer HAL_IRDA_TxCpltCallback
dudmuck 335:b4678b054027 66 (+) Receive an amount of data in non blocking mode using HAL_IRDA_Receive_IT()
dudmuck 335:b4678b054027 67 (+) At reception end of transfer HAL_IRDA_RxCpltCallback is executed and user can
dudmuck 335:b4678b054027 68 add his own code by customization of function pointer HAL_IRDA_RxCpltCallback
dudmuck 335:b4678b054027 69 (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
dudmuck 335:b4678b054027 70 add his own code by customization of function pointer HAL_IRDA_ErrorCallback
dudmuck 335:b4678b054027 71
dudmuck 335:b4678b054027 72 *** DMA mode IO operation ***
dudmuck 335:b4678b054027 73 ==============================
dudmuck 335:b4678b054027 74 [..]
dudmuck 335:b4678b054027 75 (+) Send an amount of data in non blocking mode (DMA) using HAL_IRDA_Transmit_DMA()
dudmuck 335:b4678b054027 76 (+) At transmission end of transfer HAL_IRDA_TxCpltCallback is executed and user can
dudmuck 335:b4678b054027 77 add his own code by customization of function pointer HAL_IRDA_TxCpltCallback
dudmuck 335:b4678b054027 78 (+) Receive an amount of data in non blocking mode (DMA) using HAL_IRDA_Receive_DMA()
dudmuck 335:b4678b054027 79 (+) At reception end of transfer HAL_IRDA_RxCpltCallback is executed and user can
dudmuck 335:b4678b054027 80 add his own code by customization of function pointer HAL_IRDA_RxCpltCallback
dudmuck 335:b4678b054027 81 (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
dudmuck 335:b4678b054027 82 add his own code by customization of function pointer HAL_IRDA_ErrorCallback
dudmuck 335:b4678b054027 83
dudmuck 335:b4678b054027 84 *** IRDA HAL driver macros list ***
dudmuck 335:b4678b054027 85 ====================================
dudmuck 335:b4678b054027 86 [..]
dudmuck 335:b4678b054027 87 Below the list of most used macros in IRDA HAL driver.
dudmuck 335:b4678b054027 88
dudmuck 335:b4678b054027 89 (+) __HAL_IRDA_ENABLE: Enable the IRDA peripheral
dudmuck 335:b4678b054027 90 (+) __HAL_IRDA_DISABLE: Disable the IRDA peripheral
dudmuck 335:b4678b054027 91 (+) __HAL_IRDA_GET_FLAG : Check whether the specified IRDA flag is set or not
dudmuck 335:b4678b054027 92 (+) __HAL_IRDA_CLEAR_FLAG : Clear the specified IRDA pending flag
dudmuck 335:b4678b054027 93 (+) __HAL_IRDA_ENABLE_IT: Enable the specified IRDA interrupt
dudmuck 335:b4678b054027 94 (+) __HAL_IRDA_DISABLE_IT: Disable the specified IRDA interrupt
dudmuck 335:b4678b054027 95
dudmuck 335:b4678b054027 96 [..]
dudmuck 335:b4678b054027 97 (@) You can refer to the IRDA HAL driver header file for more useful macros
dudmuck 335:b4678b054027 98
dudmuck 335:b4678b054027 99 @endverbatim
dudmuck 335:b4678b054027 100 ******************************************************************************
dudmuck 335:b4678b054027 101 * @attention
dudmuck 335:b4678b054027 102 *
dudmuck 335:b4678b054027 103 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
dudmuck 335:b4678b054027 104 *
dudmuck 335:b4678b054027 105 * Redistribution and use in source and binary forms, with or without modification,
dudmuck 335:b4678b054027 106 * are permitted provided that the following conditions are met:
dudmuck 335:b4678b054027 107 * 1. Redistributions of source code must retain the above copyright notice,
dudmuck 335:b4678b054027 108 * this list of conditions and the following disclaimer.
dudmuck 335:b4678b054027 109 * 2. Redistributions in binary form must reproduce the above copyright notice,
dudmuck 335:b4678b054027 110 * this list of conditions and the following disclaimer in the documentation
dudmuck 335:b4678b054027 111 * and/or other materials provided with the distribution.
dudmuck 335:b4678b054027 112 * 3. Neither the name of STMicroelectronics nor the names of its contributors
dudmuck 335:b4678b054027 113 * may be used to endorse or promote products derived from this software
dudmuck 335:b4678b054027 114 * without specific prior written permission.
dudmuck 335:b4678b054027 115 *
dudmuck 335:b4678b054027 116 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dudmuck 335:b4678b054027 117 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dudmuck 335:b4678b054027 118 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
dudmuck 335:b4678b054027 119 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
dudmuck 335:b4678b054027 120 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
dudmuck 335:b4678b054027 121 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
dudmuck 335:b4678b054027 122 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
dudmuck 335:b4678b054027 123 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
dudmuck 335:b4678b054027 124 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
dudmuck 335:b4678b054027 125 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
dudmuck 335:b4678b054027 126 *
dudmuck 335:b4678b054027 127 ******************************************************************************
dudmuck 335:b4678b054027 128 */
dudmuck 335:b4678b054027 129
dudmuck 335:b4678b054027 130 /* Includes ------------------------------------------------------------------*/
dudmuck 335:b4678b054027 131 #include "stm32l1xx_hal.h"
dudmuck 335:b4678b054027 132
dudmuck 335:b4678b054027 133 /** @addtogroup STM32L1xx_HAL_Driver
dudmuck 335:b4678b054027 134 * @{
dudmuck 335:b4678b054027 135 */
dudmuck 335:b4678b054027 136
dudmuck 335:b4678b054027 137 /** @defgroup IRDA IRDA
dudmuck 335:b4678b054027 138 * @brief HAL IRDA module driver
dudmuck 335:b4678b054027 139 * @{
dudmuck 335:b4678b054027 140 */
dudmuck 335:b4678b054027 141
dudmuck 335:b4678b054027 142 #ifdef HAL_IRDA_MODULE_ENABLED
dudmuck 335:b4678b054027 143
dudmuck 335:b4678b054027 144 /* Private typedef -----------------------------------------------------------*/
dudmuck 335:b4678b054027 145 /* Private define ------------------------------------------------------------*/
dudmuck 335:b4678b054027 146 /** @defgroup IRDA_Private_Constants IRDA Private Constants
dudmuck 335:b4678b054027 147 * @{
dudmuck 335:b4678b054027 148 */
dudmuck 335:b4678b054027 149 #define IRDA_TIMEOUT_VALUE 22000
dudmuck 335:b4678b054027 150 #define IRDA_DR_MASK_U16_7DATABITS (uint16_t)0x007F
dudmuck 335:b4678b054027 151 #define IRDA_DR_MASK_U16_8DATABITS (uint16_t)0x00FF
dudmuck 335:b4678b054027 152 #define IRDA_DR_MASK_U16_9DATABITS (uint16_t)0x01FF
dudmuck 335:b4678b054027 153
dudmuck 335:b4678b054027 154 #define IRDA_DR_MASK_U8_7DATABITS (uint8_t)0x7F
dudmuck 335:b4678b054027 155 #define IRDA_DR_MASK_U8_8DATABITS (uint8_t)0xFF
dudmuck 335:b4678b054027 156
dudmuck 335:b4678b054027 157
dudmuck 335:b4678b054027 158 /**
dudmuck 335:b4678b054027 159 * @}
dudmuck 335:b4678b054027 160 */
dudmuck 335:b4678b054027 161
dudmuck 335:b4678b054027 162 /* Private macro -------------------------------------------------------------*/
dudmuck 335:b4678b054027 163 /* Private variables ---------------------------------------------------------*/
dudmuck 335:b4678b054027 164 /* Private function prototypes -----------------------------------------------*/
dudmuck 335:b4678b054027 165 /** @addtogroup IRDA_Private_Functions IRDA Private Functions
dudmuck 335:b4678b054027 166 * @{
dudmuck 335:b4678b054027 167 */
dudmuck 335:b4678b054027 168 static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda);
dudmuck 335:b4678b054027 169 static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda);
dudmuck 335:b4678b054027 170 static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
dudmuck 335:b4678b054027 171 static void IRDA_SetConfig (IRDA_HandleTypeDef *hirda);
dudmuck 335:b4678b054027 172 static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma);
dudmuck 335:b4678b054027 173 static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma);
dudmuck 335:b4678b054027 174 static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
dudmuck 335:b4678b054027 175 static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma);
dudmuck 335:b4678b054027 176 static void IRDA_DMAError(DMA_HandleTypeDef *hdma);
dudmuck 335:b4678b054027 177 static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
dudmuck 335:b4678b054027 178 /**
dudmuck 335:b4678b054027 179 * @}
dudmuck 335:b4678b054027 180 */
dudmuck 335:b4678b054027 181
dudmuck 335:b4678b054027 182 /* Exported functions ---------------------------------------------------------*/
dudmuck 335:b4678b054027 183
dudmuck 335:b4678b054027 184 /** @defgroup IRDA_Exported_Functions IRDA Exported Functions
dudmuck 335:b4678b054027 185 * @{
dudmuck 335:b4678b054027 186 */
dudmuck 335:b4678b054027 187
dudmuck 335:b4678b054027 188 /** @defgroup IRDA_Exported_Functions_Group1 IrDA Initialization and de-initialization functions
dudmuck 335:b4678b054027 189 * @brief Initialization and Configuration functions
dudmuck 335:b4678b054027 190 *
dudmuck 335:b4678b054027 191 @verbatim
dudmuck 335:b4678b054027 192 ==============================================================================
dudmuck 335:b4678b054027 193 ##### Initialization and Configuration functions #####
dudmuck 335:b4678b054027 194 ==============================================================================
dudmuck 335:b4678b054027 195 [..]
dudmuck 335:b4678b054027 196 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
dudmuck 335:b4678b054027 197 in IrDA mode.
dudmuck 335:b4678b054027 198 (+) For the asynchronous mode only these parameters can be configured:
dudmuck 335:b4678b054027 199 (++) Baud Rate
dudmuck 335:b4678b054027 200 (++) Word Length
dudmuck 335:b4678b054027 201 (++) Parity: If the parity is enabled, then the MSB bit of the data written
dudmuck 335:b4678b054027 202 in the data register is transmitted but is changed by the parity bit.
dudmuck 335:b4678b054027 203 Depending on the frame length defined by the M bit (8-bits or 9-bits),
dudmuck 335:b4678b054027 204 the possible IRDA frame formats are as listed in the following table:
dudmuck 335:b4678b054027 205 +-------------------------------------------------------------+
dudmuck 335:b4678b054027 206 | M bit | PCE bit | IRDA frame |
dudmuck 335:b4678b054027 207 |---------------------|---------------------------------------|
dudmuck 335:b4678b054027 208 | 0 | 0 | | SB | 8 bit data | STB | |
dudmuck 335:b4678b054027 209 |---------|-----------|---------------------------------------|
dudmuck 335:b4678b054027 210 | 0 | 1 | | SB | 7 bit data | PB | STB | |
dudmuck 335:b4678b054027 211 |---------|-----------|---------------------------------------|
dudmuck 335:b4678b054027 212 | 1 | 0 | | SB | 9 bit data | STB | |
dudmuck 335:b4678b054027 213 |---------|-----------|---------------------------------------|
dudmuck 335:b4678b054027 214 | 1 | 1 | | SB | 8 bit data | PB | STB | |
dudmuck 335:b4678b054027 215 +-------------------------------------------------------------+
dudmuck 335:b4678b054027 216 (++) Prescaler: A pulse of width less than two and greater than one PSC period(s) may or may
dudmuck 335:b4678b054027 217 not be rejected. The receiver set up time should be managed by software. The IrDA physical layer
dudmuck 335:b4678b054027 218 specification specifies a minimum of 10 ms delay between transmission and
dudmuck 335:b4678b054027 219 reception (IrDA is a half duplex protocol).
dudmuck 335:b4678b054027 220 (++) Mode: Receiver/transmitter modes
dudmuck 335:b4678b054027 221 (++) IrDAMode: the IrDA can operate in the Normal mode or in the Low power mode.
dudmuck 335:b4678b054027 222
dudmuck 335:b4678b054027 223 [..]
dudmuck 335:b4678b054027 224 The HAL_IRDA_Init() function follows IRDA configuration procedures (details for the procedures
dudmuck 335:b4678b054027 225 are available in reference manual (RM0038)).
dudmuck 335:b4678b054027 226
dudmuck 335:b4678b054027 227 @endverbatim
dudmuck 335:b4678b054027 228 * @{
dudmuck 335:b4678b054027 229 */
dudmuck 335:b4678b054027 230
dudmuck 335:b4678b054027 231 /**
dudmuck 335:b4678b054027 232 * @brief Initializes the IRDA mode according to the specified
dudmuck 335:b4678b054027 233 * parameters in the IRDA_InitTypeDef and create the associated handle.
dudmuck 335:b4678b054027 234 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 235 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 236 * @retval HAL status
dudmuck 335:b4678b054027 237 */
dudmuck 335:b4678b054027 238 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 239 {
dudmuck 335:b4678b054027 240 /* Check the IRDA handle allocation */
dudmuck 335:b4678b054027 241 if(hirda == HAL_NULL)
dudmuck 335:b4678b054027 242 {
dudmuck 335:b4678b054027 243 return HAL_ERROR;
dudmuck 335:b4678b054027 244 }
dudmuck 335:b4678b054027 245
dudmuck 335:b4678b054027 246 /* Check the IRDA instance parameters */
dudmuck 335:b4678b054027 247 assert_param(IS_IRDA_INSTANCE(hirda->Instance));
dudmuck 335:b4678b054027 248 /* Check the IRDA mode parameter in the IRDA handle */
dudmuck 335:b4678b054027 249 assert_param(IS_IRDA_POWERMODE(hirda->Init.IrDAMode));
dudmuck 335:b4678b054027 250
dudmuck 335:b4678b054027 251 if(hirda->State == HAL_IRDA_STATE_RESET)
dudmuck 335:b4678b054027 252 {
dudmuck 335:b4678b054027 253 /* Init the low level hardware */
dudmuck 335:b4678b054027 254 HAL_IRDA_MspInit(hirda);
dudmuck 335:b4678b054027 255 }
dudmuck 335:b4678b054027 256
dudmuck 335:b4678b054027 257 hirda->State = HAL_IRDA_STATE_BUSY;
dudmuck 335:b4678b054027 258
dudmuck 335:b4678b054027 259 /* Disable the IRDA peripheral */
dudmuck 335:b4678b054027 260 __HAL_IRDA_DISABLE(hirda);
dudmuck 335:b4678b054027 261
dudmuck 335:b4678b054027 262 /* Set the IRDA communication parameters */
dudmuck 335:b4678b054027 263 IRDA_SetConfig(hirda);
dudmuck 335:b4678b054027 264
dudmuck 335:b4678b054027 265 /* In IrDA mode, the following bits must be kept cleared:
dudmuck 335:b4678b054027 266 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
dudmuck 335:b4678b054027 267 - SCEN and HDSEL bits in the USART_CR3 register.*/
dudmuck 335:b4678b054027 268 CLEAR_BIT(hirda->Instance->CR2, (USART_CR2_LINEN | USART_CR2_STOP | USART_CR2_CLKEN));
dudmuck 335:b4678b054027 269 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
dudmuck 335:b4678b054027 270
dudmuck 335:b4678b054027 271 /* Enable the IRDA peripheral */
dudmuck 335:b4678b054027 272 __HAL_IRDA_ENABLE(hirda);
dudmuck 335:b4678b054027 273
dudmuck 335:b4678b054027 274 /* Set the prescaler */
dudmuck 335:b4678b054027 275 MODIFY_REG(hirda->Instance->GTPR, USART_GTPR_PSC, hirda->Init.Prescaler);
dudmuck 335:b4678b054027 276
dudmuck 335:b4678b054027 277 /* Configure the IrDA mode */
dudmuck 335:b4678b054027 278 MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.IrDAMode);
dudmuck 335:b4678b054027 279
dudmuck 335:b4678b054027 280 /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
dudmuck 335:b4678b054027 281 SET_BIT(hirda->Instance->CR3, USART_CR3_IREN);
dudmuck 335:b4678b054027 282
dudmuck 335:b4678b054027 283 /* Initialize the IRDA state*/
dudmuck 335:b4678b054027 284 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 285 hirda->State= HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 286
dudmuck 335:b4678b054027 287 return HAL_OK;
dudmuck 335:b4678b054027 288 }
dudmuck 335:b4678b054027 289
dudmuck 335:b4678b054027 290 /**
dudmuck 335:b4678b054027 291 * @brief DeInitializes the IRDA peripheral
dudmuck 335:b4678b054027 292 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 293 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 294 * @retval HAL status
dudmuck 335:b4678b054027 295 */
dudmuck 335:b4678b054027 296 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 297 {
dudmuck 335:b4678b054027 298 /* Check the IRDA handle allocation */
dudmuck 335:b4678b054027 299 if(hirda == HAL_NULL)
dudmuck 335:b4678b054027 300 {
dudmuck 335:b4678b054027 301 return HAL_ERROR;
dudmuck 335:b4678b054027 302 }
dudmuck 335:b4678b054027 303
dudmuck 335:b4678b054027 304 /* Check the parameters */
dudmuck 335:b4678b054027 305 assert_param(IS_IRDA_INSTANCE(hirda->Instance));
dudmuck 335:b4678b054027 306
dudmuck 335:b4678b054027 307 hirda->State = HAL_IRDA_STATE_BUSY;
dudmuck 335:b4678b054027 308
dudmuck 335:b4678b054027 309 /* Disable the Peripheral */
dudmuck 335:b4678b054027 310 __HAL_IRDA_DISABLE(hirda);
dudmuck 335:b4678b054027 311
dudmuck 335:b4678b054027 312 /* DeInit the low level hardware */
dudmuck 335:b4678b054027 313 HAL_IRDA_MspDeInit(hirda);
dudmuck 335:b4678b054027 314
dudmuck 335:b4678b054027 315 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 316 hirda->State = HAL_IRDA_STATE_RESET;
dudmuck 335:b4678b054027 317
dudmuck 335:b4678b054027 318 /* Release Lock */
dudmuck 335:b4678b054027 319 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 320
dudmuck 335:b4678b054027 321 return HAL_OK;
dudmuck 335:b4678b054027 322 }
dudmuck 335:b4678b054027 323
dudmuck 335:b4678b054027 324 /**
dudmuck 335:b4678b054027 325 * @brief IRDA MSP Init.
dudmuck 335:b4678b054027 326 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 327 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 328 * @retval None
dudmuck 335:b4678b054027 329 */
dudmuck 335:b4678b054027 330 __weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 331 {
dudmuck 335:b4678b054027 332 /* NOTE: This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 333 the HAL_IRDA_MspInit can be implemented in the user file
dudmuck 335:b4678b054027 334 */
dudmuck 335:b4678b054027 335 }
dudmuck 335:b4678b054027 336
dudmuck 335:b4678b054027 337 /**
dudmuck 335:b4678b054027 338 * @brief IRDA MSP DeInit.
dudmuck 335:b4678b054027 339 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 340 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 341 * @retval None
dudmuck 335:b4678b054027 342 */
dudmuck 335:b4678b054027 343 __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 344 {
dudmuck 335:b4678b054027 345 /* NOTE: This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 346 the HAL_IRDA_MspDeInit can be implemented in the user file
dudmuck 335:b4678b054027 347 */
dudmuck 335:b4678b054027 348 }
dudmuck 335:b4678b054027 349
dudmuck 335:b4678b054027 350 /**
dudmuck 335:b4678b054027 351 * @}
dudmuck 335:b4678b054027 352 */
dudmuck 335:b4678b054027 353
dudmuck 335:b4678b054027 354 /** @defgroup IRDA_Exported_Functions_Group2 IO operation functions
dudmuck 335:b4678b054027 355 * @brief IRDA Transmit and Receive functions
dudmuck 335:b4678b054027 356 *
dudmuck 335:b4678b054027 357 @verbatim
dudmuck 335:b4678b054027 358 ==============================================================================
dudmuck 335:b4678b054027 359 ##### IO operation functions #####
dudmuck 335:b4678b054027 360 ==============================================================================
dudmuck 335:b4678b054027 361 [..]
dudmuck 335:b4678b054027 362 This subsection provides a set of functions allowing to manage the IRDA data transfers.
dudmuck 335:b4678b054027 363
dudmuck 335:b4678b054027 364 [..]
dudmuck 335:b4678b054027 365 IrDA is a half duplex communication protocol. If the Transmitter is busy, any data
dudmuck 335:b4678b054027 366 on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver
dudmuck 335:b4678b054027 367 is busy, data on the TX from the USART to IrDA will not be encoded by IrDA.
dudmuck 335:b4678b054027 368 While receiving data, transmission should be avoided as the data to be transmitted
dudmuck 335:b4678b054027 369 could be corrupted.
dudmuck 335:b4678b054027 370
dudmuck 335:b4678b054027 371 (#) There are two modes of transfer:
dudmuck 335:b4678b054027 372 (++) Blocking mode: The communication is performed in polling mode.
dudmuck 335:b4678b054027 373 The HAL status of all data processing is returned by the same function
dudmuck 335:b4678b054027 374 after finishing transfer.
dudmuck 335:b4678b054027 375 (++) No-Blocking mode: The communication is performed using Interrupts
dudmuck 335:b4678b054027 376 or DMA, These API's return the HAL status.
dudmuck 335:b4678b054027 377 The end of the data processing will be indicated through the
dudmuck 335:b4678b054027 378 dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when
dudmuck 335:b4678b054027 379 using DMA mode.
dudmuck 335:b4678b054027 380 The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks
dudmuck 335:b4678b054027 381 will be executed respectivelly at the end of the transmit or Receive process
dudmuck 335:b4678b054027 382 The HAL_IRDA_ErrorCallback() user callback will be executed when a communication
dudmuck 335:b4678b054027 383 error is detected
dudmuck 335:b4678b054027 384
dudmuck 335:b4678b054027 385 (#) Blocking mode APIs are :
dudmuck 335:b4678b054027 386 (++) HAL_IRDA_Transmit()
dudmuck 335:b4678b054027 387 (++) HAL_IRDA_Receive()
dudmuck 335:b4678b054027 388
dudmuck 335:b4678b054027 389 (#) Non Blocking mode APIs with Interrupt are :
dudmuck 335:b4678b054027 390 (++) HAL_IRDA_Transmit_IT()
dudmuck 335:b4678b054027 391 (++) HAL_IRDA_Receive_IT()
dudmuck 335:b4678b054027 392 (++) HAL_IRDA_IRQHandler()
dudmuck 335:b4678b054027 393
dudmuck 335:b4678b054027 394 (#) Non Blocking mode functions with DMA are :
dudmuck 335:b4678b054027 395 (++) HAL_IRDA_Transmit_DMA()
dudmuck 335:b4678b054027 396 (++) HAL_IRDA_Receive_DMA()
dudmuck 335:b4678b054027 397 (++) HAL_IRDA_DMAPause()
dudmuck 335:b4678b054027 398 (++) HAL_IRDA_DMAResume()
dudmuck 335:b4678b054027 399 (++) HAL_IRDA_DMAStop()
dudmuck 335:b4678b054027 400
dudmuck 335:b4678b054027 401 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
dudmuck 335:b4678b054027 402 (++) HAL_IRDA_TxHalfCpltCallback()
dudmuck 335:b4678b054027 403 (++) HAL_IRDA_TxCpltCallback()
dudmuck 335:b4678b054027 404 (++) HAL_IRDA_RxHalfCpltCallback()
dudmuck 335:b4678b054027 405 (++) HAL_IRDA_RxCpltCallback()
dudmuck 335:b4678b054027 406 (++) HAL_IRDA_ErrorCallback()
dudmuck 335:b4678b054027 407
dudmuck 335:b4678b054027 408 @endverbatim
dudmuck 335:b4678b054027 409 * @{
dudmuck 335:b4678b054027 410 */
dudmuck 335:b4678b054027 411
dudmuck 335:b4678b054027 412 /**
dudmuck 335:b4678b054027 413 * @brief Sends an amount of data in blocking mode.
dudmuck 335:b4678b054027 414 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 415 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 416 * @param pData: Pointer to data buffer
dudmuck 335:b4678b054027 417 * @param Size: Amount of data to be sent
dudmuck 335:b4678b054027 418 * @param Timeout: Specify timeout value
dudmuck 335:b4678b054027 419 * @retval HAL status
dudmuck 335:b4678b054027 420 */
dudmuck 335:b4678b054027 421 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
dudmuck 335:b4678b054027 422 {
dudmuck 335:b4678b054027 423 uint16_t* tmp = 0;
dudmuck 335:b4678b054027 424 uint32_t tmp1 = 0;
dudmuck 335:b4678b054027 425
dudmuck 335:b4678b054027 426 tmp1 = hirda->State;
dudmuck 335:b4678b054027 427 if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX))
dudmuck 335:b4678b054027 428 {
dudmuck 335:b4678b054027 429 if((pData == HAL_NULL) || (Size == 0))
dudmuck 335:b4678b054027 430 {
dudmuck 335:b4678b054027 431 return HAL_ERROR;
dudmuck 335:b4678b054027 432 }
dudmuck 335:b4678b054027 433
dudmuck 335:b4678b054027 434 /* Process Locked */
dudmuck 335:b4678b054027 435 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 436
dudmuck 335:b4678b054027 437 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 438 if(hirda->State == HAL_IRDA_STATE_BUSY_RX)
dudmuck 335:b4678b054027 439 {
dudmuck 335:b4678b054027 440 hirda->State = HAL_IRDA_STATE_BUSY_TX_RX;
dudmuck 335:b4678b054027 441 }
dudmuck 335:b4678b054027 442 else
dudmuck 335:b4678b054027 443 {
dudmuck 335:b4678b054027 444 hirda->State = HAL_IRDA_STATE_BUSY_TX;
dudmuck 335:b4678b054027 445 }
dudmuck 335:b4678b054027 446
dudmuck 335:b4678b054027 447 hirda->TxXferSize = Size;
dudmuck 335:b4678b054027 448 hirda->TxXferCount = Size;
dudmuck 335:b4678b054027 449 while(hirda->TxXferCount > 0)
dudmuck 335:b4678b054027 450 {
dudmuck 335:b4678b054027 451 if(hirda->Init.WordLength == IRDA_WORDLENGTH_9B)
dudmuck 335:b4678b054027 452 {
dudmuck 335:b4678b054027 453 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, Timeout) != HAL_OK)
dudmuck 335:b4678b054027 454 {
dudmuck 335:b4678b054027 455 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 456 }
dudmuck 335:b4678b054027 457 tmp = (uint16_t*) pData;
dudmuck 335:b4678b054027 458 WRITE_REG(hirda->Instance->DR,(*tmp & IRDA_DR_MASK_U16_9DATABITS));
dudmuck 335:b4678b054027 459 if(hirda->Init.Parity == IRDA_PARITY_NONE)
dudmuck 335:b4678b054027 460 {
dudmuck 335:b4678b054027 461 pData +=2;
dudmuck 335:b4678b054027 462 }
dudmuck 335:b4678b054027 463 else
dudmuck 335:b4678b054027 464 {
dudmuck 335:b4678b054027 465 pData +=1;
dudmuck 335:b4678b054027 466 }
dudmuck 335:b4678b054027 467 }
dudmuck 335:b4678b054027 468 else
dudmuck 335:b4678b054027 469 {
dudmuck 335:b4678b054027 470 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, Timeout) != HAL_OK)
dudmuck 335:b4678b054027 471 {
dudmuck 335:b4678b054027 472 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 473 }
dudmuck 335:b4678b054027 474 WRITE_REG(hirda->Instance->DR, (*pData++ & IRDA_DR_MASK_U8_8DATABITS));
dudmuck 335:b4678b054027 475 }
dudmuck 335:b4678b054027 476 hirda->TxXferCount--;
dudmuck 335:b4678b054027 477 }
dudmuck 335:b4678b054027 478
dudmuck 335:b4678b054027 479 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, Timeout) != HAL_OK)
dudmuck 335:b4678b054027 480 {
dudmuck 335:b4678b054027 481 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 482 }
dudmuck 335:b4678b054027 483
dudmuck 335:b4678b054027 484 if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 485 {
dudmuck 335:b4678b054027 486 hirda->State = HAL_IRDA_STATE_BUSY_RX;
dudmuck 335:b4678b054027 487 }
dudmuck 335:b4678b054027 488 else
dudmuck 335:b4678b054027 489 {
dudmuck 335:b4678b054027 490 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 491 }
dudmuck 335:b4678b054027 492
dudmuck 335:b4678b054027 493 /* Process Unlocked */
dudmuck 335:b4678b054027 494 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 495
dudmuck 335:b4678b054027 496 return HAL_OK;
dudmuck 335:b4678b054027 497 }
dudmuck 335:b4678b054027 498 else
dudmuck 335:b4678b054027 499 {
dudmuck 335:b4678b054027 500 return HAL_BUSY;
dudmuck 335:b4678b054027 501 }
dudmuck 335:b4678b054027 502 }
dudmuck 335:b4678b054027 503
dudmuck 335:b4678b054027 504 /**
dudmuck 335:b4678b054027 505 * @brief Receive an amount of data in blocking mode.
dudmuck 335:b4678b054027 506 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 507 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 508 * @param pData: Pointer to data buffer
dudmuck 335:b4678b054027 509 * @param Size: Amount of data to be received
dudmuck 335:b4678b054027 510 * @param Timeout: Specify timeout value
dudmuck 335:b4678b054027 511 * @retval HAL status
dudmuck 335:b4678b054027 512 */
dudmuck 335:b4678b054027 513 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
dudmuck 335:b4678b054027 514 {
dudmuck 335:b4678b054027 515 uint16_t* tmp = 0;
dudmuck 335:b4678b054027 516 uint32_t tmp1 = 0;
dudmuck 335:b4678b054027 517
dudmuck 335:b4678b054027 518 tmp1 = hirda->State;
dudmuck 335:b4678b054027 519 if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX))
dudmuck 335:b4678b054027 520 {
dudmuck 335:b4678b054027 521 if((pData == HAL_NULL) || (Size == 0))
dudmuck 335:b4678b054027 522 {
dudmuck 335:b4678b054027 523 return HAL_ERROR;
dudmuck 335:b4678b054027 524 }
dudmuck 335:b4678b054027 525
dudmuck 335:b4678b054027 526 /* Process Locked */
dudmuck 335:b4678b054027 527 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 528
dudmuck 335:b4678b054027 529 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 530 if(hirda->State == HAL_IRDA_STATE_BUSY_TX)
dudmuck 335:b4678b054027 531 {
dudmuck 335:b4678b054027 532 hirda->State = HAL_IRDA_STATE_BUSY_TX_RX;
dudmuck 335:b4678b054027 533 }
dudmuck 335:b4678b054027 534 else
dudmuck 335:b4678b054027 535 {
dudmuck 335:b4678b054027 536 hirda->State = HAL_IRDA_STATE_BUSY_RX;
dudmuck 335:b4678b054027 537 }
dudmuck 335:b4678b054027 538 hirda->RxXferSize = Size;
dudmuck 335:b4678b054027 539 hirda->RxXferCount = Size;
dudmuck 335:b4678b054027 540 /* Check the remain data to be received */
dudmuck 335:b4678b054027 541 while(hirda->RxXferCount > 0)
dudmuck 335:b4678b054027 542 {
dudmuck 335:b4678b054027 543 if(hirda->Init.WordLength == IRDA_WORDLENGTH_9B)
dudmuck 335:b4678b054027 544 {
dudmuck 335:b4678b054027 545 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, Timeout) != HAL_OK)
dudmuck 335:b4678b054027 546 {
dudmuck 335:b4678b054027 547 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 548 }
dudmuck 335:b4678b054027 549 tmp = (uint16_t*) pData ;
dudmuck 335:b4678b054027 550 if(hirda->Init.Parity == IRDA_PARITY_NONE)
dudmuck 335:b4678b054027 551 {
dudmuck 335:b4678b054027 552 *tmp = (uint16_t)(hirda->Instance->DR & IRDA_DR_MASK_U16_9DATABITS);
dudmuck 335:b4678b054027 553 pData +=2;
dudmuck 335:b4678b054027 554 }
dudmuck 335:b4678b054027 555 else
dudmuck 335:b4678b054027 556 {
dudmuck 335:b4678b054027 557 *tmp = (uint16_t)(hirda->Instance->DR & IRDA_DR_MASK_U16_8DATABITS);
dudmuck 335:b4678b054027 558 pData +=1;
dudmuck 335:b4678b054027 559 }
dudmuck 335:b4678b054027 560 }
dudmuck 335:b4678b054027 561 else
dudmuck 335:b4678b054027 562 {
dudmuck 335:b4678b054027 563 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, Timeout) != HAL_OK)
dudmuck 335:b4678b054027 564 {
dudmuck 335:b4678b054027 565 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 566 }
dudmuck 335:b4678b054027 567 if(hirda->Init.Parity == IRDA_PARITY_NONE)
dudmuck 335:b4678b054027 568 {
dudmuck 335:b4678b054027 569 *pData++ = (uint8_t)(hirda->Instance->DR & IRDA_DR_MASK_U8_8DATABITS);
dudmuck 335:b4678b054027 570 }
dudmuck 335:b4678b054027 571 else
dudmuck 335:b4678b054027 572 {
dudmuck 335:b4678b054027 573 *pData++ = (uint8_t)(hirda->Instance->DR & IRDA_DR_MASK_U8_7DATABITS);
dudmuck 335:b4678b054027 574 }
dudmuck 335:b4678b054027 575 }
dudmuck 335:b4678b054027 576 hirda->RxXferCount--;
dudmuck 335:b4678b054027 577 }
dudmuck 335:b4678b054027 578 if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 579 {
dudmuck 335:b4678b054027 580 hirda->State = HAL_IRDA_STATE_BUSY_TX;
dudmuck 335:b4678b054027 581 }
dudmuck 335:b4678b054027 582 else
dudmuck 335:b4678b054027 583 {
dudmuck 335:b4678b054027 584 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 585 }
dudmuck 335:b4678b054027 586
dudmuck 335:b4678b054027 587 /* Process Unlocked */
dudmuck 335:b4678b054027 588 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 589
dudmuck 335:b4678b054027 590 return HAL_OK;
dudmuck 335:b4678b054027 591 }
dudmuck 335:b4678b054027 592 else
dudmuck 335:b4678b054027 593 {
dudmuck 335:b4678b054027 594 return HAL_BUSY;
dudmuck 335:b4678b054027 595 }
dudmuck 335:b4678b054027 596 }
dudmuck 335:b4678b054027 597
dudmuck 335:b4678b054027 598 /**
dudmuck 335:b4678b054027 599 * @brief Sends an amount of data in non-blocking mode.
dudmuck 335:b4678b054027 600 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 601 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 602 * @param pData: Pointer to data buffer
dudmuck 335:b4678b054027 603 * @param Size: Amount of data to be sent
dudmuck 335:b4678b054027 604 * @retval HAL status
dudmuck 335:b4678b054027 605 */
dudmuck 335:b4678b054027 606 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
dudmuck 335:b4678b054027 607 {
dudmuck 335:b4678b054027 608 uint32_t tmp = 0;
dudmuck 335:b4678b054027 609
dudmuck 335:b4678b054027 610 tmp = hirda->State;
dudmuck 335:b4678b054027 611 if((tmp == HAL_IRDA_STATE_READY) || (tmp == HAL_IRDA_STATE_BUSY_RX))
dudmuck 335:b4678b054027 612 {
dudmuck 335:b4678b054027 613 if((pData == HAL_NULL) || (Size == 0))
dudmuck 335:b4678b054027 614 {
dudmuck 335:b4678b054027 615 return HAL_ERROR;
dudmuck 335:b4678b054027 616 }
dudmuck 335:b4678b054027 617 /* Process Locked */
dudmuck 335:b4678b054027 618 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 619
dudmuck 335:b4678b054027 620 hirda->pTxBuffPtr = pData;
dudmuck 335:b4678b054027 621 hirda->TxXferSize = Size;
dudmuck 335:b4678b054027 622 hirda->TxXferCount = Size;
dudmuck 335:b4678b054027 623
dudmuck 335:b4678b054027 624 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 625 if(hirda->State == HAL_IRDA_STATE_BUSY_RX)
dudmuck 335:b4678b054027 626 {
dudmuck 335:b4678b054027 627 hirda->State = HAL_IRDA_STATE_BUSY_TX_RX;
dudmuck 335:b4678b054027 628 }
dudmuck 335:b4678b054027 629 else
dudmuck 335:b4678b054027 630 {
dudmuck 335:b4678b054027 631 hirda->State = HAL_IRDA_STATE_BUSY_TX;
dudmuck 335:b4678b054027 632 }
dudmuck 335:b4678b054027 633
dudmuck 335:b4678b054027 634 /* Enable the IRDA Parity Error Interrupt */
dudmuck 335:b4678b054027 635 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 636
dudmuck 335:b4678b054027 637 /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
dudmuck 335:b4678b054027 638 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 639
dudmuck 335:b4678b054027 640 /* Process Unlocked */
dudmuck 335:b4678b054027 641 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 642
dudmuck 335:b4678b054027 643 /* Enable the IRDA Transmit Data Register Empty Interrupt */
dudmuck 335:b4678b054027 644 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_TXE);
dudmuck 335:b4678b054027 645
dudmuck 335:b4678b054027 646 return HAL_OK;
dudmuck 335:b4678b054027 647 }
dudmuck 335:b4678b054027 648 else
dudmuck 335:b4678b054027 649 {
dudmuck 335:b4678b054027 650 return HAL_BUSY;
dudmuck 335:b4678b054027 651 }
dudmuck 335:b4678b054027 652 }
dudmuck 335:b4678b054027 653
dudmuck 335:b4678b054027 654 /**
dudmuck 335:b4678b054027 655 * @brief Receives an amount of data in non-blocking mode.
dudmuck 335:b4678b054027 656 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 657 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 658 * @param pData: Pointer to data buffer
dudmuck 335:b4678b054027 659 * @param Size: Amount of data to be received
dudmuck 335:b4678b054027 660 * @retval HAL status
dudmuck 335:b4678b054027 661 */
dudmuck 335:b4678b054027 662 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
dudmuck 335:b4678b054027 663 {
dudmuck 335:b4678b054027 664 uint32_t tmp = 0;
dudmuck 335:b4678b054027 665
dudmuck 335:b4678b054027 666 tmp = hirda->State;
dudmuck 335:b4678b054027 667 if((tmp == HAL_IRDA_STATE_READY) || (tmp == HAL_IRDA_STATE_BUSY_TX))
dudmuck 335:b4678b054027 668 {
dudmuck 335:b4678b054027 669 if((pData == HAL_NULL) || (Size == 0))
dudmuck 335:b4678b054027 670 {
dudmuck 335:b4678b054027 671 return HAL_ERROR;
dudmuck 335:b4678b054027 672 }
dudmuck 335:b4678b054027 673
dudmuck 335:b4678b054027 674 /* Process Locked */
dudmuck 335:b4678b054027 675 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 676
dudmuck 335:b4678b054027 677 hirda->pRxBuffPtr = pData;
dudmuck 335:b4678b054027 678 hirda->RxXferSize = Size;
dudmuck 335:b4678b054027 679 hirda->RxXferCount = Size;
dudmuck 335:b4678b054027 680
dudmuck 335:b4678b054027 681 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 682 if(hirda->State == HAL_IRDA_STATE_BUSY_TX)
dudmuck 335:b4678b054027 683 {
dudmuck 335:b4678b054027 684 hirda->State = HAL_IRDA_STATE_BUSY_TX_RX;
dudmuck 335:b4678b054027 685 }
dudmuck 335:b4678b054027 686 else
dudmuck 335:b4678b054027 687 {
dudmuck 335:b4678b054027 688 hirda->State = HAL_IRDA_STATE_BUSY_RX;
dudmuck 335:b4678b054027 689 }
dudmuck 335:b4678b054027 690
dudmuck 335:b4678b054027 691 /* Enable the IRDA Data Register not empty Interrupt */
dudmuck 335:b4678b054027 692 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_RXNE);
dudmuck 335:b4678b054027 693
dudmuck 335:b4678b054027 694 /* Enable the IRDA Parity Error Interrupt */
dudmuck 335:b4678b054027 695 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 696
dudmuck 335:b4678b054027 697 /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
dudmuck 335:b4678b054027 698 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 699
dudmuck 335:b4678b054027 700 /* Process Unlocked */
dudmuck 335:b4678b054027 701 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 702
dudmuck 335:b4678b054027 703 return HAL_OK;
dudmuck 335:b4678b054027 704 }
dudmuck 335:b4678b054027 705 else
dudmuck 335:b4678b054027 706 {
dudmuck 335:b4678b054027 707 return HAL_BUSY;
dudmuck 335:b4678b054027 708 }
dudmuck 335:b4678b054027 709 }
dudmuck 335:b4678b054027 710
dudmuck 335:b4678b054027 711 /**
dudmuck 335:b4678b054027 712 * @brief Sends an amount of data in non-blocking mode.
dudmuck 335:b4678b054027 713 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 714 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 715 * @param pData: Pointer to data buffer
dudmuck 335:b4678b054027 716 * @param Size: Amount of data to be sent
dudmuck 335:b4678b054027 717 * @retval HAL status
dudmuck 335:b4678b054027 718 */
dudmuck 335:b4678b054027 719 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
dudmuck 335:b4678b054027 720 {
dudmuck 335:b4678b054027 721 uint32_t *tmp = 0;
dudmuck 335:b4678b054027 722 uint32_t tmp1 = 0;
dudmuck 335:b4678b054027 723
dudmuck 335:b4678b054027 724 tmp1 = hirda->State;
dudmuck 335:b4678b054027 725 if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX))
dudmuck 335:b4678b054027 726 {
dudmuck 335:b4678b054027 727 if((pData == HAL_NULL) || (Size == 0))
dudmuck 335:b4678b054027 728 {
dudmuck 335:b4678b054027 729 return HAL_ERROR;
dudmuck 335:b4678b054027 730 }
dudmuck 335:b4678b054027 731
dudmuck 335:b4678b054027 732 /* Process Locked */
dudmuck 335:b4678b054027 733 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 734
dudmuck 335:b4678b054027 735 hirda->pTxBuffPtr = pData;
dudmuck 335:b4678b054027 736 hirda->TxXferSize = Size;
dudmuck 335:b4678b054027 737 hirda->TxXferCount = Size;
dudmuck 335:b4678b054027 738 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 739
dudmuck 335:b4678b054027 740 if(hirda->State == HAL_IRDA_STATE_BUSY_RX)
dudmuck 335:b4678b054027 741 {
dudmuck 335:b4678b054027 742 hirda->State = HAL_IRDA_STATE_BUSY_TX_RX;
dudmuck 335:b4678b054027 743 }
dudmuck 335:b4678b054027 744 else
dudmuck 335:b4678b054027 745 {
dudmuck 335:b4678b054027 746 hirda->State = HAL_IRDA_STATE_BUSY_TX;
dudmuck 335:b4678b054027 747 }
dudmuck 335:b4678b054027 748
dudmuck 335:b4678b054027 749 /* Set the IRDA DMA transfer complete callback */
dudmuck 335:b4678b054027 750 hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;
dudmuck 335:b4678b054027 751
dudmuck 335:b4678b054027 752 /* Set the IRDA DMA half transfert complete callback */
dudmuck 335:b4678b054027 753 hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;
dudmuck 335:b4678b054027 754
dudmuck 335:b4678b054027 755 /* Set the DMA error callback */
dudmuck 335:b4678b054027 756 hirda->hdmatx->XferErrorCallback = IRDA_DMAError;
dudmuck 335:b4678b054027 757
dudmuck 335:b4678b054027 758 /* Enable the IRDA transmit DMA channel */
dudmuck 335:b4678b054027 759 tmp = (uint32_t*)&pData;
dudmuck 335:b4678b054027 760 HAL_DMA_Start_IT(hirda->hdmatx, *(uint32_t*)tmp, (uint32_t)&hirda->Instance->DR, Size);
dudmuck 335:b4678b054027 761
dudmuck 335:b4678b054027 762 /* Enable the DMA transfer for transmit request by setting the DMAT bit
dudmuck 335:b4678b054027 763 in the USART CR3 register */
dudmuck 335:b4678b054027 764 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 765
dudmuck 335:b4678b054027 766 /* Process Unlocked */
dudmuck 335:b4678b054027 767 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 768
dudmuck 335:b4678b054027 769 return HAL_OK;
dudmuck 335:b4678b054027 770 }
dudmuck 335:b4678b054027 771 else
dudmuck 335:b4678b054027 772 {
dudmuck 335:b4678b054027 773 return HAL_BUSY;
dudmuck 335:b4678b054027 774 }
dudmuck 335:b4678b054027 775 }
dudmuck 335:b4678b054027 776
dudmuck 335:b4678b054027 777 /**
dudmuck 335:b4678b054027 778 * @brief Receive an amount of data in non-blocking mode.
dudmuck 335:b4678b054027 779 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 780 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 781 * @param pData: Pointer to data buffer
dudmuck 335:b4678b054027 782 * @param Size: Amount of data to be received
dudmuck 335:b4678b054027 783 * @note When the IRDA parity is enabled (PCE = 1) the data received contain the parity bit.
dudmuck 335:b4678b054027 784 * @retval HAL status
dudmuck 335:b4678b054027 785 */
dudmuck 335:b4678b054027 786 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
dudmuck 335:b4678b054027 787 {
dudmuck 335:b4678b054027 788 uint32_t *tmp = 0;
dudmuck 335:b4678b054027 789 uint32_t tmp1 = 0;
dudmuck 335:b4678b054027 790
dudmuck 335:b4678b054027 791 tmp1 = hirda->State;
dudmuck 335:b4678b054027 792 if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX))
dudmuck 335:b4678b054027 793 {
dudmuck 335:b4678b054027 794 if((pData == HAL_NULL) || (Size == 0))
dudmuck 335:b4678b054027 795 {
dudmuck 335:b4678b054027 796 return HAL_ERROR;
dudmuck 335:b4678b054027 797 }
dudmuck 335:b4678b054027 798
dudmuck 335:b4678b054027 799 /* Process Locked */
dudmuck 335:b4678b054027 800 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 801
dudmuck 335:b4678b054027 802 hirda->pRxBuffPtr = pData;
dudmuck 335:b4678b054027 803 hirda->RxXferSize = Size;
dudmuck 335:b4678b054027 804 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
dudmuck 335:b4678b054027 805 if(hirda->State == HAL_IRDA_STATE_BUSY_TX)
dudmuck 335:b4678b054027 806 {
dudmuck 335:b4678b054027 807 hirda->State = HAL_IRDA_STATE_BUSY_TX_RX;
dudmuck 335:b4678b054027 808 }
dudmuck 335:b4678b054027 809 else
dudmuck 335:b4678b054027 810 {
dudmuck 335:b4678b054027 811 hirda->State = HAL_IRDA_STATE_BUSY_RX;
dudmuck 335:b4678b054027 812 }
dudmuck 335:b4678b054027 813
dudmuck 335:b4678b054027 814 /* Set the IRDA DMA transfer complete callback */
dudmuck 335:b4678b054027 815 hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;
dudmuck 335:b4678b054027 816
dudmuck 335:b4678b054027 817 /* Set the IRDA DMA half transfert complete callback */
dudmuck 335:b4678b054027 818 hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;
dudmuck 335:b4678b054027 819
dudmuck 335:b4678b054027 820 /* Set the DMA error callback */
dudmuck 335:b4678b054027 821 hirda->hdmarx->XferErrorCallback = IRDA_DMAError;
dudmuck 335:b4678b054027 822
dudmuck 335:b4678b054027 823 /* Enable the DMA channel */
dudmuck 335:b4678b054027 824 tmp = (uint32_t*)&pData;
dudmuck 335:b4678b054027 825 HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->DR, *(uint32_t*)tmp, Size);
dudmuck 335:b4678b054027 826
dudmuck 335:b4678b054027 827 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
dudmuck 335:b4678b054027 828 in the USART CR3 register */
dudmuck 335:b4678b054027 829 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 830
dudmuck 335:b4678b054027 831 /* Process Unlocked */
dudmuck 335:b4678b054027 832 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 833
dudmuck 335:b4678b054027 834 return HAL_OK;
dudmuck 335:b4678b054027 835 }
dudmuck 335:b4678b054027 836 else
dudmuck 335:b4678b054027 837 {
dudmuck 335:b4678b054027 838 return HAL_BUSY;
dudmuck 335:b4678b054027 839 }
dudmuck 335:b4678b054027 840 }
dudmuck 335:b4678b054027 841
dudmuck 335:b4678b054027 842 /**
dudmuck 335:b4678b054027 843 * @brief Pauses the DMA Transfer.
dudmuck 335:b4678b054027 844 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 845 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 846 * @retval HAL status
dudmuck 335:b4678b054027 847 */
dudmuck 335:b4678b054027 848 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 849 {
dudmuck 335:b4678b054027 850 /* Process Locked */
dudmuck 335:b4678b054027 851 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 852
dudmuck 335:b4678b054027 853 if(hirda->State == HAL_IRDA_STATE_BUSY_TX)
dudmuck 335:b4678b054027 854 {
dudmuck 335:b4678b054027 855 /* Disable the UART DMA Tx request */
dudmuck 335:b4678b054027 856 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 857 }
dudmuck 335:b4678b054027 858 else if(hirda->State == HAL_IRDA_STATE_BUSY_RX)
dudmuck 335:b4678b054027 859 {
dudmuck 335:b4678b054027 860 /* Disable the UART DMA Rx request */
dudmuck 335:b4678b054027 861 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 862 }
dudmuck 335:b4678b054027 863 else if (hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 864 {
dudmuck 335:b4678b054027 865 /* Disable the UART DMA Tx & Rx requests */
dudmuck 335:b4678b054027 866 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 867 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 868 }
dudmuck 335:b4678b054027 869 else
dudmuck 335:b4678b054027 870 {
dudmuck 335:b4678b054027 871 /* Process Unlocked */
dudmuck 335:b4678b054027 872 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 873
dudmuck 335:b4678b054027 874 return HAL_ERROR;
dudmuck 335:b4678b054027 875 }
dudmuck 335:b4678b054027 876
dudmuck 335:b4678b054027 877 /* Process Unlocked */
dudmuck 335:b4678b054027 878 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 879
dudmuck 335:b4678b054027 880 return HAL_OK;
dudmuck 335:b4678b054027 881 }
dudmuck 335:b4678b054027 882
dudmuck 335:b4678b054027 883 /**
dudmuck 335:b4678b054027 884 * @brief Resumes the DMA Transfer.
dudmuck 335:b4678b054027 885 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 886 * the configuration information for the specified UART module.
dudmuck 335:b4678b054027 887 * @retval HAL status
dudmuck 335:b4678b054027 888 */
dudmuck 335:b4678b054027 889 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 890 {
dudmuck 335:b4678b054027 891 /* Process Locked */
dudmuck 335:b4678b054027 892 __HAL_LOCK(hirda);
dudmuck 335:b4678b054027 893
dudmuck 335:b4678b054027 894 if(hirda->State == HAL_IRDA_STATE_BUSY_TX)
dudmuck 335:b4678b054027 895 {
dudmuck 335:b4678b054027 896 /* Enable the UART DMA Tx request */
dudmuck 335:b4678b054027 897 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 898 }
dudmuck 335:b4678b054027 899 else if(hirda->State == HAL_IRDA_STATE_BUSY_RX)
dudmuck 335:b4678b054027 900 {
dudmuck 335:b4678b054027 901 /* Clear the Overrun flag before resumming the Rx transfer*/
dudmuck 335:b4678b054027 902 __HAL_IRDA_CLEAR_OREFLAG(hirda);
dudmuck 335:b4678b054027 903 /* Enable the UART DMA Rx request */
dudmuck 335:b4678b054027 904 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 905 }
dudmuck 335:b4678b054027 906 else if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 907 {
dudmuck 335:b4678b054027 908 /* Clear the Overrun flag before resumming the Rx transfer*/
dudmuck 335:b4678b054027 909 __HAL_IRDA_CLEAR_OREFLAG(hirda);
dudmuck 335:b4678b054027 910 /* Enable the UART DMA Tx & Rx request */
dudmuck 335:b4678b054027 911 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 912 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 913 }
dudmuck 335:b4678b054027 914 else
dudmuck 335:b4678b054027 915 {
dudmuck 335:b4678b054027 916 /* Process Unlocked */
dudmuck 335:b4678b054027 917 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 918
dudmuck 335:b4678b054027 919 return HAL_ERROR;
dudmuck 335:b4678b054027 920 }
dudmuck 335:b4678b054027 921
dudmuck 335:b4678b054027 922 /* Process Unlocked */
dudmuck 335:b4678b054027 923 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 924
dudmuck 335:b4678b054027 925 return HAL_OK;
dudmuck 335:b4678b054027 926 }
dudmuck 335:b4678b054027 927
dudmuck 335:b4678b054027 928 /**
dudmuck 335:b4678b054027 929 * @brief Stops the DMA Transfer.
dudmuck 335:b4678b054027 930 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 931 * the configuration information for the specified UART module.
dudmuck 335:b4678b054027 932 * @retval HAL status
dudmuck 335:b4678b054027 933 */
dudmuck 335:b4678b054027 934 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 935 {
dudmuck 335:b4678b054027 936 /* The Lock is not implemented on this API to allow the user application
dudmuck 335:b4678b054027 937 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
dudmuck 335:b4678b054027 938 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
dudmuck 335:b4678b054027 939 and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
dudmuck 335:b4678b054027 940 */
dudmuck 335:b4678b054027 941
dudmuck 335:b4678b054027 942 /* Disable the UART Tx/Rx DMA requests */
dudmuck 335:b4678b054027 943 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 944 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 945
dudmuck 335:b4678b054027 946 /* Abort the UART DMA tx channel */
dudmuck 335:b4678b054027 947 if(hirda->hdmatx != HAL_NULL)
dudmuck 335:b4678b054027 948 {
dudmuck 335:b4678b054027 949 HAL_DMA_Abort(hirda->hdmatx);
dudmuck 335:b4678b054027 950 }
dudmuck 335:b4678b054027 951 /* Abort the UART DMA rx channel */
dudmuck 335:b4678b054027 952 if(hirda->hdmarx != HAL_NULL)
dudmuck 335:b4678b054027 953 {
dudmuck 335:b4678b054027 954 HAL_DMA_Abort(hirda->hdmarx);
dudmuck 335:b4678b054027 955 }
dudmuck 335:b4678b054027 956
dudmuck 335:b4678b054027 957 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 958
dudmuck 335:b4678b054027 959 return HAL_OK;
dudmuck 335:b4678b054027 960 }
dudmuck 335:b4678b054027 961
dudmuck 335:b4678b054027 962 /**
dudmuck 335:b4678b054027 963 * @brief This function handles IRDA interrupt request.
dudmuck 335:b4678b054027 964 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 965 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 966 * @retval None
dudmuck 335:b4678b054027 967 */
dudmuck 335:b4678b054027 968 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 969 {
dudmuck 335:b4678b054027 970 uint32_t tmp1 = 0, tmp2 = 0;
dudmuck 335:b4678b054027 971
dudmuck 335:b4678b054027 972 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_PE);
dudmuck 335:b4678b054027 973 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 974 /* IRDA parity error interrupt occurred -----------------------------------*/
dudmuck 335:b4678b054027 975 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 976 {
dudmuck 335:b4678b054027 977 __HAL_IRDA_CLEAR_PEFLAG(hirda);
dudmuck 335:b4678b054027 978 hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
dudmuck 335:b4678b054027 979 }
dudmuck 335:b4678b054027 980
dudmuck 335:b4678b054027 981 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_FE);
dudmuck 335:b4678b054027 982 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 983 /* IRDA frame error interrupt occurred ------------------------------------*/
dudmuck 335:b4678b054027 984 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 985 {
dudmuck 335:b4678b054027 986 __HAL_IRDA_CLEAR_FEFLAG(hirda);
dudmuck 335:b4678b054027 987 hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
dudmuck 335:b4678b054027 988 }
dudmuck 335:b4678b054027 989
dudmuck 335:b4678b054027 990 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_NE);
dudmuck 335:b4678b054027 991 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 992 /* IRDA noise error interrupt occurred ------------------------------------*/
dudmuck 335:b4678b054027 993 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 994 {
dudmuck 335:b4678b054027 995 __HAL_IRDA_CLEAR_NEFLAG(hirda);
dudmuck 335:b4678b054027 996 hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
dudmuck 335:b4678b054027 997 }
dudmuck 335:b4678b054027 998
dudmuck 335:b4678b054027 999 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_ORE);
dudmuck 335:b4678b054027 1000 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 1001 /* IRDA Over-Run interrupt occurred ---------------------------------------*/
dudmuck 335:b4678b054027 1002 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 1003 {
dudmuck 335:b4678b054027 1004 __HAL_IRDA_CLEAR_OREFLAG(hirda);
dudmuck 335:b4678b054027 1005 hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
dudmuck 335:b4678b054027 1006 }
dudmuck 335:b4678b054027 1007
dudmuck 335:b4678b054027 1008 /* Call the Error call Back in case of Errors */
dudmuck 335:b4678b054027 1009 if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
dudmuck 335:b4678b054027 1010 {
dudmuck 335:b4678b054027 1011 /* Disable PE and ERR interrupt */
dudmuck 335:b4678b054027 1012 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 1013 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 1014 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE);
dudmuck 335:b4678b054027 1015
dudmuck 335:b4678b054027 1016 /* Set the IRDA state ready to be able to start again the process */
dudmuck 335:b4678b054027 1017 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1018 HAL_IRDA_ErrorCallback(hirda);
dudmuck 335:b4678b054027 1019 }
dudmuck 335:b4678b054027 1020
dudmuck 335:b4678b054027 1021 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_RXNE);
dudmuck 335:b4678b054027 1022 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_RXNE);
dudmuck 335:b4678b054027 1023 /* IRDA in mode Receiver --------------------------------------------------*/
dudmuck 335:b4678b054027 1024 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 1025 {
dudmuck 335:b4678b054027 1026 IRDA_Receive_IT(hirda);
dudmuck 335:b4678b054027 1027 }
dudmuck 335:b4678b054027 1028
dudmuck 335:b4678b054027 1029 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_TXE);
dudmuck 335:b4678b054027 1030 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_TXE);
dudmuck 335:b4678b054027 1031 /* IRDA in mode Transmitter -----------------------------------------------*/
dudmuck 335:b4678b054027 1032 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 1033 {
dudmuck 335:b4678b054027 1034 IRDA_Transmit_IT(hirda);
dudmuck 335:b4678b054027 1035 }
dudmuck 335:b4678b054027 1036
dudmuck 335:b4678b054027 1037 tmp1 = __HAL_IRDA_GET_FLAG(hirda, IRDA_FLAG_TC);
dudmuck 335:b4678b054027 1038 tmp2 = __HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_TC);
dudmuck 335:b4678b054027 1039 /* IRDA in mode Transmitter (transmission end) -----------------------------*/
dudmuck 335:b4678b054027 1040 if((tmp1 != RESET) && (tmp2 != RESET))
dudmuck 335:b4678b054027 1041 {
dudmuck 335:b4678b054027 1042 IRDA_EndTransmit_IT(hirda);
dudmuck 335:b4678b054027 1043 }
dudmuck 335:b4678b054027 1044
dudmuck 335:b4678b054027 1045 }
dudmuck 335:b4678b054027 1046
dudmuck 335:b4678b054027 1047 /**
dudmuck 335:b4678b054027 1048 * @brief Tx Transfer completed callbacks.
dudmuck 335:b4678b054027 1049 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1050 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1051 * @retval None
dudmuck 335:b4678b054027 1052 */
dudmuck 335:b4678b054027 1053 __weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1054 {
dudmuck 335:b4678b054027 1055 /* NOTE: This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 1056 the HAL_IRDA_TxCpltCallback can be implemented in the user file
dudmuck 335:b4678b054027 1057 */
dudmuck 335:b4678b054027 1058 }
dudmuck 335:b4678b054027 1059
dudmuck 335:b4678b054027 1060 /**
dudmuck 335:b4678b054027 1061 * @brief Tx Half Transfer completed callbacks.
dudmuck 335:b4678b054027 1062 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1063 * the configuration information for the specified USART module.
dudmuck 335:b4678b054027 1064 * @retval None
dudmuck 335:b4678b054027 1065 */
dudmuck 335:b4678b054027 1066 __weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1067 {
dudmuck 335:b4678b054027 1068 /* NOTE: This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 1069 the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file
dudmuck 335:b4678b054027 1070 */
dudmuck 335:b4678b054027 1071 }
dudmuck 335:b4678b054027 1072
dudmuck 335:b4678b054027 1073 /**
dudmuck 335:b4678b054027 1074 * @brief Rx Transfer completed callbacks.
dudmuck 335:b4678b054027 1075 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1076 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1077 * @retval None
dudmuck 335:b4678b054027 1078 */
dudmuck 335:b4678b054027 1079 __weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1080 {
dudmuck 335:b4678b054027 1081 /* NOTE: This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 1082 the HAL_IRDA_RxCpltCallback can be implemented in the user file
dudmuck 335:b4678b054027 1083 */
dudmuck 335:b4678b054027 1084 }
dudmuck 335:b4678b054027 1085
dudmuck 335:b4678b054027 1086 /**
dudmuck 335:b4678b054027 1087 * @brief Rx Half Transfer complete callbacks.
dudmuck 335:b4678b054027 1088 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1089 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1090 * @retval None
dudmuck 335:b4678b054027 1091 */
dudmuck 335:b4678b054027 1092 __weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1093 {
dudmuck 335:b4678b054027 1094 /* NOTE : This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 1095 the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file
dudmuck 335:b4678b054027 1096 */
dudmuck 335:b4678b054027 1097 }
dudmuck 335:b4678b054027 1098
dudmuck 335:b4678b054027 1099 /**
dudmuck 335:b4678b054027 1100 * @brief IRDA error callbacks.
dudmuck 335:b4678b054027 1101 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1102 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1103 * @retval None
dudmuck 335:b4678b054027 1104 */
dudmuck 335:b4678b054027 1105 __weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1106 {
dudmuck 335:b4678b054027 1107 /* NOTE: This function should not be modified, when the callback is needed,
dudmuck 335:b4678b054027 1108 the HAL_IRDA_ErrorCallback can be implemented in the user file
dudmuck 335:b4678b054027 1109 */
dudmuck 335:b4678b054027 1110 }
dudmuck 335:b4678b054027 1111
dudmuck 335:b4678b054027 1112 /**
dudmuck 335:b4678b054027 1113 * @}
dudmuck 335:b4678b054027 1114 */
dudmuck 335:b4678b054027 1115
dudmuck 335:b4678b054027 1116 /** @defgroup IRDA_Exported_Functions_Group3 Peripheral State and Errors functions
dudmuck 335:b4678b054027 1117 * @brief IRDA State and Errors functions
dudmuck 335:b4678b054027 1118 *
dudmuck 335:b4678b054027 1119 @verbatim
dudmuck 335:b4678b054027 1120 ==============================================================================
dudmuck 335:b4678b054027 1121 ##### Peripheral State and Errors functions #####
dudmuck 335:b4678b054027 1122 ==============================================================================
dudmuck 335:b4678b054027 1123 [..]
dudmuck 335:b4678b054027 1124 This subsection provides a set of functions allowing to return the State of IrDA
dudmuck 335:b4678b054027 1125 communication process and also return Peripheral Errors occurred during communication process
dudmuck 335:b4678b054027 1126 (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state
dudmuck 335:b4678b054027 1127 of the IRDA peripheral.
dudmuck 335:b4678b054027 1128 (+) HAL_IRDA_GetError() check in run-time errors that could be occurred during
dudmuck 335:b4678b054027 1129 communication.
dudmuck 335:b4678b054027 1130
dudmuck 335:b4678b054027 1131 @endverbatim
dudmuck 335:b4678b054027 1132 * @{
dudmuck 335:b4678b054027 1133 */
dudmuck 335:b4678b054027 1134
dudmuck 335:b4678b054027 1135 /**
dudmuck 335:b4678b054027 1136 * @brief Returns the IRDA state.
dudmuck 335:b4678b054027 1137 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1138 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1139 * @retval HAL state
dudmuck 335:b4678b054027 1140 */
dudmuck 335:b4678b054027 1141 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1142 {
dudmuck 335:b4678b054027 1143 return hirda->State;
dudmuck 335:b4678b054027 1144 }
dudmuck 335:b4678b054027 1145
dudmuck 335:b4678b054027 1146 /**
dudmuck 335:b4678b054027 1147 * @brief Return the IRDA error code
dudmuck 335:b4678b054027 1148 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1149 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1150 * @retval IRDA Error Code
dudmuck 335:b4678b054027 1151 */
dudmuck 335:b4678b054027 1152 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1153 {
dudmuck 335:b4678b054027 1154 return hirda->ErrorCode;
dudmuck 335:b4678b054027 1155 }
dudmuck 335:b4678b054027 1156
dudmuck 335:b4678b054027 1157 /**
dudmuck 335:b4678b054027 1158 * @}
dudmuck 335:b4678b054027 1159 */
dudmuck 335:b4678b054027 1160
dudmuck 335:b4678b054027 1161 /**
dudmuck 335:b4678b054027 1162 * @}
dudmuck 335:b4678b054027 1163 */
dudmuck 335:b4678b054027 1164
dudmuck 335:b4678b054027 1165 /** @defgroup IRDA_Private_Functions IRDA Private Functions
dudmuck 335:b4678b054027 1166 * @brief IRDA Private functions
dudmuck 335:b4678b054027 1167 * @{
dudmuck 335:b4678b054027 1168 */
dudmuck 335:b4678b054027 1169 /**
dudmuck 335:b4678b054027 1170 * @brief DMA IRDA transmit process complete callback.
dudmuck 335:b4678b054027 1171 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1172 * the configuration information for the specified DMA module.
dudmuck 335:b4678b054027 1173 * @retval None
dudmuck 335:b4678b054027 1174 */
dudmuck 335:b4678b054027 1175 static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma)
dudmuck 335:b4678b054027 1176 {
dudmuck 335:b4678b054027 1177 IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
dudmuck 335:b4678b054027 1178 /* DMA Normal mode */
dudmuck 335:b4678b054027 1179 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
dudmuck 335:b4678b054027 1180 {
dudmuck 335:b4678b054027 1181 hirda->TxXferCount = 0;
dudmuck 335:b4678b054027 1182
dudmuck 335:b4678b054027 1183 /* Disable the DMA transfer for transmit request by setting the DMAT bit
dudmuck 335:b4678b054027 1184 in the IRDA CR3 register */
dudmuck 335:b4678b054027 1185 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
dudmuck 335:b4678b054027 1186
dudmuck 335:b4678b054027 1187 /* Wait for IRDA TC Flag */
dudmuck 335:b4678b054027 1188 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, IRDA_TIMEOUT_VALUE) != HAL_OK)
dudmuck 335:b4678b054027 1189 {
dudmuck 335:b4678b054027 1190 /* Timeout occurred */
dudmuck 335:b4678b054027 1191 hirda->State = HAL_IRDA_STATE_TIMEOUT;
dudmuck 335:b4678b054027 1192 HAL_IRDA_ErrorCallback(hirda);
dudmuck 335:b4678b054027 1193 }
dudmuck 335:b4678b054027 1194 else
dudmuck 335:b4678b054027 1195 {
dudmuck 335:b4678b054027 1196 /* No Timeout */
dudmuck 335:b4678b054027 1197 /* Check if a receive process is ongoing or not */
dudmuck 335:b4678b054027 1198 if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 1199 {
dudmuck 335:b4678b054027 1200 hirda->State = HAL_IRDA_STATE_BUSY_RX;
dudmuck 335:b4678b054027 1201 }
dudmuck 335:b4678b054027 1202 else
dudmuck 335:b4678b054027 1203 {
dudmuck 335:b4678b054027 1204 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1205 }
dudmuck 335:b4678b054027 1206 HAL_IRDA_TxCpltCallback(hirda);
dudmuck 335:b4678b054027 1207 }
dudmuck 335:b4678b054027 1208 }
dudmuck 335:b4678b054027 1209 /* DMA Circular mode */
dudmuck 335:b4678b054027 1210 else
dudmuck 335:b4678b054027 1211 {
dudmuck 335:b4678b054027 1212 HAL_IRDA_TxCpltCallback(hirda);
dudmuck 335:b4678b054027 1213 }
dudmuck 335:b4678b054027 1214 }
dudmuck 335:b4678b054027 1215
dudmuck 335:b4678b054027 1216 /**
dudmuck 335:b4678b054027 1217 * @brief DMA IRDA receive process half complete callback
dudmuck 335:b4678b054027 1218 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1219 * the configuration information for the specified DMA module.
dudmuck 335:b4678b054027 1220 * @retval None
dudmuck 335:b4678b054027 1221 */
dudmuck 335:b4678b054027 1222 static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
dudmuck 335:b4678b054027 1223 {
dudmuck 335:b4678b054027 1224 IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
dudmuck 335:b4678b054027 1225
dudmuck 335:b4678b054027 1226 HAL_IRDA_TxHalfCpltCallback(hirda);
dudmuck 335:b4678b054027 1227 }
dudmuck 335:b4678b054027 1228
dudmuck 335:b4678b054027 1229 /**
dudmuck 335:b4678b054027 1230 * @brief DMA IRDA receive process complete callback.
dudmuck 335:b4678b054027 1231 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1232 * the configuration information for the specified DMA module.
dudmuck 335:b4678b054027 1233 * @retval None
dudmuck 335:b4678b054027 1234 */
dudmuck 335:b4678b054027 1235 static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
dudmuck 335:b4678b054027 1236 {
dudmuck 335:b4678b054027 1237 IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
dudmuck 335:b4678b054027 1238 /* DMA Normal mode */
dudmuck 335:b4678b054027 1239 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
dudmuck 335:b4678b054027 1240 {
dudmuck 335:b4678b054027 1241 hirda->RxXferCount = 0;
dudmuck 335:b4678b054027 1242
dudmuck 335:b4678b054027 1243 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
dudmuck 335:b4678b054027 1244 in the IRDA CR3 register */
dudmuck 335:b4678b054027 1245 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
dudmuck 335:b4678b054027 1246
dudmuck 335:b4678b054027 1247 if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 1248 {
dudmuck 335:b4678b054027 1249 hirda->State = HAL_IRDA_STATE_BUSY_TX;
dudmuck 335:b4678b054027 1250 }
dudmuck 335:b4678b054027 1251 else
dudmuck 335:b4678b054027 1252 {
dudmuck 335:b4678b054027 1253 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1254 }
dudmuck 335:b4678b054027 1255 }
dudmuck 335:b4678b054027 1256
dudmuck 335:b4678b054027 1257 HAL_IRDA_RxCpltCallback(hirda);
dudmuck 335:b4678b054027 1258 }
dudmuck 335:b4678b054027 1259
dudmuck 335:b4678b054027 1260 /**
dudmuck 335:b4678b054027 1261 * @brief DMA IRDA receive process half complete callback
dudmuck 335:b4678b054027 1262 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1263 * the configuration information for the specified DMA module.
dudmuck 335:b4678b054027 1264 * @retval None
dudmuck 335:b4678b054027 1265 */
dudmuck 335:b4678b054027 1266 static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma)
dudmuck 335:b4678b054027 1267 {
dudmuck 335:b4678b054027 1268 IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
dudmuck 335:b4678b054027 1269
dudmuck 335:b4678b054027 1270 HAL_IRDA_RxHalfCpltCallback(hirda);
dudmuck 335:b4678b054027 1271 }
dudmuck 335:b4678b054027 1272
dudmuck 335:b4678b054027 1273 /**
dudmuck 335:b4678b054027 1274 * @brief DMA IRDA communication error callback.
dudmuck 335:b4678b054027 1275 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1276 * the configuration information for the specified DMA module.
dudmuck 335:b4678b054027 1277 * @retval None
dudmuck 335:b4678b054027 1278 */
dudmuck 335:b4678b054027 1279 static void IRDA_DMAError(DMA_HandleTypeDef *hdma)
dudmuck 335:b4678b054027 1280 {
dudmuck 335:b4678b054027 1281 IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
dudmuck 335:b4678b054027 1282
dudmuck 335:b4678b054027 1283 hirda->RxXferCount = 0;
dudmuck 335:b4678b054027 1284 hirda->TxXferCount = 0;
dudmuck 335:b4678b054027 1285 hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;
dudmuck 335:b4678b054027 1286 hirda->State= HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1287
dudmuck 335:b4678b054027 1288 HAL_IRDA_ErrorCallback(hirda);
dudmuck 335:b4678b054027 1289 }
dudmuck 335:b4678b054027 1290
dudmuck 335:b4678b054027 1291 /**
dudmuck 335:b4678b054027 1292 * @brief This function handles IRDA Communication Timeout.
dudmuck 335:b4678b054027 1293 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1294 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1295 * @param Flag: specifies the IRDA flag to check.
dudmuck 335:b4678b054027 1296 * @param Status: The new Flag status (SET or RESET).
dudmuck 335:b4678b054027 1297 * @param Timeout: Timeout duration
dudmuck 335:b4678b054027 1298 * @retval HAL status
dudmuck 335:b4678b054027 1299 */
dudmuck 335:b4678b054027 1300 static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
dudmuck 335:b4678b054027 1301 {
dudmuck 335:b4678b054027 1302 uint32_t tickstart = 0;
dudmuck 335:b4678b054027 1303
dudmuck 335:b4678b054027 1304 /* Get tick */
dudmuck 335:b4678b054027 1305 tickstart = HAL_GetTick();
dudmuck 335:b4678b054027 1306
dudmuck 335:b4678b054027 1307 /* Wait until flag is set */
dudmuck 335:b4678b054027 1308 if(Status == RESET)
dudmuck 335:b4678b054027 1309 {
dudmuck 335:b4678b054027 1310 while(__HAL_IRDA_GET_FLAG(hirda, Flag) == RESET)
dudmuck 335:b4678b054027 1311 {
dudmuck 335:b4678b054027 1312 /* Check for the Timeout */
dudmuck 335:b4678b054027 1313 if(Timeout != HAL_MAX_DELAY)
dudmuck 335:b4678b054027 1314 {
dudmuck 335:b4678b054027 1315 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
dudmuck 335:b4678b054027 1316 {
dudmuck 335:b4678b054027 1317 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
dudmuck 335:b4678b054027 1318 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE);
dudmuck 335:b4678b054027 1319 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_RXNE);
dudmuck 335:b4678b054027 1320 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 1321 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 1322
dudmuck 335:b4678b054027 1323 hirda->State= HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1324
dudmuck 335:b4678b054027 1325 /* Process Unlocked */
dudmuck 335:b4678b054027 1326 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 1327
dudmuck 335:b4678b054027 1328 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 1329 }
dudmuck 335:b4678b054027 1330 }
dudmuck 335:b4678b054027 1331 }
dudmuck 335:b4678b054027 1332 }
dudmuck 335:b4678b054027 1333 else
dudmuck 335:b4678b054027 1334 {
dudmuck 335:b4678b054027 1335 while(__HAL_IRDA_GET_FLAG(hirda, Flag) != RESET)
dudmuck 335:b4678b054027 1336 {
dudmuck 335:b4678b054027 1337 /* Check for the Timeout */
dudmuck 335:b4678b054027 1338 if(Timeout != HAL_MAX_DELAY)
dudmuck 335:b4678b054027 1339 {
dudmuck 335:b4678b054027 1340 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
dudmuck 335:b4678b054027 1341 {
dudmuck 335:b4678b054027 1342 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
dudmuck 335:b4678b054027 1343 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE);
dudmuck 335:b4678b054027 1344 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_RXNE);
dudmuck 335:b4678b054027 1345 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 1346 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 1347
dudmuck 335:b4678b054027 1348 hirda->State= HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1349
dudmuck 335:b4678b054027 1350 /* Process Unlocked */
dudmuck 335:b4678b054027 1351 __HAL_UNLOCK(hirda);
dudmuck 335:b4678b054027 1352
dudmuck 335:b4678b054027 1353 return HAL_TIMEOUT;
dudmuck 335:b4678b054027 1354 }
dudmuck 335:b4678b054027 1355 }
dudmuck 335:b4678b054027 1356 }
dudmuck 335:b4678b054027 1357 }
dudmuck 335:b4678b054027 1358 return HAL_OK;
dudmuck 335:b4678b054027 1359 }
dudmuck 335:b4678b054027 1360
dudmuck 335:b4678b054027 1361 /**
dudmuck 335:b4678b054027 1362 * @brief Send an amount of data in non-blocking mode.
dudmuck 335:b4678b054027 1363 * Function called under interruption only, once
dudmuck 335:b4678b054027 1364 * interruptions have been enabled by HAL_IRDA_Transmit_IT()
dudmuck 335:b4678b054027 1365 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1366 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1367 * @retval HAL status
dudmuck 335:b4678b054027 1368 */
dudmuck 335:b4678b054027 1369 static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1370 {
dudmuck 335:b4678b054027 1371 uint16_t* tmp = 0;
dudmuck 335:b4678b054027 1372 uint32_t tmp1 = 0;
dudmuck 335:b4678b054027 1373
dudmuck 335:b4678b054027 1374 tmp1 = hirda->State;
dudmuck 335:b4678b054027 1375 if((tmp1 == HAL_IRDA_STATE_BUSY_TX) || (tmp1 == HAL_IRDA_STATE_BUSY_TX_RX))
dudmuck 335:b4678b054027 1376 {
dudmuck 335:b4678b054027 1377 if(hirda->Init.WordLength == IRDA_WORDLENGTH_9B)
dudmuck 335:b4678b054027 1378 {
dudmuck 335:b4678b054027 1379 tmp = (uint16_t*) hirda->pTxBuffPtr;
dudmuck 335:b4678b054027 1380 WRITE_REG(hirda->Instance->DR, (uint16_t)(*tmp & IRDA_DR_MASK_U16_9DATABITS));
dudmuck 335:b4678b054027 1381 if(hirda->Init.Parity == IRDA_PARITY_NONE)
dudmuck 335:b4678b054027 1382 {
dudmuck 335:b4678b054027 1383 hirda->pTxBuffPtr += 2;
dudmuck 335:b4678b054027 1384 }
dudmuck 335:b4678b054027 1385 else
dudmuck 335:b4678b054027 1386 {
dudmuck 335:b4678b054027 1387 hirda->pTxBuffPtr += 1;
dudmuck 335:b4678b054027 1388 }
dudmuck 335:b4678b054027 1389 }
dudmuck 335:b4678b054027 1390 else
dudmuck 335:b4678b054027 1391 {
dudmuck 335:b4678b054027 1392 WRITE_REG(hirda->Instance->DR, (uint8_t)(*hirda->pTxBuffPtr++ & IRDA_DR_MASK_U8_8DATABITS));
dudmuck 335:b4678b054027 1393 }
dudmuck 335:b4678b054027 1394
dudmuck 335:b4678b054027 1395 if(--hirda->TxXferCount == 0)
dudmuck 335:b4678b054027 1396 {
dudmuck 335:b4678b054027 1397 /* Disable the IRDA Transmit Data Register Empty Interrupt */
dudmuck 335:b4678b054027 1398 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE);
dudmuck 335:b4678b054027 1399
dudmuck 335:b4678b054027 1400 /* Enable the IRDA Transmit Complete Interrupt */
dudmuck 335:b4678b054027 1401 __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_TC);
dudmuck 335:b4678b054027 1402 }
dudmuck 335:b4678b054027 1403
dudmuck 335:b4678b054027 1404 return HAL_OK;
dudmuck 335:b4678b054027 1405 }
dudmuck 335:b4678b054027 1406 else
dudmuck 335:b4678b054027 1407 {
dudmuck 335:b4678b054027 1408 return HAL_BUSY;
dudmuck 335:b4678b054027 1409 }
dudmuck 335:b4678b054027 1410 }
dudmuck 335:b4678b054027 1411
dudmuck 335:b4678b054027 1412 /**
dudmuck 335:b4678b054027 1413 * @brief Wraps up transmission in non blocking mode.
dudmuck 335:b4678b054027 1414 * @param hirda: pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1415 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1416 * @retval HAL status
dudmuck 335:b4678b054027 1417 */
dudmuck 335:b4678b054027 1418 static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1419 {
dudmuck 335:b4678b054027 1420 /* Disable the IRDA Transmit Complete Interrupt */
dudmuck 335:b4678b054027 1421 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TC);
dudmuck 335:b4678b054027 1422
dudmuck 335:b4678b054027 1423 /* Check if a receive process is ongoing or not */
dudmuck 335:b4678b054027 1424 if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 1425 {
dudmuck 335:b4678b054027 1426 hirda->State = HAL_IRDA_STATE_BUSY_RX;
dudmuck 335:b4678b054027 1427 }
dudmuck 335:b4678b054027 1428 else
dudmuck 335:b4678b054027 1429 {
dudmuck 335:b4678b054027 1430 /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
dudmuck 335:b4678b054027 1431 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 1432
dudmuck 335:b4678b054027 1433 /* Disable the IRDA Parity Error Interrupt */
dudmuck 335:b4678b054027 1434 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 1435
dudmuck 335:b4678b054027 1436 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1437 }
dudmuck 335:b4678b054027 1438
dudmuck 335:b4678b054027 1439 HAL_IRDA_TxCpltCallback(hirda);
dudmuck 335:b4678b054027 1440
dudmuck 335:b4678b054027 1441 return HAL_OK;
dudmuck 335:b4678b054027 1442 }
dudmuck 335:b4678b054027 1443
dudmuck 335:b4678b054027 1444
dudmuck 335:b4678b054027 1445 /**
dudmuck 335:b4678b054027 1446 * @brief Receive an amount of data in non-blocking mode.
dudmuck 335:b4678b054027 1447 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1448 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1449 * @retval HAL status
dudmuck 335:b4678b054027 1450 */
dudmuck 335:b4678b054027 1451 static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1452 {
dudmuck 335:b4678b054027 1453 uint16_t* tmp = 0;
dudmuck 335:b4678b054027 1454 uint32_t tmp1 = 0;
dudmuck 335:b4678b054027 1455
dudmuck 335:b4678b054027 1456 tmp1 = hirda->State;
dudmuck 335:b4678b054027 1457 if((tmp1 == HAL_IRDA_STATE_BUSY_RX) || (tmp1 == HAL_IRDA_STATE_BUSY_TX_RX))
dudmuck 335:b4678b054027 1458 {
dudmuck 335:b4678b054027 1459 if(hirda->Init.WordLength == IRDA_WORDLENGTH_9B)
dudmuck 335:b4678b054027 1460 {
dudmuck 335:b4678b054027 1461 tmp = (uint16_t*) hirda->pRxBuffPtr;
dudmuck 335:b4678b054027 1462 if(hirda->Init.Parity == IRDA_PARITY_NONE)
dudmuck 335:b4678b054027 1463 {
dudmuck 335:b4678b054027 1464 *tmp = (uint16_t)(hirda->Instance->DR & IRDA_DR_MASK_U16_9DATABITS);
dudmuck 335:b4678b054027 1465 hirda->pRxBuffPtr += 2;
dudmuck 335:b4678b054027 1466 }
dudmuck 335:b4678b054027 1467 else
dudmuck 335:b4678b054027 1468 {
dudmuck 335:b4678b054027 1469 *tmp = (uint16_t)(hirda->Instance->DR & IRDA_DR_MASK_U16_8DATABITS);
dudmuck 335:b4678b054027 1470 hirda->pRxBuffPtr += 1;
dudmuck 335:b4678b054027 1471 }
dudmuck 335:b4678b054027 1472 }
dudmuck 335:b4678b054027 1473 else
dudmuck 335:b4678b054027 1474 {
dudmuck 335:b4678b054027 1475 if(hirda->Init.Parity == IRDA_PARITY_NONE)
dudmuck 335:b4678b054027 1476 {
dudmuck 335:b4678b054027 1477 *hirda->pRxBuffPtr++ = (uint8_t)(hirda->Instance->DR & IRDA_DR_MASK_U8_8DATABITS);
dudmuck 335:b4678b054027 1478 }
dudmuck 335:b4678b054027 1479 else
dudmuck 335:b4678b054027 1480 {
dudmuck 335:b4678b054027 1481 *hirda->pRxBuffPtr++ = (uint8_t)(hirda->Instance->DR & IRDA_DR_MASK_U8_7DATABITS);
dudmuck 335:b4678b054027 1482 }
dudmuck 335:b4678b054027 1483 }
dudmuck 335:b4678b054027 1484
dudmuck 335:b4678b054027 1485 if(--hirda->RxXferCount == 0)
dudmuck 335:b4678b054027 1486 {
dudmuck 335:b4678b054027 1487
dudmuck 335:b4678b054027 1488 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_RXNE);
dudmuck 335:b4678b054027 1489
dudmuck 335:b4678b054027 1490 if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)
dudmuck 335:b4678b054027 1491 {
dudmuck 335:b4678b054027 1492 hirda->State = HAL_IRDA_STATE_BUSY_TX;
dudmuck 335:b4678b054027 1493 }
dudmuck 335:b4678b054027 1494 else
dudmuck 335:b4678b054027 1495 {
dudmuck 335:b4678b054027 1496 /* Disable the IRDA Parity Error Interrupt */
dudmuck 335:b4678b054027 1497 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE);
dudmuck 335:b4678b054027 1498
dudmuck 335:b4678b054027 1499 /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
dudmuck 335:b4678b054027 1500 __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR);
dudmuck 335:b4678b054027 1501
dudmuck 335:b4678b054027 1502 hirda->State = HAL_IRDA_STATE_READY;
dudmuck 335:b4678b054027 1503 }
dudmuck 335:b4678b054027 1504 HAL_IRDA_RxCpltCallback(hirda);
dudmuck 335:b4678b054027 1505
dudmuck 335:b4678b054027 1506 return HAL_OK;
dudmuck 335:b4678b054027 1507 }
dudmuck 335:b4678b054027 1508 return HAL_OK;
dudmuck 335:b4678b054027 1509 }
dudmuck 335:b4678b054027 1510 else
dudmuck 335:b4678b054027 1511 {
dudmuck 335:b4678b054027 1512 return HAL_BUSY;
dudmuck 335:b4678b054027 1513 }
dudmuck 335:b4678b054027 1514 }
dudmuck 335:b4678b054027 1515
dudmuck 335:b4678b054027 1516 /**
dudmuck 335:b4678b054027 1517 * @brief Configures the IRDA peripheral.
dudmuck 335:b4678b054027 1518 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
dudmuck 335:b4678b054027 1519 * the configuration information for the specified IRDA module.
dudmuck 335:b4678b054027 1520 * @retval None
dudmuck 335:b4678b054027 1521 */
dudmuck 335:b4678b054027 1522 static void IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
dudmuck 335:b4678b054027 1523 {
dudmuck 335:b4678b054027 1524 /* Check the parameters */
dudmuck 335:b4678b054027 1525 assert_param(IS_IRDA_INSTANCE(hirda->Instance));
dudmuck 335:b4678b054027 1526 assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
dudmuck 335:b4678b054027 1527 assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
dudmuck 335:b4678b054027 1528 assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
dudmuck 335:b4678b054027 1529 assert_param(IS_IRDA_MODE(hirda->Init.Mode));
dudmuck 335:b4678b054027 1530
dudmuck 335:b4678b054027 1531 /*-------------------------- IRDA CR2 Configuration ------------------------*/
dudmuck 335:b4678b054027 1532 /* Clear STOP[13:12] bits */
dudmuck 335:b4678b054027 1533 CLEAR_BIT(hirda->Instance->CR2, USART_CR2_STOP);
dudmuck 335:b4678b054027 1534
dudmuck 335:b4678b054027 1535 /*-------------------------- USART CR1 Configuration -----------------------*/
dudmuck 335:b4678b054027 1536 /* Configure the USART Word Length, Parity and mode:
dudmuck 335:b4678b054027 1537 Set the M bits according to hirda->Init.WordLength value
dudmuck 335:b4678b054027 1538 Set PCE and PS bits according to hirda->Init.Parity value
dudmuck 335:b4678b054027 1539 Set TE and RE bits according to hirda->Init.Mode value */
dudmuck 335:b4678b054027 1540 MODIFY_REG(hirda->Instance->CR1,
dudmuck 335:b4678b054027 1541 ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE)),
dudmuck 335:b4678b054027 1542 (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode);
dudmuck 335:b4678b054027 1543
dudmuck 335:b4678b054027 1544 /*-------------------------- USART CR3 Configuration -----------------------*/
dudmuck 335:b4678b054027 1545 /* Clear CTSE and RTSE bits */
dudmuck 335:b4678b054027 1546 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE));
dudmuck 335:b4678b054027 1547
dudmuck 335:b4678b054027 1548 /*-------------------------- USART BRR Configuration -----------------------*/
dudmuck 335:b4678b054027 1549 if(hirda->Instance == USART1)
dudmuck 335:b4678b054027 1550 {
dudmuck 335:b4678b054027 1551 hirda->Instance->BRR = IRDA_BRR(HAL_RCC_GetPCLK2Freq(), hirda->Init.BaudRate);
dudmuck 335:b4678b054027 1552 }
dudmuck 335:b4678b054027 1553 else
dudmuck 335:b4678b054027 1554 {
dudmuck 335:b4678b054027 1555 hirda->Instance->BRR = IRDA_BRR(HAL_RCC_GetPCLK1Freq(), hirda->Init.BaudRate);
dudmuck 335:b4678b054027 1556 }
dudmuck 335:b4678b054027 1557 }
dudmuck 335:b4678b054027 1558 /**
dudmuck 335:b4678b054027 1559 * @}
dudmuck 335:b4678b054027 1560 */
dudmuck 335:b4678b054027 1561
dudmuck 335:b4678b054027 1562 #endif /* HAL_IRDA_MODULE_ENABLED */
dudmuck 335:b4678b054027 1563 /**
dudmuck 335:b4678b054027 1564 * @}
dudmuck 335:b4678b054027 1565 */
dudmuck 335:b4678b054027 1566
dudmuck 335:b4678b054027 1567 /**
dudmuck 335:b4678b054027 1568 * @}
dudmuck 335:b4678b054027 1569 */
dudmuck 335:b4678b054027 1570
dudmuck 335:b4678b054027 1571 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/