Mbed SDK for XRange SX1272 LoRa module
Dependents: XRangePingPong XRange-LoRaWAN-lmic-app lora-transceiver
SX1272 LoRa RF module
https://www.netblocks.eu/xrange-sx1272-lora-datasheet/
targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/sleep.c@339:ac6f3fd999f3, 2016-01-07 (annotated)
- Committer:
- netblocks
- Date:
- Thu Jan 07 13:01:25 2016 +0000
- Revision:
- 339:ac6f3fd999f3
- Parent:
- 337:a9270a3a1df6
HSE_VALUE set for XTAL 16Mhz
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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dudmuck | 336:1e18a06a987b | 1 | /* mbed Microcontroller Library |
dudmuck | 336:1e18a06a987b | 2 | ******************************************************************************* |
dudmuck | 336:1e18a06a987b | 3 | * Copyright (c) 2014, STMicroelectronics |
dudmuck | 336:1e18a06a987b | 4 | * All rights reserved. |
dudmuck | 336:1e18a06a987b | 5 | * |
dudmuck | 336:1e18a06a987b | 6 | * Redistribution and use in source and binary forms, with or without |
dudmuck | 336:1e18a06a987b | 7 | * modification, are permitted provided that the following conditions are met: |
dudmuck | 336:1e18a06a987b | 8 | * |
dudmuck | 336:1e18a06a987b | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
dudmuck | 336:1e18a06a987b | 10 | * this list of conditions and the following disclaimer. |
dudmuck | 336:1e18a06a987b | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
dudmuck | 336:1e18a06a987b | 12 | * this list of conditions and the following disclaimer in the documentation |
dudmuck | 336:1e18a06a987b | 13 | * and/or other materials provided with the distribution. |
dudmuck | 336:1e18a06a987b | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
dudmuck | 336:1e18a06a987b | 15 | * may be used to endorse or promote products derived from this software |
dudmuck | 336:1e18a06a987b | 16 | * without specific prior written permission. |
dudmuck | 336:1e18a06a987b | 17 | * |
dudmuck | 336:1e18a06a987b | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
dudmuck | 336:1e18a06a987b | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
dudmuck | 336:1e18a06a987b | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
dudmuck | 336:1e18a06a987b | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
dudmuck | 336:1e18a06a987b | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
dudmuck | 336:1e18a06a987b | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
dudmuck | 336:1e18a06a987b | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
dudmuck | 336:1e18a06a987b | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
dudmuck | 336:1e18a06a987b | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
dudmuck | 336:1e18a06a987b | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
dudmuck | 336:1e18a06a987b | 28 | ******************************************************************************* |
dudmuck | 336:1e18a06a987b | 29 | */ |
dudmuck | 336:1e18a06a987b | 30 | #include "sleep_api.h" |
dudmuck | 336:1e18a06a987b | 31 | |
dudmuck | 336:1e18a06a987b | 32 | #if DEVICE_SLEEP |
dudmuck | 336:1e18a06a987b | 33 | |
dudmuck | 336:1e18a06a987b | 34 | #include "cmsis.h" |
dudmuck | 336:1e18a06a987b | 35 | |
dudmuck | 336:1e18a06a987b | 36 | static TIM_HandleTypeDef TimMasterHandle; |
dudmuck | 336:1e18a06a987b | 37 | |
dudmuck | 336:1e18a06a987b | 38 | void sleep(void) |
dudmuck | 336:1e18a06a987b | 39 | { |
dudmuck | 336:1e18a06a987b | 40 | // Disable HAL tick interrupt |
dudmuck | 336:1e18a06a987b | 41 | TimMasterHandle.Instance = TIM5; |
dudmuck | 336:1e18a06a987b | 42 | __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
dudmuck | 336:1e18a06a987b | 43 | |
dudmuck | 336:1e18a06a987b | 44 | // Request to enter SLEEP mode |
dudmuck | 336:1e18a06a987b | 45 | HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); |
dudmuck | 336:1e18a06a987b | 46 | |
dudmuck | 336:1e18a06a987b | 47 | // Enable HAL tick interrupt |
dudmuck | 336:1e18a06a987b | 48 | __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
dudmuck | 336:1e18a06a987b | 49 | } |
dudmuck | 336:1e18a06a987b | 50 | |
dudmuck | 336:1e18a06a987b | 51 | void deepsleep(void) |
dudmuck | 336:1e18a06a987b | 52 | { |
dudmuck | 337:a9270a3a1df6 | 53 | uint8_t STOPEntry = PWR_STOPENTRY_WFI; /* PWR_STOPENTRY_WFE */ |
dudmuck | 337:a9270a3a1df6 | 54 | |
dudmuck | 336:1e18a06a987b | 55 | // Disable HAL tick interrupt |
dudmuck | 336:1e18a06a987b | 56 | TimMasterHandle.Instance = TIM5; |
dudmuck | 336:1e18a06a987b | 57 | __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
dudmuck | 336:1e18a06a987b | 58 | |
dudmuck | 336:1e18a06a987b | 59 | // Request to enter STOP mode with regulator in low power mode |
dudmuck | 337:a9270a3a1df6 | 60 | //HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); |
dudmuck | 337:a9270a3a1df6 | 61 | /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */ |
dudmuck | 337:a9270a3a1df6 | 62 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), PWR_LOWPOWERREGULATOR_ON); |
dudmuck | 337:a9270a3a1df6 | 63 | |
dudmuck | 337:a9270a3a1df6 | 64 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
dudmuck | 337:a9270a3a1df6 | 65 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
dudmuck | 337:a9270a3a1df6 | 66 | |
dudmuck | 337:a9270a3a1df6 | 67 | /* Select Stop mode entry --------------------------------------------------*/ |
dudmuck | 337:a9270a3a1df6 | 68 | if(STOPEntry == PWR_STOPENTRY_WFI) |
dudmuck | 337:a9270a3a1df6 | 69 | { |
dudmuck | 337:a9270a3a1df6 | 70 | /* Request Wait For Interrupt */ |
dudmuck | 337:a9270a3a1df6 | 71 | __WFI(); |
dudmuck | 337:a9270a3a1df6 | 72 | } |
dudmuck | 337:a9270a3a1df6 | 73 | else |
dudmuck | 337:a9270a3a1df6 | 74 | { |
dudmuck | 337:a9270a3a1df6 | 75 | /* Request Wait For Event */ |
dudmuck | 337:a9270a3a1df6 | 76 | __SEV(); |
dudmuck | 337:a9270a3a1df6 | 77 | __WFE(); |
dudmuck | 337:a9270a3a1df6 | 78 | __WFE(); |
dudmuck | 337:a9270a3a1df6 | 79 | } |
dudmuck | 337:a9270a3a1df6 | 80 | __NOP(); |
dudmuck | 337:a9270a3a1df6 | 81 | __NOP(); |
dudmuck | 337:a9270a3a1df6 | 82 | __NOP(); |
dudmuck | 337:a9270a3a1df6 | 83 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
dudmuck | 337:a9270a3a1df6 | 84 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
dudmuck | 336:1e18a06a987b | 85 | |
dudmuck | 336:1e18a06a987b | 86 | // After wake-up from STOP reconfigure the PLL |
dudmuck | 336:1e18a06a987b | 87 | SetSysClock(); |
dudmuck | 336:1e18a06a987b | 88 | |
dudmuck | 336:1e18a06a987b | 89 | // Enable HAL tick interrupt |
dudmuck | 336:1e18a06a987b | 90 | __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
dudmuck | 336:1e18a06a987b | 91 | } |
dudmuck | 336:1e18a06a987b | 92 | |
dudmuck | 336:1e18a06a987b | 93 | #endif |