XRange SX1272Lib
Dependents: XRangePingPong XRange-LoRaWAN-lmic-app lora-transceiver
Fork of SX1276Lib by
sx1272-hal.cpp
00001 /* 00002 / _____) _ | | 00003 ( (____ _____ ____ _| |_ _____ ____| |__ 00004 \____ \| ___ | (_ _) ___ |/ ___) _ \ 00005 _____) ) ____| | | || |_| ____( (___| | | | 00006 (______/|_____)_|_|_| \__)_____)\____)_| |_| 00007 ( C )2014 Semtech 00008 00009 Description: - 00010 00011 License: Revised BSD License, see LICENSE.TXT file include in the project 00012 00013 Maintainers: www.netblocks.eu 00014 SX1272 LoRa RF module : http://www.netblocks.eu/xrange-sx1272-lora-datasheet/ 00015 00016 */ 00017 #include "sx1272-hal.h" 00018 00019 const RadioRegisters_t XRange::RadioRegsInit[] = 00020 { 00021 { MODEM_FSK , REG_LNA , 0x23 }, 00022 { MODEM_FSK , REG_RXCONFIG , 0x1E }, 00023 { MODEM_FSK , REG_RSSICONFIG , 0xD2 }, 00024 { MODEM_FSK , REG_PREAMBLEDETECT , 0xAA }, 00025 { MODEM_FSK , REG_OSC , 0x07 }, 00026 { MODEM_FSK , REG_SYNCCONFIG , 0x12 }, 00027 { MODEM_FSK , REG_SYNCVALUE1 , 0xC1 }, 00028 { MODEM_FSK , REG_SYNCVALUE2 , 0x94 }, 00029 { MODEM_FSK , REG_SYNCVALUE3 , 0xC1 }, 00030 { MODEM_FSK , REG_PACKETCONFIG1 , 0xD8 }, 00031 { MODEM_FSK , REG_FIFOTHRESH , 0x8F }, 00032 { MODEM_FSK , REG_IMAGECAL , 0x02 }, 00033 { MODEM_FSK , REG_DIOMAPPING1 , 0x00 }, 00034 { MODEM_FSK , REG_DIOMAPPING2 , 0x30 }, 00035 //Sets 256 Bytes for RX TX packets 00036 { MODEM_LORA, REG_LR_FIFOTXBASEADDR, 0x00 }, 00037 { MODEM_LORA, REG_LR_FIFORXBASEADDR, 0x00 }, 00038 00039 }; 00040 00041 00042 XRange::XRange( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ), 00043 void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ), 00044 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, 00045 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5, 00046 PinName antSwitch ) 00047 : SX1272 ( txDone, txTimeout, rxDone, rxTimeout, rxError, fhssChangeChannel, cadDone, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5), 00048 antSwitch( antSwitch ) 00049 { 00050 Reset( ); 00051 00052 IoInit( ); 00053 00054 SetOpMode( RF_OPMODE_SLEEP ); 00055 00056 IoIrqInit( dioIrq ); 00057 00058 RadioRegistersInit( ); 00059 00060 SetModem( MODEM_FSK ); 00061 00062 this->settings.State = IDLE ; 00063 } 00064 00065 XRange::XRange( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ), 00066 void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ) ) 00067 : SX1272 ( txDone, txTimeout, rxDone, rxTimeout, rxError, fhssChangeChannel, cadDone, 00068 PB_15 /*MOSI*/, PB_14 /*MISO*/, PB_13 /*SCLK*/, PB_12 /*NSS*/, PB_2 /*RESET*/, 00069 PA_10 /*DIO0*/, PA_9 /*DIO1*/, PC_13 /*DIO2*/, PB_0 /*DIO3*/, PB_1 /*DIO4*/,PB_10 /*DIO5*/ ), 00070 antSwitch( PB_11 ) 00071 { 00072 Reset( ); 00073 00074 IoInit( ); 00075 00076 SetOpMode( RF_OPMODE_SLEEP ); 00077 IoIrqInit( dioIrq ); 00078 00079 RadioRegistersInit( ); 00080 00081 SetModem( MODEM_FSK ); 00082 00083 this->settings.State = IDLE ; 00084 } 00085 00086 00087 void XRange::IoInit( void ) 00088 { 00089 AntSwInit( ); 00090 SpiInit( ); 00091 } 00092 00093 void XRange::RadioRegistersInit( ){ 00094 uint8_t i = 0; 00095 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) 00096 { 00097 SetModem( RadioRegsInit[i].Modem ); 00098 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value ); 00099 } 00100 } 00101 00102 void XRange::SpiInit( void ) 00103 { 00104 nss = 1; 00105 spi .format( 8,0 ); 00106 uint32_t frequencyToSet = 8000000; 00107 spi .frequency( frequencyToSet ); 00108 wait(0.1); 00109 } 00110 00111 void XRange::IoIrqInit( DioIrqHandler *irqHandlers ) 00112 { 00113 dio0 .mode(PullDown); 00114 dio1.mode(PullDown); 00115 dio2.mode(PullDown); 00116 dio3.mode(PullDown); 00117 dio4.mode(PullDown); 00118 dio0 .rise( this, static_cast< TriggerXRange > ( irqHandlers[0] ) ); 00119 dio1.rise( this, static_cast< TriggerXRange > ( irqHandlers[1] ) ); 00120 dio2.rise( this, static_cast< TriggerXRange > ( irqHandlers[2] ) ); 00121 dio3.rise( this, static_cast< TriggerXRange > ( irqHandlers[3] ) ); 00122 dio4.rise( this, static_cast< TriggerXRange > ( irqHandlers[4] ) ); 00123 } 00124 00125 void XRange::IoDeInit( void ) 00126 { 00127 //nothing 00128 } 00129 00130 uint8_t XRange::GetPaSelect( uint32_t channel ) 00131 { 00132 return RF_PACONFIG_PASELECT_PABOOST; 00133 } 00134 00135 void XRange::SetAntSwLowPower( bool status ) 00136 { 00137 if( isRadioActive != status ) 00138 { 00139 isRadioActive = status; 00140 00141 if( status == false ) 00142 { 00143 AntSwInit( ); 00144 } 00145 else 00146 { 00147 AntSwDeInit( ); 00148 } 00149 } 00150 } 00151 00152 void XRange::AntSwInit( void ) 00153 { 00154 antSwitch = 0; 00155 } 00156 00157 void XRange::AntSwDeInit( void ) 00158 { 00159 antSwitch = 0; 00160 } 00161 00162 void XRange::SetAntSw( uint8_t rxTx ) 00163 { 00164 if( this->rxTx == rxTx ) 00165 { 00166 //no need to go further 00167 return; 00168 } 00169 00170 this->rxTx = rxTx ; 00171 00172 if( rxTx != 0 ) 00173 { 00174 antSwitch = 1; 00175 } 00176 else 00177 { 00178 antSwitch = 0; 00179 } 00180 } 00181 00182 bool XRange::CheckRfFrequency( uint32_t frequency ) 00183 { 00184 //TODO: Implement check, currently all frequencies are supported 00185 return true; 00186 } 00187 00188 00189 void XRange::Reset( void ) 00190 { 00191 reset .output(); 00192 reset = 1; 00193 wait_ms( 1 ); 00194 reset .input(); 00195 wait_ms( 6 ); 00196 } 00197 00198 void XRange::Write( uint8_t addr, uint8_t data ) 00199 { 00200 Write( addr, &data, 1 ); 00201 } 00202 00203 uint8_t XRange::Read( uint8_t addr ) 00204 { 00205 uint8_t data; 00206 Read( addr, &data, 1 ); 00207 return data; 00208 } 00209 00210 void XRange::Write( uint8_t addr, uint8_t *buffer, uint8_t size ) 00211 { 00212 uint8_t i; 00213 00214 nss = 0; 00215 spi .write( addr | 0x80 ); 00216 for( i = 0; i < size; i++ ) 00217 { 00218 spi .write( buffer[i] ); 00219 } 00220 nss = 1; 00221 } 00222 00223 void XRange::Read( uint8_t addr, uint8_t *buffer, uint8_t size ) 00224 { 00225 uint8_t i; 00226 00227 nss = 0; 00228 spi .write( addr & 0x7F ); 00229 for( i = 0; i < size; i++ ) 00230 { 00231 buffer[i] = spi .write( 0 ); 00232 } 00233 nss = 1; 00234 } 00235 00236 void XRange::WriteFifo( uint8_t *buffer, uint8_t size ) 00237 { 00238 Write( 0, buffer, size ); 00239 } 00240 00241 void XRange::ReadFifo( uint8_t *buffer, uint8_t size ) 00242 { 00243 Read( 0, buffer, size ); 00244 }
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