en 129 / FastIO

add LPC4337

Fork of FastIO by Erik -

Devices/FastIO_EFM32.h@15:e0c5a5216647, 2015-07-09 (annotated)

Committer:
Sissors
Date:
Thu Jul 09 21:11:39 2015 +0000
Revision:
15:e0c5a5216647
Child:
16:a56c0e7ebf7f
Initial EFM32 support. FastIn and FastOut child classes seem to be broken yet again. EFM32 has broken mode switching (don't blame me for their GPIO being a pain to use).

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 15:e0c5a5216647 1 #if defined(TARGET_EFM32)
Sissors 15:e0c5a5216647 2
Sissors 15:e0c5a5216647 3 #include "mbed.h"
Sissors 15:e0c5a5216647 4 #include "pinmap.h"
Sissors 15:e0c5a5216647 5 #include "em_cmu.h"
Sissors 15:e0c5a5216647 6
Sissors 15:e0c5a5216647 7 typedef struct {
Sissors 15:e0c5a5216647 8 uint32_t mask;
Sissors 15:e0c5a5216647 9 uint8_t input_mode;
Sissors 15:e0c5a5216647 10 uint8_t output_mode;
Sissors 15:e0c5a5216647 11 } fastio_vars;
Sissors 15:e0c5a5216647 12
Sissors 15:e0c5a5216647 13 #define PIN_INDEX (pin & 0xF)
Sissors 15:e0c5a5216647 14 #define PINMASK (1 << PIN_INDEX)
Sissors 15:e0c5a5216647 15 #define PORT_INDEX (pin >> 4)
Sissors 15:e0c5a5216647 16
Sissors 15:e0c5a5216647 17 //Mode_reg is either high or low, depending on first 8 bit or second 8-bit of a port
Sissors 15:e0c5a5216647 18 #define MODE_REG (*((&GPIO->P[PORT_INDEX].MODEL) + PIN_INDEX / 8))
Sissors 15:e0c5a5216647 19 #define MODE_SHIFT ((PIN_INDEX * 4) % 32)
Sissors 15:e0c5a5216647 20
Sissors 15:e0c5a5216647 21 #define INIT_PIN container.mask = PINMASK; container.input_mode = PullDefault; container.output_mode = PushPull; CMU_ClockEnable(cmuClock_HFPER, true); CMU_ClockEnable(cmuClock_GPIO, true)
Sissors 15:e0c5a5216647 22 #define DESTROY_PIN
Sissors 15:e0c5a5216647 23
Sissors 15:e0c5a5216647 24 #define SET_DIR_INPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (Input << MODE_SHIFT)
Sissors 15:e0c5a5216647 25 #define SET_DIR_OUTPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (container.output_mode << MODE_SHIFT)
Sissors 15:e0c5a5216647 26 #define SET_MODE(pull) (((pull <= 3) || (pull > 0x10)) ? container.input_mode = pull : container.output_mode = pull)
Sissors 15:e0c5a5216647 27
Sissors 15:e0c5a5216647 28 #define WRITE_PIN_SET GPIO->P[PORT_INDEX].DOUTSET = PINMASK
Sissors 15:e0c5a5216647 29 #define WRITE_PIN_CLR GPIO->P[PORT_INDEX].DOUTCLR = PINMASK
Sissors 15:e0c5a5216647 30
Sissors 15:e0c5a5216647 31 #define READ_PIN ((GPIO->P[PORT_INDEX].DIN & PINMASK) ? 1 : 0)
Sissors 15:e0c5a5216647 32
Sissors 15:e0c5a5216647 33 #endif