Mike Pulice / ublox_C200Test

Integrating the ublox LISA C200 modem

Fork of SprintUSBModemHTTPClientTest by Donatien Garnier

mbed-src/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c@5:3f93dd1d4cb3, 2013-09-26 (annotated)

Committer:
sam_grove
Date:
Thu Sep 26 00:44:20 2013 -0500
Revision:
5:3f93dd1d4cb3
Exported program and replaced contents of the repo with the source

to build and debug using keil mdk. Libs NOT upto date are lwip, lwip-sys

and socket. these have newer versions under mbed_official but were starting

from a know working point

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sam_grove 5:3f93dd1d4cb3 1 /* mbed Microcontroller Library
sam_grove 5:3f93dd1d4cb3 2 * Copyright (c) 2006-2013 ARM Limited
sam_grove 5:3f93dd1d4cb3 3 *
sam_grove 5:3f93dd1d4cb3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sam_grove 5:3f93dd1d4cb3 5 * you may not use this file except in compliance with the License.
sam_grove 5:3f93dd1d4cb3 6 * You may obtain a copy of the License at
sam_grove 5:3f93dd1d4cb3 7 *
sam_grove 5:3f93dd1d4cb3 8 * http://www.apache.org/licenses/LICENSE-2.0
sam_grove 5:3f93dd1d4cb3 9 *
sam_grove 5:3f93dd1d4cb3 10 * Unless required by applicable law or agreed to in writing, software
sam_grove 5:3f93dd1d4cb3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sam_grove 5:3f93dd1d4cb3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sam_grove 5:3f93dd1d4cb3 13 * See the License for the specific language governing permissions and
sam_grove 5:3f93dd1d4cb3 14 * limitations under the License.
sam_grove 5:3f93dd1d4cb3 15 */
sam_grove 5:3f93dd1d4cb3 16 // math.h required for floating point operations for baud rate calculation
sam_grove 5:3f93dd1d4cb3 17 #include <math.h>
sam_grove 5:3f93dd1d4cb3 18 #include <string.h>
sam_grove 5:3f93dd1d4cb3 19
sam_grove 5:3f93dd1d4cb3 20 #include "serial_api.h"
sam_grove 5:3f93dd1d4cb3 21 #include "cmsis.h"
sam_grove 5:3f93dd1d4cb3 22 #include "pinmap.h"
sam_grove 5:3f93dd1d4cb3 23 #include "error.h"
sam_grove 5:3f93dd1d4cb3 24
sam_grove 5:3f93dd1d4cb3 25 /******************************************************************************
sam_grove 5:3f93dd1d4cb3 26 * INITIALIZATION
sam_grove 5:3f93dd1d4cb3 27 ******************************************************************************/
sam_grove 5:3f93dd1d4cb3 28 #define UART_NUM 4
sam_grove 5:3f93dd1d4cb3 29
sam_grove 5:3f93dd1d4cb3 30 static const PinMap PinMap_UART_TX[] = {
sam_grove 5:3f93dd1d4cb3 31 {P0_0, UART_3, 2},
sam_grove 5:3f93dd1d4cb3 32 {P0_2, UART_0, 1},
sam_grove 5:3f93dd1d4cb3 33 {P0_10, UART_2, 1},
sam_grove 5:3f93dd1d4cb3 34 {P0_15, UART_1, 1},
sam_grove 5:3f93dd1d4cb3 35 {P0_25, UART_3, 3},
sam_grove 5:3f93dd1d4cb3 36 {P2_0 , UART_1, 2},
sam_grove 5:3f93dd1d4cb3 37 {P2_8 , UART_2, 2},
sam_grove 5:3f93dd1d4cb3 38 {P4_28, UART_3, 3},
sam_grove 5:3f93dd1d4cb3 39 {NC , NC , 0}
sam_grove 5:3f93dd1d4cb3 40 };
sam_grove 5:3f93dd1d4cb3 41
sam_grove 5:3f93dd1d4cb3 42 static const PinMap PinMap_UART_RX[] = {
sam_grove 5:3f93dd1d4cb3 43 {P0_1 , UART_3, 2},
sam_grove 5:3f93dd1d4cb3 44 {P0_3 , UART_0, 1},
sam_grove 5:3f93dd1d4cb3 45 {P0_11, UART_2, 1},
sam_grove 5:3f93dd1d4cb3 46 {P0_16, UART_1, 1},
sam_grove 5:3f93dd1d4cb3 47 {P0_26, UART_3, 3},
sam_grove 5:3f93dd1d4cb3 48 {P2_1 , UART_1, 2},
sam_grove 5:3f93dd1d4cb3 49 {P2_9 , UART_2, 2},
sam_grove 5:3f93dd1d4cb3 50 {P4_29, UART_3, 3},
sam_grove 5:3f93dd1d4cb3 51 {NC , NC , 0}
sam_grove 5:3f93dd1d4cb3 52 };
sam_grove 5:3f93dd1d4cb3 53
sam_grove 5:3f93dd1d4cb3 54 static uint32_t serial_irq_ids[UART_NUM] = {0};
sam_grove 5:3f93dd1d4cb3 55 static uart_irq_handler irq_handler;
sam_grove 5:3f93dd1d4cb3 56
sam_grove 5:3f93dd1d4cb3 57 int stdio_uart_inited = 0;
sam_grove 5:3f93dd1d4cb3 58 serial_t stdio_uart;
sam_grove 5:3f93dd1d4cb3 59
sam_grove 5:3f93dd1d4cb3 60 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sam_grove 5:3f93dd1d4cb3 61 int is_stdio_uart = 0;
sam_grove 5:3f93dd1d4cb3 62
sam_grove 5:3f93dd1d4cb3 63 // determine the UART to use
sam_grove 5:3f93dd1d4cb3 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sam_grove 5:3f93dd1d4cb3 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sam_grove 5:3f93dd1d4cb3 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sam_grove 5:3f93dd1d4cb3 67 if ((int)uart == NC) {
sam_grove 5:3f93dd1d4cb3 68 error("Serial pinout mapping failed");
sam_grove 5:3f93dd1d4cb3 69 }
sam_grove 5:3f93dd1d4cb3 70
sam_grove 5:3f93dd1d4cb3 71 obj->uart = (LPC_UART_TypeDef *)uart;
sam_grove 5:3f93dd1d4cb3 72 // enable power
sam_grove 5:3f93dd1d4cb3 73 switch (uart) {
sam_grove 5:3f93dd1d4cb3 74 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
sam_grove 5:3f93dd1d4cb3 75 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
sam_grove 5:3f93dd1d4cb3 76 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
sam_grove 5:3f93dd1d4cb3 77 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
sam_grove 5:3f93dd1d4cb3 78 }
sam_grove 5:3f93dd1d4cb3 79
sam_grove 5:3f93dd1d4cb3 80 // enable fifos and default rx trigger level
sam_grove 5:3f93dd1d4cb3 81 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sam_grove 5:3f93dd1d4cb3 82 | 0 << 1 // Rx Fifo Reset
sam_grove 5:3f93dd1d4cb3 83 | 0 << 2 // Tx Fifo Reset
sam_grove 5:3f93dd1d4cb3 84 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
sam_grove 5:3f93dd1d4cb3 85
sam_grove 5:3f93dd1d4cb3 86 // disable irqs
sam_grove 5:3f93dd1d4cb3 87 obj->uart->IER = 0 << 0 // Rx Data available irq enable
sam_grove 5:3f93dd1d4cb3 88 | 0 << 1 // Tx Fifo empty irq enable
sam_grove 5:3f93dd1d4cb3 89 | 0 << 2; // Rx Line Status irq enable
sam_grove 5:3f93dd1d4cb3 90
sam_grove 5:3f93dd1d4cb3 91 // set default baud rate and format
sam_grove 5:3f93dd1d4cb3 92 serial_baud (obj, 9600);
sam_grove 5:3f93dd1d4cb3 93 serial_format(obj, 8, ParityNone, 1);
sam_grove 5:3f93dd1d4cb3 94
sam_grove 5:3f93dd1d4cb3 95 // pinout the chosen uart
sam_grove 5:3f93dd1d4cb3 96 pinmap_pinout(tx, PinMap_UART_TX);
sam_grove 5:3f93dd1d4cb3 97 pinmap_pinout(rx, PinMap_UART_RX);
sam_grove 5:3f93dd1d4cb3 98
sam_grove 5:3f93dd1d4cb3 99 // set rx/tx pins in PullUp mode
sam_grove 5:3f93dd1d4cb3 100 pin_mode(tx, PullUp);
sam_grove 5:3f93dd1d4cb3 101 pin_mode(rx, PullUp);
sam_grove 5:3f93dd1d4cb3 102
sam_grove 5:3f93dd1d4cb3 103 switch (uart) {
sam_grove 5:3f93dd1d4cb3 104 case UART_0: obj->index = 0; break;
sam_grove 5:3f93dd1d4cb3 105 case UART_1: obj->index = 1; break;
sam_grove 5:3f93dd1d4cb3 106 case UART_2: obj->index = 2; break;
sam_grove 5:3f93dd1d4cb3 107 case UART_3: obj->index = 3; break;
sam_grove 5:3f93dd1d4cb3 108 }
sam_grove 5:3f93dd1d4cb3 109
sam_grove 5:3f93dd1d4cb3 110 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
sam_grove 5:3f93dd1d4cb3 111
sam_grove 5:3f93dd1d4cb3 112 if (is_stdio_uart) {
sam_grove 5:3f93dd1d4cb3 113 stdio_uart_inited = 1;
sam_grove 5:3f93dd1d4cb3 114 memcpy(&stdio_uart, obj, sizeof(serial_t));
sam_grove 5:3f93dd1d4cb3 115 }
sam_grove 5:3f93dd1d4cb3 116 }
sam_grove 5:3f93dd1d4cb3 117
sam_grove 5:3f93dd1d4cb3 118 void serial_free(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 119 serial_irq_ids[obj->index] = 0;
sam_grove 5:3f93dd1d4cb3 120 }
sam_grove 5:3f93dd1d4cb3 121
sam_grove 5:3f93dd1d4cb3 122 // serial_baud
sam_grove 5:3f93dd1d4cb3 123 // set the baud rate, taking in to account the current SystemFrequency
sam_grove 5:3f93dd1d4cb3 124 void serial_baud(serial_t *obj, int baudrate) {
sam_grove 5:3f93dd1d4cb3 125 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
sam_grove 5:3f93dd1d4cb3 126 // baud rate. The formula is:
sam_grove 5:3f93dd1d4cb3 127 //
sam_grove 5:3f93dd1d4cb3 128 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
sam_grove 5:3f93dd1d4cb3 129 // where:
sam_grove 5:3f93dd1d4cb3 130 // 1 < MulVal <= 15
sam_grove 5:3f93dd1d4cb3 131 // 0 <= DivAddVal < 14
sam_grove 5:3f93dd1d4cb3 132 // DivAddVal < MulVal
sam_grove 5:3f93dd1d4cb3 133 //
sam_grove 5:3f93dd1d4cb3 134 // set pclk to /1
sam_grove 5:3f93dd1d4cb3 135 switch ((int)obj->uart) {
sam_grove 5:3f93dd1d4cb3 136 case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
sam_grove 5:3f93dd1d4cb3 137 case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
sam_grove 5:3f93dd1d4cb3 138 case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
sam_grove 5:3f93dd1d4cb3 139 case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
sam_grove 5:3f93dd1d4cb3 140 default: error("serial_baud"); break;
sam_grove 5:3f93dd1d4cb3 141 }
sam_grove 5:3f93dd1d4cb3 142
sam_grove 5:3f93dd1d4cb3 143 uint32_t PCLK = SystemCoreClock;
sam_grove 5:3f93dd1d4cb3 144
sam_grove 5:3f93dd1d4cb3 145 // First we check to see if the basic divide with no DivAddVal/MulVal
sam_grove 5:3f93dd1d4cb3 146 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
sam_grove 5:3f93dd1d4cb3 147 // MulVal = 1. Otherwise, we search the valid ratio value range to find
sam_grove 5:3f93dd1d4cb3 148 // the closest match. This could be more elegant, using search methods
sam_grove 5:3f93dd1d4cb3 149 // and/or lookup tables, but the brute force method is not that much
sam_grove 5:3f93dd1d4cb3 150 // slower, and is more maintainable.
sam_grove 5:3f93dd1d4cb3 151 uint16_t DL = PCLK / (16 * baudrate);
sam_grove 5:3f93dd1d4cb3 152
sam_grove 5:3f93dd1d4cb3 153 uint8_t DivAddVal = 0;
sam_grove 5:3f93dd1d4cb3 154 uint8_t MulVal = 1;
sam_grove 5:3f93dd1d4cb3 155 int hit = 0;
sam_grove 5:3f93dd1d4cb3 156 uint16_t dlv;
sam_grove 5:3f93dd1d4cb3 157 uint8_t mv, dav;
sam_grove 5:3f93dd1d4cb3 158 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
sam_grove 5:3f93dd1d4cb3 159 float err_best = (float) baudrate;
sam_grove 5:3f93dd1d4cb3 160 uint16_t dlmax = DL;
sam_grove 5:3f93dd1d4cb3 161 for ( dlv = (dlmax/2); (dlv <= dlmax) && !hit; dlv++) {
sam_grove 5:3f93dd1d4cb3 162 for ( mv = 1; mv <= 15; mv++) {
sam_grove 5:3f93dd1d4cb3 163 for ( dav = 1; dav < mv; dav++) {
sam_grove 5:3f93dd1d4cb3 164 float ratio = 1.0f + ((float) dav / (float) mv);
sam_grove 5:3f93dd1d4cb3 165 float calcbaud = (float)PCLK / (16.0f * (float) dlv * ratio);
sam_grove 5:3f93dd1d4cb3 166 float err = fabs(((float) baudrate - calcbaud) / (float) baudrate);
sam_grove 5:3f93dd1d4cb3 167 if (err < err_best) {
sam_grove 5:3f93dd1d4cb3 168 DL = dlv;
sam_grove 5:3f93dd1d4cb3 169 DivAddVal = dav;
sam_grove 5:3f93dd1d4cb3 170 MulVal = mv;
sam_grove 5:3f93dd1d4cb3 171 err_best = err;
sam_grove 5:3f93dd1d4cb3 172 if (err < 0.001f) {
sam_grove 5:3f93dd1d4cb3 173 hit = 1;
sam_grove 5:3f93dd1d4cb3 174 }
sam_grove 5:3f93dd1d4cb3 175 }
sam_grove 5:3f93dd1d4cb3 176 }
sam_grove 5:3f93dd1d4cb3 177 }
sam_grove 5:3f93dd1d4cb3 178 }
sam_grove 5:3f93dd1d4cb3 179 }
sam_grove 5:3f93dd1d4cb3 180
sam_grove 5:3f93dd1d4cb3 181 // set LCR[DLAB] to enable writing to divider registers
sam_grove 5:3f93dd1d4cb3 182 obj->uart->LCR |= (1 << 7);
sam_grove 5:3f93dd1d4cb3 183
sam_grove 5:3f93dd1d4cb3 184 // set divider values
sam_grove 5:3f93dd1d4cb3 185 obj->uart->DLM = (DL >> 8) & 0xFF;
sam_grove 5:3f93dd1d4cb3 186 obj->uart->DLL = (DL >> 0) & 0xFF;
sam_grove 5:3f93dd1d4cb3 187 obj->uart->FDR = (uint32_t) DivAddVal << 0
sam_grove 5:3f93dd1d4cb3 188 | (uint32_t) MulVal << 4;
sam_grove 5:3f93dd1d4cb3 189
sam_grove 5:3f93dd1d4cb3 190 // clear LCR[DLAB]
sam_grove 5:3f93dd1d4cb3 191 obj->uart->LCR &= ~(1 << 7);
sam_grove 5:3f93dd1d4cb3 192 }
sam_grove 5:3f93dd1d4cb3 193
sam_grove 5:3f93dd1d4cb3 194 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sam_grove 5:3f93dd1d4cb3 195 // 0: 1 stop bits, 1: 2 stop bits
sam_grove 5:3f93dd1d4cb3 196 if (stop_bits != 1 && stop_bits != 2) {
sam_grove 5:3f93dd1d4cb3 197 error("Invalid stop bits specified");
sam_grove 5:3f93dd1d4cb3 198 }
sam_grove 5:3f93dd1d4cb3 199 stop_bits -= 1;
sam_grove 5:3f93dd1d4cb3 200
sam_grove 5:3f93dd1d4cb3 201 // 0: 5 data bits ... 3: 8 data bits
sam_grove 5:3f93dd1d4cb3 202 if (data_bits < 5 || data_bits > 8) {
sam_grove 5:3f93dd1d4cb3 203 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
sam_grove 5:3f93dd1d4cb3 204 }
sam_grove 5:3f93dd1d4cb3 205 data_bits -= 5;
sam_grove 5:3f93dd1d4cb3 206
sam_grove 5:3f93dd1d4cb3 207 int parity_enable, parity_select;
sam_grove 5:3f93dd1d4cb3 208 switch (parity) {
sam_grove 5:3f93dd1d4cb3 209 case ParityNone: parity_enable = 0; parity_select = 0; break;
sam_grove 5:3f93dd1d4cb3 210 case ParityOdd : parity_enable = 1; parity_select = 0; break;
sam_grove 5:3f93dd1d4cb3 211 case ParityEven: parity_enable = 1; parity_select = 1; break;
sam_grove 5:3f93dd1d4cb3 212 case ParityForced1: parity_enable = 1; parity_select = 2; break;
sam_grove 5:3f93dd1d4cb3 213 case ParityForced0: parity_enable = 1; parity_select = 3; break;
sam_grove 5:3f93dd1d4cb3 214 default:
sam_grove 5:3f93dd1d4cb3 215 error("Invalid serial parity setting");
sam_grove 5:3f93dd1d4cb3 216 return;
sam_grove 5:3f93dd1d4cb3 217 }
sam_grove 5:3f93dd1d4cb3 218
sam_grove 5:3f93dd1d4cb3 219 obj->uart->LCR = data_bits << 0
sam_grove 5:3f93dd1d4cb3 220 | stop_bits << 2
sam_grove 5:3f93dd1d4cb3 221 | parity_enable << 3
sam_grove 5:3f93dd1d4cb3 222 | parity_select << 4;
sam_grove 5:3f93dd1d4cb3 223 }
sam_grove 5:3f93dd1d4cb3 224
sam_grove 5:3f93dd1d4cb3 225 /******************************************************************************
sam_grove 5:3f93dd1d4cb3 226 * INTERRUPTS HANDLING
sam_grove 5:3f93dd1d4cb3 227 ******************************************************************************/
sam_grove 5:3f93dd1d4cb3 228 static inline void uart_irq(uint32_t iir, uint32_t index) {
sam_grove 5:3f93dd1d4cb3 229 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
sam_grove 5:3f93dd1d4cb3 230 SerialIrq irq_type;
sam_grove 5:3f93dd1d4cb3 231 switch (iir) {
sam_grove 5:3f93dd1d4cb3 232 case 1: irq_type = TxIrq; break;
sam_grove 5:3f93dd1d4cb3 233 case 2: irq_type = RxIrq; break;
sam_grove 5:3f93dd1d4cb3 234 default: return;
sam_grove 5:3f93dd1d4cb3 235 }
sam_grove 5:3f93dd1d4cb3 236
sam_grove 5:3f93dd1d4cb3 237 if (serial_irq_ids[index] != 0)
sam_grove 5:3f93dd1d4cb3 238 irq_handler(serial_irq_ids[index], irq_type);
sam_grove 5:3f93dd1d4cb3 239 }
sam_grove 5:3f93dd1d4cb3 240
sam_grove 5:3f93dd1d4cb3 241 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
sam_grove 5:3f93dd1d4cb3 242 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
sam_grove 5:3f93dd1d4cb3 243 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
sam_grove 5:3f93dd1d4cb3 244 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
sam_grove 5:3f93dd1d4cb3 245
sam_grove 5:3f93dd1d4cb3 246 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sam_grove 5:3f93dd1d4cb3 247 irq_handler = handler;
sam_grove 5:3f93dd1d4cb3 248 serial_irq_ids[obj->index] = id;
sam_grove 5:3f93dd1d4cb3 249 }
sam_grove 5:3f93dd1d4cb3 250
sam_grove 5:3f93dd1d4cb3 251 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sam_grove 5:3f93dd1d4cb3 252 IRQn_Type irq_n = (IRQn_Type)0;
sam_grove 5:3f93dd1d4cb3 253 uint32_t vector = 0;
sam_grove 5:3f93dd1d4cb3 254 switch ((int)obj->uart) {
sam_grove 5:3f93dd1d4cb3 255 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
sam_grove 5:3f93dd1d4cb3 256 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
sam_grove 5:3f93dd1d4cb3 257 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
sam_grove 5:3f93dd1d4cb3 258 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
sam_grove 5:3f93dd1d4cb3 259 }
sam_grove 5:3f93dd1d4cb3 260
sam_grove 5:3f93dd1d4cb3 261 if (enable) {
sam_grove 5:3f93dd1d4cb3 262 obj->uart->IER |= 1 << irq;
sam_grove 5:3f93dd1d4cb3 263 NVIC_SetVector(irq_n, vector);
sam_grove 5:3f93dd1d4cb3 264 NVIC_EnableIRQ(irq_n);
sam_grove 5:3f93dd1d4cb3 265 } else { // disable
sam_grove 5:3f93dd1d4cb3 266 int all_disabled = 0;
sam_grove 5:3f93dd1d4cb3 267 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sam_grove 5:3f93dd1d4cb3 268 obj->uart->IER &= ~(1 << irq);
sam_grove 5:3f93dd1d4cb3 269 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
sam_grove 5:3f93dd1d4cb3 270 if (all_disabled)
sam_grove 5:3f93dd1d4cb3 271 NVIC_DisableIRQ(irq_n);
sam_grove 5:3f93dd1d4cb3 272 }
sam_grove 5:3f93dd1d4cb3 273 }
sam_grove 5:3f93dd1d4cb3 274
sam_grove 5:3f93dd1d4cb3 275 /******************************************************************************
sam_grove 5:3f93dd1d4cb3 276 * READ/WRITE
sam_grove 5:3f93dd1d4cb3 277 ******************************************************************************/
sam_grove 5:3f93dd1d4cb3 278 int serial_getc(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 279 while (!serial_readable(obj));
sam_grove 5:3f93dd1d4cb3 280 return obj->uart->RBR;
sam_grove 5:3f93dd1d4cb3 281 }
sam_grove 5:3f93dd1d4cb3 282
sam_grove 5:3f93dd1d4cb3 283 void serial_putc(serial_t *obj, int c) {
sam_grove 5:3f93dd1d4cb3 284 while (!serial_writable(obj));
sam_grove 5:3f93dd1d4cb3 285 obj->uart->THR = c;
sam_grove 5:3f93dd1d4cb3 286 }
sam_grove 5:3f93dd1d4cb3 287
sam_grove 5:3f93dd1d4cb3 288 int serial_readable(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 289 return obj->uart->LSR & 0x01;
sam_grove 5:3f93dd1d4cb3 290 }
sam_grove 5:3f93dd1d4cb3 291
sam_grove 5:3f93dd1d4cb3 292 int serial_writable(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 293 return obj->uart->LSR & 0x20;
sam_grove 5:3f93dd1d4cb3 294 }
sam_grove 5:3f93dd1d4cb3 295
sam_grove 5:3f93dd1d4cb3 296 void serial_clear(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 297 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sam_grove 5:3f93dd1d4cb3 298 | 1 << 1 // rx FIFO reset
sam_grove 5:3f93dd1d4cb3 299 | 1 << 2 // tx FIFO reset
sam_grove 5:3f93dd1d4cb3 300 | 0 << 6; // interrupt depth
sam_grove 5:3f93dd1d4cb3 301 }
sam_grove 5:3f93dd1d4cb3 302
sam_grove 5:3f93dd1d4cb3 303 void serial_pinout_tx(PinName tx) {
sam_grove 5:3f93dd1d4cb3 304 pinmap_pinout(tx, PinMap_UART_TX);
sam_grove 5:3f93dd1d4cb3 305 }
sam_grove 5:3f93dd1d4cb3 306
sam_grove 5:3f93dd1d4cb3 307 void serial_break_set(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 308 obj->uart->LCR |= (1 << 6);
sam_grove 5:3f93dd1d4cb3 309 }
sam_grove 5:3f93dd1d4cb3 310
sam_grove 5:3f93dd1d4cb3 311 void serial_break_clear(serial_t *obj) {
sam_grove 5:3f93dd1d4cb3 312 obj->uart->LCR &= ~(1 << 6);
sam_grove 5:3f93dd1d4cb3 313 }
sam_grove 5:3f93dd1d4cb3 314