Mike Pulice / ublox_C200Test

Integrating the ublox LISA C200 modem

Fork of SprintUSBModemHTTPClientTest by Donatien Garnier

mbed-rtos/rtx/HAL_CM.c@5:3f93dd1d4cb3, 2013-09-26 (annotated)

Committer:
sam_grove
Date:
Thu Sep 26 00:44:20 2013 -0500
Revision:
5:3f93dd1d4cb3
Exported program and replaced contents of the repo with the source

to build and debug using keil mdk. Libs NOT upto date are lwip, lwip-sys

and socket. these have newer versions under mbed_official but were starting

from a know working point

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sam_grove 5:3f93dd1d4cb3 1 /*----------------------------------------------------------------------------
sam_grove 5:3f93dd1d4cb3 2 * RL-ARM - RTX
sam_grove 5:3f93dd1d4cb3 3 *----------------------------------------------------------------------------
sam_grove 5:3f93dd1d4cb3 4 * Name: HAL_CM.C
sam_grove 5:3f93dd1d4cb3 5 * Purpose: Hardware Abstraction Layer for Cortex-M
sam_grove 5:3f93dd1d4cb3 6 * Rev.: V4.60
sam_grove 5:3f93dd1d4cb3 7 *----------------------------------------------------------------------------
sam_grove 5:3f93dd1d4cb3 8 *
sam_grove 5:3f93dd1d4cb3 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
sam_grove 5:3f93dd1d4cb3 10 * All rights reserved.
sam_grove 5:3f93dd1d4cb3 11 * Redistribution and use in source and binary forms, with or without
sam_grove 5:3f93dd1d4cb3 12 * modification, are permitted provided that the following conditions are met:
sam_grove 5:3f93dd1d4cb3 13 * - Redistributions of source code must retain the above copyright
sam_grove 5:3f93dd1d4cb3 14 * notice, this list of conditions and the following disclaimer.
sam_grove 5:3f93dd1d4cb3 15 * - Redistributions in binary form must reproduce the above copyright
sam_grove 5:3f93dd1d4cb3 16 * notice, this list of conditions and the following disclaimer in the
sam_grove 5:3f93dd1d4cb3 17 * documentation and/or other materials provided with the distribution.
sam_grove 5:3f93dd1d4cb3 18 * - Neither the name of ARM nor the names of its contributors may be used
sam_grove 5:3f93dd1d4cb3 19 * to endorse or promote products derived from this software without
sam_grove 5:3f93dd1d4cb3 20 * specific prior written permission.
sam_grove 5:3f93dd1d4cb3 21 *
sam_grove 5:3f93dd1d4cb3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sam_grove 5:3f93dd1d4cb3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sam_grove 5:3f93dd1d4cb3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
sam_grove 5:3f93dd1d4cb3 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
sam_grove 5:3f93dd1d4cb3 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
sam_grove 5:3f93dd1d4cb3 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
sam_grove 5:3f93dd1d4cb3 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
sam_grove 5:3f93dd1d4cb3 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
sam_grove 5:3f93dd1d4cb3 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
sam_grove 5:3f93dd1d4cb3 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
sam_grove 5:3f93dd1d4cb3 32 * POSSIBILITY OF SUCH DAMAGE.
sam_grove 5:3f93dd1d4cb3 33 *---------------------------------------------------------------------------*/
sam_grove 5:3f93dd1d4cb3 34
sam_grove 5:3f93dd1d4cb3 35 #include "rt_TypeDef.h"
sam_grove 5:3f93dd1d4cb3 36 #include "RTX_Conf.h"
sam_grove 5:3f93dd1d4cb3 37 #include "rt_HAL_CM.h"
sam_grove 5:3f93dd1d4cb3 38
sam_grove 5:3f93dd1d4cb3 39
sam_grove 5:3f93dd1d4cb3 40 /*----------------------------------------------------------------------------
sam_grove 5:3f93dd1d4cb3 41 * Global Variables
sam_grove 5:3f93dd1d4cb3 42 *---------------------------------------------------------------------------*/
sam_grove 5:3f93dd1d4cb3 43
sam_grove 5:3f93dd1d4cb3 44 #ifdef DBG_MSG
sam_grove 5:3f93dd1d4cb3 45 BIT dbg_msg;
sam_grove 5:3f93dd1d4cb3 46 #endif
sam_grove 5:3f93dd1d4cb3 47
sam_grove 5:3f93dd1d4cb3 48 /*----------------------------------------------------------------------------
sam_grove 5:3f93dd1d4cb3 49 * Functions
sam_grove 5:3f93dd1d4cb3 50 *---------------------------------------------------------------------------*/
sam_grove 5:3f93dd1d4cb3 51
sam_grove 5:3f93dd1d4cb3 52
sam_grove 5:3f93dd1d4cb3 53 /*--------------------------- rt_init_stack ---------------------------------*/
sam_grove 5:3f93dd1d4cb3 54
sam_grove 5:3f93dd1d4cb3 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
sam_grove 5:3f93dd1d4cb3 56 /* Prepare TCB and saved context for a first time start of a task. */
sam_grove 5:3f93dd1d4cb3 57 U32 *stk,i,size;
sam_grove 5:3f93dd1d4cb3 58
sam_grove 5:3f93dd1d4cb3 59 /* Prepare a complete interrupt frame for first task start */
sam_grove 5:3f93dd1d4cb3 60 size = p_TCB->priv_stack >> 2;
sam_grove 5:3f93dd1d4cb3 61
sam_grove 5:3f93dd1d4cb3 62 /* Write to the top of stack. */
sam_grove 5:3f93dd1d4cb3 63 stk = &p_TCB->stack[size];
sam_grove 5:3f93dd1d4cb3 64
sam_grove 5:3f93dd1d4cb3 65 /* Auto correct to 8-byte ARM stack alignment. */
sam_grove 5:3f93dd1d4cb3 66 if ((U32)stk & 0x04) {
sam_grove 5:3f93dd1d4cb3 67 stk--;
sam_grove 5:3f93dd1d4cb3 68 }
sam_grove 5:3f93dd1d4cb3 69
sam_grove 5:3f93dd1d4cb3 70 stk -= 16;
sam_grove 5:3f93dd1d4cb3 71
sam_grove 5:3f93dd1d4cb3 72 /* Default xPSR and initial PC */
sam_grove 5:3f93dd1d4cb3 73 stk[15] = INITIAL_xPSR;
sam_grove 5:3f93dd1d4cb3 74 stk[14] = (U32)task_body;
sam_grove 5:3f93dd1d4cb3 75
sam_grove 5:3f93dd1d4cb3 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
sam_grove 5:3f93dd1d4cb3 77 for (i = 0; i < 14; i++) {
sam_grove 5:3f93dd1d4cb3 78 stk[i] = 0;
sam_grove 5:3f93dd1d4cb3 79 }
sam_grove 5:3f93dd1d4cb3 80
sam_grove 5:3f93dd1d4cb3 81 /* Assign a void pointer to R0. */
sam_grove 5:3f93dd1d4cb3 82 stk[8] = (U32)p_TCB->msg;
sam_grove 5:3f93dd1d4cb3 83
sam_grove 5:3f93dd1d4cb3 84 /* Initial Task stack pointer. */
sam_grove 5:3f93dd1d4cb3 85 p_TCB->tsk_stack = (U32)stk;
sam_grove 5:3f93dd1d4cb3 86
sam_grove 5:3f93dd1d4cb3 87 /* Task entry point. */
sam_grove 5:3f93dd1d4cb3 88 p_TCB->ptask = task_body;
sam_grove 5:3f93dd1d4cb3 89
sam_grove 5:3f93dd1d4cb3 90 /* Set a magic word for checking of stack overflow.
sam_grove 5:3f93dd1d4cb3 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
sam_grove 5:3f93dd1d4cb3 92 heap, therefore the last word of the stack is a moving target.
sam_grove 5:3f93dd1d4cb3 93 We want to do stack/heap collision detection instead.
sam_grove 5:3f93dd1d4cb3 94 */
sam_grove 5:3f93dd1d4cb3 95 if (p_TCB->task_id != 0x01)
sam_grove 5:3f93dd1d4cb3 96 p_TCB->stack[0] = MAGIC_WORD;
sam_grove 5:3f93dd1d4cb3 97 }
sam_grove 5:3f93dd1d4cb3 98
sam_grove 5:3f93dd1d4cb3 99
sam_grove 5:3f93dd1d4cb3 100 /*--------------------------- rt_ret_val ----------------------------------*/
sam_grove 5:3f93dd1d4cb3 101
sam_grove 5:3f93dd1d4cb3 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
sam_grove 5:3f93dd1d4cb3 103 /* Get pointer to task return value registers (R0..R3) in Stack */
sam_grove 5:3f93dd1d4cb3 104 #if (__TARGET_FPU_VFP)
sam_grove 5:3f93dd1d4cb3 105 if (p_TCB->stack_frame) {
sam_grove 5:3f93dd1d4cb3 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
sam_grove 5:3f93dd1d4cb3 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
sam_grove 5:3f93dd1d4cb3 108 } else {
sam_grove 5:3f93dd1d4cb3 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
sam_grove 5:3f93dd1d4cb3 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
sam_grove 5:3f93dd1d4cb3 111 }
sam_grove 5:3f93dd1d4cb3 112 #else
sam_grove 5:3f93dd1d4cb3 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
sam_grove 5:3f93dd1d4cb3 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
sam_grove 5:3f93dd1d4cb3 115 #endif
sam_grove 5:3f93dd1d4cb3 116 }
sam_grove 5:3f93dd1d4cb3 117
sam_grove 5:3f93dd1d4cb3 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
sam_grove 5:3f93dd1d4cb3 119 U32 *ret;
sam_grove 5:3f93dd1d4cb3 120
sam_grove 5:3f93dd1d4cb3 121 ret = rt_ret_regs(p_TCB);
sam_grove 5:3f93dd1d4cb3 122 ret[0] = v0;
sam_grove 5:3f93dd1d4cb3 123 }
sam_grove 5:3f93dd1d4cb3 124
sam_grove 5:3f93dd1d4cb3 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
sam_grove 5:3f93dd1d4cb3 126 U32 *ret;
sam_grove 5:3f93dd1d4cb3 127
sam_grove 5:3f93dd1d4cb3 128 ret = rt_ret_regs(p_TCB);
sam_grove 5:3f93dd1d4cb3 129 ret[0] = v0;
sam_grove 5:3f93dd1d4cb3 130 ret[1] = v1;
sam_grove 5:3f93dd1d4cb3 131 }
sam_grove 5:3f93dd1d4cb3 132
sam_grove 5:3f93dd1d4cb3 133
sam_grove 5:3f93dd1d4cb3 134 /*--------------------------- dbg_init --------------------------------------*/
sam_grove 5:3f93dd1d4cb3 135
sam_grove 5:3f93dd1d4cb3 136 #ifdef DBG_MSG
sam_grove 5:3f93dd1d4cb3 137 void dbg_init (void) {
sam_grove 5:3f93dd1d4cb3 138 if ((DEMCR & DEMCR_TRCENA) &&
sam_grove 5:3f93dd1d4cb3 139 (ITM_CONTROL & ITM_ITMENA) &&
sam_grove 5:3f93dd1d4cb3 140 (ITM_ENABLE & (1UL << 31))) {
sam_grove 5:3f93dd1d4cb3 141 dbg_msg = __TRUE;
sam_grove 5:3f93dd1d4cb3 142 }
sam_grove 5:3f93dd1d4cb3 143 }
sam_grove 5:3f93dd1d4cb3 144 #endif
sam_grove 5:3f93dd1d4cb3 145
sam_grove 5:3f93dd1d4cb3 146 /*--------------------------- dbg_task_notify -------------------------------*/
sam_grove 5:3f93dd1d4cb3 147
sam_grove 5:3f93dd1d4cb3 148 #ifdef DBG_MSG
sam_grove 5:3f93dd1d4cb3 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
sam_grove 5:3f93dd1d4cb3 150 while (ITM_PORT31_U32 == 0);
sam_grove 5:3f93dd1d4cb3 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
sam_grove 5:3f93dd1d4cb3 152 while (ITM_PORT31_U32 == 0);
sam_grove 5:3f93dd1d4cb3 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
sam_grove 5:3f93dd1d4cb3 154 }
sam_grove 5:3f93dd1d4cb3 155 #endif
sam_grove 5:3f93dd1d4cb3 156
sam_grove 5:3f93dd1d4cb3 157 /*--------------------------- dbg_task_switch -------------------------------*/
sam_grove 5:3f93dd1d4cb3 158
sam_grove 5:3f93dd1d4cb3 159 #ifdef DBG_MSG
sam_grove 5:3f93dd1d4cb3 160 void dbg_task_switch (U32 task_id) {
sam_grove 5:3f93dd1d4cb3 161 while (ITM_PORT31_U32 == 0);
sam_grove 5:3f93dd1d4cb3 162 ITM_PORT31_U8 = task_id;
sam_grove 5:3f93dd1d4cb3 163 }
sam_grove 5:3f93dd1d4cb3 164 #endif
sam_grove 5:3f93dd1d4cb3 165
sam_grove 5:3f93dd1d4cb3 166
sam_grove 5:3f93dd1d4cb3 167 /*----------------------------------------------------------------------------
sam_grove 5:3f93dd1d4cb3 168 * end of file
sam_grove 5:3f93dd1d4cb3 169 *---------------------------------------------------------------------------*/
sam_grove 5:3f93dd1d4cb3 170