mbed library sources
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_hal_dma.c@354:e67efb2aab0e, 2014-10-16 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Oct 16 15:00:10 2014 +0100
- Revision:
- 354:e67efb2aab0e
Synchronized with git revision 36a8882a54cbf25645fa6e11af937c8b8048e184
Full URL: https://github.com/mbedmicro/mbed/commit/36a8882a54cbf25645fa6e11af937c8b8048e184/
Targets: NUCLEO_L152RE - Migration to STM32Cube driver (CMSIS and HAL)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 354:e67efb2aab0e | 1 | /** |
mbed_official | 354:e67efb2aab0e | 2 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 3 | * @file stm32l1xx_hal_dma.c |
mbed_official | 354:e67efb2aab0e | 4 | * @author MCD Application Team |
mbed_official | 354:e67efb2aab0e | 5 | * @version V1.0.0 |
mbed_official | 354:e67efb2aab0e | 6 | * @date 5-September-2014 |
mbed_official | 354:e67efb2aab0e | 7 | * @brief DMA HAL module driver. |
mbed_official | 354:e67efb2aab0e | 8 | * |
mbed_official | 354:e67efb2aab0e | 9 | * This file provides firmware functions to manage the following |
mbed_official | 354:e67efb2aab0e | 10 | * functionalities of the Direct Memory Access (DMA) peripheral: |
mbed_official | 354:e67efb2aab0e | 11 | * + Initialization and de-initialization functions |
mbed_official | 354:e67efb2aab0e | 12 | * + IO operation functions |
mbed_official | 354:e67efb2aab0e | 13 | * + Peripheral State and errors functions |
mbed_official | 354:e67efb2aab0e | 14 | @verbatim |
mbed_official | 354:e67efb2aab0e | 15 | ============================================================================== |
mbed_official | 354:e67efb2aab0e | 16 | ##### How to use this driver ##### |
mbed_official | 354:e67efb2aab0e | 17 | ============================================================================== |
mbed_official | 354:e67efb2aab0e | 18 | [..] |
mbed_official | 354:e67efb2aab0e | 19 | (#) Enable and configure the peripheral to be connected to the DMA Channel |
mbed_official | 354:e67efb2aab0e | 20 | (except for internal SRAM / FLASH memories: no initialization is |
mbed_official | 354:e67efb2aab0e | 21 | necessary) please refer to Reference manual for connection between peripherals |
mbed_official | 354:e67efb2aab0e | 22 | and DMA requests . |
mbed_official | 354:e67efb2aab0e | 23 | |
mbed_official | 354:e67efb2aab0e | 24 | (#) For a given Channel, program the required configuration through the following parameters: |
mbed_official | 354:e67efb2aab0e | 25 | Transfer Direction, Source and Destination data formats, |
mbed_official | 354:e67efb2aab0e | 26 | Circular, Normal or peripheral flow control mode, Channel Priority level, |
mbed_official | 354:e67efb2aab0e | 27 | Source and Destination Increment mode, FIFO mode and its Threshold (if needed), |
mbed_official | 354:e67efb2aab0e | 28 | Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function. |
mbed_official | 354:e67efb2aab0e | 29 | |
mbed_official | 354:e67efb2aab0e | 30 | *** Polling mode IO operation *** |
mbed_official | 354:e67efb2aab0e | 31 | ================================= |
mbed_official | 354:e67efb2aab0e | 32 | [..] |
mbed_official | 354:e67efb2aab0e | 33 | (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source |
mbed_official | 354:e67efb2aab0e | 34 | address and destination address and the Length of data to be transferred |
mbed_official | 354:e67efb2aab0e | 35 | (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this |
mbed_official | 354:e67efb2aab0e | 36 | case a fixed Timeout can be configured by User depending from his application. |
mbed_official | 354:e67efb2aab0e | 37 | |
mbed_official | 354:e67efb2aab0e | 38 | *** Interrupt mode IO operation *** |
mbed_official | 354:e67efb2aab0e | 39 | =================================== |
mbed_official | 354:e67efb2aab0e | 40 | [..] |
mbed_official | 354:e67efb2aab0e | 41 | (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() |
mbed_official | 354:e67efb2aab0e | 42 | (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() |
mbed_official | 354:e67efb2aab0e | 43 | (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of |
mbed_official | 354:e67efb2aab0e | 44 | Source address and destination address and the Length of data to be transferred. In this |
mbed_official | 354:e67efb2aab0e | 45 | case the DMA interrupt is configured |
mbed_official | 354:e67efb2aab0e | 46 | (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine |
mbed_official | 354:e67efb2aab0e | 47 | (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can |
mbed_official | 354:e67efb2aab0e | 48 | add his own function by customization of function pointer XferCpltCallback and |
mbed_official | 354:e67efb2aab0e | 49 | XferErrorCallback (i.e a member of DMA handle structure). |
mbed_official | 354:e67efb2aab0e | 50 | |
mbed_official | 354:e67efb2aab0e | 51 | (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error |
mbed_official | 354:e67efb2aab0e | 52 | detection. |
mbed_official | 354:e67efb2aab0e | 53 | |
mbed_official | 354:e67efb2aab0e | 54 | (#) Use HAL_DMA_Abort() function to abort the current transfer |
mbed_official | 354:e67efb2aab0e | 55 | |
mbed_official | 354:e67efb2aab0e | 56 | -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. |
mbed_official | 354:e67efb2aab0e | 57 | |
mbed_official | 354:e67efb2aab0e | 58 | *** DMA HAL driver macros list *** |
mbed_official | 354:e67efb2aab0e | 59 | ============================================= |
mbed_official | 354:e67efb2aab0e | 60 | [..] |
mbed_official | 354:e67efb2aab0e | 61 | Below the list of most used macros in DMA HAL driver. |
mbed_official | 354:e67efb2aab0e | 62 | |
mbed_official | 354:e67efb2aab0e | 63 | (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 64 | (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 65 | (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags. |
mbed_official | 354:e67efb2aab0e | 66 | (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags. |
mbed_official | 354:e67efb2aab0e | 67 | (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts. |
mbed_official | 354:e67efb2aab0e | 68 | (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts. |
mbed_official | 354:e67efb2aab0e | 69 | (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not. |
mbed_official | 354:e67efb2aab0e | 70 | |
mbed_official | 354:e67efb2aab0e | 71 | [..] |
mbed_official | 354:e67efb2aab0e | 72 | (@) You can refer to the DMA HAL driver header file for more useful macros |
mbed_official | 354:e67efb2aab0e | 73 | |
mbed_official | 354:e67efb2aab0e | 74 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 75 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 76 | * @attention |
mbed_official | 354:e67efb2aab0e | 77 | * |
mbed_official | 354:e67efb2aab0e | 78 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 354:e67efb2aab0e | 79 | * |
mbed_official | 354:e67efb2aab0e | 80 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 354:e67efb2aab0e | 81 | * are permitted provided that the following conditions are met: |
mbed_official | 354:e67efb2aab0e | 82 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 83 | * this list of conditions and the following disclaimer. |
mbed_official | 354:e67efb2aab0e | 84 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 85 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 354:e67efb2aab0e | 86 | * and/or other materials provided with the distribution. |
mbed_official | 354:e67efb2aab0e | 87 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 354:e67efb2aab0e | 88 | * may be used to endorse or promote products derived from this software |
mbed_official | 354:e67efb2aab0e | 89 | * without specific prior written permission. |
mbed_official | 354:e67efb2aab0e | 90 | * |
mbed_official | 354:e67efb2aab0e | 91 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 354:e67efb2aab0e | 92 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 354:e67efb2aab0e | 93 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 354:e67efb2aab0e | 94 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 354:e67efb2aab0e | 95 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 354:e67efb2aab0e | 96 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 354:e67efb2aab0e | 97 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 354:e67efb2aab0e | 98 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 354:e67efb2aab0e | 99 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 354:e67efb2aab0e | 100 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 354:e67efb2aab0e | 101 | * |
mbed_official | 354:e67efb2aab0e | 102 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 103 | */ |
mbed_official | 354:e67efb2aab0e | 104 | |
mbed_official | 354:e67efb2aab0e | 105 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 106 | #include "stm32l1xx_hal.h" |
mbed_official | 354:e67efb2aab0e | 107 | |
mbed_official | 354:e67efb2aab0e | 108 | /** @addtogroup STM32L1xx_HAL_Driver |
mbed_official | 354:e67efb2aab0e | 109 | * @{ |
mbed_official | 354:e67efb2aab0e | 110 | */ |
mbed_official | 354:e67efb2aab0e | 111 | |
mbed_official | 354:e67efb2aab0e | 112 | /** @defgroup DMA DMA |
mbed_official | 354:e67efb2aab0e | 113 | * @brief DMA HAL module driver |
mbed_official | 354:e67efb2aab0e | 114 | * @{ |
mbed_official | 354:e67efb2aab0e | 115 | */ |
mbed_official | 354:e67efb2aab0e | 116 | |
mbed_official | 354:e67efb2aab0e | 117 | #ifdef HAL_DMA_MODULE_ENABLED |
mbed_official | 354:e67efb2aab0e | 118 | |
mbed_official | 354:e67efb2aab0e | 119 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 120 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 121 | /** @defgroup DMA_Private_Constants DMA Private Constants |
mbed_official | 354:e67efb2aab0e | 122 | * @{ |
mbed_official | 354:e67efb2aab0e | 123 | */ |
mbed_official | 354:e67efb2aab0e | 124 | #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */ |
mbed_official | 354:e67efb2aab0e | 125 | /** |
mbed_official | 354:e67efb2aab0e | 126 | * @} |
mbed_official | 354:e67efb2aab0e | 127 | */ |
mbed_official | 354:e67efb2aab0e | 128 | |
mbed_official | 354:e67efb2aab0e | 129 | |
mbed_official | 354:e67efb2aab0e | 130 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 131 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 132 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 133 | /** @defgroup DMA_Private_Functions DMA Private Functions |
mbed_official | 354:e67efb2aab0e | 134 | * @{ |
mbed_official | 354:e67efb2aab0e | 135 | */ |
mbed_official | 354:e67efb2aab0e | 136 | static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
mbed_official | 354:e67efb2aab0e | 137 | /** |
mbed_official | 354:e67efb2aab0e | 138 | * @} |
mbed_official | 354:e67efb2aab0e | 139 | */ |
mbed_official | 354:e67efb2aab0e | 140 | |
mbed_official | 354:e67efb2aab0e | 141 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 142 | |
mbed_official | 354:e67efb2aab0e | 143 | /** @defgroup DMA_Exported_Functions DMA Exported Functions |
mbed_official | 354:e67efb2aab0e | 144 | * @{ |
mbed_official | 354:e67efb2aab0e | 145 | */ |
mbed_official | 354:e67efb2aab0e | 146 | |
mbed_official | 354:e67efb2aab0e | 147 | /** @defgroup DMA_Group1 Initialization and de-initialization functions |
mbed_official | 354:e67efb2aab0e | 148 | * @brief Initialization and de-initialization functions |
mbed_official | 354:e67efb2aab0e | 149 | * |
mbed_official | 354:e67efb2aab0e | 150 | @verbatim |
mbed_official | 354:e67efb2aab0e | 151 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 152 | ##### Initialization and de-initialization functions ##### |
mbed_official | 354:e67efb2aab0e | 153 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 154 | [..] |
mbed_official | 354:e67efb2aab0e | 155 | This section provides functions allowing to initialize the DMA Channel source |
mbed_official | 354:e67efb2aab0e | 156 | and destination addresses, incrementation and data sizes, transfer direction, |
mbed_official | 354:e67efb2aab0e | 157 | circular/normal mode selection, memory-to-memory mode selection and Channel priority value. |
mbed_official | 354:e67efb2aab0e | 158 | [..] |
mbed_official | 354:e67efb2aab0e | 159 | The HAL_DMA_Init() function follows the DMA configuration procedures as described in |
mbed_official | 354:e67efb2aab0e | 160 | reference manual. |
mbed_official | 354:e67efb2aab0e | 161 | |
mbed_official | 354:e67efb2aab0e | 162 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 163 | * @{ |
mbed_official | 354:e67efb2aab0e | 164 | */ |
mbed_official | 354:e67efb2aab0e | 165 | |
mbed_official | 354:e67efb2aab0e | 166 | /** |
mbed_official | 354:e67efb2aab0e | 167 | * @brief Initializes the DMA according to the specified |
mbed_official | 354:e67efb2aab0e | 168 | * parameters in the DMA_InitTypeDef and create the associated handle. |
mbed_official | 354:e67efb2aab0e | 169 | * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 170 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 171 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 172 | */ |
mbed_official | 354:e67efb2aab0e | 173 | HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) |
mbed_official | 354:e67efb2aab0e | 174 | { |
mbed_official | 354:e67efb2aab0e | 175 | uint32_t tmp = 0; |
mbed_official | 354:e67efb2aab0e | 176 | |
mbed_official | 354:e67efb2aab0e | 177 | /* Check the DMA peripheral state */ |
mbed_official | 354:e67efb2aab0e | 178 | if(hdma == HAL_NULL) |
mbed_official | 354:e67efb2aab0e | 179 | { |
mbed_official | 354:e67efb2aab0e | 180 | return HAL_ERROR; |
mbed_official | 354:e67efb2aab0e | 181 | } |
mbed_official | 354:e67efb2aab0e | 182 | |
mbed_official | 354:e67efb2aab0e | 183 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 184 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); |
mbed_official | 354:e67efb2aab0e | 185 | assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); |
mbed_official | 354:e67efb2aab0e | 186 | assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); |
mbed_official | 354:e67efb2aab0e | 187 | assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); |
mbed_official | 354:e67efb2aab0e | 188 | assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); |
mbed_official | 354:e67efb2aab0e | 189 | assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); |
mbed_official | 354:e67efb2aab0e | 190 | assert_param(IS_DMA_MODE(hdma->Init.Mode)); |
mbed_official | 354:e67efb2aab0e | 191 | assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); |
mbed_official | 354:e67efb2aab0e | 192 | |
mbed_official | 354:e67efb2aab0e | 193 | /* Change DMA peripheral state */ |
mbed_official | 354:e67efb2aab0e | 194 | hdma->State = HAL_DMA_STATE_BUSY; |
mbed_official | 354:e67efb2aab0e | 195 | |
mbed_official | 354:e67efb2aab0e | 196 | /* Get the CR register value */ |
mbed_official | 354:e67efb2aab0e | 197 | tmp = hdma->Instance->CCR; |
mbed_official | 354:e67efb2aab0e | 198 | |
mbed_official | 354:e67efb2aab0e | 199 | /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ |
mbed_official | 354:e67efb2aab0e | 200 | tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ |
mbed_official | 354:e67efb2aab0e | 201 | DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ |
mbed_official | 354:e67efb2aab0e | 202 | DMA_CCR_DIR)); |
mbed_official | 354:e67efb2aab0e | 203 | |
mbed_official | 354:e67efb2aab0e | 204 | /* Prepare the DMA Channel configuration */ |
mbed_official | 354:e67efb2aab0e | 205 | tmp |= hdma->Init.Direction | |
mbed_official | 354:e67efb2aab0e | 206 | hdma->Init.PeriphInc | hdma->Init.MemInc | |
mbed_official | 354:e67efb2aab0e | 207 | hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | |
mbed_official | 354:e67efb2aab0e | 208 | hdma->Init.Mode | hdma->Init.Priority; |
mbed_official | 354:e67efb2aab0e | 209 | |
mbed_official | 354:e67efb2aab0e | 210 | /* Write to DMA Channel CR register */ |
mbed_official | 354:e67efb2aab0e | 211 | hdma->Instance->CCR = tmp; |
mbed_official | 354:e67efb2aab0e | 212 | |
mbed_official | 354:e67efb2aab0e | 213 | /* Initialise the error code */ |
mbed_official | 354:e67efb2aab0e | 214 | hdma->ErrorCode = HAL_DMA_ERROR_NONE; |
mbed_official | 354:e67efb2aab0e | 215 | |
mbed_official | 354:e67efb2aab0e | 216 | /* Initialize the DMA state*/ |
mbed_official | 354:e67efb2aab0e | 217 | hdma->State = HAL_DMA_STATE_READY; |
mbed_official | 354:e67efb2aab0e | 218 | |
mbed_official | 354:e67efb2aab0e | 219 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 220 | } |
mbed_official | 354:e67efb2aab0e | 221 | |
mbed_official | 354:e67efb2aab0e | 222 | /** |
mbed_official | 354:e67efb2aab0e | 223 | * @brief DeInitializes the DMA peripheral |
mbed_official | 354:e67efb2aab0e | 224 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 225 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 226 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 227 | */ |
mbed_official | 354:e67efb2aab0e | 228 | HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) |
mbed_official | 354:e67efb2aab0e | 229 | { |
mbed_official | 354:e67efb2aab0e | 230 | /* Check the DMA peripheral state */ |
mbed_official | 354:e67efb2aab0e | 231 | if(hdma == HAL_NULL) |
mbed_official | 354:e67efb2aab0e | 232 | { |
mbed_official | 354:e67efb2aab0e | 233 | return HAL_ERROR; |
mbed_official | 354:e67efb2aab0e | 234 | } |
mbed_official | 354:e67efb2aab0e | 235 | |
mbed_official | 354:e67efb2aab0e | 236 | /* Check the DMA peripheral handle */ |
mbed_official | 354:e67efb2aab0e | 237 | if(hdma->State == HAL_DMA_STATE_BUSY) |
mbed_official | 354:e67efb2aab0e | 238 | { |
mbed_official | 354:e67efb2aab0e | 239 | return HAL_ERROR; |
mbed_official | 354:e67efb2aab0e | 240 | } |
mbed_official | 354:e67efb2aab0e | 241 | |
mbed_official | 354:e67efb2aab0e | 242 | /* Disable the selected DMA Channelx */ |
mbed_official | 354:e67efb2aab0e | 243 | __HAL_DMA_DISABLE(hdma); |
mbed_official | 354:e67efb2aab0e | 244 | |
mbed_official | 354:e67efb2aab0e | 245 | /* Reset DMA Channel control register */ |
mbed_official | 354:e67efb2aab0e | 246 | hdma->Instance->CCR = 0; |
mbed_official | 354:e67efb2aab0e | 247 | |
mbed_official | 354:e67efb2aab0e | 248 | /* Reset DMA Channel Number of Data to Transfer register */ |
mbed_official | 354:e67efb2aab0e | 249 | hdma->Instance->CNDTR = 0; |
mbed_official | 354:e67efb2aab0e | 250 | |
mbed_official | 354:e67efb2aab0e | 251 | /* Reset DMA Channel peripheral address register */ |
mbed_official | 354:e67efb2aab0e | 252 | hdma->Instance->CPAR = 0; |
mbed_official | 354:e67efb2aab0e | 253 | |
mbed_official | 354:e67efb2aab0e | 254 | /* Reset DMA Channel memory address register */ |
mbed_official | 354:e67efb2aab0e | 255 | hdma->Instance->CMAR = 0; |
mbed_official | 354:e67efb2aab0e | 256 | |
mbed_official | 354:e67efb2aab0e | 257 | /* Clear all flags */ |
mbed_official | 354:e67efb2aab0e | 258 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 259 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 260 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 261 | |
mbed_official | 354:e67efb2aab0e | 262 | /* Initialise the error code */ |
mbed_official | 354:e67efb2aab0e | 263 | hdma->ErrorCode = HAL_DMA_ERROR_NONE; |
mbed_official | 354:e67efb2aab0e | 264 | |
mbed_official | 354:e67efb2aab0e | 265 | /* Initialize the DMA state */ |
mbed_official | 354:e67efb2aab0e | 266 | hdma->State = HAL_DMA_STATE_RESET; |
mbed_official | 354:e67efb2aab0e | 267 | |
mbed_official | 354:e67efb2aab0e | 268 | /* Release Lock */ |
mbed_official | 354:e67efb2aab0e | 269 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 270 | |
mbed_official | 354:e67efb2aab0e | 271 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 272 | } |
mbed_official | 354:e67efb2aab0e | 273 | |
mbed_official | 354:e67efb2aab0e | 274 | /** |
mbed_official | 354:e67efb2aab0e | 275 | * @} |
mbed_official | 354:e67efb2aab0e | 276 | */ |
mbed_official | 354:e67efb2aab0e | 277 | |
mbed_official | 354:e67efb2aab0e | 278 | /** @defgroup DMA_Group2 I/O operation functions |
mbed_official | 354:e67efb2aab0e | 279 | * @brief I/O operation functions |
mbed_official | 354:e67efb2aab0e | 280 | * |
mbed_official | 354:e67efb2aab0e | 281 | @verbatim |
mbed_official | 354:e67efb2aab0e | 282 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 283 | ##### IO operation functions ##### |
mbed_official | 354:e67efb2aab0e | 284 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 285 | [..] This section provides functions allowing to: |
mbed_official | 354:e67efb2aab0e | 286 | (+) Configure the source, destination address and data length and Start DMA transfer |
mbed_official | 354:e67efb2aab0e | 287 | (+) Configure the source, destination address and data length and |
mbed_official | 354:e67efb2aab0e | 288 | Start DMA transfer with interrupt |
mbed_official | 354:e67efb2aab0e | 289 | (+) Abort DMA transfer |
mbed_official | 354:e67efb2aab0e | 290 | (+) Poll for transfer complete |
mbed_official | 354:e67efb2aab0e | 291 | (+) Handle DMA interrupt request |
mbed_official | 354:e67efb2aab0e | 292 | |
mbed_official | 354:e67efb2aab0e | 293 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 294 | * @{ |
mbed_official | 354:e67efb2aab0e | 295 | */ |
mbed_official | 354:e67efb2aab0e | 296 | |
mbed_official | 354:e67efb2aab0e | 297 | /** |
mbed_official | 354:e67efb2aab0e | 298 | * @brief Starts the DMA Transfer. |
mbed_official | 354:e67efb2aab0e | 299 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 300 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 301 | * @param SrcAddress: The source memory Buffer address |
mbed_official | 354:e67efb2aab0e | 302 | * @param DstAddress: The destination memory Buffer address |
mbed_official | 354:e67efb2aab0e | 303 | * @param DataLength: The length of data to be transferred from source to destination |
mbed_official | 354:e67efb2aab0e | 304 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 305 | */ |
mbed_official | 354:e67efb2aab0e | 306 | HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
mbed_official | 354:e67efb2aab0e | 307 | { |
mbed_official | 354:e67efb2aab0e | 308 | /* Process locked */ |
mbed_official | 354:e67efb2aab0e | 309 | __HAL_LOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 310 | |
mbed_official | 354:e67efb2aab0e | 311 | /* Change DMA peripheral state */ |
mbed_official | 354:e67efb2aab0e | 312 | hdma->State = HAL_DMA_STATE_BUSY; |
mbed_official | 354:e67efb2aab0e | 313 | |
mbed_official | 354:e67efb2aab0e | 314 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 315 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); |
mbed_official | 354:e67efb2aab0e | 316 | |
mbed_official | 354:e67efb2aab0e | 317 | /* Disable the peripheral */ |
mbed_official | 354:e67efb2aab0e | 318 | __HAL_DMA_DISABLE(hdma); |
mbed_official | 354:e67efb2aab0e | 319 | |
mbed_official | 354:e67efb2aab0e | 320 | /* Configure the source, destination address and the data length */ |
mbed_official | 354:e67efb2aab0e | 321 | DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); |
mbed_official | 354:e67efb2aab0e | 322 | |
mbed_official | 354:e67efb2aab0e | 323 | /* Enable the Peripheral */ |
mbed_official | 354:e67efb2aab0e | 324 | __HAL_DMA_ENABLE(hdma); |
mbed_official | 354:e67efb2aab0e | 325 | |
mbed_official | 354:e67efb2aab0e | 326 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 327 | } |
mbed_official | 354:e67efb2aab0e | 328 | |
mbed_official | 354:e67efb2aab0e | 329 | /** |
mbed_official | 354:e67efb2aab0e | 330 | * @brief Start the DMA Transfer with interrupt enabled. |
mbed_official | 354:e67efb2aab0e | 331 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 332 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 333 | * @param SrcAddress: The source memory Buffer address |
mbed_official | 354:e67efb2aab0e | 334 | * @param DstAddress: The destination memory Buffer address |
mbed_official | 354:e67efb2aab0e | 335 | * @param DataLength: The length of data to be transferred from source to destination |
mbed_official | 354:e67efb2aab0e | 336 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 337 | */ |
mbed_official | 354:e67efb2aab0e | 338 | HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
mbed_official | 354:e67efb2aab0e | 339 | { |
mbed_official | 354:e67efb2aab0e | 340 | /* Process locked */ |
mbed_official | 354:e67efb2aab0e | 341 | __HAL_LOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 342 | |
mbed_official | 354:e67efb2aab0e | 343 | /* Change DMA peripheral state */ |
mbed_official | 354:e67efb2aab0e | 344 | hdma->State = HAL_DMA_STATE_BUSY; |
mbed_official | 354:e67efb2aab0e | 345 | |
mbed_official | 354:e67efb2aab0e | 346 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 347 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); |
mbed_official | 354:e67efb2aab0e | 348 | |
mbed_official | 354:e67efb2aab0e | 349 | /* Disable the peripheral */ |
mbed_official | 354:e67efb2aab0e | 350 | __HAL_DMA_DISABLE(hdma); |
mbed_official | 354:e67efb2aab0e | 351 | |
mbed_official | 354:e67efb2aab0e | 352 | /* Configure the source, destination address and the data length */ |
mbed_official | 354:e67efb2aab0e | 353 | DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); |
mbed_official | 354:e67efb2aab0e | 354 | |
mbed_official | 354:e67efb2aab0e | 355 | /* Enable the transfer complete interrupt */ |
mbed_official | 354:e67efb2aab0e | 356 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC); |
mbed_official | 354:e67efb2aab0e | 357 | |
mbed_official | 354:e67efb2aab0e | 358 | /* Enable the Half transfer complete interrupt */ |
mbed_official | 354:e67efb2aab0e | 359 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT); |
mbed_official | 354:e67efb2aab0e | 360 | |
mbed_official | 354:e67efb2aab0e | 361 | /* Enable the transfer Error interrupt */ |
mbed_official | 354:e67efb2aab0e | 362 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE); |
mbed_official | 354:e67efb2aab0e | 363 | |
mbed_official | 354:e67efb2aab0e | 364 | /* Enable the Peripheral */ |
mbed_official | 354:e67efb2aab0e | 365 | __HAL_DMA_ENABLE(hdma); |
mbed_official | 354:e67efb2aab0e | 366 | |
mbed_official | 354:e67efb2aab0e | 367 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 368 | } |
mbed_official | 354:e67efb2aab0e | 369 | |
mbed_official | 354:e67efb2aab0e | 370 | /** |
mbed_official | 354:e67efb2aab0e | 371 | * @brief Aborts the DMA Transfer. |
mbed_official | 354:e67efb2aab0e | 372 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 373 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 374 | * |
mbed_official | 354:e67efb2aab0e | 375 | * @note After disabling a DMA Channel, a check for wait until the DMA Channel is |
mbed_official | 354:e67efb2aab0e | 376 | * effectively disabled is added. If a Channel is disabled |
mbed_official | 354:e67efb2aab0e | 377 | * while a data transfer is ongoing, the current data will be transferred |
mbed_official | 354:e67efb2aab0e | 378 | * and the Channel will be effectively disabled only after the transfer of |
mbed_official | 354:e67efb2aab0e | 379 | * this single data is finished. |
mbed_official | 354:e67efb2aab0e | 380 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 381 | */ |
mbed_official | 354:e67efb2aab0e | 382 | HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) |
mbed_official | 354:e67efb2aab0e | 383 | { |
mbed_official | 354:e67efb2aab0e | 384 | uint32_t tickstart = 0x00; |
mbed_official | 354:e67efb2aab0e | 385 | |
mbed_official | 354:e67efb2aab0e | 386 | /* Disable the channel */ |
mbed_official | 354:e67efb2aab0e | 387 | __HAL_DMA_DISABLE(hdma); |
mbed_official | 354:e67efb2aab0e | 388 | |
mbed_official | 354:e67efb2aab0e | 389 | /* Get timeout */ |
mbed_official | 354:e67efb2aab0e | 390 | tickstart = HAL_GetTick(); |
mbed_official | 354:e67efb2aab0e | 391 | |
mbed_official | 354:e67efb2aab0e | 392 | /* Check if the DMA Channel is effectively disabled */ |
mbed_official | 354:e67efb2aab0e | 393 | while((hdma->Instance->CCR & DMA_CCR_EN) != 0) |
mbed_official | 354:e67efb2aab0e | 394 | { |
mbed_official | 354:e67efb2aab0e | 395 | /* Check for the Timeout */ |
mbed_official | 354:e67efb2aab0e | 396 | if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) |
mbed_official | 354:e67efb2aab0e | 397 | { |
mbed_official | 354:e67efb2aab0e | 398 | /* Update error code */ |
mbed_official | 354:e67efb2aab0e | 399 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT); |
mbed_official | 354:e67efb2aab0e | 400 | |
mbed_official | 354:e67efb2aab0e | 401 | /* Process Unlocked */ |
mbed_official | 354:e67efb2aab0e | 402 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 403 | |
mbed_official | 354:e67efb2aab0e | 404 | /* Change the DMA state */ |
mbed_official | 354:e67efb2aab0e | 405 | hdma->State = HAL_DMA_STATE_TIMEOUT; |
mbed_official | 354:e67efb2aab0e | 406 | |
mbed_official | 354:e67efb2aab0e | 407 | return HAL_TIMEOUT; |
mbed_official | 354:e67efb2aab0e | 408 | } |
mbed_official | 354:e67efb2aab0e | 409 | } |
mbed_official | 354:e67efb2aab0e | 410 | /* Process Unlocked */ |
mbed_official | 354:e67efb2aab0e | 411 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 412 | |
mbed_official | 354:e67efb2aab0e | 413 | /* Change the DMA state*/ |
mbed_official | 354:e67efb2aab0e | 414 | hdma->State = HAL_DMA_STATE_READY; |
mbed_official | 354:e67efb2aab0e | 415 | |
mbed_official | 354:e67efb2aab0e | 416 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 417 | } |
mbed_official | 354:e67efb2aab0e | 418 | |
mbed_official | 354:e67efb2aab0e | 419 | /** |
mbed_official | 354:e67efb2aab0e | 420 | * @brief Polling for transfer complete. |
mbed_official | 354:e67efb2aab0e | 421 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 422 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 423 | * @param CompleteLevel: Specifies the DMA level complete. |
mbed_official | 354:e67efb2aab0e | 424 | * @param Timeout: Timeout duration. |
mbed_official | 354:e67efb2aab0e | 425 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 426 | */ |
mbed_official | 354:e67efb2aab0e | 427 | HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout) |
mbed_official | 354:e67efb2aab0e | 428 | { |
mbed_official | 354:e67efb2aab0e | 429 | uint32_t temp; |
mbed_official | 354:e67efb2aab0e | 430 | uint32_t tickstart = 0x00; |
mbed_official | 354:e67efb2aab0e | 431 | |
mbed_official | 354:e67efb2aab0e | 432 | /* Get the level transfer complete flag */ |
mbed_official | 354:e67efb2aab0e | 433 | if(CompleteLevel == HAL_DMA_FULL_TRANSFER) |
mbed_official | 354:e67efb2aab0e | 434 | { |
mbed_official | 354:e67efb2aab0e | 435 | /* Transfer Complete flag */ |
mbed_official | 354:e67efb2aab0e | 436 | temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma); |
mbed_official | 354:e67efb2aab0e | 437 | } |
mbed_official | 354:e67efb2aab0e | 438 | else |
mbed_official | 354:e67efb2aab0e | 439 | { |
mbed_official | 354:e67efb2aab0e | 440 | /* Half Transfer Complete flag */ |
mbed_official | 354:e67efb2aab0e | 441 | temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma); |
mbed_official | 354:e67efb2aab0e | 442 | } |
mbed_official | 354:e67efb2aab0e | 443 | |
mbed_official | 354:e67efb2aab0e | 444 | /* Get timeout */ |
mbed_official | 354:e67efb2aab0e | 445 | tickstart = HAL_GetTick(); |
mbed_official | 354:e67efb2aab0e | 446 | |
mbed_official | 354:e67efb2aab0e | 447 | while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET) |
mbed_official | 354:e67efb2aab0e | 448 | { |
mbed_official | 354:e67efb2aab0e | 449 | if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)) |
mbed_official | 354:e67efb2aab0e | 450 | { |
mbed_official | 354:e67efb2aab0e | 451 | /* Clear the transfer error flags */ |
mbed_official | 354:e67efb2aab0e | 452 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 453 | |
mbed_official | 354:e67efb2aab0e | 454 | /* Update error code */ |
mbed_official | 354:e67efb2aab0e | 455 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE); |
mbed_official | 354:e67efb2aab0e | 456 | |
mbed_official | 354:e67efb2aab0e | 457 | /* Change the DMA state */ |
mbed_official | 354:e67efb2aab0e | 458 | hdma->State= HAL_DMA_STATE_ERROR; |
mbed_official | 354:e67efb2aab0e | 459 | |
mbed_official | 354:e67efb2aab0e | 460 | /* Process Unlocked */ |
mbed_official | 354:e67efb2aab0e | 461 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 462 | |
mbed_official | 354:e67efb2aab0e | 463 | return HAL_ERROR; |
mbed_official | 354:e67efb2aab0e | 464 | } |
mbed_official | 354:e67efb2aab0e | 465 | /* Check for the Timeout */ |
mbed_official | 354:e67efb2aab0e | 466 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 354:e67efb2aab0e | 467 | { |
mbed_official | 354:e67efb2aab0e | 468 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 354:e67efb2aab0e | 469 | { |
mbed_official | 354:e67efb2aab0e | 470 | /* Update error code */ |
mbed_official | 354:e67efb2aab0e | 471 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT); |
mbed_official | 354:e67efb2aab0e | 472 | |
mbed_official | 354:e67efb2aab0e | 473 | /* Change the DMA state */ |
mbed_official | 354:e67efb2aab0e | 474 | hdma->State= HAL_DMA_STATE_TIMEOUT; |
mbed_official | 354:e67efb2aab0e | 475 | |
mbed_official | 354:e67efb2aab0e | 476 | /* Process Unlocked */ |
mbed_official | 354:e67efb2aab0e | 477 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 478 | |
mbed_official | 354:e67efb2aab0e | 479 | return HAL_TIMEOUT; |
mbed_official | 354:e67efb2aab0e | 480 | } |
mbed_official | 354:e67efb2aab0e | 481 | } |
mbed_official | 354:e67efb2aab0e | 482 | } |
mbed_official | 354:e67efb2aab0e | 483 | |
mbed_official | 354:e67efb2aab0e | 484 | if(CompleteLevel == HAL_DMA_FULL_TRANSFER) |
mbed_official | 354:e67efb2aab0e | 485 | { |
mbed_official | 354:e67efb2aab0e | 486 | /* Clear the transfer complete flag */ |
mbed_official | 354:e67efb2aab0e | 487 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 488 | |
mbed_official | 354:e67efb2aab0e | 489 | /* The selected Channelx EN bit is cleared (DMA is disabled and |
mbed_official | 354:e67efb2aab0e | 490 | all transfers are complete) */ |
mbed_official | 354:e67efb2aab0e | 491 | hdma->State = HAL_DMA_STATE_READY; |
mbed_official | 354:e67efb2aab0e | 492 | |
mbed_official | 354:e67efb2aab0e | 493 | /* Process unlocked */ |
mbed_official | 354:e67efb2aab0e | 494 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 495 | } |
mbed_official | 354:e67efb2aab0e | 496 | else |
mbed_official | 354:e67efb2aab0e | 497 | { |
mbed_official | 354:e67efb2aab0e | 498 | /* Clear the half transfer complete flag */ |
mbed_official | 354:e67efb2aab0e | 499 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 500 | |
mbed_official | 354:e67efb2aab0e | 501 | /* The selected Channelx EN bit is cleared (DMA is disabled and |
mbed_official | 354:e67efb2aab0e | 502 | all transfers are complete) */ |
mbed_official | 354:e67efb2aab0e | 503 | hdma->State = HAL_DMA_STATE_READY_HALF; |
mbed_official | 354:e67efb2aab0e | 504 | /* Process unlocked */ |
mbed_official | 354:e67efb2aab0e | 505 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 506 | } |
mbed_official | 354:e67efb2aab0e | 507 | |
mbed_official | 354:e67efb2aab0e | 508 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 509 | } |
mbed_official | 354:e67efb2aab0e | 510 | |
mbed_official | 354:e67efb2aab0e | 511 | /** |
mbed_official | 354:e67efb2aab0e | 512 | * @brief Handles DMA interrupt request. |
mbed_official | 354:e67efb2aab0e | 513 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 514 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 515 | * @retval None |
mbed_official | 354:e67efb2aab0e | 516 | */ |
mbed_official | 354:e67efb2aab0e | 517 | void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) |
mbed_official | 354:e67efb2aab0e | 518 | { |
mbed_official | 354:e67efb2aab0e | 519 | /* Transfer Error Interrupt management ***************************************/ |
mbed_official | 354:e67efb2aab0e | 520 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET) |
mbed_official | 354:e67efb2aab0e | 521 | { |
mbed_official | 354:e67efb2aab0e | 522 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) |
mbed_official | 354:e67efb2aab0e | 523 | { |
mbed_official | 354:e67efb2aab0e | 524 | /* Disable the transfer error interrupt */ |
mbed_official | 354:e67efb2aab0e | 525 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE); |
mbed_official | 354:e67efb2aab0e | 526 | |
mbed_official | 354:e67efb2aab0e | 527 | /* Clear the transfer error flag */ |
mbed_official | 354:e67efb2aab0e | 528 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 529 | |
mbed_official | 354:e67efb2aab0e | 530 | /* Update error code */ |
mbed_official | 354:e67efb2aab0e | 531 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE); |
mbed_official | 354:e67efb2aab0e | 532 | |
mbed_official | 354:e67efb2aab0e | 533 | /* Change the DMA state */ |
mbed_official | 354:e67efb2aab0e | 534 | hdma->State = HAL_DMA_STATE_ERROR; |
mbed_official | 354:e67efb2aab0e | 535 | |
mbed_official | 354:e67efb2aab0e | 536 | /* Process Unlocked */ |
mbed_official | 354:e67efb2aab0e | 537 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 538 | |
mbed_official | 354:e67efb2aab0e | 539 | if (hdma->XferErrorCallback != HAL_NULL) |
mbed_official | 354:e67efb2aab0e | 540 | { |
mbed_official | 354:e67efb2aab0e | 541 | /* Transfer error callback */ |
mbed_official | 354:e67efb2aab0e | 542 | hdma->XferErrorCallback(hdma); |
mbed_official | 354:e67efb2aab0e | 543 | } |
mbed_official | 354:e67efb2aab0e | 544 | } |
mbed_official | 354:e67efb2aab0e | 545 | } |
mbed_official | 354:e67efb2aab0e | 546 | |
mbed_official | 354:e67efb2aab0e | 547 | /* Half Transfer Complete Interrupt management ******************************/ |
mbed_official | 354:e67efb2aab0e | 548 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET) |
mbed_official | 354:e67efb2aab0e | 549 | { |
mbed_official | 354:e67efb2aab0e | 550 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) |
mbed_official | 354:e67efb2aab0e | 551 | { |
mbed_official | 354:e67efb2aab0e | 552 | /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ |
mbed_official | 354:e67efb2aab0e | 553 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
mbed_official | 354:e67efb2aab0e | 554 | { |
mbed_official | 354:e67efb2aab0e | 555 | /* Disable the half transfer interrupt */ |
mbed_official | 354:e67efb2aab0e | 556 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); |
mbed_official | 354:e67efb2aab0e | 557 | } |
mbed_official | 354:e67efb2aab0e | 558 | /* Clear the half transfer complete flag */ |
mbed_official | 354:e67efb2aab0e | 559 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 560 | |
mbed_official | 354:e67efb2aab0e | 561 | /* Change DMA peripheral state */ |
mbed_official | 354:e67efb2aab0e | 562 | hdma->State = HAL_DMA_STATE_READY_HALF; |
mbed_official | 354:e67efb2aab0e | 563 | |
mbed_official | 354:e67efb2aab0e | 564 | if(hdma->XferHalfCpltCallback != HAL_NULL) |
mbed_official | 354:e67efb2aab0e | 565 | { |
mbed_official | 354:e67efb2aab0e | 566 | /* Half transfer callback */ |
mbed_official | 354:e67efb2aab0e | 567 | hdma->XferHalfCpltCallback(hdma); |
mbed_official | 354:e67efb2aab0e | 568 | } |
mbed_official | 354:e67efb2aab0e | 569 | } |
mbed_official | 354:e67efb2aab0e | 570 | } |
mbed_official | 354:e67efb2aab0e | 571 | |
mbed_official | 354:e67efb2aab0e | 572 | /* Transfer Complete Interrupt management ***********************************/ |
mbed_official | 354:e67efb2aab0e | 573 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET) |
mbed_official | 354:e67efb2aab0e | 574 | { |
mbed_official | 354:e67efb2aab0e | 575 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) |
mbed_official | 354:e67efb2aab0e | 576 | { |
mbed_official | 354:e67efb2aab0e | 577 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
mbed_official | 354:e67efb2aab0e | 578 | { |
mbed_official | 354:e67efb2aab0e | 579 | /* Disable the transfer complete interrupt */ |
mbed_official | 354:e67efb2aab0e | 580 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC); |
mbed_official | 354:e67efb2aab0e | 581 | } |
mbed_official | 354:e67efb2aab0e | 582 | /* Clear the transfer complete flag */ |
mbed_official | 354:e67efb2aab0e | 583 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
mbed_official | 354:e67efb2aab0e | 584 | |
mbed_official | 354:e67efb2aab0e | 585 | /* Update error code */ |
mbed_official | 354:e67efb2aab0e | 586 | SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_NONE); |
mbed_official | 354:e67efb2aab0e | 587 | |
mbed_official | 354:e67efb2aab0e | 588 | /* Change the DMA state */ |
mbed_official | 354:e67efb2aab0e | 589 | hdma->State = HAL_DMA_STATE_READY; |
mbed_official | 354:e67efb2aab0e | 590 | |
mbed_official | 354:e67efb2aab0e | 591 | /* Process Unlocked */ |
mbed_official | 354:e67efb2aab0e | 592 | __HAL_UNLOCK(hdma); |
mbed_official | 354:e67efb2aab0e | 593 | |
mbed_official | 354:e67efb2aab0e | 594 | if(hdma->XferCpltCallback != HAL_NULL) |
mbed_official | 354:e67efb2aab0e | 595 | { |
mbed_official | 354:e67efb2aab0e | 596 | /* Transfer complete callback */ |
mbed_official | 354:e67efb2aab0e | 597 | hdma->XferCpltCallback(hdma); |
mbed_official | 354:e67efb2aab0e | 598 | } |
mbed_official | 354:e67efb2aab0e | 599 | } |
mbed_official | 354:e67efb2aab0e | 600 | } |
mbed_official | 354:e67efb2aab0e | 601 | } |
mbed_official | 354:e67efb2aab0e | 602 | |
mbed_official | 354:e67efb2aab0e | 603 | /** |
mbed_official | 354:e67efb2aab0e | 604 | * @} |
mbed_official | 354:e67efb2aab0e | 605 | */ |
mbed_official | 354:e67efb2aab0e | 606 | |
mbed_official | 354:e67efb2aab0e | 607 | /** @defgroup DMA_Group3 Peripheral State functions |
mbed_official | 354:e67efb2aab0e | 608 | * @brief Peripheral State functions |
mbed_official | 354:e67efb2aab0e | 609 | * |
mbed_official | 354:e67efb2aab0e | 610 | @verbatim |
mbed_official | 354:e67efb2aab0e | 611 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 612 | ##### State and Errors functions ##### |
mbed_official | 354:e67efb2aab0e | 613 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 614 | [..] |
mbed_official | 354:e67efb2aab0e | 615 | This subsection provides functions allowing to |
mbed_official | 354:e67efb2aab0e | 616 | (+) Check the DMA state |
mbed_official | 354:e67efb2aab0e | 617 | (+) Get error code |
mbed_official | 354:e67efb2aab0e | 618 | |
mbed_official | 354:e67efb2aab0e | 619 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 620 | * @{ |
mbed_official | 354:e67efb2aab0e | 621 | */ |
mbed_official | 354:e67efb2aab0e | 622 | |
mbed_official | 354:e67efb2aab0e | 623 | /** |
mbed_official | 354:e67efb2aab0e | 624 | * @brief Returns the DMA state. |
mbed_official | 354:e67efb2aab0e | 625 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 626 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 627 | * @retval HAL state |
mbed_official | 354:e67efb2aab0e | 628 | */ |
mbed_official | 354:e67efb2aab0e | 629 | HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) |
mbed_official | 354:e67efb2aab0e | 630 | { |
mbed_official | 354:e67efb2aab0e | 631 | return hdma->State; |
mbed_official | 354:e67efb2aab0e | 632 | } |
mbed_official | 354:e67efb2aab0e | 633 | |
mbed_official | 354:e67efb2aab0e | 634 | /** |
mbed_official | 354:e67efb2aab0e | 635 | * @brief Return the DMA error code |
mbed_official | 354:e67efb2aab0e | 636 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 637 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 638 | * @retval DMA Error Code |
mbed_official | 354:e67efb2aab0e | 639 | */ |
mbed_official | 354:e67efb2aab0e | 640 | uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) |
mbed_official | 354:e67efb2aab0e | 641 | { |
mbed_official | 354:e67efb2aab0e | 642 | return hdma->ErrorCode; |
mbed_official | 354:e67efb2aab0e | 643 | } |
mbed_official | 354:e67efb2aab0e | 644 | |
mbed_official | 354:e67efb2aab0e | 645 | /** |
mbed_official | 354:e67efb2aab0e | 646 | * @} |
mbed_official | 354:e67efb2aab0e | 647 | */ |
mbed_official | 354:e67efb2aab0e | 648 | |
mbed_official | 354:e67efb2aab0e | 649 | /** |
mbed_official | 354:e67efb2aab0e | 650 | * @} |
mbed_official | 354:e67efb2aab0e | 651 | */ |
mbed_official | 354:e67efb2aab0e | 652 | |
mbed_official | 354:e67efb2aab0e | 653 | /** @addtogroup DMA_Private_Functions |
mbed_official | 354:e67efb2aab0e | 654 | * @{ |
mbed_official | 354:e67efb2aab0e | 655 | */ |
mbed_official | 354:e67efb2aab0e | 656 | |
mbed_official | 354:e67efb2aab0e | 657 | /** |
mbed_official | 354:e67efb2aab0e | 658 | * @brief Sets the DMA Transfer parameter. |
mbed_official | 354:e67efb2aab0e | 659 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 354:e67efb2aab0e | 660 | * the configuration information for the specified DMA Channel. |
mbed_official | 354:e67efb2aab0e | 661 | * @param SrcAddress: The source memory Buffer address |
mbed_official | 354:e67efb2aab0e | 662 | * @param DstAddress: The destination memory Buffer address |
mbed_official | 354:e67efb2aab0e | 663 | * @param DataLength: The length of data to be transferred from source to destination |
mbed_official | 354:e67efb2aab0e | 664 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 665 | */ |
mbed_official | 354:e67efb2aab0e | 666 | static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
mbed_official | 354:e67efb2aab0e | 667 | { |
mbed_official | 354:e67efb2aab0e | 668 | /* Configure DMA Channel data length */ |
mbed_official | 354:e67efb2aab0e | 669 | hdma->Instance->CNDTR = DataLength; |
mbed_official | 354:e67efb2aab0e | 670 | |
mbed_official | 354:e67efb2aab0e | 671 | /* Peripheral to Memory */ |
mbed_official | 354:e67efb2aab0e | 672 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) |
mbed_official | 354:e67efb2aab0e | 673 | { |
mbed_official | 354:e67efb2aab0e | 674 | /* Configure DMA Channel destination address */ |
mbed_official | 354:e67efb2aab0e | 675 | hdma->Instance->CPAR = DstAddress; |
mbed_official | 354:e67efb2aab0e | 676 | |
mbed_official | 354:e67efb2aab0e | 677 | /* Configure DMA Channel source address */ |
mbed_official | 354:e67efb2aab0e | 678 | hdma->Instance->CMAR = SrcAddress; |
mbed_official | 354:e67efb2aab0e | 679 | } |
mbed_official | 354:e67efb2aab0e | 680 | /* Memory to Peripheral */ |
mbed_official | 354:e67efb2aab0e | 681 | else |
mbed_official | 354:e67efb2aab0e | 682 | { |
mbed_official | 354:e67efb2aab0e | 683 | /* Configure DMA Channel source address */ |
mbed_official | 354:e67efb2aab0e | 684 | hdma->Instance->CPAR = SrcAddress; |
mbed_official | 354:e67efb2aab0e | 685 | |
mbed_official | 354:e67efb2aab0e | 686 | /* Configure DMA Channel destination address */ |
mbed_official | 354:e67efb2aab0e | 687 | hdma->Instance->CMAR = DstAddress; |
mbed_official | 354:e67efb2aab0e | 688 | } |
mbed_official | 354:e67efb2aab0e | 689 | } |
mbed_official | 354:e67efb2aab0e | 690 | |
mbed_official | 354:e67efb2aab0e | 691 | /** |
mbed_official | 354:e67efb2aab0e | 692 | * @} |
mbed_official | 354:e67efb2aab0e | 693 | */ |
mbed_official | 354:e67efb2aab0e | 694 | |
mbed_official | 354:e67efb2aab0e | 695 | |
mbed_official | 354:e67efb2aab0e | 696 | #endif /* HAL_DMA_MODULE_ENABLED */ |
mbed_official | 354:e67efb2aab0e | 697 | |
mbed_official | 354:e67efb2aab0e | 698 | |
mbed_official | 354:e67efb2aab0e | 699 | /** |
mbed_official | 354:e67efb2aab0e | 700 | * @} |
mbed_official | 354:e67efb2aab0e | 701 | */ |
mbed_official | 354:e67efb2aab0e | 702 | |
mbed_official | 354:e67efb2aab0e | 703 | /** |
mbed_official | 354:e67efb2aab0e | 704 | * @} |
mbed_official | 354:e67efb2aab0e | 705 | */ |
mbed_official | 354:e67efb2aab0e | 706 | |
mbed_official | 354:e67efb2aab0e | 707 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |