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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_usart.h@441:d2c15dda23c1, 2015-01-06 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Jan 06 16:15:36 2015 +0000
- Revision:
- 441:d2c15dda23c1
- Parent:
- 392:2b59412bb664
Synchronized with git revision 245a60b29caabb42eabdd19658eeac7c3f68313b
Full URL: https://github.com/mbedmicro/mbed/commit/245a60b29caabb42eabdd19658eeac7c3f68313b/
NUCLEO_F072RB/F091RC - adding target to rtos lib and exporter for coide and gcc_arm
Who changed what in which revision?
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mbed_official | 340:28d1f895c6fe | 1 | /** |
mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_usart.h |
mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
mbed_official | 441:d2c15dda23c1 | 5 | * @version V1.2.0 |
mbed_official | 441:d2c15dda23c1 | 6 | * @date 11-December-2014 |
mbed_official | 340:28d1f895c6fe | 7 | * @brief Header file of USART HAL module. |
mbed_official | 340:28d1f895c6fe | 8 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 9 | * @attention |
mbed_official | 340:28d1f895c6fe | 10 | * |
mbed_official | 340:28d1f895c6fe | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 340:28d1f895c6fe | 12 | * |
mbed_official | 340:28d1f895c6fe | 13 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 340:28d1f895c6fe | 14 | * are permitted provided that the following conditions are met: |
mbed_official | 340:28d1f895c6fe | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 16 | * this list of conditions and the following disclaimer. |
mbed_official | 340:28d1f895c6fe | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 18 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 340:28d1f895c6fe | 19 | * and/or other materials provided with the distribution. |
mbed_official | 340:28d1f895c6fe | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 340:28d1f895c6fe | 21 | * may be used to endorse or promote products derived from this software |
mbed_official | 340:28d1f895c6fe | 22 | * without specific prior written permission. |
mbed_official | 340:28d1f895c6fe | 23 | * |
mbed_official | 340:28d1f895c6fe | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 340:28d1f895c6fe | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 340:28d1f895c6fe | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 340:28d1f895c6fe | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 340:28d1f895c6fe | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 340:28d1f895c6fe | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 340:28d1f895c6fe | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 340:28d1f895c6fe | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 340:28d1f895c6fe | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 340:28d1f895c6fe | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 340:28d1f895c6fe | 34 | * |
mbed_official | 340:28d1f895c6fe | 35 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 36 | */ |
mbed_official | 340:28d1f895c6fe | 37 | |
mbed_official | 340:28d1f895c6fe | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 39 | #ifndef __STM32F0xx_HAL_USART_H |
mbed_official | 340:28d1f895c6fe | 40 | #define __STM32F0xx_HAL_USART_H |
mbed_official | 340:28d1f895c6fe | 41 | |
mbed_official | 340:28d1f895c6fe | 42 | #ifdef __cplusplus |
mbed_official | 340:28d1f895c6fe | 43 | extern "C" { |
mbed_official | 340:28d1f895c6fe | 44 | #endif |
mbed_official | 340:28d1f895c6fe | 45 | |
mbed_official | 340:28d1f895c6fe | 46 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 47 | #include "stm32f0xx_hal_def.h" |
mbed_official | 340:28d1f895c6fe | 48 | |
mbed_official | 340:28d1f895c6fe | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
mbed_official | 340:28d1f895c6fe | 50 | * @{ |
mbed_official | 340:28d1f895c6fe | 51 | */ |
mbed_official | 340:28d1f895c6fe | 52 | |
mbed_official | 340:28d1f895c6fe | 53 | /** @addtogroup USART |
mbed_official | 340:28d1f895c6fe | 54 | * @{ |
mbed_official | 340:28d1f895c6fe | 55 | */ |
mbed_official | 340:28d1f895c6fe | 56 | |
mbed_official | 340:28d1f895c6fe | 57 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 58 | /** @defgroup USART_Exported_Types USART Exported Types |
mbed_official | 340:28d1f895c6fe | 59 | * @{ |
mbed_official | 340:28d1f895c6fe | 60 | */ |
mbed_official | 340:28d1f895c6fe | 61 | |
mbed_official | 340:28d1f895c6fe | 62 | |
mbed_official | 340:28d1f895c6fe | 63 | /** |
mbed_official | 340:28d1f895c6fe | 64 | * @brief USART Init Structure definition |
mbed_official | 340:28d1f895c6fe | 65 | */ |
mbed_official | 340:28d1f895c6fe | 66 | typedef struct |
mbed_official | 340:28d1f895c6fe | 67 | { |
mbed_official | 340:28d1f895c6fe | 68 | uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. |
mbed_official | 340:28d1f895c6fe | 69 | The baud rate is computed using the following formula: |
mbed_official | 340:28d1f895c6fe | 70 | Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) */ |
mbed_official | 340:28d1f895c6fe | 71 | |
mbed_official | 340:28d1f895c6fe | 72 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
mbed_official | 340:28d1f895c6fe | 73 | This parameter can be a value of @ref USARTEx_Word_Length */ |
mbed_official | 340:28d1f895c6fe | 74 | |
mbed_official | 340:28d1f895c6fe | 75 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
mbed_official | 340:28d1f895c6fe | 76 | This parameter can be a value of @ref USART_Stop_Bits */ |
mbed_official | 340:28d1f895c6fe | 77 | |
mbed_official | 340:28d1f895c6fe | 78 | uint32_t Parity; /*!< Specifies the parity mode. |
mbed_official | 340:28d1f895c6fe | 79 | This parameter can be a value of @ref USART_Parity |
mbed_official | 340:28d1f895c6fe | 80 | @note When parity is enabled, the computed parity is inserted |
mbed_official | 340:28d1f895c6fe | 81 | at the MSB position of the transmitted data (9th bit when |
mbed_official | 340:28d1f895c6fe | 82 | the word length is set to 9 data bits; 8th bit when the |
mbed_official | 340:28d1f895c6fe | 83 | word length is set to 8 data bits). */ |
mbed_official | 340:28d1f895c6fe | 84 | |
mbed_official | 340:28d1f895c6fe | 85 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
mbed_official | 340:28d1f895c6fe | 86 | This parameter can be a value of @ref USART_Mode */ |
mbed_official | 340:28d1f895c6fe | 87 | |
mbed_official | 340:28d1f895c6fe | 88 | uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. |
mbed_official | 340:28d1f895c6fe | 89 | This parameter can be a value of @ref USART_Clock_Polarity */ |
mbed_official | 340:28d1f895c6fe | 90 | |
mbed_official | 340:28d1f895c6fe | 91 | uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. |
mbed_official | 340:28d1f895c6fe | 92 | This parameter can be a value of @ref USART_Clock_Phase */ |
mbed_official | 340:28d1f895c6fe | 93 | |
mbed_official | 340:28d1f895c6fe | 94 | uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
mbed_official | 340:28d1f895c6fe | 95 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
mbed_official | 340:28d1f895c6fe | 96 | This parameter can be a value of @ref USART_Last_Bit */ |
mbed_official | 340:28d1f895c6fe | 97 | }USART_InitTypeDef; |
mbed_official | 340:28d1f895c6fe | 98 | |
mbed_official | 340:28d1f895c6fe | 99 | /** |
mbed_official | 340:28d1f895c6fe | 100 | * @brief HAL State structures definition |
mbed_official | 340:28d1f895c6fe | 101 | */ |
mbed_official | 340:28d1f895c6fe | 102 | typedef enum |
mbed_official | 340:28d1f895c6fe | 103 | { |
mbed_official | 340:28d1f895c6fe | 104 | HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ |
mbed_official | 340:28d1f895c6fe | 105 | HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
mbed_official | 340:28d1f895c6fe | 106 | HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
mbed_official | 340:28d1f895c6fe | 107 | HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
mbed_official | 340:28d1f895c6fe | 108 | HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
mbed_official | 340:28d1f895c6fe | 109 | HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */ |
mbed_official | 340:28d1f895c6fe | 110 | HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
mbed_official | 340:28d1f895c6fe | 111 | HAL_USART_STATE_ERROR = 0x04 /*!< Error */ |
mbed_official | 340:28d1f895c6fe | 112 | }HAL_USART_StateTypeDef; |
mbed_official | 340:28d1f895c6fe | 113 | |
mbed_official | 340:28d1f895c6fe | 114 | /** |
mbed_official | 340:28d1f895c6fe | 115 | * @brief USART clock sources definitions |
mbed_official | 340:28d1f895c6fe | 116 | */ |
mbed_official | 340:28d1f895c6fe | 117 | typedef enum |
mbed_official | 340:28d1f895c6fe | 118 | { |
mbed_official | 340:28d1f895c6fe | 119 | USART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ |
mbed_official | 340:28d1f895c6fe | 120 | USART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ |
mbed_official | 340:28d1f895c6fe | 121 | USART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ |
mbed_official | 340:28d1f895c6fe | 122 | USART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ |
mbed_official | 340:28d1f895c6fe | 123 | USART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< undefined clock source */ |
mbed_official | 340:28d1f895c6fe | 124 | }USART_ClockSourceTypeDef; |
mbed_official | 340:28d1f895c6fe | 125 | |
mbed_official | 340:28d1f895c6fe | 126 | /** |
mbed_official | 340:28d1f895c6fe | 127 | * @brief USART handle Structure definition |
mbed_official | 340:28d1f895c6fe | 128 | */ |
mbed_official | 340:28d1f895c6fe | 129 | typedef struct |
mbed_official | 340:28d1f895c6fe | 130 | { |
mbed_official | 340:28d1f895c6fe | 131 | USART_TypeDef *Instance; /*!< USART registers base address */ |
mbed_official | 340:28d1f895c6fe | 132 | |
mbed_official | 340:28d1f895c6fe | 133 | USART_InitTypeDef Init; /*!< USART communication parameters */ |
mbed_official | 340:28d1f895c6fe | 134 | |
mbed_official | 340:28d1f895c6fe | 135 | uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ |
mbed_official | 340:28d1f895c6fe | 136 | |
mbed_official | 340:28d1f895c6fe | 137 | uint16_t TxXferSize; /*!< USART Tx Transfer size */ |
mbed_official | 340:28d1f895c6fe | 138 | |
mbed_official | 340:28d1f895c6fe | 139 | uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ |
mbed_official | 340:28d1f895c6fe | 140 | |
mbed_official | 340:28d1f895c6fe | 141 | uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ |
mbed_official | 340:28d1f895c6fe | 142 | |
mbed_official | 340:28d1f895c6fe | 143 | uint16_t RxXferSize; /*!< USART Rx Transfer size */ |
mbed_official | 340:28d1f895c6fe | 144 | |
mbed_official | 340:28d1f895c6fe | 145 | uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ |
mbed_official | 340:28d1f895c6fe | 146 | |
mbed_official | 340:28d1f895c6fe | 147 | uint16_t Mask; /*!< USART Rx RDR register mask */ |
mbed_official | 340:28d1f895c6fe | 148 | |
mbed_official | 340:28d1f895c6fe | 149 | DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ |
mbed_official | 340:28d1f895c6fe | 150 | |
mbed_official | 340:28d1f895c6fe | 151 | DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ |
mbed_official | 340:28d1f895c6fe | 152 | |
mbed_official | 441:d2c15dda23c1 | 153 | HAL_LockTypeDef Lock; /*!< Locking object */ |
mbed_official | 340:28d1f895c6fe | 154 | |
mbed_official | 441:d2c15dda23c1 | 155 | HAL_USART_StateTypeDef State; /*!< USART communication state */ |
mbed_official | 340:28d1f895c6fe | 156 | |
mbed_official | 441:d2c15dda23c1 | 157 | __IO uint32_t ErrorCode; /*!< USART Error code |
mbed_official | 441:d2c15dda23c1 | 158 | This parameter can be a value of @ref USART_Error */ |
mbed_official | 340:28d1f895c6fe | 159 | |
mbed_official | 340:28d1f895c6fe | 160 | }USART_HandleTypeDef; |
mbed_official | 340:28d1f895c6fe | 161 | |
mbed_official | 340:28d1f895c6fe | 162 | /** |
mbed_official | 340:28d1f895c6fe | 163 | * @} |
mbed_official | 340:28d1f895c6fe | 164 | */ |
mbed_official | 340:28d1f895c6fe | 165 | |
mbed_official | 340:28d1f895c6fe | 166 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 167 | /** @defgroup USART_Exported_Constants USART Exported constants |
mbed_official | 340:28d1f895c6fe | 168 | * @{ |
mbed_official | 340:28d1f895c6fe | 169 | */ |
mbed_official | 340:28d1f895c6fe | 170 | |
mbed_official | 441:d2c15dda23c1 | 171 | /** @defgroup USART_Error USART Error |
mbed_official | 441:d2c15dda23c1 | 172 | * @{ |
mbed_official | 441:d2c15dda23c1 | 173 | */ |
mbed_official | 441:d2c15dda23c1 | 174 | #define HAL_USART_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
mbed_official | 441:d2c15dda23c1 | 175 | #define HAL_USART_ERROR_PE ((uint32_t)0x00000001) /*!< Parity error */ |
mbed_official | 441:d2c15dda23c1 | 176 | #define HAL_USART_ERROR_NE ((uint32_t)0x00000002) /*!< Noise error */ |
mbed_official | 441:d2c15dda23c1 | 177 | #define HAL_USART_ERROR_FE ((uint32_t)0x00000004) /*!< frame error */ |
mbed_official | 441:d2c15dda23c1 | 178 | #define HAL_USART_ERROR_ORE ((uint32_t)0x00000008) /*!< Overrun error */ |
mbed_official | 441:d2c15dda23c1 | 179 | #define HAL_USART_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ |
mbed_official | 441:d2c15dda23c1 | 180 | /** |
mbed_official | 441:d2c15dda23c1 | 181 | * @} |
mbed_official | 441:d2c15dda23c1 | 182 | */ |
mbed_official | 441:d2c15dda23c1 | 183 | |
mbed_official | 340:28d1f895c6fe | 184 | /** @defgroup USART_Stop_Bits USART Number of Stop Bits |
mbed_official | 340:28d1f895c6fe | 185 | * @{ |
mbed_official | 340:28d1f895c6fe | 186 | */ |
mbed_official | 340:28d1f895c6fe | 187 | #define USART_STOPBITS_1 ((uint32_t)0x0000) |
mbed_official | 340:28d1f895c6fe | 188 | #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
mbed_official | 340:28d1f895c6fe | 189 | #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) |
mbed_official | 340:28d1f895c6fe | 190 | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \ |
mbed_official | 340:28d1f895c6fe | 191 | ((STOPBITS) == USART_STOPBITS_1_5) || \ |
mbed_official | 340:28d1f895c6fe | 192 | ((STOPBITS) == USART_STOPBITS_2)) |
mbed_official | 340:28d1f895c6fe | 193 | /** |
mbed_official | 340:28d1f895c6fe | 194 | * @} |
mbed_official | 340:28d1f895c6fe | 195 | */ |
mbed_official | 340:28d1f895c6fe | 196 | |
mbed_official | 340:28d1f895c6fe | 197 | /** @defgroup USART_Parity USART Parity |
mbed_official | 340:28d1f895c6fe | 198 | * @{ |
mbed_official | 340:28d1f895c6fe | 199 | */ |
mbed_official | 340:28d1f895c6fe | 200 | #define USART_PARITY_NONE ((uint32_t)0x0000) |
mbed_official | 340:28d1f895c6fe | 201 | #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
mbed_official | 340:28d1f895c6fe | 202 | #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
mbed_official | 340:28d1f895c6fe | 203 | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \ |
mbed_official | 340:28d1f895c6fe | 204 | ((PARITY) == USART_PARITY_EVEN) || \ |
mbed_official | 340:28d1f895c6fe | 205 | ((PARITY) == USART_PARITY_ODD)) |
mbed_official | 340:28d1f895c6fe | 206 | /** |
mbed_official | 340:28d1f895c6fe | 207 | * @} |
mbed_official | 340:28d1f895c6fe | 208 | */ |
mbed_official | 340:28d1f895c6fe | 209 | |
mbed_official | 340:28d1f895c6fe | 210 | /** @defgroup USART_Mode USART Mode |
mbed_official | 340:28d1f895c6fe | 211 | * @{ |
mbed_official | 340:28d1f895c6fe | 212 | */ |
mbed_official | 340:28d1f895c6fe | 213 | #define USART_MODE_RX ((uint32_t)USART_CR1_RE) |
mbed_official | 340:28d1f895c6fe | 214 | #define USART_MODE_TX ((uint32_t)USART_CR1_TE) |
mbed_official | 340:28d1f895c6fe | 215 | #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
mbed_official | 340:28d1f895c6fe | 216 | #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFFFFFF3) == 0x00) && ((MODE) != (uint32_t)0x00)) |
mbed_official | 340:28d1f895c6fe | 217 | /** |
mbed_official | 340:28d1f895c6fe | 218 | * @} |
mbed_official | 340:28d1f895c6fe | 219 | */ |
mbed_official | 340:28d1f895c6fe | 220 | |
mbed_official | 340:28d1f895c6fe | 221 | /** @defgroup USART_Clock USART Clock |
mbed_official | 340:28d1f895c6fe | 222 | * @{ |
mbed_official | 340:28d1f895c6fe | 223 | */ |
mbed_official | 340:28d1f895c6fe | 224 | #define USART_CLOCK_DISABLED ((uint32_t)0x0000) |
mbed_official | 340:28d1f895c6fe | 225 | #define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN) |
mbed_official | 340:28d1f895c6fe | 226 | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \ |
mbed_official | 340:28d1f895c6fe | 227 | ((CLOCK) == USART_CLOCK_ENABLED)) |
mbed_official | 340:28d1f895c6fe | 228 | /** |
mbed_official | 340:28d1f895c6fe | 229 | * @} |
mbed_official | 340:28d1f895c6fe | 230 | */ |
mbed_official | 340:28d1f895c6fe | 231 | |
mbed_official | 340:28d1f895c6fe | 232 | /** @defgroup USART_Clock_Polarity USART Clock Polarity |
mbed_official | 340:28d1f895c6fe | 233 | * @{ |
mbed_official | 340:28d1f895c6fe | 234 | */ |
mbed_official | 340:28d1f895c6fe | 235 | #define USART_POLARITY_LOW ((uint32_t)0x0000) |
mbed_official | 340:28d1f895c6fe | 236 | #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) |
mbed_official | 340:28d1f895c6fe | 237 | #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH)) |
mbed_official | 340:28d1f895c6fe | 238 | /** |
mbed_official | 340:28d1f895c6fe | 239 | * @} |
mbed_official | 340:28d1f895c6fe | 240 | */ |
mbed_official | 340:28d1f895c6fe | 241 | |
mbed_official | 340:28d1f895c6fe | 242 | /** @defgroup USART_Clock_Phase USART Clock Phase |
mbed_official | 340:28d1f895c6fe | 243 | * @{ |
mbed_official | 340:28d1f895c6fe | 244 | */ |
mbed_official | 340:28d1f895c6fe | 245 | #define USART_PHASE_1EDGE ((uint32_t)0x0000) |
mbed_official | 340:28d1f895c6fe | 246 | #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) |
mbed_official | 340:28d1f895c6fe | 247 | #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE)) |
mbed_official | 340:28d1f895c6fe | 248 | /** |
mbed_official | 340:28d1f895c6fe | 249 | * @} |
mbed_official | 340:28d1f895c6fe | 250 | */ |
mbed_official | 340:28d1f895c6fe | 251 | |
mbed_official | 340:28d1f895c6fe | 252 | /** @defgroup USART_Last_Bit USART Last Bit |
mbed_official | 340:28d1f895c6fe | 253 | * @{ |
mbed_official | 340:28d1f895c6fe | 254 | */ |
mbed_official | 340:28d1f895c6fe | 255 | #define USART_LASTBIT_DISABLE ((uint32_t)0x0000) |
mbed_official | 340:28d1f895c6fe | 256 | #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) |
mbed_official | 340:28d1f895c6fe | 257 | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \ |
mbed_official | 340:28d1f895c6fe | 258 | ((LASTBIT) == USART_LASTBIT_ENABLE)) |
mbed_official | 340:28d1f895c6fe | 259 | /** |
mbed_official | 340:28d1f895c6fe | 260 | * @} |
mbed_official | 340:28d1f895c6fe | 261 | */ |
mbed_official | 340:28d1f895c6fe | 262 | |
mbed_official | 340:28d1f895c6fe | 263 | |
mbed_official | 340:28d1f895c6fe | 264 | /** @defgroup USART_Flags USART Flags |
mbed_official | 340:28d1f895c6fe | 265 | * Elements values convention: 0xXXXX |
mbed_official | 340:28d1f895c6fe | 266 | * - 0xXXXX : Flag mask in the ISR register |
mbed_official | 340:28d1f895c6fe | 267 | * @{ |
mbed_official | 340:28d1f895c6fe | 268 | */ |
mbed_official | 340:28d1f895c6fe | 269 | #define USART_FLAG_REACK ((uint32_t)0x00400000) |
mbed_official | 340:28d1f895c6fe | 270 | #define USART_FLAG_TEACK ((uint32_t)0x00200000) |
mbed_official | 340:28d1f895c6fe | 271 | #define USART_FLAG_BUSY ((uint32_t)0x00010000) |
mbed_official | 340:28d1f895c6fe | 272 | #define USART_FLAG_CTS ((uint32_t)0x00000400) |
mbed_official | 340:28d1f895c6fe | 273 | #define USART_FLAG_CTSIF ((uint32_t)0x00000200) |
mbed_official | 340:28d1f895c6fe | 274 | #define USART_FLAG_LBDF ((uint32_t)0x00000100) |
mbed_official | 340:28d1f895c6fe | 275 | #define USART_FLAG_TXE ((uint32_t)0x00000080) |
mbed_official | 340:28d1f895c6fe | 276 | #define USART_FLAG_TC ((uint32_t)0x00000040) |
mbed_official | 340:28d1f895c6fe | 277 | #define USART_FLAG_RXNE ((uint32_t)0x00000020) |
mbed_official | 340:28d1f895c6fe | 278 | #define USART_FLAG_IDLE ((uint32_t)0x00000010) |
mbed_official | 340:28d1f895c6fe | 279 | #define USART_FLAG_ORE ((uint32_t)0x00000008) |
mbed_official | 340:28d1f895c6fe | 280 | #define USART_FLAG_NE ((uint32_t)0x00000004) |
mbed_official | 340:28d1f895c6fe | 281 | #define USART_FLAG_FE ((uint32_t)0x00000002) |
mbed_official | 340:28d1f895c6fe | 282 | #define USART_FLAG_PE ((uint32_t)0x00000001) |
mbed_official | 340:28d1f895c6fe | 283 | /** |
mbed_official | 340:28d1f895c6fe | 284 | * @} |
mbed_official | 340:28d1f895c6fe | 285 | */ |
mbed_official | 340:28d1f895c6fe | 286 | |
mbed_official | 340:28d1f895c6fe | 287 | /** @defgroup USART_Interrupt_definition USART Interrupts Definition |
mbed_official | 340:28d1f895c6fe | 288 | * Elements values convention: 0000ZZZZ0XXYYYYYb |
mbed_official | 340:28d1f895c6fe | 289 | * - YYYYY : Interrupt source position in the XX register (5bits) |
mbed_official | 340:28d1f895c6fe | 290 | * - XX : Interrupt source register (2bits) |
mbed_official | 340:28d1f895c6fe | 291 | * - 01: CR1 register |
mbed_official | 340:28d1f895c6fe | 292 | * - 10: CR2 register |
mbed_official | 340:28d1f895c6fe | 293 | * - 11: CR3 register |
mbed_official | 340:28d1f895c6fe | 294 | * - ZZZZ : Flag position in the ISR register(4bits) |
mbed_official | 340:28d1f895c6fe | 295 | * @{ |
mbed_official | 340:28d1f895c6fe | 296 | */ |
mbed_official | 340:28d1f895c6fe | 297 | |
mbed_official | 340:28d1f895c6fe | 298 | #define USART_IT_PE ((uint16_t)0x0028) |
mbed_official | 340:28d1f895c6fe | 299 | #define USART_IT_TXE ((uint16_t)0x0727) |
mbed_official | 340:28d1f895c6fe | 300 | #define USART_IT_TC ((uint16_t)0x0626) |
mbed_official | 340:28d1f895c6fe | 301 | #define USART_IT_RXNE ((uint16_t)0x0525) |
mbed_official | 340:28d1f895c6fe | 302 | #define USART_IT_IDLE ((uint16_t)0x0424) |
mbed_official | 340:28d1f895c6fe | 303 | #define USART_IT_ERR ((uint16_t)0x0060) |
mbed_official | 340:28d1f895c6fe | 304 | |
mbed_official | 340:28d1f895c6fe | 305 | #define USART_IT_ORE ((uint16_t)0x0300) |
mbed_official | 340:28d1f895c6fe | 306 | #define USART_IT_NE ((uint16_t)0x0200) |
mbed_official | 340:28d1f895c6fe | 307 | #define USART_IT_FE ((uint16_t)0x0100) |
mbed_official | 340:28d1f895c6fe | 308 | /** |
mbed_official | 340:28d1f895c6fe | 309 | * @} |
mbed_official | 340:28d1f895c6fe | 310 | */ |
mbed_official | 340:28d1f895c6fe | 311 | |
mbed_official | 340:28d1f895c6fe | 312 | /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags |
mbed_official | 340:28d1f895c6fe | 313 | * @{ |
mbed_official | 340:28d1f895c6fe | 314 | */ |
mbed_official | 340:28d1f895c6fe | 315 | #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 316 | #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 317 | #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 318 | #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 319 | #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 320 | #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 321 | #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
mbed_official | 340:28d1f895c6fe | 322 | /** |
mbed_official | 340:28d1f895c6fe | 323 | * @} |
mbed_official | 340:28d1f895c6fe | 324 | */ |
mbed_official | 340:28d1f895c6fe | 325 | |
mbed_official | 340:28d1f895c6fe | 326 | /** @defgroup USART_Request_Parameters USART Request Parameters |
mbed_official | 340:28d1f895c6fe | 327 | * @{ |
mbed_official | 340:28d1f895c6fe | 328 | */ |
mbed_official | 340:28d1f895c6fe | 329 | #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
mbed_official | 340:28d1f895c6fe | 330 | #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
mbed_official | 340:28d1f895c6fe | 331 | #define IS_USART_REQUEST_PARAMETER(PARAM) (((PARAM) == USART_RXDATA_FLUSH_REQUEST) || \ |
mbed_official | 340:28d1f895c6fe | 332 | ((PARAM) == USART_TXDATA_FLUSH_REQUEST)) |
mbed_official | 340:28d1f895c6fe | 333 | /** |
mbed_official | 340:28d1f895c6fe | 334 | * @} |
mbed_official | 340:28d1f895c6fe | 335 | */ |
mbed_official | 340:28d1f895c6fe | 336 | |
mbed_official | 340:28d1f895c6fe | 337 | /** @defgroup USART_Interruption_Mask USART interruptions flag mask |
mbed_official | 340:28d1f895c6fe | 338 | * @{ |
mbed_official | 340:28d1f895c6fe | 339 | */ |
mbed_official | 340:28d1f895c6fe | 340 | #define USART_IT_MASK ((uint16_t)0x001F) |
mbed_official | 340:28d1f895c6fe | 341 | /** |
mbed_official | 340:28d1f895c6fe | 342 | * @} |
mbed_official | 340:28d1f895c6fe | 343 | */ |
mbed_official | 340:28d1f895c6fe | 344 | |
mbed_official | 340:28d1f895c6fe | 345 | /** |
mbed_official | 340:28d1f895c6fe | 346 | * @} |
mbed_official | 340:28d1f895c6fe | 347 | */ |
mbed_official | 340:28d1f895c6fe | 348 | |
mbed_official | 340:28d1f895c6fe | 349 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 350 | /** @defgroup USART_Exported_Macros USART Exported Macros |
mbed_official | 340:28d1f895c6fe | 351 | * @{ |
mbed_official | 340:28d1f895c6fe | 352 | */ |
mbed_official | 340:28d1f895c6fe | 353 | |
mbed_official | 340:28d1f895c6fe | 354 | |
mbed_official | 340:28d1f895c6fe | 355 | /** @brief Reset USART handle state |
mbed_official | 340:28d1f895c6fe | 356 | * @param __HANDLE__: USART handle. |
mbed_official | 340:28d1f895c6fe | 357 | * @retval None |
mbed_official | 340:28d1f895c6fe | 358 | */ |
mbed_official | 340:28d1f895c6fe | 359 | #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) |
mbed_official | 340:28d1f895c6fe | 360 | |
mbed_official | 340:28d1f895c6fe | 361 | /** @brief Checks whether the specified USART flag is set or not. |
mbed_official | 340:28d1f895c6fe | 362 | * @param __HANDLE__: specifies the USART Handle |
mbed_official | 340:28d1f895c6fe | 363 | * @param __FLAG__: specifies the flag to check. |
mbed_official | 340:28d1f895c6fe | 364 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 365 | * @arg USART_FLAG_REACK: Receive enable ackowledge flag |
mbed_official | 340:28d1f895c6fe | 366 | * @arg USART_FLAG_TEACK: Transmit enable ackowledge flag |
mbed_official | 340:28d1f895c6fe | 367 | * @arg USART_FLAG_BUSY: Busy flag |
mbed_official | 340:28d1f895c6fe | 368 | * @arg USART_FLAG_CTS: CTS Change flag |
mbed_official | 340:28d1f895c6fe | 369 | * @arg USART_FLAG_TXE: Transmit data register empty flag |
mbed_official | 340:28d1f895c6fe | 370 | * @arg USART_FLAG_TC: Transmission Complete flag |
mbed_official | 340:28d1f895c6fe | 371 | * @arg USART_FLAG_RXNE: Receive data register not empty flag |
mbed_official | 340:28d1f895c6fe | 372 | * @arg USART_FLAG_IDLE: Idle Line detection flag |
mbed_official | 340:28d1f895c6fe | 373 | * @arg USART_FLAG_ORE: OverRun Error flag |
mbed_official | 340:28d1f895c6fe | 374 | * @arg USART_FLAG_NE: Noise Error flag |
mbed_official | 340:28d1f895c6fe | 375 | * @arg USART_FLAG_FE: Framing Error flag |
mbed_official | 340:28d1f895c6fe | 376 | * @arg USART_FLAG_PE: Parity Error flag |
mbed_official | 340:28d1f895c6fe | 377 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
mbed_official | 340:28d1f895c6fe | 378 | */ |
mbed_official | 340:28d1f895c6fe | 379 | #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
mbed_official | 340:28d1f895c6fe | 380 | |
mbed_official | 340:28d1f895c6fe | 381 | |
mbed_official | 340:28d1f895c6fe | 382 | /** @brief Enables the specified USART interrupt. |
mbed_official | 340:28d1f895c6fe | 383 | * @param __HANDLE__: specifies the USART Handle |
mbed_official | 340:28d1f895c6fe | 384 | * @param __INTERRUPT__: specifies the USART interrupt source to enable. |
mbed_official | 340:28d1f895c6fe | 385 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 386 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
mbed_official | 340:28d1f895c6fe | 387 | * @arg USART_IT_TC: Transmission complete interrupt |
mbed_official | 340:28d1f895c6fe | 388 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
mbed_official | 340:28d1f895c6fe | 389 | * @arg USART_IT_IDLE: Idle line detection interrupt |
mbed_official | 340:28d1f895c6fe | 390 | * @arg USART_IT_PE: Parity Error interrupt |
mbed_official | 340:28d1f895c6fe | 391 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
mbed_official | 340:28d1f895c6fe | 392 | * @retval None |
mbed_official | 340:28d1f895c6fe | 393 | */ |
mbed_official | 340:28d1f895c6fe | 394 | #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
mbed_official | 340:28d1f895c6fe | 395 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
mbed_official | 340:28d1f895c6fe | 396 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
mbed_official | 340:28d1f895c6fe | 397 | |
mbed_official | 340:28d1f895c6fe | 398 | /** @brief Disables the specified USART interrupt. |
mbed_official | 340:28d1f895c6fe | 399 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 340:28d1f895c6fe | 400 | * @param __INTERRUPT__: specifies the USART interrupt source to disable. |
mbed_official | 340:28d1f895c6fe | 401 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 402 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
mbed_official | 340:28d1f895c6fe | 403 | * @arg USART_IT_TC: Transmission complete interrupt |
mbed_official | 340:28d1f895c6fe | 404 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
mbed_official | 340:28d1f895c6fe | 405 | * @arg USART_IT_IDLE: Idle line detection interrupt |
mbed_official | 340:28d1f895c6fe | 406 | * @arg USART_IT_PE: Parity Error interrupt |
mbed_official | 340:28d1f895c6fe | 407 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
mbed_official | 340:28d1f895c6fe | 408 | * @retval None |
mbed_official | 340:28d1f895c6fe | 409 | */ |
mbed_official | 340:28d1f895c6fe | 410 | #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
mbed_official | 340:28d1f895c6fe | 411 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
mbed_official | 340:28d1f895c6fe | 412 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
mbed_official | 340:28d1f895c6fe | 413 | |
mbed_official | 340:28d1f895c6fe | 414 | |
mbed_official | 340:28d1f895c6fe | 415 | /** @brief Checks whether the specified USART interrupt has occurred or not. |
mbed_official | 340:28d1f895c6fe | 416 | * @param __HANDLE__: specifies the USART Handle |
mbed_official | 340:28d1f895c6fe | 417 | * @param __IT__: specifies the USART interrupt source to check. |
mbed_official | 340:28d1f895c6fe | 418 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 419 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
mbed_official | 340:28d1f895c6fe | 420 | * @arg USART_IT_TC: Transmission complete interrupt |
mbed_official | 340:28d1f895c6fe | 421 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
mbed_official | 340:28d1f895c6fe | 422 | * @arg USART_IT_IDLE: Idle line detection interrupt |
mbed_official | 340:28d1f895c6fe | 423 | * @arg USART_IT_ORE: OverRun Error interrupt |
mbed_official | 340:28d1f895c6fe | 424 | * @arg USART_IT_NE: Noise Error interrupt |
mbed_official | 340:28d1f895c6fe | 425 | * @arg USART_IT_FE: Framing Error interrupt |
mbed_official | 340:28d1f895c6fe | 426 | * @arg USART_IT_PE: Parity Error interrupt |
mbed_official | 340:28d1f895c6fe | 427 | * @retval The new state of __IT__ (TRUE or FALSE). |
mbed_official | 340:28d1f895c6fe | 428 | */ |
mbed_official | 340:28d1f895c6fe | 429 | #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08))) |
mbed_official | 340:28d1f895c6fe | 430 | |
mbed_official | 340:28d1f895c6fe | 431 | /** @brief Checks whether the specified USART interrupt source is enabled. |
mbed_official | 340:28d1f895c6fe | 432 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 340:28d1f895c6fe | 433 | * @param __IT__: specifies the USART interrupt source to check. |
mbed_official | 340:28d1f895c6fe | 434 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 435 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
mbed_official | 340:28d1f895c6fe | 436 | * @arg USART_IT_TC: Transmission complete interrupt |
mbed_official | 340:28d1f895c6fe | 437 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
mbed_official | 340:28d1f895c6fe | 438 | * @arg USART_IT_IDLE: Idle line detection interrupt |
mbed_official | 340:28d1f895c6fe | 439 | * @arg USART_IT_ORE: OverRun Error interrupt |
mbed_official | 340:28d1f895c6fe | 440 | * @arg USART_IT_NE: Noise Error interrupt |
mbed_official | 340:28d1f895c6fe | 441 | * @arg USART_IT_FE: Framing Error interrupt |
mbed_official | 340:28d1f895c6fe | 442 | * @arg USART_IT_PE: Parity Error interrupt |
mbed_official | 340:28d1f895c6fe | 443 | * @retval The new state of __IT__ (TRUE or FALSE). |
mbed_official | 340:28d1f895c6fe | 444 | */ |
mbed_official | 340:28d1f895c6fe | 445 | #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \ |
mbed_official | 340:28d1f895c6fe | 446 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \ |
mbed_official | 340:28d1f895c6fe | 447 | (((uint16_t)(__IT__)) & USART_IT_MASK))) |
mbed_official | 340:28d1f895c6fe | 448 | |
mbed_official | 340:28d1f895c6fe | 449 | |
mbed_official | 340:28d1f895c6fe | 450 | /** @brief Clears the specified USART ISR flag, in setting the proper ICR register flag. |
mbed_official | 340:28d1f895c6fe | 451 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 340:28d1f895c6fe | 452 | * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set |
mbed_official | 340:28d1f895c6fe | 453 | * to clear the corresponding interrupt |
mbed_official | 340:28d1f895c6fe | 454 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 455 | * @arg USART_CLEAR_PEF: Parity Error Clear Flag |
mbed_official | 340:28d1f895c6fe | 456 | * @arg USART_CLEAR_FEF: Framing Error Clear Flag |
mbed_official | 340:28d1f895c6fe | 457 | * @arg USART_CLEAR_NEF: Noise detected Clear Flag |
mbed_official | 340:28d1f895c6fe | 458 | * @arg USART_CLEAR_OREF: OverRun Error Clear Flag |
mbed_official | 340:28d1f895c6fe | 459 | * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag |
mbed_official | 340:28d1f895c6fe | 460 | * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag |
mbed_official | 340:28d1f895c6fe | 461 | * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag |
mbed_official | 340:28d1f895c6fe | 462 | * @retval None |
mbed_official | 340:28d1f895c6fe | 463 | */ |
mbed_official | 340:28d1f895c6fe | 464 | #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
mbed_official | 340:28d1f895c6fe | 465 | |
mbed_official | 340:28d1f895c6fe | 466 | /** @brief Set a specific USART request flag. |
mbed_official | 340:28d1f895c6fe | 467 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 340:28d1f895c6fe | 468 | * @param __REQ__: specifies the request flag to set |
mbed_official | 340:28d1f895c6fe | 469 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 470 | * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request |
mbed_official | 340:28d1f895c6fe | 471 | * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request |
mbed_official | 340:28d1f895c6fe | 472 | * |
mbed_official | 340:28d1f895c6fe | 473 | * @retval None |
mbed_official | 340:28d1f895c6fe | 474 | */ |
mbed_official | 340:28d1f895c6fe | 475 | #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
mbed_official | 340:28d1f895c6fe | 476 | |
mbed_official | 340:28d1f895c6fe | 477 | /** @brief Enable USART |
mbed_official | 340:28d1f895c6fe | 478 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 340:28d1f895c6fe | 479 | * @retval None |
mbed_official | 340:28d1f895c6fe | 480 | */ |
mbed_official | 340:28d1f895c6fe | 481 | #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
mbed_official | 340:28d1f895c6fe | 482 | |
mbed_official | 340:28d1f895c6fe | 483 | /** @brief Disable USART |
mbed_official | 340:28d1f895c6fe | 484 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 340:28d1f895c6fe | 485 | * @retval None |
mbed_official | 340:28d1f895c6fe | 486 | */ |
mbed_official | 340:28d1f895c6fe | 487 | #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
mbed_official | 340:28d1f895c6fe | 488 | |
mbed_official | 340:28d1f895c6fe | 489 | /** |
mbed_official | 340:28d1f895c6fe | 490 | * @} |
mbed_official | 340:28d1f895c6fe | 491 | */ |
mbed_official | 340:28d1f895c6fe | 492 | |
mbed_official | 340:28d1f895c6fe | 493 | /* Private macros --------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 494 | /** @defgroup USART_Private_Macros USART Private Macros |
mbed_official | 340:28d1f895c6fe | 495 | * @{ |
mbed_official | 340:28d1f895c6fe | 496 | */ |
mbed_official | 340:28d1f895c6fe | 497 | |
mbed_official | 340:28d1f895c6fe | 498 | /** @brief Check USART Baud rate |
mbed_official | 340:28d1f895c6fe | 499 | * @param BAUDRATE: Baudrate specified by the user |
mbed_official | 340:28d1f895c6fe | 500 | * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz) |
mbed_official | 340:28d1f895c6fe | 501 | * divided by the smallest oversampling used on the USART (i.e. 8) |
mbed_official | 340:28d1f895c6fe | 502 | * @retval Test result (TRUE or FALSE) |
mbed_official | 340:28d1f895c6fe | 503 | */ |
mbed_official | 340:28d1f895c6fe | 504 | #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001) |
mbed_official | 340:28d1f895c6fe | 505 | /** |
mbed_official | 340:28d1f895c6fe | 506 | * @} |
mbed_official | 340:28d1f895c6fe | 507 | */ |
mbed_official | 340:28d1f895c6fe | 508 | |
mbed_official | 340:28d1f895c6fe | 509 | /* Include USART HAL Extension module */ |
mbed_official | 340:28d1f895c6fe | 510 | #include "stm32f0xx_hal_usart_ex.h" |
mbed_official | 340:28d1f895c6fe | 511 | |
mbed_official | 340:28d1f895c6fe | 512 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 513 | |
mbed_official | 340:28d1f895c6fe | 514 | /** @addtogroup USART_Exported_Functions USART Exported Functions |
mbed_official | 340:28d1f895c6fe | 515 | * @{ |
mbed_official | 340:28d1f895c6fe | 516 | */ |
mbed_official | 340:28d1f895c6fe | 517 | |
mbed_official | 340:28d1f895c6fe | 518 | /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 340:28d1f895c6fe | 519 | * @{ |
mbed_official | 340:28d1f895c6fe | 520 | */ |
mbed_official | 340:28d1f895c6fe | 521 | |
mbed_official | 340:28d1f895c6fe | 522 | /* Initialization and de-initialization functions ******************************/ |
mbed_official | 340:28d1f895c6fe | 523 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 524 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 525 | void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 526 | void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 527 | HAL_StatusTypeDef HAL_USART_CheckIdleState(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 528 | |
mbed_official | 340:28d1f895c6fe | 529 | /** |
mbed_official | 340:28d1f895c6fe | 530 | * @} |
mbed_official | 340:28d1f895c6fe | 531 | */ |
mbed_official | 340:28d1f895c6fe | 532 | |
mbed_official | 340:28d1f895c6fe | 533 | /** @addtogroup USART_Exported_Functions_Group2 IO operation functions |
mbed_official | 340:28d1f895c6fe | 534 | * @{ |
mbed_official | 340:28d1f895c6fe | 535 | */ |
mbed_official | 340:28d1f895c6fe | 536 | |
mbed_official | 340:28d1f895c6fe | 537 | /* IO operation functions *******************************************************/ |
mbed_official | 340:28d1f895c6fe | 538 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 539 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 540 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 541 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
mbed_official | 340:28d1f895c6fe | 542 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
mbed_official | 340:28d1f895c6fe | 543 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
mbed_official | 340:28d1f895c6fe | 544 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
mbed_official | 340:28d1f895c6fe | 545 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
mbed_official | 340:28d1f895c6fe | 546 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
mbed_official | 340:28d1f895c6fe | 547 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 548 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 549 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 550 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 551 | void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 552 | void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 553 | void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 554 | void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 555 | void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 556 | void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 557 | |
mbed_official | 340:28d1f895c6fe | 558 | /** |
mbed_official | 340:28d1f895c6fe | 559 | * @} |
mbed_official | 340:28d1f895c6fe | 560 | */ |
mbed_official | 340:28d1f895c6fe | 561 | |
mbed_official | 340:28d1f895c6fe | 562 | /* Peripheral Control functions ***********************************************/ |
mbed_official | 340:28d1f895c6fe | 563 | |
mbed_official | 340:28d1f895c6fe | 564 | /** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Errors functions |
mbed_official | 340:28d1f895c6fe | 565 | * @{ |
mbed_official | 340:28d1f895c6fe | 566 | */ |
mbed_official | 340:28d1f895c6fe | 567 | |
mbed_official | 340:28d1f895c6fe | 568 | /* Peripheral State and Error functions ***************************************/ |
mbed_official | 340:28d1f895c6fe | 569 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 570 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
mbed_official | 340:28d1f895c6fe | 571 | |
mbed_official | 340:28d1f895c6fe | 572 | /** |
mbed_official | 340:28d1f895c6fe | 573 | * @} |
mbed_official | 340:28d1f895c6fe | 574 | */ |
mbed_official | 340:28d1f895c6fe | 575 | |
mbed_official | 340:28d1f895c6fe | 576 | /** |
mbed_official | 340:28d1f895c6fe | 577 | * @} |
mbed_official | 340:28d1f895c6fe | 578 | */ |
mbed_official | 340:28d1f895c6fe | 579 | |
mbed_official | 340:28d1f895c6fe | 580 | /** |
mbed_official | 340:28d1f895c6fe | 581 | * @} |
mbed_official | 340:28d1f895c6fe | 582 | */ |
mbed_official | 340:28d1f895c6fe | 583 | |
mbed_official | 340:28d1f895c6fe | 584 | /** |
mbed_official | 340:28d1f895c6fe | 585 | * @} |
mbed_official | 340:28d1f895c6fe | 586 | */ |
mbed_official | 340:28d1f895c6fe | 587 | |
mbed_official | 340:28d1f895c6fe | 588 | #ifdef __cplusplus |
mbed_official | 340:28d1f895c6fe | 589 | } |
mbed_official | 340:28d1f895c6fe | 590 | #endif |
mbed_official | 340:28d1f895c6fe | 591 | |
mbed_official | 340:28d1f895c6fe | 592 | #endif /* __STM32F0xx_HAL_USART_H */ |
mbed_official | 340:28d1f895c6fe | 593 | |
mbed_official | 340:28d1f895c6fe | 594 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
mbed_official | 340:28d1f895c6fe | 595 |