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targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.c@385:be64abf45658, 2014-11-04 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Nov 04 09:45:07 2014 +0000
- Revision:
- 385:be64abf45658
- Parent:
- targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f3xx_hal_pwr.c@330:c80ac197fa6a
Synchronized with git revision 5a868b18bc02bd5bb19d24424d0a2464cd1930bb
Full URL: https://github.com/mbedmicro/mbed/commit/5a868b18bc02bd5bb19d24424d0a2464cd1930bb/
Targets: Factorisation of NUCLEO_F302R8 and F334R8 cmsis folders
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 330:c80ac197fa6a | 1 | /** |
mbed_official | 330:c80ac197fa6a | 2 | ****************************************************************************** |
mbed_official | 330:c80ac197fa6a | 3 | * @file stm32f3xx_hal_pwr.c |
mbed_official | 330:c80ac197fa6a | 4 | * @author MCD Application Team |
mbed_official | 330:c80ac197fa6a | 5 | * @version V1.1.0 |
mbed_official | 330:c80ac197fa6a | 6 | * @date 12-Sept-2014 |
mbed_official | 330:c80ac197fa6a | 7 | * @brief PWR HAL module driver. |
mbed_official | 330:c80ac197fa6a | 8 | * |
mbed_official | 330:c80ac197fa6a | 9 | * This file provides firmware functions to manage the following |
mbed_official | 330:c80ac197fa6a | 10 | * functionalities of the Power Controller (PWR) peripheral: |
mbed_official | 330:c80ac197fa6a | 11 | * + Initialization/de-initialization functions |
mbed_official | 330:c80ac197fa6a | 12 | * + Peripheral Control functions |
mbed_official | 330:c80ac197fa6a | 13 | * |
mbed_official | 330:c80ac197fa6a | 14 | @verbatim |
mbed_official | 330:c80ac197fa6a | 15 | ****************************************************************************** |
mbed_official | 330:c80ac197fa6a | 16 | * @attention |
mbed_official | 330:c80ac197fa6a | 17 | * |
mbed_official | 330:c80ac197fa6a | 18 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 330:c80ac197fa6a | 19 | * |
mbed_official | 330:c80ac197fa6a | 20 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 330:c80ac197fa6a | 21 | * are permitted provided that the following conditions are met: |
mbed_official | 330:c80ac197fa6a | 22 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 330:c80ac197fa6a | 23 | * this list of conditions and the following disclaimer. |
mbed_official | 330:c80ac197fa6a | 24 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 330:c80ac197fa6a | 25 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 330:c80ac197fa6a | 26 | * and/or other materials provided with the distribution. |
mbed_official | 330:c80ac197fa6a | 27 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 330:c80ac197fa6a | 28 | * may be used to endorse or promote products derived from this software |
mbed_official | 330:c80ac197fa6a | 29 | * without specific prior written permission. |
mbed_official | 330:c80ac197fa6a | 30 | * |
mbed_official | 330:c80ac197fa6a | 31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 330:c80ac197fa6a | 32 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 330:c80ac197fa6a | 33 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 330:c80ac197fa6a | 34 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 330:c80ac197fa6a | 35 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 330:c80ac197fa6a | 36 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 330:c80ac197fa6a | 37 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 330:c80ac197fa6a | 38 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 330:c80ac197fa6a | 39 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 330:c80ac197fa6a | 40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 330:c80ac197fa6a | 41 | * |
mbed_official | 330:c80ac197fa6a | 42 | ****************************************************************************** |
mbed_official | 330:c80ac197fa6a | 43 | */ |
mbed_official | 330:c80ac197fa6a | 44 | |
mbed_official | 330:c80ac197fa6a | 45 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 46 | #include "stm32f3xx_hal.h" |
mbed_official | 330:c80ac197fa6a | 47 | |
mbed_official | 330:c80ac197fa6a | 48 | /** @addtogroup STM32F3xx_HAL_Driver |
mbed_official | 330:c80ac197fa6a | 49 | * @{ |
mbed_official | 330:c80ac197fa6a | 50 | */ |
mbed_official | 330:c80ac197fa6a | 51 | |
mbed_official | 330:c80ac197fa6a | 52 | /** @defgroup PWR PWR HAL module driver |
mbed_official | 330:c80ac197fa6a | 53 | * @brief PWR HAL module driver |
mbed_official | 330:c80ac197fa6a | 54 | * @{ |
mbed_official | 330:c80ac197fa6a | 55 | */ |
mbed_official | 330:c80ac197fa6a | 56 | |
mbed_official | 330:c80ac197fa6a | 57 | #ifdef HAL_PWR_MODULE_ENABLED |
mbed_official | 330:c80ac197fa6a | 58 | |
mbed_official | 330:c80ac197fa6a | 59 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 60 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 61 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 62 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 63 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 64 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 65 | |
mbed_official | 330:c80ac197fa6a | 66 | /** @defgroup PWR_Exported_Functions PWR Exported Functions |
mbed_official | 330:c80ac197fa6a | 67 | * @{ |
mbed_official | 330:c80ac197fa6a | 68 | */ |
mbed_official | 330:c80ac197fa6a | 69 | |
mbed_official | 330:c80ac197fa6a | 70 | /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 330:c80ac197fa6a | 71 | * @brief Initialization and de-initialization functions |
mbed_official | 330:c80ac197fa6a | 72 | * |
mbed_official | 330:c80ac197fa6a | 73 | @verbatim |
mbed_official | 330:c80ac197fa6a | 74 | =============================================================================== |
mbed_official | 330:c80ac197fa6a | 75 | ##### Initialization/de-initialization functions ##### |
mbed_official | 330:c80ac197fa6a | 76 | =============================================================================== |
mbed_official | 330:c80ac197fa6a | 77 | [..] |
mbed_official | 330:c80ac197fa6a | 78 | After reset, the backup domain (RTC registers, RTC backup data |
mbed_official | 330:c80ac197fa6a | 79 | registers and backup SRAM) is protected against possible unwanted |
mbed_official | 330:c80ac197fa6a | 80 | write accesses. |
mbed_official | 330:c80ac197fa6a | 81 | To enable access to the RTC Domain and RTC registers, proceed as follows: |
mbed_official | 330:c80ac197fa6a | 82 | (+) Enable the Power Controller (PWR) APB1 interface clock using the |
mbed_official | 330:c80ac197fa6a | 83 | __PWR_CLK_ENABLE() macro. |
mbed_official | 330:c80ac197fa6a | 84 | (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. |
mbed_official | 330:c80ac197fa6a | 85 | |
mbed_official | 330:c80ac197fa6a | 86 | @endverbatim |
mbed_official | 330:c80ac197fa6a | 87 | * @{ |
mbed_official | 330:c80ac197fa6a | 88 | */ |
mbed_official | 330:c80ac197fa6a | 89 | |
mbed_official | 330:c80ac197fa6a | 90 | /** |
mbed_official | 330:c80ac197fa6a | 91 | * @brief Deinitializes the HAL PWR peripheral registers to their default reset values. |
mbed_official | 330:c80ac197fa6a | 92 | * @retval None |
mbed_official | 330:c80ac197fa6a | 93 | */ |
mbed_official | 330:c80ac197fa6a | 94 | void HAL_PWR_DeInit(void) |
mbed_official | 330:c80ac197fa6a | 95 | { |
mbed_official | 330:c80ac197fa6a | 96 | __PWR_FORCE_RESET(); |
mbed_official | 330:c80ac197fa6a | 97 | __PWR_RELEASE_RESET(); |
mbed_official | 330:c80ac197fa6a | 98 | } |
mbed_official | 330:c80ac197fa6a | 99 | |
mbed_official | 330:c80ac197fa6a | 100 | /** |
mbed_official | 330:c80ac197fa6a | 101 | * @brief Enables access to the backup domain (RTC registers, RTC |
mbed_official | 330:c80ac197fa6a | 102 | * backup data registers and backup SRAM). |
mbed_official | 330:c80ac197fa6a | 103 | * @note If the HSE divided by 32 is used as the RTC clock, the |
mbed_official | 330:c80ac197fa6a | 104 | * Backup Domain Access should be kept enabled. |
mbed_official | 330:c80ac197fa6a | 105 | * @retval None |
mbed_official | 330:c80ac197fa6a | 106 | */ |
mbed_official | 330:c80ac197fa6a | 107 | void HAL_PWR_EnableBkUpAccess(void) |
mbed_official | 330:c80ac197fa6a | 108 | { |
mbed_official | 330:c80ac197fa6a | 109 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; |
mbed_official | 330:c80ac197fa6a | 110 | } |
mbed_official | 330:c80ac197fa6a | 111 | |
mbed_official | 330:c80ac197fa6a | 112 | /** |
mbed_official | 330:c80ac197fa6a | 113 | * @brief Disables access to the backup domain (RTC registers, RTC |
mbed_official | 330:c80ac197fa6a | 114 | * backup data registers and backup SRAM). |
mbed_official | 330:c80ac197fa6a | 115 | * @note If the HSE divided by 32 is used as the RTC clock, the |
mbed_official | 330:c80ac197fa6a | 116 | * Backup Domain Access should be kept enabled. |
mbed_official | 330:c80ac197fa6a | 117 | * @retval None |
mbed_official | 330:c80ac197fa6a | 118 | */ |
mbed_official | 330:c80ac197fa6a | 119 | void HAL_PWR_DisableBkUpAccess(void) |
mbed_official | 330:c80ac197fa6a | 120 | { |
mbed_official | 330:c80ac197fa6a | 121 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE; |
mbed_official | 330:c80ac197fa6a | 122 | } |
mbed_official | 330:c80ac197fa6a | 123 | |
mbed_official | 330:c80ac197fa6a | 124 | /** |
mbed_official | 330:c80ac197fa6a | 125 | * @} |
mbed_official | 330:c80ac197fa6a | 126 | */ |
mbed_official | 330:c80ac197fa6a | 127 | |
mbed_official | 330:c80ac197fa6a | 128 | /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions |
mbed_official | 330:c80ac197fa6a | 129 | * @brief Low Power modes configuration functions |
mbed_official | 330:c80ac197fa6a | 130 | * |
mbed_official | 330:c80ac197fa6a | 131 | @verbatim |
mbed_official | 330:c80ac197fa6a | 132 | |
mbed_official | 330:c80ac197fa6a | 133 | =============================================================================== |
mbed_official | 330:c80ac197fa6a | 134 | ##### Peripheral Control functions ##### |
mbed_official | 330:c80ac197fa6a | 135 | =============================================================================== |
mbed_official | 330:c80ac197fa6a | 136 | [..] |
mbed_official | 330:c80ac197fa6a | 137 | *** WakeUp pin configuration *** |
mbed_official | 330:c80ac197fa6a | 138 | ================================ |
mbed_official | 330:c80ac197fa6a | 139 | (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is |
mbed_official | 330:c80ac197fa6a | 140 | forced in input pull down configuration and is active on rising edges. |
mbed_official | 330:c80ac197fa6a | 141 | (+) There are up to three WakeUp pins: |
mbed_official | 330:c80ac197fa6a | 142 | WakeUp Pin 1 on PA.00. |
mbed_official | 330:c80ac197fa6a | 143 | WakeUp Pin 2 on PC.13 (STM32F303xC, STM32F303xE only). |
mbed_official | 330:c80ac197fa6a | 144 | WakeUp Pin 3 on PE.06. |
mbed_official | 330:c80ac197fa6a | 145 | |
mbed_official | 330:c80ac197fa6a | 146 | *** Main and Backup Regulators configuration *** |
mbed_official | 330:c80ac197fa6a | 147 | ================================================ |
mbed_official | 330:c80ac197fa6a | 148 | [..] |
mbed_official | 330:c80ac197fa6a | 149 | (+) When the backup domain is supplied by VDD (analog switch connected to VDD) |
mbed_official | 330:c80ac197fa6a | 150 | the backup SRAM is powered from VDD which replaces the VBAT power supply to |
mbed_official | 330:c80ac197fa6a | 151 | save battery life. |
mbed_official | 330:c80ac197fa6a | 152 | |
mbed_official | 330:c80ac197fa6a | 153 | (+) The backup SRAM is not mass erased by an tamper event. It is read |
mbed_official | 330:c80ac197fa6a | 154 | protected to prevent confidential data, such as cryptographic private |
mbed_official | 330:c80ac197fa6a | 155 | key, from being accessed. The backup SRAM can be erased only through |
mbed_official | 330:c80ac197fa6a | 156 | the Flash interface when a protection level change from level 1 to |
mbed_official | 330:c80ac197fa6a | 157 | level 0 is requested. |
mbed_official | 330:c80ac197fa6a | 158 | -@- Refer to the description of Read protection (RDP) in the Flash |
mbed_official | 330:c80ac197fa6a | 159 | programming manual. |
mbed_official | 330:c80ac197fa6a | 160 | |
mbed_official | 330:c80ac197fa6a | 161 | Refer to the datasheets for more details. |
mbed_official | 330:c80ac197fa6a | 162 | |
mbed_official | 330:c80ac197fa6a | 163 | *** Low Power modes configuration *** |
mbed_official | 330:c80ac197fa6a | 164 | ===================================== |
mbed_official | 330:c80ac197fa6a | 165 | [..] |
mbed_official | 330:c80ac197fa6a | 166 | The devices feature 3 low-power modes: |
mbed_official | 330:c80ac197fa6a | 167 | (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. |
mbed_official | 330:c80ac197fa6a | 168 | (+) Stop mode: all clocks are stopped, regulator running, regulator |
mbed_official | 330:c80ac197fa6a | 169 | in low power mode |
mbed_official | 330:c80ac197fa6a | 170 | (+) Standby mode: 1.2V domain powered off (mode not available on STM32F3x8 devices). |
mbed_official | 330:c80ac197fa6a | 171 | |
mbed_official | 330:c80ac197fa6a | 172 | *** Sleep mode *** |
mbed_official | 330:c80ac197fa6a | 173 | ================== |
mbed_official | 330:c80ac197fa6a | 174 | [..] |
mbed_official | 330:c80ac197fa6a | 175 | (+) Entry: |
mbed_official | 330:c80ac197fa6a | 176 | The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx) |
mbed_official | 330:c80ac197fa6a | 177 | functions with |
mbed_official | 330:c80ac197fa6a | 178 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 330:c80ac197fa6a | 179 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 330:c80ac197fa6a | 180 | |
mbed_official | 330:c80ac197fa6a | 181 | (+) Exit: |
mbed_official | 330:c80ac197fa6a | 182 | (++) Any peripheral interrupt acknowledged by the nested vectored interrupt |
mbed_official | 330:c80ac197fa6a | 183 | controller (NVIC) can wake up the device from Sleep mode. |
mbed_official | 330:c80ac197fa6a | 184 | |
mbed_official | 330:c80ac197fa6a | 185 | *** Stop mode *** |
mbed_official | 330:c80ac197fa6a | 186 | ================= |
mbed_official | 330:c80ac197fa6a | 187 | [..] |
mbed_official | 330:c80ac197fa6a | 188 | In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI, |
mbed_official | 330:c80ac197fa6a | 189 | and the HSE RC oscillators are disabled. Internal SRAM and register contents |
mbed_official | 330:c80ac197fa6a | 190 | are preserved. |
mbed_official | 330:c80ac197fa6a | 191 | The voltage regulator can be configured either in normal or low-power mode. |
mbed_official | 330:c80ac197fa6a | 192 | To minimize the consumption. |
mbed_official | 330:c80ac197fa6a | 193 | |
mbed_official | 330:c80ac197fa6a | 194 | (+) Entry: |
mbed_official | 330:c80ac197fa6a | 195 | The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI ) |
mbed_official | 330:c80ac197fa6a | 196 | function with: |
mbed_official | 330:c80ac197fa6a | 197 | (++) Main regulator ON. |
mbed_official | 330:c80ac197fa6a | 198 | (++) Low Power regulator ON. |
mbed_official | 330:c80ac197fa6a | 199 | (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction |
mbed_official | 330:c80ac197fa6a | 200 | (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction |
mbed_official | 330:c80ac197fa6a | 201 | (+) Exit: |
mbed_official | 330:c80ac197fa6a | 202 | (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode. |
mbed_official | 330:c80ac197fa6a | 203 | (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, |
mbed_official | 330:c80ac197fa6a | 204 | when programmed in wakeup mode (the peripheral must be |
mbed_official | 330:c80ac197fa6a | 205 | programmed in wakeup mode and the corresponding interrupt vector |
mbed_official | 330:c80ac197fa6a | 206 | must be enabled in the NVIC) |
mbed_official | 330:c80ac197fa6a | 207 | |
mbed_official | 330:c80ac197fa6a | 208 | *** Standby mode *** |
mbed_official | 330:c80ac197fa6a | 209 | ==================== |
mbed_official | 330:c80ac197fa6a | 210 | [..] |
mbed_official | 330:c80ac197fa6a | 211 | The Standby mode allows to achieve the lowest power consumption. It is based |
mbed_official | 330:c80ac197fa6a | 212 | on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. |
mbed_official | 330:c80ac197fa6a | 213 | The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and |
mbed_official | 330:c80ac197fa6a | 214 | the HSE oscillator are also switched off. SRAM and register contents are lost |
mbed_official | 330:c80ac197fa6a | 215 | except for the RTC registers, RTC backup registers, backup SRAM and Standby |
mbed_official | 330:c80ac197fa6a | 216 | circuitry. |
mbed_official | 330:c80ac197fa6a | 217 | The voltage regulator is OFF. |
mbed_official | 330:c80ac197fa6a | 218 | |
mbed_official | 330:c80ac197fa6a | 219 | (+) Entry: |
mbed_official | 330:c80ac197fa6a | 220 | (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. |
mbed_official | 330:c80ac197fa6a | 221 | (+) Exit: |
mbed_official | 330:c80ac197fa6a | 222 | (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, |
mbed_official | 330:c80ac197fa6a | 223 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
mbed_official | 330:c80ac197fa6a | 224 | |
mbed_official | 330:c80ac197fa6a | 225 | *** Auto-wakeup (AWU) from low-power mode *** |
mbed_official | 330:c80ac197fa6a | 226 | ============================================= |
mbed_official | 330:c80ac197fa6a | 227 | [..] |
mbed_official | 330:c80ac197fa6a | 228 | The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC |
mbed_official | 330:c80ac197fa6a | 229 | Wakeup event, a tamper event, a time-stamp event, or a comparator event, |
mbed_official | 330:c80ac197fa6a | 230 | without depending on an external interrupt (Auto-wakeup mode). |
mbed_official | 330:c80ac197fa6a | 231 | |
mbed_official | 330:c80ac197fa6a | 232 | (+) RTC auto-wakeup (AWU) from the Stop and Standby modes |
mbed_official | 330:c80ac197fa6a | 233 | |
mbed_official | 330:c80ac197fa6a | 234 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to |
mbed_official | 330:c80ac197fa6a | 235 | configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. |
mbed_official | 330:c80ac197fa6a | 236 | |
mbed_official | 330:c80ac197fa6a | 237 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
mbed_official | 330:c80ac197fa6a | 238 | is necessary to configure the RTC to detect the tamper or time stamp event using the |
mbed_official | 330:c80ac197fa6a | 239 | HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions. |
mbed_official | 330:c80ac197fa6a | 240 | |
mbed_official | 330:c80ac197fa6a | 241 | (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to |
mbed_official | 330:c80ac197fa6a | 242 | configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() function. |
mbed_official | 330:c80ac197fa6a | 243 | |
mbed_official | 330:c80ac197fa6a | 244 | (+) Comparator auto-wakeup (AWU) from the Stop mode |
mbed_official | 330:c80ac197fa6a | 245 | |
mbed_official | 330:c80ac197fa6a | 246 | (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: |
mbed_official | 330:c80ac197fa6a | 247 | (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for comparator 2) |
mbed_official | 330:c80ac197fa6a | 248 | to be sensitive to to the selected edges (falling, rising or falling |
mbed_official | 330:c80ac197fa6a | 249 | and rising) (Interrupt or Event modes) using the EXTI_Init() function. |
mbed_official | 330:c80ac197fa6a | 250 | (+++) Configure the comparator to generate the event. |
mbed_official | 330:c80ac197fa6a | 251 | @endverbatim |
mbed_official | 330:c80ac197fa6a | 252 | * @{ |
mbed_official | 330:c80ac197fa6a | 253 | */ |
mbed_official | 330:c80ac197fa6a | 254 | |
mbed_official | 330:c80ac197fa6a | 255 | /** |
mbed_official | 330:c80ac197fa6a | 256 | * @brief Enables the WakeUp PINx functionality. |
mbed_official | 330:c80ac197fa6a | 257 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable. |
mbed_official | 330:c80ac197fa6a | 258 | * This parameter can be one of the following values: |
mbed_official | 330:c80ac197fa6a | 259 | * @arg PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3 |
mbed_official | 330:c80ac197fa6a | 260 | * @retval None |
mbed_official | 330:c80ac197fa6a | 261 | */ |
mbed_official | 330:c80ac197fa6a | 262 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) |
mbed_official | 330:c80ac197fa6a | 263 | { |
mbed_official | 330:c80ac197fa6a | 264 | __IO uint32_t tmp = 0; |
mbed_official | 330:c80ac197fa6a | 265 | |
mbed_official | 330:c80ac197fa6a | 266 | /* Check the parameters */ |
mbed_official | 330:c80ac197fa6a | 267 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
mbed_official | 330:c80ac197fa6a | 268 | tmp = CSR_EWUP1_BB + (WakeUpPinx << 2); |
mbed_official | 330:c80ac197fa6a | 269 | *(__IO uint32_t *) (tmp) = (uint32_t)ENABLE; |
mbed_official | 330:c80ac197fa6a | 270 | } |
mbed_official | 330:c80ac197fa6a | 271 | |
mbed_official | 330:c80ac197fa6a | 272 | /** |
mbed_official | 330:c80ac197fa6a | 273 | * @brief Disables the WakeUp PINx functionality. |
mbed_official | 330:c80ac197fa6a | 274 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. |
mbed_official | 330:c80ac197fa6a | 275 | * This parameter can be one of the following values: |
mbed_official | 330:c80ac197fa6a | 276 | * @arg PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3 |
mbed_official | 330:c80ac197fa6a | 277 | * @retval None |
mbed_official | 330:c80ac197fa6a | 278 | */ |
mbed_official | 330:c80ac197fa6a | 279 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) |
mbed_official | 330:c80ac197fa6a | 280 | { |
mbed_official | 330:c80ac197fa6a | 281 | __IO uint32_t tmp = 0; |
mbed_official | 330:c80ac197fa6a | 282 | |
mbed_official | 330:c80ac197fa6a | 283 | /* Check the parameters */ |
mbed_official | 330:c80ac197fa6a | 284 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
mbed_official | 330:c80ac197fa6a | 285 | tmp = CSR_EWUP1_BB + (WakeUpPinx << 2); |
mbed_official | 330:c80ac197fa6a | 286 | *(__IO uint32_t *) (tmp) = (uint32_t)DISABLE; |
mbed_official | 330:c80ac197fa6a | 287 | } |
mbed_official | 330:c80ac197fa6a | 288 | |
mbed_official | 330:c80ac197fa6a | 289 | /** |
mbed_official | 330:c80ac197fa6a | 290 | * @brief Enters Sleep mode. |
mbed_official | 330:c80ac197fa6a | 291 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 330:c80ac197fa6a | 292 | * @param Regulator: Specifies the regulator state in SLEEP mode. |
mbed_official | 330:c80ac197fa6a | 293 | * This parameter can be one of the following values: |
mbed_official | 330:c80ac197fa6a | 294 | * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON |
mbed_official | 330:c80ac197fa6a | 295 | * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON |
mbed_official | 330:c80ac197fa6a | 296 | * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction. |
mbed_official | 330:c80ac197fa6a | 297 | * When WFI entry is used, tick interrupt have to be disabled if not desired as |
mbed_official | 330:c80ac197fa6a | 298 | * the interrupt wake up source. |
mbed_official | 330:c80ac197fa6a | 299 | * This parameter can be one of the following values: |
mbed_official | 330:c80ac197fa6a | 300 | * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 330:c80ac197fa6a | 301 | * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 330:c80ac197fa6a | 302 | * @retval None |
mbed_official | 330:c80ac197fa6a | 303 | */ |
mbed_official | 330:c80ac197fa6a | 304 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) |
mbed_official | 330:c80ac197fa6a | 305 | { |
mbed_official | 330:c80ac197fa6a | 306 | uint32_t tmpreg = 0; |
mbed_official | 330:c80ac197fa6a | 307 | |
mbed_official | 330:c80ac197fa6a | 308 | /* Check the parameters */ |
mbed_official | 330:c80ac197fa6a | 309 | assert_param(IS_PWR_REGULATOR(Regulator)); |
mbed_official | 330:c80ac197fa6a | 310 | assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); |
mbed_official | 330:c80ac197fa6a | 311 | |
mbed_official | 330:c80ac197fa6a | 312 | /* Select the regulator state in SLEEP mode ---------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 313 | tmpreg = PWR->CR; |
mbed_official | 330:c80ac197fa6a | 314 | |
mbed_official | 330:c80ac197fa6a | 315 | /* Clear PDDS and LPDS bits */ |
mbed_official | 330:c80ac197fa6a | 316 | tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); |
mbed_official | 330:c80ac197fa6a | 317 | |
mbed_official | 330:c80ac197fa6a | 318 | /* Set LPDS bit according to Regulator value */ |
mbed_official | 330:c80ac197fa6a | 319 | tmpreg |= Regulator; |
mbed_official | 330:c80ac197fa6a | 320 | |
mbed_official | 330:c80ac197fa6a | 321 | /* Store the new value */ |
mbed_official | 330:c80ac197fa6a | 322 | PWR->CR = tmpreg; |
mbed_official | 330:c80ac197fa6a | 323 | |
mbed_official | 330:c80ac197fa6a | 324 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 330:c80ac197fa6a | 325 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 330:c80ac197fa6a | 326 | |
mbed_official | 330:c80ac197fa6a | 327 | /* Select SLEEP mode entry -------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 328 | if(SLEEPEntry == PWR_SLEEPENTRY_WFI) |
mbed_official | 330:c80ac197fa6a | 329 | { |
mbed_official | 330:c80ac197fa6a | 330 | /* Request Wait For Interrupt */ |
mbed_official | 330:c80ac197fa6a | 331 | __WFI(); |
mbed_official | 330:c80ac197fa6a | 332 | } |
mbed_official | 330:c80ac197fa6a | 333 | else |
mbed_official | 330:c80ac197fa6a | 334 | { |
mbed_official | 330:c80ac197fa6a | 335 | /* Request Wait For Event */ |
mbed_official | 330:c80ac197fa6a | 336 | __SEV(); |
mbed_official | 330:c80ac197fa6a | 337 | __WFE(); |
mbed_official | 330:c80ac197fa6a | 338 | __WFE(); |
mbed_official | 330:c80ac197fa6a | 339 | } |
mbed_official | 330:c80ac197fa6a | 340 | } |
mbed_official | 330:c80ac197fa6a | 341 | |
mbed_official | 330:c80ac197fa6a | 342 | /** |
mbed_official | 330:c80ac197fa6a | 343 | * @brief Enters STOP mode. |
mbed_official | 330:c80ac197fa6a | 344 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 330:c80ac197fa6a | 345 | * @note When exiting Stop mode by issuing an interrupt or a wakeup event, |
mbed_official | 330:c80ac197fa6a | 346 | * the HSI RC oscillator is selected as system clock. |
mbed_official | 330:c80ac197fa6a | 347 | * @note When the voltage regulator operates in low power mode, an additional |
mbed_official | 330:c80ac197fa6a | 348 | * startup delay is incurred when waking up from Stop mode. |
mbed_official | 330:c80ac197fa6a | 349 | * By keeping the internal regulator ON during Stop mode, the consumption |
mbed_official | 330:c80ac197fa6a | 350 | * is higher although the startup time is reduced. |
mbed_official | 330:c80ac197fa6a | 351 | * @param Regulator: Specifies the regulator state in STOP mode. |
mbed_official | 330:c80ac197fa6a | 352 | * This parameter can be one of the following values: |
mbed_official | 330:c80ac197fa6a | 353 | * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON |
mbed_official | 330:c80ac197fa6a | 354 | * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON |
mbed_official | 330:c80ac197fa6a | 355 | * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. |
mbed_official | 330:c80ac197fa6a | 356 | * This parameter can be one of the following values: |
mbed_official | 330:c80ac197fa6a | 357 | * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction |
mbed_official | 330:c80ac197fa6a | 358 | * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction |
mbed_official | 330:c80ac197fa6a | 359 | * @retval None |
mbed_official | 330:c80ac197fa6a | 360 | */ |
mbed_official | 330:c80ac197fa6a | 361 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
mbed_official | 330:c80ac197fa6a | 362 | { |
mbed_official | 330:c80ac197fa6a | 363 | uint32_t tmpreg = 0; |
mbed_official | 330:c80ac197fa6a | 364 | |
mbed_official | 330:c80ac197fa6a | 365 | /* Check the parameters */ |
mbed_official | 330:c80ac197fa6a | 366 | assert_param(IS_PWR_REGULATOR(Regulator)); |
mbed_official | 330:c80ac197fa6a | 367 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
mbed_official | 330:c80ac197fa6a | 368 | |
mbed_official | 330:c80ac197fa6a | 369 | /* Select the regulator state in STOP mode ---------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 370 | tmpreg = PWR->CR; |
mbed_official | 330:c80ac197fa6a | 371 | |
mbed_official | 330:c80ac197fa6a | 372 | /* Clear PDDS and LPDS bits */ |
mbed_official | 330:c80ac197fa6a | 373 | tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); |
mbed_official | 330:c80ac197fa6a | 374 | |
mbed_official | 330:c80ac197fa6a | 375 | /* Set LPDS bit according to Regulator value */ |
mbed_official | 330:c80ac197fa6a | 376 | tmpreg |= Regulator; |
mbed_official | 330:c80ac197fa6a | 377 | |
mbed_official | 330:c80ac197fa6a | 378 | /* Store the new value */ |
mbed_official | 330:c80ac197fa6a | 379 | PWR->CR = tmpreg; |
mbed_official | 330:c80ac197fa6a | 380 | |
mbed_official | 330:c80ac197fa6a | 381 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 330:c80ac197fa6a | 382 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
mbed_official | 330:c80ac197fa6a | 383 | |
mbed_official | 330:c80ac197fa6a | 384 | /* Select STOP mode entry --------------------------------------------------*/ |
mbed_official | 330:c80ac197fa6a | 385 | if(STOPEntry == PWR_STOPENTRY_WFI) |
mbed_official | 330:c80ac197fa6a | 386 | { |
mbed_official | 330:c80ac197fa6a | 387 | /* Request Wait For Interrupt */ |
mbed_official | 330:c80ac197fa6a | 388 | __WFI(); |
mbed_official | 330:c80ac197fa6a | 389 | } |
mbed_official | 330:c80ac197fa6a | 390 | else |
mbed_official | 330:c80ac197fa6a | 391 | { |
mbed_official | 330:c80ac197fa6a | 392 | /* Request Wait For Event */ |
mbed_official | 330:c80ac197fa6a | 393 | __SEV(); |
mbed_official | 330:c80ac197fa6a | 394 | __WFE(); |
mbed_official | 330:c80ac197fa6a | 395 | __WFE(); |
mbed_official | 330:c80ac197fa6a | 396 | } |
mbed_official | 330:c80ac197fa6a | 397 | |
mbed_official | 330:c80ac197fa6a | 398 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 330:c80ac197fa6a | 399 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 330:c80ac197fa6a | 400 | } |
mbed_official | 330:c80ac197fa6a | 401 | |
mbed_official | 330:c80ac197fa6a | 402 | /** |
mbed_official | 330:c80ac197fa6a | 403 | * @brief Enters STANDBY mode. |
mbed_official | 330:c80ac197fa6a | 404 | * @note In Standby mode, all I/O pins are high impedance except for: |
mbed_official | 330:c80ac197fa6a | 405 | * - Reset pad (still available) |
mbed_official | 330:c80ac197fa6a | 406 | * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC |
mbed_official | 330:c80ac197fa6a | 407 | * Alarm out, or RTC clock calibration out. |
mbed_official | 330:c80ac197fa6a | 408 | * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp. |
mbed_official | 330:c80ac197fa6a | 409 | * - WKUP pin 1 (PA0) if enabled. |
mbed_official | 330:c80ac197fa6a | 410 | * @retval None |
mbed_official | 330:c80ac197fa6a | 411 | */ |
mbed_official | 330:c80ac197fa6a | 412 | void HAL_PWR_EnterSTANDBYMode(void) |
mbed_official | 330:c80ac197fa6a | 413 | { |
mbed_official | 330:c80ac197fa6a | 414 | /* Select STANDBY mode */ |
mbed_official | 330:c80ac197fa6a | 415 | PWR->CR |= PWR_CR_PDDS; |
mbed_official | 330:c80ac197fa6a | 416 | |
mbed_official | 330:c80ac197fa6a | 417 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 330:c80ac197fa6a | 418 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
mbed_official | 330:c80ac197fa6a | 419 | |
mbed_official | 330:c80ac197fa6a | 420 | /* This option is used to ensure that store operations are completed */ |
mbed_official | 330:c80ac197fa6a | 421 | #if defined ( __CC_ARM) |
mbed_official | 330:c80ac197fa6a | 422 | __force_stores(); |
mbed_official | 330:c80ac197fa6a | 423 | #endif |
mbed_official | 330:c80ac197fa6a | 424 | /* Request Wait For Interrupt */ |
mbed_official | 330:c80ac197fa6a | 425 | __WFI(); |
mbed_official | 330:c80ac197fa6a | 426 | } |
mbed_official | 330:c80ac197fa6a | 427 | |
mbed_official | 330:c80ac197fa6a | 428 | /** |
mbed_official | 330:c80ac197fa6a | 429 | * @} |
mbed_official | 330:c80ac197fa6a | 430 | */ |
mbed_official | 330:c80ac197fa6a | 431 | |
mbed_official | 330:c80ac197fa6a | 432 | /** |
mbed_official | 330:c80ac197fa6a | 433 | * @} |
mbed_official | 330:c80ac197fa6a | 434 | */ |
mbed_official | 330:c80ac197fa6a | 435 | |
mbed_official | 330:c80ac197fa6a | 436 | #endif /* HAL_PWR_MODULE_ENABLED */ |
mbed_official | 330:c80ac197fa6a | 437 | /** |
mbed_official | 330:c80ac197fa6a | 438 | * @} |
mbed_official | 330:c80ac197fa6a | 439 | */ |
mbed_official | 330:c80ac197fa6a | 440 | |
mbed_official | 330:c80ac197fa6a | 441 | /** |
mbed_official | 330:c80ac197fa6a | 442 | * @} |
mbed_official | 330:c80ac197fa6a | 443 | */ |
mbed_official | 330:c80ac197fa6a | 444 | |
mbed_official | 330:c80ac197fa6a | 445 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |