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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2c.c@392:2b59412bb664, 2014-11-07 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 07 08:15:08 2014 +0000
- Revision:
- 392:2b59412bb664
- Parent:
- targets/cmsis/TARGET_STM/TARGET_NUCLEO_F091RC/stm32f0xx_hal_i2c.c@340:28d1f895c6fe
- Child:
- 441:d2c15dda23c1
Synchronized with git revision eec0be05cd92349bee83c65f9e1302b25b5badf4
Full URL: https://github.com/mbedmicro/mbed/commit/eec0be05cd92349bee83c65f9e1302b25b5badf4/
Targets: STM32F0 - Factorisation of NUCLEO_F030R8/F072RB/F091RC cmsis folders
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 340:28d1f895c6fe | 1 | /** |
mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_i2c.c |
mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
mbed_official | 340:28d1f895c6fe | 5 | * @version V1.1.0 |
mbed_official | 340:28d1f895c6fe | 6 | * @date 03-Oct-2014 |
mbed_official | 340:28d1f895c6fe | 7 | * @brief I2C HAL module driver. |
mbed_official | 340:28d1f895c6fe | 8 | * This file provides firmware functions to manage the following |
mbed_official | 340:28d1f895c6fe | 9 | * functionalities of the Inter Integrated Circuit (I2C) peripheral: |
mbed_official | 340:28d1f895c6fe | 10 | * + Initialization and de-initialization functions |
mbed_official | 340:28d1f895c6fe | 11 | * + IO operation functions |
mbed_official | 340:28d1f895c6fe | 12 | * + Peripheral State functions |
mbed_official | 340:28d1f895c6fe | 13 | * |
mbed_official | 340:28d1f895c6fe | 14 | @verbatim |
mbed_official | 340:28d1f895c6fe | 15 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 16 | ##### How to use this driver ##### |
mbed_official | 340:28d1f895c6fe | 17 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 18 | [..] |
mbed_official | 340:28d1f895c6fe | 19 | The I2C HAL driver can be used as follows: |
mbed_official | 340:28d1f895c6fe | 20 | |
mbed_official | 340:28d1f895c6fe | 21 | (#) Declare a I2C_HandleTypeDef handle structure, for example: |
mbed_official | 340:28d1f895c6fe | 22 | I2C_HandleTypeDef hi2c; |
mbed_official | 340:28d1f895c6fe | 23 | |
mbed_official | 340:28d1f895c6fe | 24 | (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit ()API: |
mbed_official | 340:28d1f895c6fe | 25 | (++) Enable the I2Cx interface clock |
mbed_official | 340:28d1f895c6fe | 26 | (++) I2C pins configuration |
mbed_official | 340:28d1f895c6fe | 27 | (+++) Enable the clock for the I2C GPIOs |
mbed_official | 340:28d1f895c6fe | 28 | (+++) Configure I2C pins as alternate function open-drain |
mbed_official | 340:28d1f895c6fe | 29 | (++) NVIC configuration if you need to use interrupt process |
mbed_official | 340:28d1f895c6fe | 30 | (+++) Configure the I2Cx interrupt priority |
mbed_official | 340:28d1f895c6fe | 31 | (+++) Enable the NVIC I2C IRQ Channel |
mbed_official | 340:28d1f895c6fe | 32 | (++) DMA Configuration if you need to use DMA process |
mbed_official | 340:28d1f895c6fe | 33 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel |
mbed_official | 340:28d1f895c6fe | 34 | (+++) Enable the DMAx interface clock using |
mbed_official | 340:28d1f895c6fe | 35 | (+++) Configure the DMA handle parameters |
mbed_official | 340:28d1f895c6fe | 36 | (+++) Configure the DMA Tx or Rx channel |
mbed_official | 340:28d1f895c6fe | 37 | (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle |
mbed_official | 340:28d1f895c6fe | 38 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel |
mbed_official | 340:28d1f895c6fe | 39 | |
mbed_official | 340:28d1f895c6fe | 40 | (#) Configure the Communication Clock Timing, Own Address1, Master Adressing Mode, Dual Addressing mode, |
mbed_official | 340:28d1f895c6fe | 41 | Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure. |
mbed_official | 340:28d1f895c6fe | 42 | |
mbed_official | 340:28d1f895c6fe | 43 | (#) Initialize the I2C registers by calling the HAL_I2C_Init() API: |
mbed_official | 340:28d1f895c6fe | 44 | (++) These API s configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
mbed_official | 340:28d1f895c6fe | 45 | by calling the customed HAL_I2C_MspInit(&hi2c) API. |
mbed_official | 340:28d1f895c6fe | 46 | |
mbed_official | 340:28d1f895c6fe | 47 | (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() |
mbed_official | 340:28d1f895c6fe | 48 | |
mbed_official | 340:28d1f895c6fe | 49 | (#) For I2C IO and IO MEM operations, three modes of operations are available within this driver : |
mbed_official | 340:28d1f895c6fe | 50 | |
mbed_official | 340:28d1f895c6fe | 51 | *** Polling mode IO operation *** |
mbed_official | 340:28d1f895c6fe | 52 | ================================= |
mbed_official | 340:28d1f895c6fe | 53 | [..] |
mbed_official | 340:28d1f895c6fe | 54 | (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() |
mbed_official | 340:28d1f895c6fe | 55 | (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() |
mbed_official | 340:28d1f895c6fe | 56 | (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() |
mbed_official | 340:28d1f895c6fe | 57 | (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() |
mbed_official | 340:28d1f895c6fe | 58 | |
mbed_official | 340:28d1f895c6fe | 59 | *** Polling mode IO MEM operation *** |
mbed_official | 340:28d1f895c6fe | 60 | ===================================== |
mbed_official | 340:28d1f895c6fe | 61 | [..] |
mbed_official | 340:28d1f895c6fe | 62 | (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() |
mbed_official | 340:28d1f895c6fe | 63 | (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() |
mbed_official | 340:28d1f895c6fe | 64 | |
mbed_official | 340:28d1f895c6fe | 65 | |
mbed_official | 340:28d1f895c6fe | 66 | *** Interrupt mode IO operation *** |
mbed_official | 340:28d1f895c6fe | 67 | =================================== |
mbed_official | 340:28d1f895c6fe | 68 | [..] |
mbed_official | 340:28d1f895c6fe | 69 | (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 70 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 71 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
mbed_official | 340:28d1f895c6fe | 72 | (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT() |
mbed_official | 340:28d1f895c6fe | 73 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 74 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
mbed_official | 340:28d1f895c6fe | 75 | (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 76 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 77 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
mbed_official | 340:28d1f895c6fe | 78 | (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT() |
mbed_official | 340:28d1f895c6fe | 79 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 80 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
mbed_official | 340:28d1f895c6fe | 81 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 340:28d1f895c6fe | 82 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 340:28d1f895c6fe | 83 | |
mbed_official | 340:28d1f895c6fe | 84 | *** Interrupt mode IO MEM operation *** |
mbed_official | 340:28d1f895c6fe | 85 | ======================================= |
mbed_official | 340:28d1f895c6fe | 86 | [..] |
mbed_official | 340:28d1f895c6fe | 87 | (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using |
mbed_official | 340:28d1f895c6fe | 88 | HAL_I2C_Mem_Write_IT() |
mbed_official | 340:28d1f895c6fe | 89 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 90 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
mbed_official | 340:28d1f895c6fe | 91 | (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using |
mbed_official | 340:28d1f895c6fe | 92 | HAL_I2C_Mem_Read_IT() |
mbed_official | 340:28d1f895c6fe | 93 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 94 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
mbed_official | 340:28d1f895c6fe | 95 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 340:28d1f895c6fe | 96 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 340:28d1f895c6fe | 97 | |
mbed_official | 340:28d1f895c6fe | 98 | *** DMA mode IO operation *** |
mbed_official | 340:28d1f895c6fe | 99 | ============================== |
mbed_official | 340:28d1f895c6fe | 100 | [..] |
mbed_official | 340:28d1f895c6fe | 101 | (+) Transmit in master mode an amount of data in non blocking mode (DMA) using |
mbed_official | 340:28d1f895c6fe | 102 | HAL_I2C_Master_Transmit_DMA() |
mbed_official | 340:28d1f895c6fe | 103 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 104 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
mbed_official | 340:28d1f895c6fe | 105 | (+) Receive in master mode an amount of data in non blocking mode (DMA) using |
mbed_official | 340:28d1f895c6fe | 106 | HAL_I2C_Master_Receive_DMA() |
mbed_official | 340:28d1f895c6fe | 107 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 108 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
mbed_official | 340:28d1f895c6fe | 109 | (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using |
mbed_official | 340:28d1f895c6fe | 110 | HAL_I2C_Slave_Transmit_DMA() |
mbed_official | 340:28d1f895c6fe | 111 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 112 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
mbed_official | 340:28d1f895c6fe | 113 | (+) Receive in slave mode an amount of data in non blocking mode (DMA) using |
mbed_official | 340:28d1f895c6fe | 114 | HAL_I2C_Slave_Receive_DMA() |
mbed_official | 340:28d1f895c6fe | 115 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 116 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
mbed_official | 340:28d1f895c6fe | 117 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 340:28d1f895c6fe | 118 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 340:28d1f895c6fe | 119 | |
mbed_official | 340:28d1f895c6fe | 120 | *** DMA mode IO MEM operation *** |
mbed_official | 340:28d1f895c6fe | 121 | ================================= |
mbed_official | 340:28d1f895c6fe | 122 | [..] |
mbed_official | 340:28d1f895c6fe | 123 | (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using |
mbed_official | 340:28d1f895c6fe | 124 | HAL_I2C_Mem_Write_DMA() |
mbed_official | 340:28d1f895c6fe | 125 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 126 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
mbed_official | 340:28d1f895c6fe | 127 | (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using |
mbed_official | 340:28d1f895c6fe | 128 | HAL_I2C_Mem_Read_DMA() |
mbed_official | 340:28d1f895c6fe | 129 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
mbed_official | 340:28d1f895c6fe | 130 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
mbed_official | 340:28d1f895c6fe | 131 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 340:28d1f895c6fe | 132 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 340:28d1f895c6fe | 133 | |
mbed_official | 340:28d1f895c6fe | 134 | |
mbed_official | 340:28d1f895c6fe | 135 | *** I2C HAL driver macros list *** |
mbed_official | 340:28d1f895c6fe | 136 | ================================== |
mbed_official | 340:28d1f895c6fe | 137 | [..] |
mbed_official | 340:28d1f895c6fe | 138 | Below the list of most used macros in I2C HAL driver. |
mbed_official | 340:28d1f895c6fe | 139 | |
mbed_official | 340:28d1f895c6fe | 140 | (+) __HAL_I2C_ENABLE: Enable the I2C peripheral |
mbed_official | 340:28d1f895c6fe | 141 | (+) __HAL_I2C_DISABLE: Disable the I2C peripheral |
mbed_official | 340:28d1f895c6fe | 142 | (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not |
mbed_official | 340:28d1f895c6fe | 143 | (+) __HAL_I2C_CLEAR_FLAG : Clears the specified I2C pending flag |
mbed_official | 340:28d1f895c6fe | 144 | (+) __HAL_I2C_ENABLE_IT: Enables the specified I2C interrupt |
mbed_official | 340:28d1f895c6fe | 145 | (+) __HAL_I2C_DISABLE_IT: Disables the specified I2C interrupt |
mbed_official | 340:28d1f895c6fe | 146 | |
mbed_official | 340:28d1f895c6fe | 147 | [..] |
mbed_official | 340:28d1f895c6fe | 148 | (@) You can refer to the I2C HAL driver header file for more useful macros |
mbed_official | 340:28d1f895c6fe | 149 | |
mbed_official | 340:28d1f895c6fe | 150 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 151 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 152 | * @attention |
mbed_official | 340:28d1f895c6fe | 153 | * |
mbed_official | 340:28d1f895c6fe | 154 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 340:28d1f895c6fe | 155 | * |
mbed_official | 340:28d1f895c6fe | 156 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 340:28d1f895c6fe | 157 | * are permitted provided that the following conditions are met: |
mbed_official | 340:28d1f895c6fe | 158 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 159 | * this list of conditions and the following disclaimer. |
mbed_official | 340:28d1f895c6fe | 160 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 161 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 340:28d1f895c6fe | 162 | * and/or other materials provided with the distribution. |
mbed_official | 340:28d1f895c6fe | 163 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 340:28d1f895c6fe | 164 | * may be used to endorse or promote products derived from this software |
mbed_official | 340:28d1f895c6fe | 165 | * without specific prior written permission. |
mbed_official | 340:28d1f895c6fe | 166 | * |
mbed_official | 340:28d1f895c6fe | 167 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 340:28d1f895c6fe | 168 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 340:28d1f895c6fe | 169 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 340:28d1f895c6fe | 170 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 340:28d1f895c6fe | 171 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 340:28d1f895c6fe | 172 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 340:28d1f895c6fe | 173 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 340:28d1f895c6fe | 174 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 340:28d1f895c6fe | 175 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 340:28d1f895c6fe | 176 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 340:28d1f895c6fe | 177 | * |
mbed_official | 340:28d1f895c6fe | 178 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 179 | */ |
mbed_official | 340:28d1f895c6fe | 180 | |
mbed_official | 340:28d1f895c6fe | 181 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 182 | #include "stm32f0xx_hal.h" |
mbed_official | 340:28d1f895c6fe | 183 | |
mbed_official | 340:28d1f895c6fe | 184 | /** @addtogroup STM32F0xx_HAL_Driver |
mbed_official | 340:28d1f895c6fe | 185 | * @{ |
mbed_official | 340:28d1f895c6fe | 186 | */ |
mbed_official | 340:28d1f895c6fe | 187 | |
mbed_official | 340:28d1f895c6fe | 188 | /** @defgroup I2C I2C HAL module driver |
mbed_official | 340:28d1f895c6fe | 189 | * @brief I2C HAL module driver |
mbed_official | 340:28d1f895c6fe | 190 | * @{ |
mbed_official | 340:28d1f895c6fe | 191 | */ |
mbed_official | 340:28d1f895c6fe | 192 | |
mbed_official | 340:28d1f895c6fe | 193 | #ifdef HAL_I2C_MODULE_ENABLED |
mbed_official | 340:28d1f895c6fe | 194 | |
mbed_official | 340:28d1f895c6fe | 195 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 196 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 197 | |
mbed_official | 340:28d1f895c6fe | 198 | /** @defgroup I2C_Private_Define I2C Private Define |
mbed_official | 340:28d1f895c6fe | 199 | * @{ |
mbed_official | 340:28d1f895c6fe | 200 | */ |
mbed_official | 340:28d1f895c6fe | 201 | #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */ |
mbed_official | 340:28d1f895c6fe | 202 | #define I2C_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */ |
mbed_official | 340:28d1f895c6fe | 203 | #define I2C_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 204 | #define I2C_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 205 | #define I2C_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 206 | #define I2C_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 207 | #define I2C_TIMEOUT_TC ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 208 | #define I2C_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 209 | #define I2C_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 210 | #define I2C_TIMEOUT_FLAG ((uint32_t)25) /* 25 ms */ |
mbed_official | 340:28d1f895c6fe | 211 | /** |
mbed_official | 340:28d1f895c6fe | 212 | * @} |
mbed_official | 340:28d1f895c6fe | 213 | */ |
mbed_official | 340:28d1f895c6fe | 214 | |
mbed_official | 340:28d1f895c6fe | 215 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 216 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 217 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 218 | |
mbed_official | 340:28d1f895c6fe | 219 | /** @defgroup I2C_Private_Functions I2C Private Functions |
mbed_official | 340:28d1f895c6fe | 220 | * @{ |
mbed_official | 340:28d1f895c6fe | 221 | */ |
mbed_official | 340:28d1f895c6fe | 222 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 223 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 224 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 225 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 226 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 227 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 228 | static void I2C_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 229 | |
mbed_official | 340:28d1f895c6fe | 230 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 231 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 232 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 233 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 234 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 235 | static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 236 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 340:28d1f895c6fe | 237 | |
mbed_official | 340:28d1f895c6fe | 238 | static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c); |
mbed_official | 340:28d1f895c6fe | 239 | static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c); |
mbed_official | 340:28d1f895c6fe | 240 | |
mbed_official | 340:28d1f895c6fe | 241 | static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c); |
mbed_official | 340:28d1f895c6fe | 242 | static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c); |
mbed_official | 340:28d1f895c6fe | 243 | |
mbed_official | 340:28d1f895c6fe | 244 | static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); |
mbed_official | 340:28d1f895c6fe | 245 | /** |
mbed_official | 340:28d1f895c6fe | 246 | * @} |
mbed_official | 340:28d1f895c6fe | 247 | */ |
mbed_official | 340:28d1f895c6fe | 248 | |
mbed_official | 340:28d1f895c6fe | 249 | /* Exported functions ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 250 | |
mbed_official | 340:28d1f895c6fe | 251 | /** @defgroup I2C_Exported_Functions I2C Exported Functions |
mbed_official | 340:28d1f895c6fe | 252 | * @{ |
mbed_official | 340:28d1f895c6fe | 253 | */ |
mbed_official | 340:28d1f895c6fe | 254 | |
mbed_official | 340:28d1f895c6fe | 255 | /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 340:28d1f895c6fe | 256 | * @brief Initialization and Configuration functions |
mbed_official | 340:28d1f895c6fe | 257 | * |
mbed_official | 340:28d1f895c6fe | 258 | @verbatim |
mbed_official | 340:28d1f895c6fe | 259 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 260 | ##### Initialization and Configuration functions ##### |
mbed_official | 340:28d1f895c6fe | 261 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 262 | [..] This subsection provides a set of functions allowing to initialize and |
mbed_official | 340:28d1f895c6fe | 263 | de-initialiaze the I2Cx peripheral: |
mbed_official | 340:28d1f895c6fe | 264 | |
mbed_official | 340:28d1f895c6fe | 265 | (+) User must Implement HAL_I2C_MspInit() function in which he configures |
mbed_official | 340:28d1f895c6fe | 266 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
mbed_official | 340:28d1f895c6fe | 267 | |
mbed_official | 340:28d1f895c6fe | 268 | (+) Call the function HAL_I2C_Init() to configure the selected device with |
mbed_official | 340:28d1f895c6fe | 269 | the selected configuration: |
mbed_official | 340:28d1f895c6fe | 270 | (++) Clock Timing |
mbed_official | 340:28d1f895c6fe | 271 | (++) Own Address 1 |
mbed_official | 340:28d1f895c6fe | 272 | (++) Addressing mode (Master, Slave) |
mbed_official | 340:28d1f895c6fe | 273 | (++) Dual Addressing mode |
mbed_official | 340:28d1f895c6fe | 274 | (++) Own Address 2 |
mbed_official | 340:28d1f895c6fe | 275 | (++) Own Address 2 Mask |
mbed_official | 340:28d1f895c6fe | 276 | (++) General call mode |
mbed_official | 340:28d1f895c6fe | 277 | (++) Nostretch mode |
mbed_official | 340:28d1f895c6fe | 278 | |
mbed_official | 340:28d1f895c6fe | 279 | (+) Call the function HAL_I2C_DeInit() to restore the default configuration |
mbed_official | 340:28d1f895c6fe | 280 | of the selected I2Cx periperal. |
mbed_official | 340:28d1f895c6fe | 281 | |
mbed_official | 340:28d1f895c6fe | 282 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 283 | * @{ |
mbed_official | 340:28d1f895c6fe | 284 | */ |
mbed_official | 340:28d1f895c6fe | 285 | |
mbed_official | 340:28d1f895c6fe | 286 | /** |
mbed_official | 340:28d1f895c6fe | 287 | * @brief Initializes the I2C according to the specified parameters |
mbed_official | 340:28d1f895c6fe | 288 | * in the I2C_InitTypeDef and create the associated handle. |
mbed_official | 340:28d1f895c6fe | 289 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 290 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 291 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 292 | */ |
mbed_official | 340:28d1f895c6fe | 293 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 294 | { |
mbed_official | 340:28d1f895c6fe | 295 | /* Check the I2C handle allocation */ |
mbed_official | 340:28d1f895c6fe | 296 | if(hi2c == HAL_NULL) |
mbed_official | 340:28d1f895c6fe | 297 | { |
mbed_official | 340:28d1f895c6fe | 298 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 299 | } |
mbed_official | 340:28d1f895c6fe | 300 | |
mbed_official | 340:28d1f895c6fe | 301 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 302 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
mbed_official | 340:28d1f895c6fe | 303 | assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); |
mbed_official | 340:28d1f895c6fe | 304 | assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); |
mbed_official | 340:28d1f895c6fe | 305 | assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); |
mbed_official | 340:28d1f895c6fe | 306 | assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); |
mbed_official | 340:28d1f895c6fe | 307 | assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); |
mbed_official | 340:28d1f895c6fe | 308 | assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); |
mbed_official | 340:28d1f895c6fe | 309 | assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); |
mbed_official | 340:28d1f895c6fe | 310 | |
mbed_official | 340:28d1f895c6fe | 311 | if(hi2c->State == HAL_I2C_STATE_RESET) |
mbed_official | 340:28d1f895c6fe | 312 | { |
mbed_official | 340:28d1f895c6fe | 313 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
mbed_official | 340:28d1f895c6fe | 314 | HAL_I2C_MspInit(hi2c); |
mbed_official | 340:28d1f895c6fe | 315 | } |
mbed_official | 340:28d1f895c6fe | 316 | |
mbed_official | 340:28d1f895c6fe | 317 | hi2c->State = HAL_I2C_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 318 | |
mbed_official | 340:28d1f895c6fe | 319 | /* Disable the selected I2C peripheral */ |
mbed_official | 340:28d1f895c6fe | 320 | __HAL_I2C_DISABLE(hi2c); |
mbed_official | 340:28d1f895c6fe | 321 | |
mbed_official | 340:28d1f895c6fe | 322 | /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ |
mbed_official | 340:28d1f895c6fe | 323 | /* Configure I2Cx: Frequency range */ |
mbed_official | 340:28d1f895c6fe | 324 | hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; |
mbed_official | 340:28d1f895c6fe | 325 | |
mbed_official | 340:28d1f895c6fe | 326 | /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ |
mbed_official | 340:28d1f895c6fe | 327 | /* Configure I2Cx: Own Address1 and ack own address1 mode */ |
mbed_official | 340:28d1f895c6fe | 328 | hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; |
mbed_official | 340:28d1f895c6fe | 329 | if(hi2c->Init.OwnAddress1 != 0) |
mbed_official | 340:28d1f895c6fe | 330 | { |
mbed_official | 340:28d1f895c6fe | 331 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
mbed_official | 340:28d1f895c6fe | 332 | { |
mbed_official | 340:28d1f895c6fe | 333 | hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); |
mbed_official | 340:28d1f895c6fe | 334 | } |
mbed_official | 340:28d1f895c6fe | 335 | else /* I2C_ADDRESSINGMODE_10BIT */ |
mbed_official | 340:28d1f895c6fe | 336 | { |
mbed_official | 340:28d1f895c6fe | 337 | hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); |
mbed_official | 340:28d1f895c6fe | 338 | } |
mbed_official | 340:28d1f895c6fe | 339 | } |
mbed_official | 340:28d1f895c6fe | 340 | |
mbed_official | 340:28d1f895c6fe | 341 | /*---------------------------- I2Cx CR2 Configuration ----------------------*/ |
mbed_official | 340:28d1f895c6fe | 342 | /* Configure I2Cx: Addressing Master mode */ |
mbed_official | 340:28d1f895c6fe | 343 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
mbed_official | 340:28d1f895c6fe | 344 | { |
mbed_official | 340:28d1f895c6fe | 345 | hi2c->Instance->CR2 = (I2C_CR2_ADD10); |
mbed_official | 340:28d1f895c6fe | 346 | } |
mbed_official | 340:28d1f895c6fe | 347 | /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ |
mbed_official | 340:28d1f895c6fe | 348 | hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); |
mbed_official | 340:28d1f895c6fe | 349 | |
mbed_official | 340:28d1f895c6fe | 350 | /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ |
mbed_official | 340:28d1f895c6fe | 351 | /* Configure I2Cx: Dual mode and Own Address2 */ |
mbed_official | 340:28d1f895c6fe | 352 | hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8)); |
mbed_official | 340:28d1f895c6fe | 353 | |
mbed_official | 340:28d1f895c6fe | 354 | /*---------------------------- I2Cx CR1 Configuration ----------------------*/ |
mbed_official | 340:28d1f895c6fe | 355 | /* Configure I2Cx: Generalcall and NoStretch mode */ |
mbed_official | 340:28d1f895c6fe | 356 | hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); |
mbed_official | 340:28d1f895c6fe | 357 | |
mbed_official | 340:28d1f895c6fe | 358 | /* Enable the selected I2C peripheral */ |
mbed_official | 340:28d1f895c6fe | 359 | __HAL_I2C_ENABLE(hi2c); |
mbed_official | 340:28d1f895c6fe | 360 | |
mbed_official | 340:28d1f895c6fe | 361 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 362 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 363 | |
mbed_official | 340:28d1f895c6fe | 364 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 365 | } |
mbed_official | 340:28d1f895c6fe | 366 | |
mbed_official | 340:28d1f895c6fe | 367 | /** |
mbed_official | 340:28d1f895c6fe | 368 | * @brief DeInitializes the I2C peripheral. |
mbed_official | 340:28d1f895c6fe | 369 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 370 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 371 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 372 | */ |
mbed_official | 340:28d1f895c6fe | 373 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 374 | { |
mbed_official | 340:28d1f895c6fe | 375 | /* Check the I2C handle allocation */ |
mbed_official | 340:28d1f895c6fe | 376 | if(hi2c == HAL_NULL) |
mbed_official | 340:28d1f895c6fe | 377 | { |
mbed_official | 340:28d1f895c6fe | 378 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 379 | } |
mbed_official | 340:28d1f895c6fe | 380 | |
mbed_official | 340:28d1f895c6fe | 381 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 382 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
mbed_official | 340:28d1f895c6fe | 383 | |
mbed_official | 340:28d1f895c6fe | 384 | hi2c->State = HAL_I2C_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 385 | |
mbed_official | 340:28d1f895c6fe | 386 | /* Disable the I2C Peripheral Clock */ |
mbed_official | 340:28d1f895c6fe | 387 | __HAL_I2C_DISABLE(hi2c); |
mbed_official | 340:28d1f895c6fe | 388 | |
mbed_official | 340:28d1f895c6fe | 389 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
mbed_official | 340:28d1f895c6fe | 390 | HAL_I2C_MspDeInit(hi2c); |
mbed_official | 340:28d1f895c6fe | 391 | |
mbed_official | 340:28d1f895c6fe | 392 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 393 | hi2c->State = HAL_I2C_STATE_RESET; |
mbed_official | 340:28d1f895c6fe | 394 | |
mbed_official | 340:28d1f895c6fe | 395 | /* Release Lock */ |
mbed_official | 340:28d1f895c6fe | 396 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 397 | |
mbed_official | 340:28d1f895c6fe | 398 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 399 | } |
mbed_official | 340:28d1f895c6fe | 400 | |
mbed_official | 340:28d1f895c6fe | 401 | /** |
mbed_official | 340:28d1f895c6fe | 402 | * @brief I2C MSP Init. |
mbed_official | 340:28d1f895c6fe | 403 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 404 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 405 | * @retval None |
mbed_official | 340:28d1f895c6fe | 406 | */ |
mbed_official | 340:28d1f895c6fe | 407 | __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 408 | { |
mbed_official | 340:28d1f895c6fe | 409 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 410 | the HAL_I2C_MspInit could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 411 | */ |
mbed_official | 340:28d1f895c6fe | 412 | } |
mbed_official | 340:28d1f895c6fe | 413 | |
mbed_official | 340:28d1f895c6fe | 414 | /** |
mbed_official | 340:28d1f895c6fe | 415 | * @brief I2C MSP DeInit |
mbed_official | 340:28d1f895c6fe | 416 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 417 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 418 | * @retval None |
mbed_official | 340:28d1f895c6fe | 419 | */ |
mbed_official | 340:28d1f895c6fe | 420 | __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 421 | { |
mbed_official | 340:28d1f895c6fe | 422 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 423 | the HAL_I2C_MspDeInit could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 424 | */ |
mbed_official | 340:28d1f895c6fe | 425 | } |
mbed_official | 340:28d1f895c6fe | 426 | |
mbed_official | 340:28d1f895c6fe | 427 | /** |
mbed_official | 340:28d1f895c6fe | 428 | * @} |
mbed_official | 340:28d1f895c6fe | 429 | */ |
mbed_official | 340:28d1f895c6fe | 430 | |
mbed_official | 340:28d1f895c6fe | 431 | /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions |
mbed_official | 340:28d1f895c6fe | 432 | * @brief Data transfers functions |
mbed_official | 340:28d1f895c6fe | 433 | * |
mbed_official | 340:28d1f895c6fe | 434 | @verbatim |
mbed_official | 340:28d1f895c6fe | 435 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 436 | ##### IO operation functions ##### |
mbed_official | 340:28d1f895c6fe | 437 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 438 | [..] |
mbed_official | 340:28d1f895c6fe | 439 | This subsection provides a set of functions allowing to manage the I2C data |
mbed_official | 340:28d1f895c6fe | 440 | transfers. |
mbed_official | 340:28d1f895c6fe | 441 | |
mbed_official | 340:28d1f895c6fe | 442 | (#) There is two mode of transfer: |
mbed_official | 340:28d1f895c6fe | 443 | (++) Blocking mode : The communication is performed in the polling mode. |
mbed_official | 340:28d1f895c6fe | 444 | The status of all data processing is returned by the same function |
mbed_official | 340:28d1f895c6fe | 445 | after finishing transfer. |
mbed_official | 340:28d1f895c6fe | 446 | (++) No-Blocking mode : The communication is performed using Interrupts |
mbed_official | 340:28d1f895c6fe | 447 | or DMA. These functions return the status of the transfer startup. |
mbed_official | 340:28d1f895c6fe | 448 | The end of the data processing will be indicated through the |
mbed_official | 340:28d1f895c6fe | 449 | dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when |
mbed_official | 340:28d1f895c6fe | 450 | using DMA mode. |
mbed_official | 340:28d1f895c6fe | 451 | |
mbed_official | 340:28d1f895c6fe | 452 | (#) Blocking mode functions are : |
mbed_official | 340:28d1f895c6fe | 453 | (++) HAL_I2C_Master_Transmit() |
mbed_official | 340:28d1f895c6fe | 454 | (++) HAL_I2C_Master_Receive() |
mbed_official | 340:28d1f895c6fe | 455 | (++) HAL_I2C_Slave_Transmit() |
mbed_official | 340:28d1f895c6fe | 456 | (++) HAL_I2C_Slave_Receive() |
mbed_official | 340:28d1f895c6fe | 457 | (++) HAL_I2C_Mem_Write() |
mbed_official | 340:28d1f895c6fe | 458 | (++) HAL_I2C_Mem_Read() |
mbed_official | 340:28d1f895c6fe | 459 | (++) HAL_I2C_IsDeviceReady() |
mbed_official | 340:28d1f895c6fe | 460 | |
mbed_official | 340:28d1f895c6fe | 461 | (#) No-Blocking mode functions with Interrupt are : |
mbed_official | 340:28d1f895c6fe | 462 | (++) HAL_I2C_Master_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 463 | (++) HAL_I2C_Master_Receive_IT() |
mbed_official | 340:28d1f895c6fe | 464 | (++) HAL_I2C_Slave_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 465 | (++) HAL_I2C_Slave_Receive_IT() |
mbed_official | 340:28d1f895c6fe | 466 | (++) HAL_I2C_Mem_Write_IT() |
mbed_official | 340:28d1f895c6fe | 467 | (++) HAL_I2C_Mem_Read_IT() |
mbed_official | 340:28d1f895c6fe | 468 | |
mbed_official | 340:28d1f895c6fe | 469 | (#) No-Blocking mode functions with DMA are : |
mbed_official | 340:28d1f895c6fe | 470 | (++) HAL_I2C_Master_Transmit_DMA() |
mbed_official | 340:28d1f895c6fe | 471 | (++) HAL_I2C_Master_Receive_DMA() |
mbed_official | 340:28d1f895c6fe | 472 | (++) HAL_I2C_Slave_Transmit_DMA() |
mbed_official | 340:28d1f895c6fe | 473 | (++) HAL_I2C_Slave_Receive_DMA() |
mbed_official | 340:28d1f895c6fe | 474 | (++) HAL_I2C_Mem_Write_DMA() |
mbed_official | 340:28d1f895c6fe | 475 | (++) HAL_I2C_Mem_Read_DMA() |
mbed_official | 340:28d1f895c6fe | 476 | |
mbed_official | 340:28d1f895c6fe | 477 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
mbed_official | 340:28d1f895c6fe | 478 | (++) HAL_I2C_MemTxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 479 | (++) HAL_I2C_MemRxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 480 | (++) HAL_I2C_MasterTxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 481 | (++) HAL_I2C_MasterRxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 482 | (++) HAL_I2C_SlaveTxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 483 | (++) HAL_I2C_SlaveRxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 484 | (++) HAL_I2C_ErrorCallback() |
mbed_official | 340:28d1f895c6fe | 485 | |
mbed_official | 340:28d1f895c6fe | 486 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 487 | * @{ |
mbed_official | 340:28d1f895c6fe | 488 | */ |
mbed_official | 340:28d1f895c6fe | 489 | |
mbed_official | 340:28d1f895c6fe | 490 | /** |
mbed_official | 340:28d1f895c6fe | 491 | * @brief Transmits in master mode an amount of data in blocking mode. |
mbed_official | 340:28d1f895c6fe | 492 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 493 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 494 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 495 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 496 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 497 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 498 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 499 | */ |
mbed_official | 340:28d1f895c6fe | 500 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 501 | { |
mbed_official | 340:28d1f895c6fe | 502 | uint32_t sizetmp = 0; |
mbed_official | 340:28d1f895c6fe | 503 | |
mbed_official | 340:28d1f895c6fe | 504 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 505 | { |
mbed_official | 340:28d1f895c6fe | 506 | if((pData == HAL_NULL ) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 507 | { |
mbed_official | 340:28d1f895c6fe | 508 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 509 | } |
mbed_official | 340:28d1f895c6fe | 510 | |
mbed_official | 340:28d1f895c6fe | 511 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 512 | { |
mbed_official | 340:28d1f895c6fe | 513 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 514 | } |
mbed_official | 340:28d1f895c6fe | 515 | |
mbed_official | 340:28d1f895c6fe | 516 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 517 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 518 | |
mbed_official | 340:28d1f895c6fe | 519 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 520 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 521 | |
mbed_official | 340:28d1f895c6fe | 522 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 523 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 524 | /* Size > 255, need to set RELOAD bit */ |
mbed_official | 340:28d1f895c6fe | 525 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 526 | { |
mbed_official | 340:28d1f895c6fe | 527 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 528 | sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 529 | } |
mbed_official | 340:28d1f895c6fe | 530 | else |
mbed_official | 340:28d1f895c6fe | 531 | { |
mbed_official | 340:28d1f895c6fe | 532 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 533 | sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 534 | } |
mbed_official | 340:28d1f895c6fe | 535 | |
mbed_official | 340:28d1f895c6fe | 536 | do |
mbed_official | 340:28d1f895c6fe | 537 | { |
mbed_official | 340:28d1f895c6fe | 538 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 539 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 540 | { |
mbed_official | 340:28d1f895c6fe | 541 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 542 | { |
mbed_official | 340:28d1f895c6fe | 543 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 544 | } |
mbed_official | 340:28d1f895c6fe | 545 | else |
mbed_official | 340:28d1f895c6fe | 546 | { |
mbed_official | 340:28d1f895c6fe | 547 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 548 | } |
mbed_official | 340:28d1f895c6fe | 549 | } |
mbed_official | 340:28d1f895c6fe | 550 | /* Write data to TXDR */ |
mbed_official | 340:28d1f895c6fe | 551 | hi2c->Instance->TXDR = (*pData++); |
mbed_official | 340:28d1f895c6fe | 552 | sizetmp--; |
mbed_official | 340:28d1f895c6fe | 553 | Size--; |
mbed_official | 340:28d1f895c6fe | 554 | |
mbed_official | 340:28d1f895c6fe | 555 | if((sizetmp == 0)&&(Size!=0)) |
mbed_official | 340:28d1f895c6fe | 556 | { |
mbed_official | 340:28d1f895c6fe | 557 | /* Wait until TXE flag is set */ |
mbed_official | 340:28d1f895c6fe | 558 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 559 | { |
mbed_official | 340:28d1f895c6fe | 560 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 561 | } |
mbed_official | 340:28d1f895c6fe | 562 | |
mbed_official | 340:28d1f895c6fe | 563 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 564 | { |
mbed_official | 340:28d1f895c6fe | 565 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 566 | sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 567 | } |
mbed_official | 340:28d1f895c6fe | 568 | else |
mbed_official | 340:28d1f895c6fe | 569 | { |
mbed_official | 340:28d1f895c6fe | 570 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 571 | sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 572 | } |
mbed_official | 340:28d1f895c6fe | 573 | } |
mbed_official | 340:28d1f895c6fe | 574 | |
mbed_official | 340:28d1f895c6fe | 575 | }while(Size > 0); |
mbed_official | 340:28d1f895c6fe | 576 | |
mbed_official | 340:28d1f895c6fe | 577 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 578 | /* Wait until STOPF flag is set */ |
mbed_official | 340:28d1f895c6fe | 579 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 580 | { |
mbed_official | 340:28d1f895c6fe | 581 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 582 | { |
mbed_official | 340:28d1f895c6fe | 583 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 584 | } |
mbed_official | 340:28d1f895c6fe | 585 | else |
mbed_official | 340:28d1f895c6fe | 586 | { |
mbed_official | 340:28d1f895c6fe | 587 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 588 | } |
mbed_official | 340:28d1f895c6fe | 589 | } |
mbed_official | 340:28d1f895c6fe | 590 | |
mbed_official | 340:28d1f895c6fe | 591 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 592 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 593 | |
mbed_official | 340:28d1f895c6fe | 594 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 595 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 596 | |
mbed_official | 340:28d1f895c6fe | 597 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 598 | |
mbed_official | 340:28d1f895c6fe | 599 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 600 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 601 | |
mbed_official | 340:28d1f895c6fe | 602 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 603 | } |
mbed_official | 340:28d1f895c6fe | 604 | else |
mbed_official | 340:28d1f895c6fe | 605 | { |
mbed_official | 340:28d1f895c6fe | 606 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 607 | } |
mbed_official | 340:28d1f895c6fe | 608 | } |
mbed_official | 340:28d1f895c6fe | 609 | |
mbed_official | 340:28d1f895c6fe | 610 | /** |
mbed_official | 340:28d1f895c6fe | 611 | * @brief Receives in master mode an amount of data in blocking mode. |
mbed_official | 340:28d1f895c6fe | 612 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 613 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 614 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 615 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 616 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 617 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 618 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 619 | */ |
mbed_official | 340:28d1f895c6fe | 620 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 621 | { |
mbed_official | 340:28d1f895c6fe | 622 | uint32_t sizetmp = 0; |
mbed_official | 340:28d1f895c6fe | 623 | |
mbed_official | 340:28d1f895c6fe | 624 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 625 | { |
mbed_official | 340:28d1f895c6fe | 626 | if((pData == HAL_NULL ) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 627 | { |
mbed_official | 340:28d1f895c6fe | 628 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 629 | } |
mbed_official | 340:28d1f895c6fe | 630 | |
mbed_official | 340:28d1f895c6fe | 631 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 632 | { |
mbed_official | 340:28d1f895c6fe | 633 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 634 | } |
mbed_official | 340:28d1f895c6fe | 635 | |
mbed_official | 340:28d1f895c6fe | 636 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 637 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 638 | |
mbed_official | 340:28d1f895c6fe | 639 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 640 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 641 | |
mbed_official | 340:28d1f895c6fe | 642 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 643 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 644 | /* Size > 255, need to set RELOAD bit */ |
mbed_official | 340:28d1f895c6fe | 645 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 646 | { |
mbed_official | 340:28d1f895c6fe | 647 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 648 | sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 649 | } |
mbed_official | 340:28d1f895c6fe | 650 | else |
mbed_official | 340:28d1f895c6fe | 651 | { |
mbed_official | 340:28d1f895c6fe | 652 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 653 | sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 654 | } |
mbed_official | 340:28d1f895c6fe | 655 | |
mbed_official | 340:28d1f895c6fe | 656 | do |
mbed_official | 340:28d1f895c6fe | 657 | { |
mbed_official | 340:28d1f895c6fe | 658 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 659 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 660 | { |
mbed_official | 340:28d1f895c6fe | 661 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 662 | } |
mbed_official | 340:28d1f895c6fe | 663 | |
mbed_official | 340:28d1f895c6fe | 664 | /* Write data to RXDR */ |
mbed_official | 340:28d1f895c6fe | 665 | (*pData++) =hi2c->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 666 | sizetmp--; |
mbed_official | 340:28d1f895c6fe | 667 | Size--; |
mbed_official | 340:28d1f895c6fe | 668 | |
mbed_official | 340:28d1f895c6fe | 669 | if((sizetmp == 0)&&(Size!=0)) |
mbed_official | 340:28d1f895c6fe | 670 | { |
mbed_official | 340:28d1f895c6fe | 671 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 672 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 673 | { |
mbed_official | 340:28d1f895c6fe | 674 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 675 | } |
mbed_official | 340:28d1f895c6fe | 676 | |
mbed_official | 340:28d1f895c6fe | 677 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 678 | { |
mbed_official | 340:28d1f895c6fe | 679 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 680 | sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 681 | } |
mbed_official | 340:28d1f895c6fe | 682 | else |
mbed_official | 340:28d1f895c6fe | 683 | { |
mbed_official | 340:28d1f895c6fe | 684 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 685 | sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 686 | } |
mbed_official | 340:28d1f895c6fe | 687 | } |
mbed_official | 340:28d1f895c6fe | 688 | |
mbed_official | 340:28d1f895c6fe | 689 | }while(Size > 0); |
mbed_official | 340:28d1f895c6fe | 690 | |
mbed_official | 340:28d1f895c6fe | 691 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 692 | /* Wait until STOPF flag is set */ |
mbed_official | 340:28d1f895c6fe | 693 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 694 | { |
mbed_official | 340:28d1f895c6fe | 695 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 696 | { |
mbed_official | 340:28d1f895c6fe | 697 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 698 | } |
mbed_official | 340:28d1f895c6fe | 699 | else |
mbed_official | 340:28d1f895c6fe | 700 | { |
mbed_official | 340:28d1f895c6fe | 701 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 702 | } |
mbed_official | 340:28d1f895c6fe | 703 | } |
mbed_official | 340:28d1f895c6fe | 704 | |
mbed_official | 340:28d1f895c6fe | 705 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 706 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 707 | |
mbed_official | 340:28d1f895c6fe | 708 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 709 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 710 | |
mbed_official | 340:28d1f895c6fe | 711 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 712 | |
mbed_official | 340:28d1f895c6fe | 713 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 714 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 715 | |
mbed_official | 340:28d1f895c6fe | 716 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 717 | } |
mbed_official | 340:28d1f895c6fe | 718 | else |
mbed_official | 340:28d1f895c6fe | 719 | { |
mbed_official | 340:28d1f895c6fe | 720 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 721 | } |
mbed_official | 340:28d1f895c6fe | 722 | } |
mbed_official | 340:28d1f895c6fe | 723 | |
mbed_official | 340:28d1f895c6fe | 724 | /** |
mbed_official | 340:28d1f895c6fe | 725 | * @brief Transmits in slave mode an amount of data in blocking mode. |
mbed_official | 340:28d1f895c6fe | 726 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 727 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 728 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 729 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 730 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 731 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 732 | */ |
mbed_official | 340:28d1f895c6fe | 733 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 734 | { |
mbed_official | 340:28d1f895c6fe | 735 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 736 | { |
mbed_official | 340:28d1f895c6fe | 737 | if((pData == HAL_NULL ) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 738 | { |
mbed_official | 340:28d1f895c6fe | 739 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 740 | } |
mbed_official | 340:28d1f895c6fe | 741 | |
mbed_official | 340:28d1f895c6fe | 742 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 743 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 744 | |
mbed_official | 340:28d1f895c6fe | 745 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 746 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 747 | |
mbed_official | 340:28d1f895c6fe | 748 | /* Enable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 749 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 750 | |
mbed_official | 340:28d1f895c6fe | 751 | /* Wait until ADDR flag is set */ |
mbed_official | 340:28d1f895c6fe | 752 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 753 | { |
mbed_official | 340:28d1f895c6fe | 754 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 755 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 756 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 757 | } |
mbed_official | 340:28d1f895c6fe | 758 | |
mbed_official | 340:28d1f895c6fe | 759 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 760 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 761 | |
mbed_official | 340:28d1f895c6fe | 762 | /* If 10bit addressing mode is selected */ |
mbed_official | 340:28d1f895c6fe | 763 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
mbed_official | 340:28d1f895c6fe | 764 | { |
mbed_official | 340:28d1f895c6fe | 765 | /* Wait until ADDR flag is set */ |
mbed_official | 340:28d1f895c6fe | 766 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 767 | { |
mbed_official | 340:28d1f895c6fe | 768 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 769 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 770 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 771 | } |
mbed_official | 340:28d1f895c6fe | 772 | |
mbed_official | 340:28d1f895c6fe | 773 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 774 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 775 | } |
mbed_official | 340:28d1f895c6fe | 776 | |
mbed_official | 340:28d1f895c6fe | 777 | /* Wait until DIR flag is set Transmitter mode */ |
mbed_official | 340:28d1f895c6fe | 778 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 779 | { |
mbed_official | 340:28d1f895c6fe | 780 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 781 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 782 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 783 | } |
mbed_official | 340:28d1f895c6fe | 784 | |
mbed_official | 340:28d1f895c6fe | 785 | do |
mbed_official | 340:28d1f895c6fe | 786 | { |
mbed_official | 340:28d1f895c6fe | 787 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 788 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 789 | { |
mbed_official | 340:28d1f895c6fe | 790 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 791 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 792 | |
mbed_official | 340:28d1f895c6fe | 793 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 794 | { |
mbed_official | 340:28d1f895c6fe | 795 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 796 | } |
mbed_official | 340:28d1f895c6fe | 797 | else |
mbed_official | 340:28d1f895c6fe | 798 | { |
mbed_official | 340:28d1f895c6fe | 799 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 800 | } |
mbed_official | 340:28d1f895c6fe | 801 | } |
mbed_official | 340:28d1f895c6fe | 802 | |
mbed_official | 340:28d1f895c6fe | 803 | /* Read data from TXDR */ |
mbed_official | 340:28d1f895c6fe | 804 | hi2c->Instance->TXDR = (*pData++); |
mbed_official | 340:28d1f895c6fe | 805 | Size--; |
mbed_official | 340:28d1f895c6fe | 806 | }while(Size > 0); |
mbed_official | 340:28d1f895c6fe | 807 | |
mbed_official | 340:28d1f895c6fe | 808 | /* Wait until STOP flag is set */ |
mbed_official | 340:28d1f895c6fe | 809 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 810 | { |
mbed_official | 340:28d1f895c6fe | 811 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 812 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 813 | |
mbed_official | 340:28d1f895c6fe | 814 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 815 | { |
mbed_official | 340:28d1f895c6fe | 816 | /* Normal use case for Transmitter mode */ |
mbed_official | 340:28d1f895c6fe | 817 | /* A NACK is generated to confirm the end of transfer */ |
mbed_official | 340:28d1f895c6fe | 818 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 819 | } |
mbed_official | 340:28d1f895c6fe | 820 | else |
mbed_official | 340:28d1f895c6fe | 821 | { |
mbed_official | 340:28d1f895c6fe | 822 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 823 | } |
mbed_official | 340:28d1f895c6fe | 824 | } |
mbed_official | 340:28d1f895c6fe | 825 | |
mbed_official | 340:28d1f895c6fe | 826 | /* Clear STOP flag */ |
mbed_official | 340:28d1f895c6fe | 827 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 828 | |
mbed_official | 340:28d1f895c6fe | 829 | /* Wait until BUSY flag is reset */ |
mbed_official | 340:28d1f895c6fe | 830 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 831 | { |
mbed_official | 340:28d1f895c6fe | 832 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 833 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 834 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 835 | } |
mbed_official | 340:28d1f895c6fe | 836 | |
mbed_official | 340:28d1f895c6fe | 837 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 838 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 839 | |
mbed_official | 340:28d1f895c6fe | 840 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 841 | |
mbed_official | 340:28d1f895c6fe | 842 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 843 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 844 | |
mbed_official | 340:28d1f895c6fe | 845 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 846 | } |
mbed_official | 340:28d1f895c6fe | 847 | else |
mbed_official | 340:28d1f895c6fe | 848 | { |
mbed_official | 340:28d1f895c6fe | 849 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 850 | } |
mbed_official | 340:28d1f895c6fe | 851 | } |
mbed_official | 340:28d1f895c6fe | 852 | |
mbed_official | 340:28d1f895c6fe | 853 | /** |
mbed_official | 340:28d1f895c6fe | 854 | * @brief Receive in slave mode an amount of data in blocking mode |
mbed_official | 340:28d1f895c6fe | 855 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 856 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 857 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 858 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 859 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 860 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 861 | */ |
mbed_official | 340:28d1f895c6fe | 862 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 863 | { |
mbed_official | 340:28d1f895c6fe | 864 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 865 | { |
mbed_official | 340:28d1f895c6fe | 866 | if((pData == HAL_NULL ) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 867 | { |
mbed_official | 340:28d1f895c6fe | 868 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 869 | } |
mbed_official | 340:28d1f895c6fe | 870 | |
mbed_official | 340:28d1f895c6fe | 871 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 872 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 873 | |
mbed_official | 340:28d1f895c6fe | 874 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 875 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 876 | |
mbed_official | 340:28d1f895c6fe | 877 | /* Enable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 878 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 879 | |
mbed_official | 340:28d1f895c6fe | 880 | /* Wait until ADDR flag is set */ |
mbed_official | 340:28d1f895c6fe | 881 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 882 | { |
mbed_official | 340:28d1f895c6fe | 883 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 884 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 885 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 886 | } |
mbed_official | 340:28d1f895c6fe | 887 | |
mbed_official | 340:28d1f895c6fe | 888 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 889 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 890 | |
mbed_official | 340:28d1f895c6fe | 891 | /* Wait until DIR flag is reset Receiver mode */ |
mbed_official | 340:28d1f895c6fe | 892 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 893 | { |
mbed_official | 340:28d1f895c6fe | 894 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 895 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 896 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 897 | } |
mbed_official | 340:28d1f895c6fe | 898 | |
mbed_official | 340:28d1f895c6fe | 899 | while(Size > 0) |
mbed_official | 340:28d1f895c6fe | 900 | { |
mbed_official | 340:28d1f895c6fe | 901 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 902 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 903 | { |
mbed_official | 340:28d1f895c6fe | 904 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 905 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 906 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
mbed_official | 340:28d1f895c6fe | 907 | { |
mbed_official | 340:28d1f895c6fe | 908 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 909 | } |
mbed_official | 340:28d1f895c6fe | 910 | else |
mbed_official | 340:28d1f895c6fe | 911 | { |
mbed_official | 340:28d1f895c6fe | 912 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 913 | } |
mbed_official | 340:28d1f895c6fe | 914 | } |
mbed_official | 340:28d1f895c6fe | 915 | |
mbed_official | 340:28d1f895c6fe | 916 | /* Read data from RXDR */ |
mbed_official | 340:28d1f895c6fe | 917 | (*pData++) = hi2c->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 918 | Size--; |
mbed_official | 340:28d1f895c6fe | 919 | } |
mbed_official | 340:28d1f895c6fe | 920 | |
mbed_official | 340:28d1f895c6fe | 921 | /* Wait until STOP flag is set */ |
mbed_official | 340:28d1f895c6fe | 922 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 923 | { |
mbed_official | 340:28d1f895c6fe | 924 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 925 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 926 | |
mbed_official | 340:28d1f895c6fe | 927 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 928 | { |
mbed_official | 340:28d1f895c6fe | 929 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 930 | } |
mbed_official | 340:28d1f895c6fe | 931 | else |
mbed_official | 340:28d1f895c6fe | 932 | { |
mbed_official | 340:28d1f895c6fe | 933 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 934 | } |
mbed_official | 340:28d1f895c6fe | 935 | } |
mbed_official | 340:28d1f895c6fe | 936 | |
mbed_official | 340:28d1f895c6fe | 937 | /* Clear STOP flag */ |
mbed_official | 340:28d1f895c6fe | 938 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 939 | |
mbed_official | 340:28d1f895c6fe | 940 | /* Wait until BUSY flag is reset */ |
mbed_official | 340:28d1f895c6fe | 941 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 942 | { |
mbed_official | 340:28d1f895c6fe | 943 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 944 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 945 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 946 | } |
mbed_official | 340:28d1f895c6fe | 947 | |
mbed_official | 340:28d1f895c6fe | 948 | |
mbed_official | 340:28d1f895c6fe | 949 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 950 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 951 | |
mbed_official | 340:28d1f895c6fe | 952 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 953 | |
mbed_official | 340:28d1f895c6fe | 954 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 955 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 956 | |
mbed_official | 340:28d1f895c6fe | 957 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 958 | } |
mbed_official | 340:28d1f895c6fe | 959 | else |
mbed_official | 340:28d1f895c6fe | 960 | { |
mbed_official | 340:28d1f895c6fe | 961 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 962 | } |
mbed_official | 340:28d1f895c6fe | 963 | } |
mbed_official | 340:28d1f895c6fe | 964 | |
mbed_official | 340:28d1f895c6fe | 965 | /** |
mbed_official | 340:28d1f895c6fe | 966 | * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 340:28d1f895c6fe | 967 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 968 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 969 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 970 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 971 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 972 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 973 | */ |
mbed_official | 340:28d1f895c6fe | 974 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 975 | { |
mbed_official | 340:28d1f895c6fe | 976 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 977 | { |
mbed_official | 340:28d1f895c6fe | 978 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 979 | { |
mbed_official | 340:28d1f895c6fe | 980 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 981 | } |
mbed_official | 340:28d1f895c6fe | 982 | |
mbed_official | 340:28d1f895c6fe | 983 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 984 | { |
mbed_official | 340:28d1f895c6fe | 985 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 986 | } |
mbed_official | 340:28d1f895c6fe | 987 | |
mbed_official | 340:28d1f895c6fe | 988 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 989 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 990 | |
mbed_official | 340:28d1f895c6fe | 991 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 992 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 993 | |
mbed_official | 340:28d1f895c6fe | 994 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 995 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 996 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 997 | { |
mbed_official | 340:28d1f895c6fe | 998 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 999 | } |
mbed_official | 340:28d1f895c6fe | 1000 | else |
mbed_official | 340:28d1f895c6fe | 1001 | { |
mbed_official | 340:28d1f895c6fe | 1002 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1003 | } |
mbed_official | 340:28d1f895c6fe | 1004 | |
mbed_official | 340:28d1f895c6fe | 1005 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 1006 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 1007 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 1008 | { |
mbed_official | 340:28d1f895c6fe | 1009 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 1010 | } |
mbed_official | 340:28d1f895c6fe | 1011 | else |
mbed_official | 340:28d1f895c6fe | 1012 | { |
mbed_official | 340:28d1f895c6fe | 1013 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 1014 | } |
mbed_official | 340:28d1f895c6fe | 1015 | |
mbed_official | 340:28d1f895c6fe | 1016 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1017 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1018 | |
mbed_official | 340:28d1f895c6fe | 1019 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 340:28d1f895c6fe | 1020 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 340:28d1f895c6fe | 1021 | process unlock */ |
mbed_official | 340:28d1f895c6fe | 1022 | |
mbed_official | 340:28d1f895c6fe | 1023 | |
mbed_official | 340:28d1f895c6fe | 1024 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 1025 | /* possible to enable all of these */ |
mbed_official | 340:28d1f895c6fe | 1026 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
mbed_official | 340:28d1f895c6fe | 1027 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI ); |
mbed_official | 340:28d1f895c6fe | 1028 | |
mbed_official | 340:28d1f895c6fe | 1029 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1030 | } |
mbed_official | 340:28d1f895c6fe | 1031 | else |
mbed_official | 340:28d1f895c6fe | 1032 | { |
mbed_official | 340:28d1f895c6fe | 1033 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1034 | } |
mbed_official | 340:28d1f895c6fe | 1035 | } |
mbed_official | 340:28d1f895c6fe | 1036 | |
mbed_official | 340:28d1f895c6fe | 1037 | /** |
mbed_official | 340:28d1f895c6fe | 1038 | * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 340:28d1f895c6fe | 1039 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1040 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1041 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1042 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1043 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1044 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1045 | */ |
mbed_official | 340:28d1f895c6fe | 1046 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1047 | { |
mbed_official | 340:28d1f895c6fe | 1048 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1049 | { |
mbed_official | 340:28d1f895c6fe | 1050 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1051 | { |
mbed_official | 340:28d1f895c6fe | 1052 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1053 | } |
mbed_official | 340:28d1f895c6fe | 1054 | |
mbed_official | 340:28d1f895c6fe | 1055 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1056 | { |
mbed_official | 340:28d1f895c6fe | 1057 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1058 | } |
mbed_official | 340:28d1f895c6fe | 1059 | |
mbed_official | 340:28d1f895c6fe | 1060 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1061 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1062 | |
mbed_official | 340:28d1f895c6fe | 1063 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1064 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1065 | |
mbed_official | 340:28d1f895c6fe | 1066 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1067 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1068 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1069 | { |
mbed_official | 340:28d1f895c6fe | 1070 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 1071 | } |
mbed_official | 340:28d1f895c6fe | 1072 | else |
mbed_official | 340:28d1f895c6fe | 1073 | { |
mbed_official | 340:28d1f895c6fe | 1074 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1075 | } |
mbed_official | 340:28d1f895c6fe | 1076 | |
mbed_official | 340:28d1f895c6fe | 1077 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 1078 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 1079 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 1080 | { |
mbed_official | 340:28d1f895c6fe | 1081 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1082 | } |
mbed_official | 340:28d1f895c6fe | 1083 | else |
mbed_official | 340:28d1f895c6fe | 1084 | { |
mbed_official | 340:28d1f895c6fe | 1085 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1086 | } |
mbed_official | 340:28d1f895c6fe | 1087 | |
mbed_official | 340:28d1f895c6fe | 1088 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1089 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1090 | |
mbed_official | 340:28d1f895c6fe | 1091 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 340:28d1f895c6fe | 1092 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 340:28d1f895c6fe | 1093 | process unlock */ |
mbed_official | 340:28d1f895c6fe | 1094 | |
mbed_official | 340:28d1f895c6fe | 1095 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 1096 | /* possible to enable all of these */ |
mbed_official | 340:28d1f895c6fe | 1097 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
mbed_official | 340:28d1f895c6fe | 1098 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI ); |
mbed_official | 340:28d1f895c6fe | 1099 | |
mbed_official | 340:28d1f895c6fe | 1100 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1101 | } |
mbed_official | 340:28d1f895c6fe | 1102 | else |
mbed_official | 340:28d1f895c6fe | 1103 | { |
mbed_official | 340:28d1f895c6fe | 1104 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1105 | } |
mbed_official | 340:28d1f895c6fe | 1106 | } |
mbed_official | 340:28d1f895c6fe | 1107 | |
mbed_official | 340:28d1f895c6fe | 1108 | /** |
mbed_official | 340:28d1f895c6fe | 1109 | * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 340:28d1f895c6fe | 1110 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1111 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1112 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1113 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1114 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1115 | */ |
mbed_official | 340:28d1f895c6fe | 1116 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1117 | { |
mbed_official | 340:28d1f895c6fe | 1118 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1119 | { |
mbed_official | 340:28d1f895c6fe | 1120 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1121 | { |
mbed_official | 340:28d1f895c6fe | 1122 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1123 | } |
mbed_official | 340:28d1f895c6fe | 1124 | |
mbed_official | 340:28d1f895c6fe | 1125 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1126 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1127 | |
mbed_official | 340:28d1f895c6fe | 1128 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 1129 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1130 | |
mbed_official | 340:28d1f895c6fe | 1131 | /* Enable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1132 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1133 | |
mbed_official | 340:28d1f895c6fe | 1134 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1135 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1136 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1137 | |
mbed_official | 340:28d1f895c6fe | 1138 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1139 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1140 | |
mbed_official | 340:28d1f895c6fe | 1141 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 340:28d1f895c6fe | 1142 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 340:28d1f895c6fe | 1143 | process unlock */ |
mbed_official | 340:28d1f895c6fe | 1144 | |
mbed_official | 340:28d1f895c6fe | 1145 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 1146 | /* possible to enable all of these */ |
mbed_official | 340:28d1f895c6fe | 1147 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
mbed_official | 340:28d1f895c6fe | 1148 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_TXI ); |
mbed_official | 340:28d1f895c6fe | 1149 | |
mbed_official | 340:28d1f895c6fe | 1150 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1151 | } |
mbed_official | 340:28d1f895c6fe | 1152 | else |
mbed_official | 340:28d1f895c6fe | 1153 | { |
mbed_official | 340:28d1f895c6fe | 1154 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1155 | } |
mbed_official | 340:28d1f895c6fe | 1156 | } |
mbed_official | 340:28d1f895c6fe | 1157 | |
mbed_official | 340:28d1f895c6fe | 1158 | /** |
mbed_official | 340:28d1f895c6fe | 1159 | * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 340:28d1f895c6fe | 1160 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1161 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1162 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1163 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1164 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1165 | */ |
mbed_official | 340:28d1f895c6fe | 1166 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1167 | { |
mbed_official | 340:28d1f895c6fe | 1168 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1169 | { |
mbed_official | 340:28d1f895c6fe | 1170 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1171 | { |
mbed_official | 340:28d1f895c6fe | 1172 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1173 | } |
mbed_official | 340:28d1f895c6fe | 1174 | |
mbed_official | 340:28d1f895c6fe | 1175 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1176 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1177 | |
mbed_official | 340:28d1f895c6fe | 1178 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1179 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1180 | |
mbed_official | 340:28d1f895c6fe | 1181 | /* Enable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1182 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1183 | |
mbed_official | 340:28d1f895c6fe | 1184 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1185 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1186 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1187 | |
mbed_official | 340:28d1f895c6fe | 1188 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1189 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1190 | |
mbed_official | 340:28d1f895c6fe | 1191 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 340:28d1f895c6fe | 1192 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 340:28d1f895c6fe | 1193 | process unlock */ |
mbed_official | 340:28d1f895c6fe | 1194 | |
mbed_official | 340:28d1f895c6fe | 1195 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 1196 | /* possible to enable all of these */ |
mbed_official | 340:28d1f895c6fe | 1197 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
mbed_official | 340:28d1f895c6fe | 1198 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI); |
mbed_official | 340:28d1f895c6fe | 1199 | |
mbed_official | 340:28d1f895c6fe | 1200 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1201 | } |
mbed_official | 340:28d1f895c6fe | 1202 | else |
mbed_official | 340:28d1f895c6fe | 1203 | { |
mbed_official | 340:28d1f895c6fe | 1204 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1205 | } |
mbed_official | 340:28d1f895c6fe | 1206 | } |
mbed_official | 340:28d1f895c6fe | 1207 | |
mbed_official | 340:28d1f895c6fe | 1208 | /** |
mbed_official | 340:28d1f895c6fe | 1209 | * @brief Transmit in master mode an amount of data in no-blocking mode with DMA |
mbed_official | 340:28d1f895c6fe | 1210 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1211 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1212 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1213 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1214 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1215 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1216 | */ |
mbed_official | 340:28d1f895c6fe | 1217 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1218 | { |
mbed_official | 340:28d1f895c6fe | 1219 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1220 | { |
mbed_official | 340:28d1f895c6fe | 1221 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1222 | { |
mbed_official | 340:28d1f895c6fe | 1223 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1224 | } |
mbed_official | 340:28d1f895c6fe | 1225 | |
mbed_official | 340:28d1f895c6fe | 1226 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1227 | { |
mbed_official | 340:28d1f895c6fe | 1228 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1229 | } |
mbed_official | 340:28d1f895c6fe | 1230 | |
mbed_official | 340:28d1f895c6fe | 1231 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1232 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1233 | |
mbed_official | 340:28d1f895c6fe | 1234 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 1235 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1236 | |
mbed_official | 340:28d1f895c6fe | 1237 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1238 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1239 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1240 | { |
mbed_official | 340:28d1f895c6fe | 1241 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 1242 | } |
mbed_official | 340:28d1f895c6fe | 1243 | else |
mbed_official | 340:28d1f895c6fe | 1244 | { |
mbed_official | 340:28d1f895c6fe | 1245 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1246 | } |
mbed_official | 340:28d1f895c6fe | 1247 | |
mbed_official | 340:28d1f895c6fe | 1248 | /* Set the I2C DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 1249 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; |
mbed_official | 340:28d1f895c6fe | 1250 | |
mbed_official | 340:28d1f895c6fe | 1251 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 1252 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
mbed_official | 340:28d1f895c6fe | 1253 | |
mbed_official | 340:28d1f895c6fe | 1254 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 1255 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 1256 | |
mbed_official | 340:28d1f895c6fe | 1257 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 1258 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 1259 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 1260 | { |
mbed_official | 340:28d1f895c6fe | 1261 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 1262 | } |
mbed_official | 340:28d1f895c6fe | 1263 | else |
mbed_official | 340:28d1f895c6fe | 1264 | { |
mbed_official | 340:28d1f895c6fe | 1265 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 1266 | } |
mbed_official | 340:28d1f895c6fe | 1267 | |
mbed_official | 340:28d1f895c6fe | 1268 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 1269 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1270 | { |
mbed_official | 340:28d1f895c6fe | 1271 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1272 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1273 | |
mbed_official | 340:28d1f895c6fe | 1274 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1275 | { |
mbed_official | 340:28d1f895c6fe | 1276 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1277 | } |
mbed_official | 340:28d1f895c6fe | 1278 | else |
mbed_official | 340:28d1f895c6fe | 1279 | { |
mbed_official | 340:28d1f895c6fe | 1280 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1281 | } |
mbed_official | 340:28d1f895c6fe | 1282 | } |
mbed_official | 340:28d1f895c6fe | 1283 | |
mbed_official | 340:28d1f895c6fe | 1284 | |
mbed_official | 340:28d1f895c6fe | 1285 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 1286 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 1287 | |
mbed_official | 340:28d1f895c6fe | 1288 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1289 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1290 | |
mbed_official | 340:28d1f895c6fe | 1291 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1292 | } |
mbed_official | 340:28d1f895c6fe | 1293 | else |
mbed_official | 340:28d1f895c6fe | 1294 | { |
mbed_official | 340:28d1f895c6fe | 1295 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1296 | } |
mbed_official | 340:28d1f895c6fe | 1297 | } |
mbed_official | 340:28d1f895c6fe | 1298 | |
mbed_official | 340:28d1f895c6fe | 1299 | /** |
mbed_official | 340:28d1f895c6fe | 1300 | * @brief Receive in master mode an amount of data in no-blocking mode with DMA |
mbed_official | 340:28d1f895c6fe | 1301 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1302 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1303 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1304 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1305 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1306 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1307 | */ |
mbed_official | 340:28d1f895c6fe | 1308 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1309 | { |
mbed_official | 340:28d1f895c6fe | 1310 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1311 | { |
mbed_official | 340:28d1f895c6fe | 1312 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1313 | { |
mbed_official | 340:28d1f895c6fe | 1314 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1315 | } |
mbed_official | 340:28d1f895c6fe | 1316 | |
mbed_official | 340:28d1f895c6fe | 1317 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1318 | { |
mbed_official | 340:28d1f895c6fe | 1319 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1320 | } |
mbed_official | 340:28d1f895c6fe | 1321 | |
mbed_official | 340:28d1f895c6fe | 1322 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1323 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1324 | |
mbed_official | 340:28d1f895c6fe | 1325 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1326 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1327 | |
mbed_official | 340:28d1f895c6fe | 1328 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1329 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1330 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1331 | { |
mbed_official | 340:28d1f895c6fe | 1332 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 1333 | } |
mbed_official | 340:28d1f895c6fe | 1334 | else |
mbed_official | 340:28d1f895c6fe | 1335 | { |
mbed_official | 340:28d1f895c6fe | 1336 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1337 | } |
mbed_official | 340:28d1f895c6fe | 1338 | |
mbed_official | 340:28d1f895c6fe | 1339 | /* Set the I2C DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 1340 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; |
mbed_official | 340:28d1f895c6fe | 1341 | |
mbed_official | 340:28d1f895c6fe | 1342 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 1343 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
mbed_official | 340:28d1f895c6fe | 1344 | |
mbed_official | 340:28d1f895c6fe | 1345 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 1346 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 1347 | |
mbed_official | 340:28d1f895c6fe | 1348 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 1349 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 1350 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 1351 | { |
mbed_official | 340:28d1f895c6fe | 1352 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1353 | } |
mbed_official | 340:28d1f895c6fe | 1354 | else |
mbed_official | 340:28d1f895c6fe | 1355 | { |
mbed_official | 340:28d1f895c6fe | 1356 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1357 | } |
mbed_official | 340:28d1f895c6fe | 1358 | |
mbed_official | 340:28d1f895c6fe | 1359 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 1360 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1361 | { |
mbed_official | 340:28d1f895c6fe | 1362 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1363 | } |
mbed_official | 340:28d1f895c6fe | 1364 | |
mbed_official | 340:28d1f895c6fe | 1365 | |
mbed_official | 340:28d1f895c6fe | 1366 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 1367 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 1368 | |
mbed_official | 340:28d1f895c6fe | 1369 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1370 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1371 | |
mbed_official | 340:28d1f895c6fe | 1372 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1373 | } |
mbed_official | 340:28d1f895c6fe | 1374 | else |
mbed_official | 340:28d1f895c6fe | 1375 | { |
mbed_official | 340:28d1f895c6fe | 1376 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1377 | } |
mbed_official | 340:28d1f895c6fe | 1378 | } |
mbed_official | 340:28d1f895c6fe | 1379 | |
mbed_official | 340:28d1f895c6fe | 1380 | /** |
mbed_official | 340:28d1f895c6fe | 1381 | * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA |
mbed_official | 340:28d1f895c6fe | 1382 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1383 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1384 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1385 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1386 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1387 | */ |
mbed_official | 340:28d1f895c6fe | 1388 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1389 | { |
mbed_official | 340:28d1f895c6fe | 1390 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1391 | { |
mbed_official | 340:28d1f895c6fe | 1392 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1393 | { |
mbed_official | 340:28d1f895c6fe | 1394 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1395 | } |
mbed_official | 340:28d1f895c6fe | 1396 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1397 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1398 | |
mbed_official | 340:28d1f895c6fe | 1399 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 1400 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1401 | |
mbed_official | 340:28d1f895c6fe | 1402 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1403 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1404 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1405 | |
mbed_official | 340:28d1f895c6fe | 1406 | /* Set the I2C DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 1407 | hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; |
mbed_official | 340:28d1f895c6fe | 1408 | |
mbed_official | 340:28d1f895c6fe | 1409 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 1410 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
mbed_official | 340:28d1f895c6fe | 1411 | |
mbed_official | 340:28d1f895c6fe | 1412 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 1413 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 1414 | |
mbed_official | 340:28d1f895c6fe | 1415 | /* Enable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1416 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1417 | |
mbed_official | 340:28d1f895c6fe | 1418 | /* Wait until ADDR flag is set */ |
mbed_official | 340:28d1f895c6fe | 1419 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1420 | { |
mbed_official | 340:28d1f895c6fe | 1421 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1422 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1423 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1424 | } |
mbed_official | 340:28d1f895c6fe | 1425 | |
mbed_official | 340:28d1f895c6fe | 1426 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 1427 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 1428 | |
mbed_official | 340:28d1f895c6fe | 1429 | /* If 10bits addressing mode is selected */ |
mbed_official | 340:28d1f895c6fe | 1430 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
mbed_official | 340:28d1f895c6fe | 1431 | { |
mbed_official | 340:28d1f895c6fe | 1432 | /* Wait until ADDR flag is set */ |
mbed_official | 340:28d1f895c6fe | 1433 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1434 | { |
mbed_official | 340:28d1f895c6fe | 1435 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1436 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1437 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1438 | } |
mbed_official | 340:28d1f895c6fe | 1439 | |
mbed_official | 340:28d1f895c6fe | 1440 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 1441 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 1442 | } |
mbed_official | 340:28d1f895c6fe | 1443 | |
mbed_official | 340:28d1f895c6fe | 1444 | /* Wait until DIR flag is set Transmitter mode */ |
mbed_official | 340:28d1f895c6fe | 1445 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, I2C_TIMEOUT_BUSY) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1446 | { |
mbed_official | 340:28d1f895c6fe | 1447 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1448 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1449 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1450 | } |
mbed_official | 340:28d1f895c6fe | 1451 | |
mbed_official | 340:28d1f895c6fe | 1452 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 1453 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 1454 | |
mbed_official | 340:28d1f895c6fe | 1455 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1456 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1457 | |
mbed_official | 340:28d1f895c6fe | 1458 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1459 | } |
mbed_official | 340:28d1f895c6fe | 1460 | else |
mbed_official | 340:28d1f895c6fe | 1461 | { |
mbed_official | 340:28d1f895c6fe | 1462 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1463 | } |
mbed_official | 340:28d1f895c6fe | 1464 | } |
mbed_official | 340:28d1f895c6fe | 1465 | |
mbed_official | 340:28d1f895c6fe | 1466 | /** |
mbed_official | 340:28d1f895c6fe | 1467 | * @brief Receive in slave mode an amount of data in no-blocking mode with DMA |
mbed_official | 340:28d1f895c6fe | 1468 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1469 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1470 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1471 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1472 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1473 | */ |
mbed_official | 340:28d1f895c6fe | 1474 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1475 | { |
mbed_official | 340:28d1f895c6fe | 1476 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1477 | { |
mbed_official | 340:28d1f895c6fe | 1478 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1479 | { |
mbed_official | 340:28d1f895c6fe | 1480 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1481 | } |
mbed_official | 340:28d1f895c6fe | 1482 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1483 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1484 | |
mbed_official | 340:28d1f895c6fe | 1485 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1486 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1487 | |
mbed_official | 340:28d1f895c6fe | 1488 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1489 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1490 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1491 | |
mbed_official | 340:28d1f895c6fe | 1492 | /* Set the I2C DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 1493 | hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; |
mbed_official | 340:28d1f895c6fe | 1494 | |
mbed_official | 340:28d1f895c6fe | 1495 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 1496 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
mbed_official | 340:28d1f895c6fe | 1497 | |
mbed_official | 340:28d1f895c6fe | 1498 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 1499 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, Size); |
mbed_official | 340:28d1f895c6fe | 1500 | |
mbed_official | 340:28d1f895c6fe | 1501 | /* Enable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1502 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1503 | |
mbed_official | 340:28d1f895c6fe | 1504 | /* Wait until ADDR flag is set */ |
mbed_official | 340:28d1f895c6fe | 1505 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1506 | { |
mbed_official | 340:28d1f895c6fe | 1507 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1508 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1509 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1510 | } |
mbed_official | 340:28d1f895c6fe | 1511 | |
mbed_official | 340:28d1f895c6fe | 1512 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 1513 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 1514 | |
mbed_official | 340:28d1f895c6fe | 1515 | /* Wait until DIR flag is set Receiver mode */ |
mbed_official | 340:28d1f895c6fe | 1516 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, I2C_TIMEOUT_DIR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1517 | { |
mbed_official | 340:28d1f895c6fe | 1518 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 1519 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 1520 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1521 | } |
mbed_official | 340:28d1f895c6fe | 1522 | |
mbed_official | 340:28d1f895c6fe | 1523 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 1524 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 1525 | |
mbed_official | 340:28d1f895c6fe | 1526 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1527 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1528 | |
mbed_official | 340:28d1f895c6fe | 1529 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1530 | } |
mbed_official | 340:28d1f895c6fe | 1531 | else |
mbed_official | 340:28d1f895c6fe | 1532 | { |
mbed_official | 340:28d1f895c6fe | 1533 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1534 | } |
mbed_official | 340:28d1f895c6fe | 1535 | } |
mbed_official | 340:28d1f895c6fe | 1536 | |
mbed_official | 340:28d1f895c6fe | 1537 | /** |
mbed_official | 340:28d1f895c6fe | 1538 | * @brief Write an amount of data in blocking mode to a specific memory address |
mbed_official | 340:28d1f895c6fe | 1539 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1540 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1541 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1542 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 1543 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 1544 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1545 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1546 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 1547 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1548 | */ |
mbed_official | 340:28d1f895c6fe | 1549 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 1550 | { |
mbed_official | 340:28d1f895c6fe | 1551 | uint32_t Sizetmp = 0; |
mbed_official | 340:28d1f895c6fe | 1552 | |
mbed_official | 340:28d1f895c6fe | 1553 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1554 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 340:28d1f895c6fe | 1555 | |
mbed_official | 340:28d1f895c6fe | 1556 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1557 | { |
mbed_official | 340:28d1f895c6fe | 1558 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1559 | { |
mbed_official | 340:28d1f895c6fe | 1560 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1561 | } |
mbed_official | 340:28d1f895c6fe | 1562 | |
mbed_official | 340:28d1f895c6fe | 1563 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1564 | { |
mbed_official | 340:28d1f895c6fe | 1565 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1566 | } |
mbed_official | 340:28d1f895c6fe | 1567 | |
mbed_official | 340:28d1f895c6fe | 1568 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1569 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1570 | |
mbed_official | 340:28d1f895c6fe | 1571 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 1572 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1573 | |
mbed_official | 340:28d1f895c6fe | 1574 | /* Send Slave Address and Memory Address */ |
mbed_official | 340:28d1f895c6fe | 1575 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1576 | { |
mbed_official | 340:28d1f895c6fe | 1577 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1578 | { |
mbed_official | 340:28d1f895c6fe | 1579 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1580 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1581 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1582 | } |
mbed_official | 340:28d1f895c6fe | 1583 | else |
mbed_official | 340:28d1f895c6fe | 1584 | { |
mbed_official | 340:28d1f895c6fe | 1585 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1586 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1587 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1588 | } |
mbed_official | 340:28d1f895c6fe | 1589 | } |
mbed_official | 340:28d1f895c6fe | 1590 | |
mbed_official | 340:28d1f895c6fe | 1591 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 1592 | /* Size > 255, need to set RELOAD bit */ |
mbed_official | 340:28d1f895c6fe | 1593 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1594 | { |
mbed_official | 340:28d1f895c6fe | 1595 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1596 | Sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 1597 | } |
mbed_official | 340:28d1f895c6fe | 1598 | else |
mbed_official | 340:28d1f895c6fe | 1599 | { |
mbed_official | 340:28d1f895c6fe | 1600 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1601 | Sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 1602 | } |
mbed_official | 340:28d1f895c6fe | 1603 | |
mbed_official | 340:28d1f895c6fe | 1604 | do |
mbed_official | 340:28d1f895c6fe | 1605 | { |
mbed_official | 340:28d1f895c6fe | 1606 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 1607 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1608 | { |
mbed_official | 340:28d1f895c6fe | 1609 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1610 | { |
mbed_official | 340:28d1f895c6fe | 1611 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1612 | } |
mbed_official | 340:28d1f895c6fe | 1613 | else |
mbed_official | 340:28d1f895c6fe | 1614 | { |
mbed_official | 340:28d1f895c6fe | 1615 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1616 | } |
mbed_official | 340:28d1f895c6fe | 1617 | } |
mbed_official | 340:28d1f895c6fe | 1618 | |
mbed_official | 340:28d1f895c6fe | 1619 | /* Write data to DR */ |
mbed_official | 340:28d1f895c6fe | 1620 | hi2c->Instance->TXDR = (*pData++); |
mbed_official | 340:28d1f895c6fe | 1621 | Sizetmp--; |
mbed_official | 340:28d1f895c6fe | 1622 | Size--; |
mbed_official | 340:28d1f895c6fe | 1623 | |
mbed_official | 340:28d1f895c6fe | 1624 | if((Sizetmp == 0)&&(Size!=0)) |
mbed_official | 340:28d1f895c6fe | 1625 | { |
mbed_official | 340:28d1f895c6fe | 1626 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 1627 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1628 | { |
mbed_official | 340:28d1f895c6fe | 1629 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1630 | } |
mbed_official | 340:28d1f895c6fe | 1631 | |
mbed_official | 340:28d1f895c6fe | 1632 | |
mbed_official | 340:28d1f895c6fe | 1633 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1634 | { |
mbed_official | 340:28d1f895c6fe | 1635 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1636 | Sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 1637 | } |
mbed_official | 340:28d1f895c6fe | 1638 | else |
mbed_official | 340:28d1f895c6fe | 1639 | { |
mbed_official | 340:28d1f895c6fe | 1640 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1641 | Sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 1642 | } |
mbed_official | 340:28d1f895c6fe | 1643 | } |
mbed_official | 340:28d1f895c6fe | 1644 | |
mbed_official | 340:28d1f895c6fe | 1645 | }while(Size > 0); |
mbed_official | 340:28d1f895c6fe | 1646 | |
mbed_official | 340:28d1f895c6fe | 1647 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 1648 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 1649 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1650 | { |
mbed_official | 340:28d1f895c6fe | 1651 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1652 | { |
mbed_official | 340:28d1f895c6fe | 1653 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1654 | } |
mbed_official | 340:28d1f895c6fe | 1655 | else |
mbed_official | 340:28d1f895c6fe | 1656 | { |
mbed_official | 340:28d1f895c6fe | 1657 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1658 | } |
mbed_official | 340:28d1f895c6fe | 1659 | } |
mbed_official | 340:28d1f895c6fe | 1660 | |
mbed_official | 340:28d1f895c6fe | 1661 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 1662 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 1663 | |
mbed_official | 340:28d1f895c6fe | 1664 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 1665 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 1666 | |
mbed_official | 340:28d1f895c6fe | 1667 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 1668 | |
mbed_official | 340:28d1f895c6fe | 1669 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1670 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1671 | |
mbed_official | 340:28d1f895c6fe | 1672 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1673 | } |
mbed_official | 340:28d1f895c6fe | 1674 | else |
mbed_official | 340:28d1f895c6fe | 1675 | { |
mbed_official | 340:28d1f895c6fe | 1676 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1677 | } |
mbed_official | 340:28d1f895c6fe | 1678 | } |
mbed_official | 340:28d1f895c6fe | 1679 | |
mbed_official | 340:28d1f895c6fe | 1680 | /** |
mbed_official | 340:28d1f895c6fe | 1681 | * @brief Read an amount of data in blocking mode from a specific memory address |
mbed_official | 340:28d1f895c6fe | 1682 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1683 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1684 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1685 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 1686 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 1687 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1688 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1689 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 1690 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1691 | */ |
mbed_official | 340:28d1f895c6fe | 1692 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 1693 | { |
mbed_official | 340:28d1f895c6fe | 1694 | uint32_t Sizetmp = 0; |
mbed_official | 340:28d1f895c6fe | 1695 | |
mbed_official | 340:28d1f895c6fe | 1696 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1697 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 340:28d1f895c6fe | 1698 | |
mbed_official | 340:28d1f895c6fe | 1699 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1700 | { |
mbed_official | 340:28d1f895c6fe | 1701 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1702 | { |
mbed_official | 340:28d1f895c6fe | 1703 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1704 | } |
mbed_official | 340:28d1f895c6fe | 1705 | |
mbed_official | 340:28d1f895c6fe | 1706 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1707 | { |
mbed_official | 340:28d1f895c6fe | 1708 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1709 | } |
mbed_official | 340:28d1f895c6fe | 1710 | |
mbed_official | 340:28d1f895c6fe | 1711 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1712 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1713 | |
mbed_official | 340:28d1f895c6fe | 1714 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1715 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1716 | |
mbed_official | 340:28d1f895c6fe | 1717 | /* Send Slave Address and Memory Address */ |
mbed_official | 340:28d1f895c6fe | 1718 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1719 | { |
mbed_official | 340:28d1f895c6fe | 1720 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1721 | { |
mbed_official | 340:28d1f895c6fe | 1722 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1723 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1724 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1725 | } |
mbed_official | 340:28d1f895c6fe | 1726 | else |
mbed_official | 340:28d1f895c6fe | 1727 | { |
mbed_official | 340:28d1f895c6fe | 1728 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1729 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1730 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1731 | } |
mbed_official | 340:28d1f895c6fe | 1732 | } |
mbed_official | 340:28d1f895c6fe | 1733 | |
mbed_official | 340:28d1f895c6fe | 1734 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 1735 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 1736 | /* Size > 255, need to set RELOAD bit */ |
mbed_official | 340:28d1f895c6fe | 1737 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1738 | { |
mbed_official | 340:28d1f895c6fe | 1739 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1740 | Sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 1741 | } |
mbed_official | 340:28d1f895c6fe | 1742 | else |
mbed_official | 340:28d1f895c6fe | 1743 | { |
mbed_official | 340:28d1f895c6fe | 1744 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1745 | Sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 1746 | } |
mbed_official | 340:28d1f895c6fe | 1747 | |
mbed_official | 340:28d1f895c6fe | 1748 | do |
mbed_official | 340:28d1f895c6fe | 1749 | { |
mbed_official | 340:28d1f895c6fe | 1750 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 1751 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1752 | { |
mbed_official | 340:28d1f895c6fe | 1753 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1754 | } |
mbed_official | 340:28d1f895c6fe | 1755 | |
mbed_official | 340:28d1f895c6fe | 1756 | /* Read data from RXDR */ |
mbed_official | 340:28d1f895c6fe | 1757 | (*pData++) = hi2c->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 1758 | |
mbed_official | 340:28d1f895c6fe | 1759 | /* Decrement the Size counter */ |
mbed_official | 340:28d1f895c6fe | 1760 | Sizetmp--; |
mbed_official | 340:28d1f895c6fe | 1761 | Size--; |
mbed_official | 340:28d1f895c6fe | 1762 | |
mbed_official | 340:28d1f895c6fe | 1763 | if((Sizetmp == 0)&&(Size!=0)) |
mbed_official | 340:28d1f895c6fe | 1764 | { |
mbed_official | 340:28d1f895c6fe | 1765 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 1766 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1767 | { |
mbed_official | 340:28d1f895c6fe | 1768 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1769 | } |
mbed_official | 340:28d1f895c6fe | 1770 | |
mbed_official | 340:28d1f895c6fe | 1771 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1772 | { |
mbed_official | 340:28d1f895c6fe | 1773 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1774 | Sizetmp = 255; |
mbed_official | 340:28d1f895c6fe | 1775 | } |
mbed_official | 340:28d1f895c6fe | 1776 | else |
mbed_official | 340:28d1f895c6fe | 1777 | { |
mbed_official | 340:28d1f895c6fe | 1778 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1779 | Sizetmp = Size; |
mbed_official | 340:28d1f895c6fe | 1780 | } |
mbed_official | 340:28d1f895c6fe | 1781 | } |
mbed_official | 340:28d1f895c6fe | 1782 | |
mbed_official | 340:28d1f895c6fe | 1783 | }while(Size > 0); |
mbed_official | 340:28d1f895c6fe | 1784 | |
mbed_official | 340:28d1f895c6fe | 1785 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 1786 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 1787 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1788 | { |
mbed_official | 340:28d1f895c6fe | 1789 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1790 | { |
mbed_official | 340:28d1f895c6fe | 1791 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1792 | } |
mbed_official | 340:28d1f895c6fe | 1793 | else |
mbed_official | 340:28d1f895c6fe | 1794 | { |
mbed_official | 340:28d1f895c6fe | 1795 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1796 | } |
mbed_official | 340:28d1f895c6fe | 1797 | } |
mbed_official | 340:28d1f895c6fe | 1798 | |
mbed_official | 340:28d1f895c6fe | 1799 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 1800 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 1801 | |
mbed_official | 340:28d1f895c6fe | 1802 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 1803 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 1804 | |
mbed_official | 340:28d1f895c6fe | 1805 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 1806 | |
mbed_official | 340:28d1f895c6fe | 1807 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1808 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1809 | |
mbed_official | 340:28d1f895c6fe | 1810 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1811 | } |
mbed_official | 340:28d1f895c6fe | 1812 | else |
mbed_official | 340:28d1f895c6fe | 1813 | { |
mbed_official | 340:28d1f895c6fe | 1814 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1815 | } |
mbed_official | 340:28d1f895c6fe | 1816 | } |
mbed_official | 340:28d1f895c6fe | 1817 | |
mbed_official | 340:28d1f895c6fe | 1818 | /** |
mbed_official | 340:28d1f895c6fe | 1819 | * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address |
mbed_official | 340:28d1f895c6fe | 1820 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1821 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1822 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1823 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 1824 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 1825 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1826 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1827 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1828 | */ |
mbed_official | 340:28d1f895c6fe | 1829 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1830 | { |
mbed_official | 340:28d1f895c6fe | 1831 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1832 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 340:28d1f895c6fe | 1833 | |
mbed_official | 340:28d1f895c6fe | 1834 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1835 | { |
mbed_official | 340:28d1f895c6fe | 1836 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1837 | { |
mbed_official | 340:28d1f895c6fe | 1838 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1839 | } |
mbed_official | 340:28d1f895c6fe | 1840 | |
mbed_official | 340:28d1f895c6fe | 1841 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1842 | { |
mbed_official | 340:28d1f895c6fe | 1843 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1844 | } |
mbed_official | 340:28d1f895c6fe | 1845 | |
mbed_official | 340:28d1f895c6fe | 1846 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1847 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1848 | |
mbed_official | 340:28d1f895c6fe | 1849 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 1850 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 1851 | |
mbed_official | 340:28d1f895c6fe | 1852 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1853 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1854 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1855 | { |
mbed_official | 340:28d1f895c6fe | 1856 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 1857 | } |
mbed_official | 340:28d1f895c6fe | 1858 | else |
mbed_official | 340:28d1f895c6fe | 1859 | { |
mbed_official | 340:28d1f895c6fe | 1860 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1861 | } |
mbed_official | 340:28d1f895c6fe | 1862 | |
mbed_official | 340:28d1f895c6fe | 1863 | /* Send Slave Address and Memory Address */ |
mbed_official | 340:28d1f895c6fe | 1864 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1865 | { |
mbed_official | 340:28d1f895c6fe | 1866 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1867 | { |
mbed_official | 340:28d1f895c6fe | 1868 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1869 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1870 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1871 | } |
mbed_official | 340:28d1f895c6fe | 1872 | else |
mbed_official | 340:28d1f895c6fe | 1873 | { |
mbed_official | 340:28d1f895c6fe | 1874 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1875 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1876 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1877 | } |
mbed_official | 340:28d1f895c6fe | 1878 | } |
mbed_official | 340:28d1f895c6fe | 1879 | |
mbed_official | 340:28d1f895c6fe | 1880 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 1881 | /* Size > 255, need to set RELOAD bit */ |
mbed_official | 340:28d1f895c6fe | 1882 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 1883 | { |
mbed_official | 340:28d1f895c6fe | 1884 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1885 | } |
mbed_official | 340:28d1f895c6fe | 1886 | else |
mbed_official | 340:28d1f895c6fe | 1887 | { |
mbed_official | 340:28d1f895c6fe | 1888 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 1889 | } |
mbed_official | 340:28d1f895c6fe | 1890 | |
mbed_official | 340:28d1f895c6fe | 1891 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1892 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1893 | |
mbed_official | 340:28d1f895c6fe | 1894 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 340:28d1f895c6fe | 1895 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 340:28d1f895c6fe | 1896 | process unlock */ |
mbed_official | 340:28d1f895c6fe | 1897 | |
mbed_official | 340:28d1f895c6fe | 1898 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 1899 | /* possible to enable all of these */ |
mbed_official | 340:28d1f895c6fe | 1900 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
mbed_official | 340:28d1f895c6fe | 1901 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI ); |
mbed_official | 340:28d1f895c6fe | 1902 | |
mbed_official | 340:28d1f895c6fe | 1903 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1904 | } |
mbed_official | 340:28d1f895c6fe | 1905 | else |
mbed_official | 340:28d1f895c6fe | 1906 | { |
mbed_official | 340:28d1f895c6fe | 1907 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1908 | } |
mbed_official | 340:28d1f895c6fe | 1909 | } |
mbed_official | 340:28d1f895c6fe | 1910 | |
mbed_official | 340:28d1f895c6fe | 1911 | /** |
mbed_official | 340:28d1f895c6fe | 1912 | * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address |
mbed_official | 340:28d1f895c6fe | 1913 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 1914 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 1915 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 1916 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 1917 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 1918 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 1919 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 1920 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1921 | */ |
mbed_official | 340:28d1f895c6fe | 1922 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 1923 | { |
mbed_official | 340:28d1f895c6fe | 1924 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1925 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 340:28d1f895c6fe | 1926 | |
mbed_official | 340:28d1f895c6fe | 1927 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 1928 | { |
mbed_official | 340:28d1f895c6fe | 1929 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 1930 | { |
mbed_official | 340:28d1f895c6fe | 1931 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1932 | } |
mbed_official | 340:28d1f895c6fe | 1933 | |
mbed_official | 340:28d1f895c6fe | 1934 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 1935 | { |
mbed_official | 340:28d1f895c6fe | 1936 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1937 | } |
mbed_official | 340:28d1f895c6fe | 1938 | |
mbed_official | 340:28d1f895c6fe | 1939 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 1940 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1941 | |
mbed_official | 340:28d1f895c6fe | 1942 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1943 | |
mbed_official | 340:28d1f895c6fe | 1944 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 1945 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 1946 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 1947 | { |
mbed_official | 340:28d1f895c6fe | 1948 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 1949 | } |
mbed_official | 340:28d1f895c6fe | 1950 | else |
mbed_official | 340:28d1f895c6fe | 1951 | { |
mbed_official | 340:28d1f895c6fe | 1952 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 1953 | } |
mbed_official | 340:28d1f895c6fe | 1954 | |
mbed_official | 340:28d1f895c6fe | 1955 | /* Send Slave Address and Memory Address */ |
mbed_official | 340:28d1f895c6fe | 1956 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1957 | { |
mbed_official | 340:28d1f895c6fe | 1958 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 1959 | { |
mbed_official | 340:28d1f895c6fe | 1960 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1961 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1962 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1963 | } |
mbed_official | 340:28d1f895c6fe | 1964 | else |
mbed_official | 340:28d1f895c6fe | 1965 | { |
mbed_official | 340:28d1f895c6fe | 1966 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1967 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1968 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 1969 | } |
mbed_official | 340:28d1f895c6fe | 1970 | } |
mbed_official | 340:28d1f895c6fe | 1971 | |
mbed_official | 340:28d1f895c6fe | 1972 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 1973 | /* Size > 255, need to set RELOAD bit */ |
mbed_official | 340:28d1f895c6fe | 1974 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 1975 | { |
mbed_official | 340:28d1f895c6fe | 1976 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1977 | } |
mbed_official | 340:28d1f895c6fe | 1978 | else |
mbed_official | 340:28d1f895c6fe | 1979 | { |
mbed_official | 340:28d1f895c6fe | 1980 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 1981 | } |
mbed_official | 340:28d1f895c6fe | 1982 | |
mbed_official | 340:28d1f895c6fe | 1983 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 1984 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 1985 | |
mbed_official | 340:28d1f895c6fe | 1986 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 340:28d1f895c6fe | 1987 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 340:28d1f895c6fe | 1988 | process unlock */ |
mbed_official | 340:28d1f895c6fe | 1989 | |
mbed_official | 340:28d1f895c6fe | 1990 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 1991 | /* possible to enable all of these */ |
mbed_official | 340:28d1f895c6fe | 1992 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
mbed_official | 340:28d1f895c6fe | 1993 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI ); |
mbed_official | 340:28d1f895c6fe | 1994 | |
mbed_official | 340:28d1f895c6fe | 1995 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1996 | } |
mbed_official | 340:28d1f895c6fe | 1997 | else |
mbed_official | 340:28d1f895c6fe | 1998 | { |
mbed_official | 340:28d1f895c6fe | 1999 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2000 | } |
mbed_official | 340:28d1f895c6fe | 2001 | } |
mbed_official | 340:28d1f895c6fe | 2002 | |
mbed_official | 340:28d1f895c6fe | 2003 | /** |
mbed_official | 340:28d1f895c6fe | 2004 | * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address |
mbed_official | 340:28d1f895c6fe | 2005 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2006 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2007 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 2008 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 2009 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 2010 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 2011 | * @param Size: Amount of data to be sent |
mbed_official | 340:28d1f895c6fe | 2012 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2013 | */ |
mbed_official | 340:28d1f895c6fe | 2014 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 2015 | { |
mbed_official | 340:28d1f895c6fe | 2016 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 2017 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 340:28d1f895c6fe | 2018 | |
mbed_official | 340:28d1f895c6fe | 2019 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 2020 | { |
mbed_official | 340:28d1f895c6fe | 2021 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 2022 | { |
mbed_official | 340:28d1f895c6fe | 2023 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2024 | } |
mbed_official | 340:28d1f895c6fe | 2025 | |
mbed_official | 340:28d1f895c6fe | 2026 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 2027 | { |
mbed_official | 340:28d1f895c6fe | 2028 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2029 | } |
mbed_official | 340:28d1f895c6fe | 2030 | |
mbed_official | 340:28d1f895c6fe | 2031 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 2032 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2033 | |
mbed_official | 340:28d1f895c6fe | 2034 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 2035 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 2036 | |
mbed_official | 340:28d1f895c6fe | 2037 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 2038 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 2039 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 2040 | { |
mbed_official | 340:28d1f895c6fe | 2041 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 2042 | } |
mbed_official | 340:28d1f895c6fe | 2043 | else |
mbed_official | 340:28d1f895c6fe | 2044 | { |
mbed_official | 340:28d1f895c6fe | 2045 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 2046 | } |
mbed_official | 340:28d1f895c6fe | 2047 | |
mbed_official | 340:28d1f895c6fe | 2048 | /* Set the I2C DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 2049 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt; |
mbed_official | 340:28d1f895c6fe | 2050 | |
mbed_official | 340:28d1f895c6fe | 2051 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 2052 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
mbed_official | 340:28d1f895c6fe | 2053 | |
mbed_official | 340:28d1f895c6fe | 2054 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 2055 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 2056 | |
mbed_official | 340:28d1f895c6fe | 2057 | /* Send Slave Address and Memory Address */ |
mbed_official | 340:28d1f895c6fe | 2058 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2059 | { |
mbed_official | 340:28d1f895c6fe | 2060 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 2061 | { |
mbed_official | 340:28d1f895c6fe | 2062 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2063 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2064 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2065 | } |
mbed_official | 340:28d1f895c6fe | 2066 | else |
mbed_official | 340:28d1f895c6fe | 2067 | { |
mbed_official | 340:28d1f895c6fe | 2068 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2069 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2070 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2071 | } |
mbed_official | 340:28d1f895c6fe | 2072 | } |
mbed_official | 340:28d1f895c6fe | 2073 | |
mbed_official | 340:28d1f895c6fe | 2074 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 2075 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 2076 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 2077 | { |
mbed_official | 340:28d1f895c6fe | 2078 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 2079 | } |
mbed_official | 340:28d1f895c6fe | 2080 | else |
mbed_official | 340:28d1f895c6fe | 2081 | { |
mbed_official | 340:28d1f895c6fe | 2082 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 2083 | } |
mbed_official | 340:28d1f895c6fe | 2084 | |
mbed_official | 340:28d1f895c6fe | 2085 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 2086 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2087 | { |
mbed_official | 340:28d1f895c6fe | 2088 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 2089 | { |
mbed_official | 340:28d1f895c6fe | 2090 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2091 | } |
mbed_official | 340:28d1f895c6fe | 2092 | else |
mbed_official | 340:28d1f895c6fe | 2093 | { |
mbed_official | 340:28d1f895c6fe | 2094 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2095 | } |
mbed_official | 340:28d1f895c6fe | 2096 | } |
mbed_official | 340:28d1f895c6fe | 2097 | |
mbed_official | 340:28d1f895c6fe | 2098 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 2099 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 2100 | |
mbed_official | 340:28d1f895c6fe | 2101 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2102 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2103 | |
mbed_official | 340:28d1f895c6fe | 2104 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2105 | } |
mbed_official | 340:28d1f895c6fe | 2106 | else |
mbed_official | 340:28d1f895c6fe | 2107 | { |
mbed_official | 340:28d1f895c6fe | 2108 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2109 | } |
mbed_official | 340:28d1f895c6fe | 2110 | } |
mbed_official | 340:28d1f895c6fe | 2111 | |
mbed_official | 340:28d1f895c6fe | 2112 | /** |
mbed_official | 340:28d1f895c6fe | 2113 | * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address. |
mbed_official | 340:28d1f895c6fe | 2114 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2115 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2116 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 2117 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 2118 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 2119 | * @param pData: Pointer to data buffer |
mbed_official | 340:28d1f895c6fe | 2120 | * @param Size: Amount of data to be read |
mbed_official | 340:28d1f895c6fe | 2121 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2122 | */ |
mbed_official | 340:28d1f895c6fe | 2123 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 340:28d1f895c6fe | 2124 | { |
mbed_official | 340:28d1f895c6fe | 2125 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 2126 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 340:28d1f895c6fe | 2127 | |
mbed_official | 340:28d1f895c6fe | 2128 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 2129 | { |
mbed_official | 340:28d1f895c6fe | 2130 | if((pData == HAL_NULL) || (Size == 0)) |
mbed_official | 340:28d1f895c6fe | 2131 | { |
mbed_official | 340:28d1f895c6fe | 2132 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2133 | } |
mbed_official | 340:28d1f895c6fe | 2134 | |
mbed_official | 340:28d1f895c6fe | 2135 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 2136 | { |
mbed_official | 340:28d1f895c6fe | 2137 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2138 | } |
mbed_official | 340:28d1f895c6fe | 2139 | |
mbed_official | 340:28d1f895c6fe | 2140 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 2141 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2142 | |
mbed_official | 340:28d1f895c6fe | 2143 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 2144 | |
mbed_official | 340:28d1f895c6fe | 2145 | hi2c->pBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 2146 | hi2c->XferCount = Size; |
mbed_official | 340:28d1f895c6fe | 2147 | if(Size > 255) |
mbed_official | 340:28d1f895c6fe | 2148 | { |
mbed_official | 340:28d1f895c6fe | 2149 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 2150 | } |
mbed_official | 340:28d1f895c6fe | 2151 | else |
mbed_official | 340:28d1f895c6fe | 2152 | { |
mbed_official | 340:28d1f895c6fe | 2153 | hi2c->XferSize = Size; |
mbed_official | 340:28d1f895c6fe | 2154 | } |
mbed_official | 340:28d1f895c6fe | 2155 | |
mbed_official | 340:28d1f895c6fe | 2156 | /* Set the I2C DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 2157 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt; |
mbed_official | 340:28d1f895c6fe | 2158 | |
mbed_official | 340:28d1f895c6fe | 2159 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 2160 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
mbed_official | 340:28d1f895c6fe | 2161 | |
mbed_official | 340:28d1f895c6fe | 2162 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 2163 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 2164 | |
mbed_official | 340:28d1f895c6fe | 2165 | /* Send Slave Address and Memory Address */ |
mbed_official | 340:28d1f895c6fe | 2166 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2167 | { |
mbed_official | 340:28d1f895c6fe | 2168 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 2169 | { |
mbed_official | 340:28d1f895c6fe | 2170 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2171 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2172 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2173 | } |
mbed_official | 340:28d1f895c6fe | 2174 | else |
mbed_official | 340:28d1f895c6fe | 2175 | { |
mbed_official | 340:28d1f895c6fe | 2176 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2177 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2178 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2179 | } |
mbed_official | 340:28d1f895c6fe | 2180 | } |
mbed_official | 340:28d1f895c6fe | 2181 | |
mbed_official | 340:28d1f895c6fe | 2182 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
mbed_official | 340:28d1f895c6fe | 2183 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 2184 | { |
mbed_official | 340:28d1f895c6fe | 2185 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 2186 | } |
mbed_official | 340:28d1f895c6fe | 2187 | else |
mbed_official | 340:28d1f895c6fe | 2188 | { |
mbed_official | 340:28d1f895c6fe | 2189 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
mbed_official | 340:28d1f895c6fe | 2190 | } |
mbed_official | 340:28d1f895c6fe | 2191 | |
mbed_official | 340:28d1f895c6fe | 2192 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 2193 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2194 | { |
mbed_official | 340:28d1f895c6fe | 2195 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2196 | } |
mbed_official | 340:28d1f895c6fe | 2197 | |
mbed_official | 340:28d1f895c6fe | 2198 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 2199 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 2200 | |
mbed_official | 340:28d1f895c6fe | 2201 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2202 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2203 | |
mbed_official | 340:28d1f895c6fe | 2204 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2205 | } |
mbed_official | 340:28d1f895c6fe | 2206 | else |
mbed_official | 340:28d1f895c6fe | 2207 | { |
mbed_official | 340:28d1f895c6fe | 2208 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2209 | } |
mbed_official | 340:28d1f895c6fe | 2210 | } |
mbed_official | 340:28d1f895c6fe | 2211 | |
mbed_official | 340:28d1f895c6fe | 2212 | /** |
mbed_official | 340:28d1f895c6fe | 2213 | * @brief Checks if target device is ready for communication. |
mbed_official | 340:28d1f895c6fe | 2214 | * @note This function is used with Memory devices |
mbed_official | 340:28d1f895c6fe | 2215 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2216 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2217 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 2218 | * @param Trials: Number of trials |
mbed_official | 340:28d1f895c6fe | 2219 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 2220 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2221 | */ |
mbed_official | 340:28d1f895c6fe | 2222 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 2223 | { |
mbed_official | 340:28d1f895c6fe | 2224 | uint32_t tickstart = 0; |
mbed_official | 340:28d1f895c6fe | 2225 | |
mbed_official | 340:28d1f895c6fe | 2226 | __IO uint32_t I2C_Trials = 0; |
mbed_official | 340:28d1f895c6fe | 2227 | |
mbed_official | 340:28d1f895c6fe | 2228 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 2229 | { |
mbed_official | 340:28d1f895c6fe | 2230 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 340:28d1f895c6fe | 2231 | { |
mbed_official | 340:28d1f895c6fe | 2232 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2233 | } |
mbed_official | 340:28d1f895c6fe | 2234 | |
mbed_official | 340:28d1f895c6fe | 2235 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 2236 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2237 | |
mbed_official | 340:28d1f895c6fe | 2238 | hi2c->State = HAL_I2C_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 2239 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 2240 | |
mbed_official | 340:28d1f895c6fe | 2241 | do |
mbed_official | 340:28d1f895c6fe | 2242 | { |
mbed_official | 340:28d1f895c6fe | 2243 | /* Generate Start */ |
mbed_official | 340:28d1f895c6fe | 2244 | hi2c->Instance->CR2 = __HAL_I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress); |
mbed_official | 340:28d1f895c6fe | 2245 | |
mbed_official | 340:28d1f895c6fe | 2246 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 2247 | /* Wait until STOPF flag is set or a NACK flag is set*/ |
mbed_official | 340:28d1f895c6fe | 2248 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 2249 | while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT)) |
mbed_official | 340:28d1f895c6fe | 2250 | { |
mbed_official | 340:28d1f895c6fe | 2251 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 2252 | { |
mbed_official | 340:28d1f895c6fe | 2253 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 2254 | { |
mbed_official | 340:28d1f895c6fe | 2255 | /* Device is ready */ |
mbed_official | 340:28d1f895c6fe | 2256 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2257 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2258 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2259 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2260 | } |
mbed_official | 340:28d1f895c6fe | 2261 | } |
mbed_official | 340:28d1f895c6fe | 2262 | } |
mbed_official | 340:28d1f895c6fe | 2263 | |
mbed_official | 340:28d1f895c6fe | 2264 | /* Check if the NACKF flag has not been set */ |
mbed_official | 340:28d1f895c6fe | 2265 | if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) |
mbed_official | 340:28d1f895c6fe | 2266 | { |
mbed_official | 340:28d1f895c6fe | 2267 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 2268 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2269 | { |
mbed_official | 340:28d1f895c6fe | 2270 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2271 | } |
mbed_official | 340:28d1f895c6fe | 2272 | |
mbed_official | 340:28d1f895c6fe | 2273 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 2274 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2275 | |
mbed_official | 340:28d1f895c6fe | 2276 | /* Device is ready */ |
mbed_official | 340:28d1f895c6fe | 2277 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2278 | |
mbed_official | 340:28d1f895c6fe | 2279 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2280 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2281 | |
mbed_official | 340:28d1f895c6fe | 2282 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2283 | } |
mbed_official | 340:28d1f895c6fe | 2284 | else |
mbed_official | 340:28d1f895c6fe | 2285 | { |
mbed_official | 340:28d1f895c6fe | 2286 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 2287 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2288 | { |
mbed_official | 340:28d1f895c6fe | 2289 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2290 | } |
mbed_official | 340:28d1f895c6fe | 2291 | |
mbed_official | 340:28d1f895c6fe | 2292 | /* Clear NACK Flag */ |
mbed_official | 340:28d1f895c6fe | 2293 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 2294 | |
mbed_official | 340:28d1f895c6fe | 2295 | /* Clear STOP Flag, auto generated with autoend*/ |
mbed_official | 340:28d1f895c6fe | 2296 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2297 | } |
mbed_official | 340:28d1f895c6fe | 2298 | |
mbed_official | 340:28d1f895c6fe | 2299 | /* Check if the maximum allowed number of trials has been reached */ |
mbed_official | 340:28d1f895c6fe | 2300 | if (I2C_Trials++ == Trials) |
mbed_official | 340:28d1f895c6fe | 2301 | { |
mbed_official | 340:28d1f895c6fe | 2302 | /* Generate Stop */ |
mbed_official | 340:28d1f895c6fe | 2303 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
mbed_official | 340:28d1f895c6fe | 2304 | |
mbed_official | 340:28d1f895c6fe | 2305 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 2306 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2307 | { |
mbed_official | 340:28d1f895c6fe | 2308 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2309 | } |
mbed_official | 340:28d1f895c6fe | 2310 | |
mbed_official | 340:28d1f895c6fe | 2311 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 2312 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2313 | } |
mbed_official | 340:28d1f895c6fe | 2314 | }while(I2C_Trials < Trials); |
mbed_official | 340:28d1f895c6fe | 2315 | |
mbed_official | 340:28d1f895c6fe | 2316 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2317 | |
mbed_official | 340:28d1f895c6fe | 2318 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2319 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2320 | |
mbed_official | 340:28d1f895c6fe | 2321 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2322 | } |
mbed_official | 340:28d1f895c6fe | 2323 | else |
mbed_official | 340:28d1f895c6fe | 2324 | { |
mbed_official | 340:28d1f895c6fe | 2325 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 2326 | } |
mbed_official | 340:28d1f895c6fe | 2327 | } |
mbed_official | 340:28d1f895c6fe | 2328 | |
mbed_official | 340:28d1f895c6fe | 2329 | /** |
mbed_official | 340:28d1f895c6fe | 2330 | * @brief This function handles I2C event interrupt request. |
mbed_official | 340:28d1f895c6fe | 2331 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2332 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2333 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2334 | */ |
mbed_official | 340:28d1f895c6fe | 2335 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2336 | { |
mbed_official | 340:28d1f895c6fe | 2337 | /* I2C in mode Transmitter ---------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 2338 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI | I2C_IT_ADDRI)) == SET)) |
mbed_official | 340:28d1f895c6fe | 2339 | { |
mbed_official | 340:28d1f895c6fe | 2340 | /* Slave mode selected */ |
mbed_official | 340:28d1f895c6fe | 2341 | if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 2342 | { |
mbed_official | 340:28d1f895c6fe | 2343 | I2C_SlaveTransmit_ISR(hi2c); |
mbed_official | 340:28d1f895c6fe | 2344 | } |
mbed_official | 340:28d1f895c6fe | 2345 | } |
mbed_official | 340:28d1f895c6fe | 2346 | |
mbed_official | 340:28d1f895c6fe | 2347 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI)) == SET)) |
mbed_official | 340:28d1f895c6fe | 2348 | { |
mbed_official | 340:28d1f895c6fe | 2349 | /* Master mode selected */ |
mbed_official | 340:28d1f895c6fe | 2350 | if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)) |
mbed_official | 340:28d1f895c6fe | 2351 | { |
mbed_official | 340:28d1f895c6fe | 2352 | I2C_MasterTransmit_ISR(hi2c); |
mbed_official | 340:28d1f895c6fe | 2353 | } |
mbed_official | 340:28d1f895c6fe | 2354 | } |
mbed_official | 340:28d1f895c6fe | 2355 | |
mbed_official | 340:28d1f895c6fe | 2356 | /* I2C in mode Receiver ----------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 2357 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI | I2C_IT_ADDRI)) == SET)) |
mbed_official | 340:28d1f895c6fe | 2358 | { |
mbed_official | 340:28d1f895c6fe | 2359 | /* Slave mode selected */ |
mbed_official | 340:28d1f895c6fe | 2360 | if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX) |
mbed_official | 340:28d1f895c6fe | 2361 | { |
mbed_official | 340:28d1f895c6fe | 2362 | I2C_SlaveReceive_ISR(hi2c); |
mbed_official | 340:28d1f895c6fe | 2363 | } |
mbed_official | 340:28d1f895c6fe | 2364 | } |
mbed_official | 340:28d1f895c6fe | 2365 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI)) == SET)) |
mbed_official | 340:28d1f895c6fe | 2366 | { |
mbed_official | 340:28d1f895c6fe | 2367 | /* Master mode selected */ |
mbed_official | 340:28d1f895c6fe | 2368 | if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)) |
mbed_official | 340:28d1f895c6fe | 2369 | { |
mbed_official | 340:28d1f895c6fe | 2370 | I2C_MasterReceive_ISR(hi2c); |
mbed_official | 340:28d1f895c6fe | 2371 | } |
mbed_official | 340:28d1f895c6fe | 2372 | } |
mbed_official | 340:28d1f895c6fe | 2373 | } |
mbed_official | 340:28d1f895c6fe | 2374 | |
mbed_official | 340:28d1f895c6fe | 2375 | /** |
mbed_official | 340:28d1f895c6fe | 2376 | * @brief This function handles I2C error interrupt request. |
mbed_official | 340:28d1f895c6fe | 2377 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2378 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2379 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2380 | */ |
mbed_official | 340:28d1f895c6fe | 2381 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2382 | { |
mbed_official | 340:28d1f895c6fe | 2383 | /* I2C Bus error interrupt occurred ------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 2384 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET)) |
mbed_official | 340:28d1f895c6fe | 2385 | { |
mbed_official | 340:28d1f895c6fe | 2386 | hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; |
mbed_official | 340:28d1f895c6fe | 2387 | |
mbed_official | 340:28d1f895c6fe | 2388 | /* Clear BERR flag */ |
mbed_official | 340:28d1f895c6fe | 2389 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); |
mbed_official | 340:28d1f895c6fe | 2390 | } |
mbed_official | 340:28d1f895c6fe | 2391 | |
mbed_official | 340:28d1f895c6fe | 2392 | /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 2393 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET)) |
mbed_official | 340:28d1f895c6fe | 2394 | { |
mbed_official | 340:28d1f895c6fe | 2395 | hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; |
mbed_official | 340:28d1f895c6fe | 2396 | |
mbed_official | 340:28d1f895c6fe | 2397 | /* Clear OVR flag */ |
mbed_official | 340:28d1f895c6fe | 2398 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); |
mbed_official | 340:28d1f895c6fe | 2399 | } |
mbed_official | 340:28d1f895c6fe | 2400 | |
mbed_official | 340:28d1f895c6fe | 2401 | /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 2402 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET)) |
mbed_official | 340:28d1f895c6fe | 2403 | { |
mbed_official | 340:28d1f895c6fe | 2404 | hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; |
mbed_official | 340:28d1f895c6fe | 2405 | |
mbed_official | 340:28d1f895c6fe | 2406 | /* Clear ARLO flag */ |
mbed_official | 340:28d1f895c6fe | 2407 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); |
mbed_official | 340:28d1f895c6fe | 2408 | } |
mbed_official | 340:28d1f895c6fe | 2409 | |
mbed_official | 340:28d1f895c6fe | 2410 | /* Call the Error Callback in case of Error detected */ |
mbed_official | 340:28d1f895c6fe | 2411 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 2412 | { |
mbed_official | 340:28d1f895c6fe | 2413 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2414 | |
mbed_official | 340:28d1f895c6fe | 2415 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2416 | } |
mbed_official | 340:28d1f895c6fe | 2417 | } |
mbed_official | 340:28d1f895c6fe | 2418 | |
mbed_official | 340:28d1f895c6fe | 2419 | /** |
mbed_official | 340:28d1f895c6fe | 2420 | * @brief Master Tx Transfer completed callbacks. |
mbed_official | 340:28d1f895c6fe | 2421 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2422 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2423 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2424 | */ |
mbed_official | 340:28d1f895c6fe | 2425 | __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2426 | { |
mbed_official | 340:28d1f895c6fe | 2427 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2428 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2429 | */ |
mbed_official | 340:28d1f895c6fe | 2430 | } |
mbed_official | 340:28d1f895c6fe | 2431 | |
mbed_official | 340:28d1f895c6fe | 2432 | /** |
mbed_official | 340:28d1f895c6fe | 2433 | * @brief Master Rx Transfer completed callbacks. |
mbed_official | 340:28d1f895c6fe | 2434 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2435 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2436 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2437 | */ |
mbed_official | 340:28d1f895c6fe | 2438 | __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2439 | { |
mbed_official | 340:28d1f895c6fe | 2440 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2441 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2442 | */ |
mbed_official | 340:28d1f895c6fe | 2443 | } |
mbed_official | 340:28d1f895c6fe | 2444 | |
mbed_official | 340:28d1f895c6fe | 2445 | /** @brief Slave Tx Transfer completed callbacks. |
mbed_official | 340:28d1f895c6fe | 2446 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2447 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2448 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2449 | */ |
mbed_official | 340:28d1f895c6fe | 2450 | __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2451 | { |
mbed_official | 340:28d1f895c6fe | 2452 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2453 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2454 | */ |
mbed_official | 340:28d1f895c6fe | 2455 | } |
mbed_official | 340:28d1f895c6fe | 2456 | |
mbed_official | 340:28d1f895c6fe | 2457 | /** |
mbed_official | 340:28d1f895c6fe | 2458 | * @brief Slave Rx Transfer completed callbacks. |
mbed_official | 340:28d1f895c6fe | 2459 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2460 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2461 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2462 | */ |
mbed_official | 340:28d1f895c6fe | 2463 | __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2464 | { |
mbed_official | 340:28d1f895c6fe | 2465 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2466 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2467 | */ |
mbed_official | 340:28d1f895c6fe | 2468 | } |
mbed_official | 340:28d1f895c6fe | 2469 | |
mbed_official | 340:28d1f895c6fe | 2470 | /** |
mbed_official | 340:28d1f895c6fe | 2471 | * @brief Memory Tx Transfer completed callbacks. |
mbed_official | 340:28d1f895c6fe | 2472 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2473 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2474 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2475 | */ |
mbed_official | 340:28d1f895c6fe | 2476 | __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2477 | { |
mbed_official | 340:28d1f895c6fe | 2478 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2479 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2480 | */ |
mbed_official | 340:28d1f895c6fe | 2481 | } |
mbed_official | 340:28d1f895c6fe | 2482 | |
mbed_official | 340:28d1f895c6fe | 2483 | /** |
mbed_official | 340:28d1f895c6fe | 2484 | * @brief Memory Rx Transfer completed callbacks. |
mbed_official | 340:28d1f895c6fe | 2485 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2486 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2487 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2488 | */ |
mbed_official | 340:28d1f895c6fe | 2489 | __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2490 | { |
mbed_official | 340:28d1f895c6fe | 2491 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2492 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2493 | */ |
mbed_official | 340:28d1f895c6fe | 2494 | } |
mbed_official | 340:28d1f895c6fe | 2495 | |
mbed_official | 340:28d1f895c6fe | 2496 | /** |
mbed_official | 340:28d1f895c6fe | 2497 | * @brief I2C error callbacks. |
mbed_official | 340:28d1f895c6fe | 2498 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2499 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2500 | * @retval None |
mbed_official | 340:28d1f895c6fe | 2501 | */ |
mbed_official | 340:28d1f895c6fe | 2502 | __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2503 | { |
mbed_official | 340:28d1f895c6fe | 2504 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 2505 | the HAL_I2C_ErrorCallback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 2506 | */ |
mbed_official | 340:28d1f895c6fe | 2507 | } |
mbed_official | 340:28d1f895c6fe | 2508 | |
mbed_official | 340:28d1f895c6fe | 2509 | /** |
mbed_official | 340:28d1f895c6fe | 2510 | * @} |
mbed_official | 340:28d1f895c6fe | 2511 | */ |
mbed_official | 340:28d1f895c6fe | 2512 | |
mbed_official | 340:28d1f895c6fe | 2513 | /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions |
mbed_official | 340:28d1f895c6fe | 2514 | * @brief Peripheral State and Errors functions |
mbed_official | 340:28d1f895c6fe | 2515 | * |
mbed_official | 340:28d1f895c6fe | 2516 | @verbatim |
mbed_official | 340:28d1f895c6fe | 2517 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 2518 | ##### Peripheral State and Errors functions ##### |
mbed_official | 340:28d1f895c6fe | 2519 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 2520 | [..] |
mbed_official | 340:28d1f895c6fe | 2521 | This subsection permit to get in run-time the status of the peripheral |
mbed_official | 340:28d1f895c6fe | 2522 | and the data flow. |
mbed_official | 340:28d1f895c6fe | 2523 | |
mbed_official | 340:28d1f895c6fe | 2524 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 2525 | * @{ |
mbed_official | 340:28d1f895c6fe | 2526 | */ |
mbed_official | 340:28d1f895c6fe | 2527 | |
mbed_official | 340:28d1f895c6fe | 2528 | /** |
mbed_official | 340:28d1f895c6fe | 2529 | * @brief Returns the I2C state. |
mbed_official | 340:28d1f895c6fe | 2530 | * @param hi2c : I2C handle |
mbed_official | 340:28d1f895c6fe | 2531 | * @retval HAL state |
mbed_official | 340:28d1f895c6fe | 2532 | */ |
mbed_official | 340:28d1f895c6fe | 2533 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2534 | { |
mbed_official | 340:28d1f895c6fe | 2535 | return hi2c->State; |
mbed_official | 340:28d1f895c6fe | 2536 | } |
mbed_official | 340:28d1f895c6fe | 2537 | |
mbed_official | 340:28d1f895c6fe | 2538 | /** |
mbed_official | 340:28d1f895c6fe | 2539 | * @brief Return the I2C error code |
mbed_official | 340:28d1f895c6fe | 2540 | * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2541 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2542 | * @retval I2C Error Code |
mbed_official | 340:28d1f895c6fe | 2543 | */ |
mbed_official | 340:28d1f895c6fe | 2544 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2545 | { |
mbed_official | 340:28d1f895c6fe | 2546 | return hi2c->ErrorCode; |
mbed_official | 340:28d1f895c6fe | 2547 | } |
mbed_official | 340:28d1f895c6fe | 2548 | |
mbed_official | 340:28d1f895c6fe | 2549 | /** |
mbed_official | 340:28d1f895c6fe | 2550 | * @} |
mbed_official | 340:28d1f895c6fe | 2551 | */ |
mbed_official | 340:28d1f895c6fe | 2552 | |
mbed_official | 340:28d1f895c6fe | 2553 | /** |
mbed_official | 340:28d1f895c6fe | 2554 | * @} |
mbed_official | 340:28d1f895c6fe | 2555 | */ |
mbed_official | 340:28d1f895c6fe | 2556 | |
mbed_official | 340:28d1f895c6fe | 2557 | /** @addtogroup I2C_Private_Functions |
mbed_official | 340:28d1f895c6fe | 2558 | * @{ |
mbed_official | 340:28d1f895c6fe | 2559 | */ |
mbed_official | 340:28d1f895c6fe | 2560 | |
mbed_official | 340:28d1f895c6fe | 2561 | /** |
mbed_official | 340:28d1f895c6fe | 2562 | * @brief Handle Interrupt Flags Master Transmit Mode |
mbed_official | 340:28d1f895c6fe | 2563 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2564 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2565 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2566 | */ |
mbed_official | 340:28d1f895c6fe | 2567 | static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2568 | { |
mbed_official | 340:28d1f895c6fe | 2569 | uint16_t DevAddress; |
mbed_official | 340:28d1f895c6fe | 2570 | |
mbed_official | 340:28d1f895c6fe | 2571 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 2572 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2573 | |
mbed_official | 340:28d1f895c6fe | 2574 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) |
mbed_official | 340:28d1f895c6fe | 2575 | { |
mbed_official | 340:28d1f895c6fe | 2576 | /* Write data to TXDR */ |
mbed_official | 340:28d1f895c6fe | 2577 | hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); |
mbed_official | 340:28d1f895c6fe | 2578 | hi2c->XferSize--; |
mbed_official | 340:28d1f895c6fe | 2579 | hi2c->XferCount--; |
mbed_official | 340:28d1f895c6fe | 2580 | } |
mbed_official | 340:28d1f895c6fe | 2581 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) |
mbed_official | 340:28d1f895c6fe | 2582 | { |
mbed_official | 340:28d1f895c6fe | 2583 | if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0)) |
mbed_official | 340:28d1f895c6fe | 2584 | { |
mbed_official | 340:28d1f895c6fe | 2585 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 340:28d1f895c6fe | 2586 | |
mbed_official | 340:28d1f895c6fe | 2587 | if(hi2c->XferCount > 255) |
mbed_official | 340:28d1f895c6fe | 2588 | { |
mbed_official | 340:28d1f895c6fe | 2589 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 2590 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 2591 | } |
mbed_official | 340:28d1f895c6fe | 2592 | else |
mbed_official | 340:28d1f895c6fe | 2593 | { |
mbed_official | 340:28d1f895c6fe | 2594 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 2595 | hi2c->XferSize = hi2c->XferCount; |
mbed_official | 340:28d1f895c6fe | 2596 | } |
mbed_official | 340:28d1f895c6fe | 2597 | } |
mbed_official | 340:28d1f895c6fe | 2598 | else |
mbed_official | 340:28d1f895c6fe | 2599 | { |
mbed_official | 340:28d1f895c6fe | 2600 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2601 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2602 | |
mbed_official | 340:28d1f895c6fe | 2603 | /* Wrong size Status regarding TCR flag event */ |
mbed_official | 340:28d1f895c6fe | 2604 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
mbed_official | 340:28d1f895c6fe | 2605 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2606 | } |
mbed_official | 340:28d1f895c6fe | 2607 | } |
mbed_official | 340:28d1f895c6fe | 2608 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) |
mbed_official | 340:28d1f895c6fe | 2609 | { |
mbed_official | 340:28d1f895c6fe | 2610 | if(hi2c->XferCount == 0) |
mbed_official | 340:28d1f895c6fe | 2611 | { |
mbed_official | 340:28d1f895c6fe | 2612 | /* Generate Stop */ |
mbed_official | 340:28d1f895c6fe | 2613 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
mbed_official | 340:28d1f895c6fe | 2614 | } |
mbed_official | 340:28d1f895c6fe | 2615 | else |
mbed_official | 340:28d1f895c6fe | 2616 | { |
mbed_official | 340:28d1f895c6fe | 2617 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2618 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2619 | |
mbed_official | 340:28d1f895c6fe | 2620 | /* Wrong size Status regarding TCR flag event */ |
mbed_official | 340:28d1f895c6fe | 2621 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
mbed_official | 340:28d1f895c6fe | 2622 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2623 | } |
mbed_official | 340:28d1f895c6fe | 2624 | } |
mbed_official | 340:28d1f895c6fe | 2625 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
mbed_official | 340:28d1f895c6fe | 2626 | { |
mbed_official | 340:28d1f895c6fe | 2627 | /* Disable ERR, TC, STOP, NACK, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 2628 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI ); |
mbed_official | 340:28d1f895c6fe | 2629 | |
mbed_official | 340:28d1f895c6fe | 2630 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 2631 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2632 | |
mbed_official | 340:28d1f895c6fe | 2633 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 2634 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 2635 | |
mbed_official | 340:28d1f895c6fe | 2636 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2637 | |
mbed_official | 340:28d1f895c6fe | 2638 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2639 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2640 | |
mbed_official | 340:28d1f895c6fe | 2641 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 2642 | { |
mbed_official | 340:28d1f895c6fe | 2643 | HAL_I2C_MemTxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2644 | } |
mbed_official | 340:28d1f895c6fe | 2645 | else |
mbed_official | 340:28d1f895c6fe | 2646 | { |
mbed_official | 340:28d1f895c6fe | 2647 | HAL_I2C_MasterTxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2648 | } |
mbed_official | 340:28d1f895c6fe | 2649 | } |
mbed_official | 340:28d1f895c6fe | 2650 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
mbed_official | 340:28d1f895c6fe | 2651 | { |
mbed_official | 340:28d1f895c6fe | 2652 | /* Clear NACK Flag */ |
mbed_official | 340:28d1f895c6fe | 2653 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 2654 | |
mbed_official | 340:28d1f895c6fe | 2655 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2656 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2657 | |
mbed_official | 340:28d1f895c6fe | 2658 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 2659 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2660 | } |
mbed_official | 340:28d1f895c6fe | 2661 | |
mbed_official | 340:28d1f895c6fe | 2662 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2663 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2664 | |
mbed_official | 340:28d1f895c6fe | 2665 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2666 | } |
mbed_official | 340:28d1f895c6fe | 2667 | |
mbed_official | 340:28d1f895c6fe | 2668 | /** |
mbed_official | 340:28d1f895c6fe | 2669 | * @brief Handle Interrupt Flags Master Receive Mode |
mbed_official | 340:28d1f895c6fe | 2670 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2671 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2672 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2673 | */ |
mbed_official | 340:28d1f895c6fe | 2674 | static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2675 | { |
mbed_official | 340:28d1f895c6fe | 2676 | uint16_t DevAddress; |
mbed_official | 340:28d1f895c6fe | 2677 | |
mbed_official | 340:28d1f895c6fe | 2678 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 2679 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2680 | |
mbed_official | 340:28d1f895c6fe | 2681 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) |
mbed_official | 340:28d1f895c6fe | 2682 | { |
mbed_official | 340:28d1f895c6fe | 2683 | /* Read data from RXDR */ |
mbed_official | 340:28d1f895c6fe | 2684 | (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 2685 | hi2c->XferSize--; |
mbed_official | 340:28d1f895c6fe | 2686 | hi2c->XferCount--; |
mbed_official | 340:28d1f895c6fe | 2687 | } |
mbed_official | 340:28d1f895c6fe | 2688 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) |
mbed_official | 340:28d1f895c6fe | 2689 | { |
mbed_official | 340:28d1f895c6fe | 2690 | if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0)) |
mbed_official | 340:28d1f895c6fe | 2691 | { |
mbed_official | 340:28d1f895c6fe | 2692 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 340:28d1f895c6fe | 2693 | |
mbed_official | 340:28d1f895c6fe | 2694 | if(hi2c->XferCount > 255) |
mbed_official | 340:28d1f895c6fe | 2695 | { |
mbed_official | 340:28d1f895c6fe | 2696 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 2697 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 2698 | } |
mbed_official | 340:28d1f895c6fe | 2699 | else |
mbed_official | 340:28d1f895c6fe | 2700 | { |
mbed_official | 340:28d1f895c6fe | 2701 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 2702 | hi2c->XferSize = hi2c->XferCount; |
mbed_official | 340:28d1f895c6fe | 2703 | } |
mbed_official | 340:28d1f895c6fe | 2704 | } |
mbed_official | 340:28d1f895c6fe | 2705 | else |
mbed_official | 340:28d1f895c6fe | 2706 | { |
mbed_official | 340:28d1f895c6fe | 2707 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2708 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2709 | |
mbed_official | 340:28d1f895c6fe | 2710 | /* Wrong size Status regarding TCR flag event */ |
mbed_official | 340:28d1f895c6fe | 2711 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
mbed_official | 340:28d1f895c6fe | 2712 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2713 | } |
mbed_official | 340:28d1f895c6fe | 2714 | } |
mbed_official | 340:28d1f895c6fe | 2715 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) |
mbed_official | 340:28d1f895c6fe | 2716 | { |
mbed_official | 340:28d1f895c6fe | 2717 | if(hi2c->XferCount == 0) |
mbed_official | 340:28d1f895c6fe | 2718 | { |
mbed_official | 340:28d1f895c6fe | 2719 | /* Generate Stop */ |
mbed_official | 340:28d1f895c6fe | 2720 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
mbed_official | 340:28d1f895c6fe | 2721 | } |
mbed_official | 340:28d1f895c6fe | 2722 | else |
mbed_official | 340:28d1f895c6fe | 2723 | { |
mbed_official | 340:28d1f895c6fe | 2724 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2725 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2726 | |
mbed_official | 340:28d1f895c6fe | 2727 | /* Wrong size Status regarding TCR flag event */ |
mbed_official | 340:28d1f895c6fe | 2728 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
mbed_official | 340:28d1f895c6fe | 2729 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2730 | } |
mbed_official | 340:28d1f895c6fe | 2731 | } |
mbed_official | 340:28d1f895c6fe | 2732 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
mbed_official | 340:28d1f895c6fe | 2733 | { |
mbed_official | 340:28d1f895c6fe | 2734 | /* Disable ERR, TC, STOP, NACK, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 2735 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI ); |
mbed_official | 340:28d1f895c6fe | 2736 | |
mbed_official | 340:28d1f895c6fe | 2737 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 2738 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2739 | |
mbed_official | 340:28d1f895c6fe | 2740 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 2741 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 2742 | |
mbed_official | 340:28d1f895c6fe | 2743 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2744 | |
mbed_official | 340:28d1f895c6fe | 2745 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2746 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2747 | |
mbed_official | 340:28d1f895c6fe | 2748 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) |
mbed_official | 340:28d1f895c6fe | 2749 | { |
mbed_official | 340:28d1f895c6fe | 2750 | HAL_I2C_MemRxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2751 | } |
mbed_official | 340:28d1f895c6fe | 2752 | else |
mbed_official | 340:28d1f895c6fe | 2753 | { |
mbed_official | 340:28d1f895c6fe | 2754 | HAL_I2C_MasterRxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2755 | } |
mbed_official | 340:28d1f895c6fe | 2756 | } |
mbed_official | 340:28d1f895c6fe | 2757 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
mbed_official | 340:28d1f895c6fe | 2758 | { |
mbed_official | 340:28d1f895c6fe | 2759 | /* Clear NACK Flag */ |
mbed_official | 340:28d1f895c6fe | 2760 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 2761 | |
mbed_official | 340:28d1f895c6fe | 2762 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2763 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2764 | |
mbed_official | 340:28d1f895c6fe | 2765 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 2766 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2767 | } |
mbed_official | 340:28d1f895c6fe | 2768 | |
mbed_official | 340:28d1f895c6fe | 2769 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2770 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2771 | |
mbed_official | 340:28d1f895c6fe | 2772 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2773 | |
mbed_official | 340:28d1f895c6fe | 2774 | } |
mbed_official | 340:28d1f895c6fe | 2775 | |
mbed_official | 340:28d1f895c6fe | 2776 | /** |
mbed_official | 340:28d1f895c6fe | 2777 | * @brief Handle Interrupt Flags Slave Transmit Mode |
mbed_official | 340:28d1f895c6fe | 2778 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2779 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2780 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2781 | */ |
mbed_official | 340:28d1f895c6fe | 2782 | static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2783 | { |
mbed_official | 340:28d1f895c6fe | 2784 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 2785 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2786 | |
mbed_official | 340:28d1f895c6fe | 2787 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET) |
mbed_official | 340:28d1f895c6fe | 2788 | { |
mbed_official | 340:28d1f895c6fe | 2789 | /* Check that I2C transfer finished */ |
mbed_official | 340:28d1f895c6fe | 2790 | /* if yes, normal usecase, a NACK is sent by the MASTER when Transfer is finished */ |
mbed_official | 340:28d1f895c6fe | 2791 | /* Mean XferCount == 0*/ |
mbed_official | 340:28d1f895c6fe | 2792 | /* So clear Flag NACKF only */ |
mbed_official | 340:28d1f895c6fe | 2793 | if(hi2c->XferCount == 0) |
mbed_official | 340:28d1f895c6fe | 2794 | { |
mbed_official | 340:28d1f895c6fe | 2795 | /* Clear NACK Flag */ |
mbed_official | 340:28d1f895c6fe | 2796 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 2797 | |
mbed_official | 340:28d1f895c6fe | 2798 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2799 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2800 | } |
mbed_official | 340:28d1f895c6fe | 2801 | else |
mbed_official | 340:28d1f895c6fe | 2802 | { |
mbed_official | 340:28d1f895c6fe | 2803 | /* if no, error usecase, a Non-Acknowledge of last Data is generated by the MASTER*/ |
mbed_official | 340:28d1f895c6fe | 2804 | /* Clear NACK Flag */ |
mbed_official | 340:28d1f895c6fe | 2805 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 2806 | |
mbed_official | 340:28d1f895c6fe | 2807 | /* Set ErrorCode corresponding to a Non-Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 2808 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 2809 | |
mbed_official | 340:28d1f895c6fe | 2810 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2811 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2812 | |
mbed_official | 340:28d1f895c6fe | 2813 | /* Call the Error callback to prevent upper layer */ |
mbed_official | 340:28d1f895c6fe | 2814 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2815 | } |
mbed_official | 340:28d1f895c6fe | 2816 | } |
mbed_official | 340:28d1f895c6fe | 2817 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) |
mbed_official | 340:28d1f895c6fe | 2818 | { |
mbed_official | 340:28d1f895c6fe | 2819 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 2820 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 2821 | } |
mbed_official | 340:28d1f895c6fe | 2822 | /* Check first if STOPF is set */ |
mbed_official | 340:28d1f895c6fe | 2823 | /* to prevent a Write Data in TX buffer */ |
mbed_official | 340:28d1f895c6fe | 2824 | /* which is stuck in TXDR until next */ |
mbed_official | 340:28d1f895c6fe | 2825 | /* communication with Master */ |
mbed_official | 340:28d1f895c6fe | 2826 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
mbed_official | 340:28d1f895c6fe | 2827 | { |
mbed_official | 340:28d1f895c6fe | 2828 | /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 2829 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI ); |
mbed_official | 340:28d1f895c6fe | 2830 | |
mbed_official | 340:28d1f895c6fe | 2831 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 2832 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 2833 | |
mbed_official | 340:28d1f895c6fe | 2834 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 2835 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2836 | |
mbed_official | 340:28d1f895c6fe | 2837 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2838 | |
mbed_official | 340:28d1f895c6fe | 2839 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2840 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2841 | |
mbed_official | 340:28d1f895c6fe | 2842 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2843 | } |
mbed_official | 340:28d1f895c6fe | 2844 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) |
mbed_official | 340:28d1f895c6fe | 2845 | { |
mbed_official | 340:28d1f895c6fe | 2846 | /* Write data to TXDR only if XferCount not reach "0" */ |
mbed_official | 340:28d1f895c6fe | 2847 | /* A TXIS flag can be set, during STOP treatment */ |
mbed_official | 340:28d1f895c6fe | 2848 | if(hi2c->XferCount > 0) |
mbed_official | 340:28d1f895c6fe | 2849 | { |
mbed_official | 340:28d1f895c6fe | 2850 | /* Write data to TXDR */ |
mbed_official | 340:28d1f895c6fe | 2851 | hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); |
mbed_official | 340:28d1f895c6fe | 2852 | hi2c->XferCount--; |
mbed_official | 340:28d1f895c6fe | 2853 | } |
mbed_official | 340:28d1f895c6fe | 2854 | } |
mbed_official | 340:28d1f895c6fe | 2855 | |
mbed_official | 340:28d1f895c6fe | 2856 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2857 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2858 | |
mbed_official | 340:28d1f895c6fe | 2859 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2860 | } |
mbed_official | 340:28d1f895c6fe | 2861 | |
mbed_official | 340:28d1f895c6fe | 2862 | /** |
mbed_official | 340:28d1f895c6fe | 2863 | * @brief Handle Interrupt Flags Slave Receive Mode |
mbed_official | 340:28d1f895c6fe | 2864 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2865 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2866 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2867 | */ |
mbed_official | 340:28d1f895c6fe | 2868 | static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c) |
mbed_official | 340:28d1f895c6fe | 2869 | { |
mbed_official | 340:28d1f895c6fe | 2870 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 2871 | __HAL_LOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2872 | |
mbed_official | 340:28d1f895c6fe | 2873 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET) |
mbed_official | 340:28d1f895c6fe | 2874 | { |
mbed_official | 340:28d1f895c6fe | 2875 | /* Clear NACK Flag */ |
mbed_official | 340:28d1f895c6fe | 2876 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 2877 | |
mbed_official | 340:28d1f895c6fe | 2878 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2879 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2880 | |
mbed_official | 340:28d1f895c6fe | 2881 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 2882 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2883 | } |
mbed_official | 340:28d1f895c6fe | 2884 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) |
mbed_official | 340:28d1f895c6fe | 2885 | { |
mbed_official | 340:28d1f895c6fe | 2886 | /* Clear ADDR flag */ |
mbed_official | 340:28d1f895c6fe | 2887 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); |
mbed_official | 340:28d1f895c6fe | 2888 | } |
mbed_official | 340:28d1f895c6fe | 2889 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) |
mbed_official | 340:28d1f895c6fe | 2890 | { |
mbed_official | 340:28d1f895c6fe | 2891 | /* Read data from RXDR */ |
mbed_official | 340:28d1f895c6fe | 2892 | (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 2893 | hi2c->XferSize--; |
mbed_official | 340:28d1f895c6fe | 2894 | hi2c->XferCount--; |
mbed_official | 340:28d1f895c6fe | 2895 | } |
mbed_official | 340:28d1f895c6fe | 2896 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
mbed_official | 340:28d1f895c6fe | 2897 | { |
mbed_official | 340:28d1f895c6fe | 2898 | /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */ |
mbed_official | 340:28d1f895c6fe | 2899 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_RXI ); |
mbed_official | 340:28d1f895c6fe | 2900 | |
mbed_official | 340:28d1f895c6fe | 2901 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 2902 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 2903 | |
mbed_official | 340:28d1f895c6fe | 2904 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 2905 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 2906 | |
mbed_official | 340:28d1f895c6fe | 2907 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 2908 | |
mbed_official | 340:28d1f895c6fe | 2909 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2910 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2911 | |
mbed_official | 340:28d1f895c6fe | 2912 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 2913 | } |
mbed_official | 340:28d1f895c6fe | 2914 | |
mbed_official | 340:28d1f895c6fe | 2915 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 2916 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 2917 | |
mbed_official | 340:28d1f895c6fe | 2918 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2919 | } |
mbed_official | 340:28d1f895c6fe | 2920 | |
mbed_official | 340:28d1f895c6fe | 2921 | /** |
mbed_official | 340:28d1f895c6fe | 2922 | * @brief Master sends target device address followed by internal memory address for write request. |
mbed_official | 340:28d1f895c6fe | 2923 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2924 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2925 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 2926 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 2927 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 2928 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 2929 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2930 | */ |
mbed_official | 340:28d1f895c6fe | 2931 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 2932 | { |
mbed_official | 340:28d1f895c6fe | 2933 | I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 2934 | |
mbed_official | 340:28d1f895c6fe | 2935 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 2936 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2937 | { |
mbed_official | 340:28d1f895c6fe | 2938 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 2939 | { |
mbed_official | 340:28d1f895c6fe | 2940 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2941 | } |
mbed_official | 340:28d1f895c6fe | 2942 | else |
mbed_official | 340:28d1f895c6fe | 2943 | { |
mbed_official | 340:28d1f895c6fe | 2944 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2945 | } |
mbed_official | 340:28d1f895c6fe | 2946 | } |
mbed_official | 340:28d1f895c6fe | 2947 | |
mbed_official | 340:28d1f895c6fe | 2948 | /* If Memory address size is 8Bit */ |
mbed_official | 340:28d1f895c6fe | 2949 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
mbed_official | 340:28d1f895c6fe | 2950 | { |
mbed_official | 340:28d1f895c6fe | 2951 | /* Send Memory Address */ |
mbed_official | 340:28d1f895c6fe | 2952 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 340:28d1f895c6fe | 2953 | } |
mbed_official | 340:28d1f895c6fe | 2954 | /* If Memory address size is 16Bit */ |
mbed_official | 340:28d1f895c6fe | 2955 | else |
mbed_official | 340:28d1f895c6fe | 2956 | { |
mbed_official | 340:28d1f895c6fe | 2957 | /* Send MSB of Memory Address */ |
mbed_official | 340:28d1f895c6fe | 2958 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_MSB(MemAddress); |
mbed_official | 340:28d1f895c6fe | 2959 | |
mbed_official | 340:28d1f895c6fe | 2960 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 2961 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2962 | { |
mbed_official | 340:28d1f895c6fe | 2963 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 2964 | { |
mbed_official | 340:28d1f895c6fe | 2965 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 2966 | } |
mbed_official | 340:28d1f895c6fe | 2967 | else |
mbed_official | 340:28d1f895c6fe | 2968 | { |
mbed_official | 340:28d1f895c6fe | 2969 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2970 | } |
mbed_official | 340:28d1f895c6fe | 2971 | } |
mbed_official | 340:28d1f895c6fe | 2972 | |
mbed_official | 340:28d1f895c6fe | 2973 | /* Send LSB of Memory Address */ |
mbed_official | 340:28d1f895c6fe | 2974 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 340:28d1f895c6fe | 2975 | } |
mbed_official | 340:28d1f895c6fe | 2976 | |
mbed_official | 340:28d1f895c6fe | 2977 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 2978 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 2979 | { |
mbed_official | 340:28d1f895c6fe | 2980 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 2981 | } |
mbed_official | 340:28d1f895c6fe | 2982 | |
mbed_official | 340:28d1f895c6fe | 2983 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 2984 | } |
mbed_official | 340:28d1f895c6fe | 2985 | |
mbed_official | 340:28d1f895c6fe | 2986 | /** |
mbed_official | 340:28d1f895c6fe | 2987 | * @brief Master sends target device address followed by internal memory address for read request. |
mbed_official | 340:28d1f895c6fe | 2988 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 2989 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 2990 | * @param DevAddress: Target device address |
mbed_official | 340:28d1f895c6fe | 2991 | * @param MemAddress: Internal memory address |
mbed_official | 340:28d1f895c6fe | 2992 | * @param MemAddSize: Size of internal memory address |
mbed_official | 340:28d1f895c6fe | 2993 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 2994 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 2995 | */ |
mbed_official | 340:28d1f895c6fe | 2996 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 2997 | { |
mbed_official | 340:28d1f895c6fe | 2998 | I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); |
mbed_official | 340:28d1f895c6fe | 2999 | |
mbed_official | 340:28d1f895c6fe | 3000 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 3001 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3002 | { |
mbed_official | 340:28d1f895c6fe | 3003 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3004 | { |
mbed_official | 340:28d1f895c6fe | 3005 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 3006 | } |
mbed_official | 340:28d1f895c6fe | 3007 | else |
mbed_official | 340:28d1f895c6fe | 3008 | { |
mbed_official | 340:28d1f895c6fe | 3009 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3010 | } |
mbed_official | 340:28d1f895c6fe | 3011 | } |
mbed_official | 340:28d1f895c6fe | 3012 | |
mbed_official | 340:28d1f895c6fe | 3013 | /* If Memory address size is 8Bit */ |
mbed_official | 340:28d1f895c6fe | 3014 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
mbed_official | 340:28d1f895c6fe | 3015 | { |
mbed_official | 340:28d1f895c6fe | 3016 | /* Send Memory Address */ |
mbed_official | 340:28d1f895c6fe | 3017 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 340:28d1f895c6fe | 3018 | } |
mbed_official | 340:28d1f895c6fe | 3019 | /* If Mememory address size is 16Bit */ |
mbed_official | 340:28d1f895c6fe | 3020 | else |
mbed_official | 340:28d1f895c6fe | 3021 | { |
mbed_official | 340:28d1f895c6fe | 3022 | /* Send MSB of Memory Address */ |
mbed_official | 340:28d1f895c6fe | 3023 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_MSB(MemAddress); |
mbed_official | 340:28d1f895c6fe | 3024 | |
mbed_official | 340:28d1f895c6fe | 3025 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 3026 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3027 | { |
mbed_official | 340:28d1f895c6fe | 3028 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3029 | { |
mbed_official | 340:28d1f895c6fe | 3030 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 3031 | } |
mbed_official | 340:28d1f895c6fe | 3032 | else |
mbed_official | 340:28d1f895c6fe | 3033 | { |
mbed_official | 340:28d1f895c6fe | 3034 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3035 | } |
mbed_official | 340:28d1f895c6fe | 3036 | } |
mbed_official | 340:28d1f895c6fe | 3037 | |
mbed_official | 340:28d1f895c6fe | 3038 | /* Send LSB of Memory Address */ |
mbed_official | 340:28d1f895c6fe | 3039 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 340:28d1f895c6fe | 3040 | } |
mbed_official | 340:28d1f895c6fe | 3041 | |
mbed_official | 340:28d1f895c6fe | 3042 | /* Wait until TC flag is set */ |
mbed_official | 340:28d1f895c6fe | 3043 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3044 | { |
mbed_official | 340:28d1f895c6fe | 3045 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3046 | } |
mbed_official | 340:28d1f895c6fe | 3047 | |
mbed_official | 340:28d1f895c6fe | 3048 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 3049 | } |
mbed_official | 340:28d1f895c6fe | 3050 | |
mbed_official | 340:28d1f895c6fe | 3051 | /** |
mbed_official | 340:28d1f895c6fe | 3052 | * @brief DMA I2C master transmit process complete callback. |
mbed_official | 340:28d1f895c6fe | 3053 | * @param hdma: DMA handle |
mbed_official | 340:28d1f895c6fe | 3054 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3055 | */ |
mbed_official | 340:28d1f895c6fe | 3056 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3057 | { |
mbed_official | 340:28d1f895c6fe | 3058 | uint16_t DevAddress; |
mbed_official | 340:28d1f895c6fe | 3059 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3060 | |
mbed_official | 340:28d1f895c6fe | 3061 | /* Check if last DMA request was done with RELOAD */ |
mbed_official | 340:28d1f895c6fe | 3062 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3063 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3064 | { |
mbed_official | 340:28d1f895c6fe | 3065 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 3066 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3067 | { |
mbed_official | 340:28d1f895c6fe | 3068 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3069 | } |
mbed_official | 340:28d1f895c6fe | 3070 | |
mbed_official | 340:28d1f895c6fe | 3071 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3072 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3073 | |
mbed_official | 340:28d1f895c6fe | 3074 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3075 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3076 | { |
mbed_official | 340:28d1f895c6fe | 3077 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3078 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3079 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3080 | { |
mbed_official | 340:28d1f895c6fe | 3081 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3082 | { |
mbed_official | 340:28d1f895c6fe | 3083 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3084 | } |
mbed_official | 340:28d1f895c6fe | 3085 | else |
mbed_official | 340:28d1f895c6fe | 3086 | { |
mbed_official | 340:28d1f895c6fe | 3087 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3088 | } |
mbed_official | 340:28d1f895c6fe | 3089 | } |
mbed_official | 340:28d1f895c6fe | 3090 | |
mbed_official | 340:28d1f895c6fe | 3091 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3092 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3093 | |
mbed_official | 340:28d1f895c6fe | 3094 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3095 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3096 | |
mbed_official | 340:28d1f895c6fe | 3097 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3098 | |
mbed_official | 340:28d1f895c6fe | 3099 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3100 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3101 | } |
mbed_official | 340:28d1f895c6fe | 3102 | else |
mbed_official | 340:28d1f895c6fe | 3103 | { |
mbed_official | 340:28d1f895c6fe | 3104 | hi2c->pBuffPtr += hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3105 | hi2c->XferCount -= hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3106 | if(hi2c->XferCount > 255) |
mbed_official | 340:28d1f895c6fe | 3107 | { |
mbed_official | 340:28d1f895c6fe | 3108 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 3109 | } |
mbed_official | 340:28d1f895c6fe | 3110 | else |
mbed_official | 340:28d1f895c6fe | 3111 | { |
mbed_official | 340:28d1f895c6fe | 3112 | hi2c->XferSize = hi2c->XferCount; |
mbed_official | 340:28d1f895c6fe | 3113 | } |
mbed_official | 340:28d1f895c6fe | 3114 | |
mbed_official | 340:28d1f895c6fe | 3115 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 340:28d1f895c6fe | 3116 | |
mbed_official | 340:28d1f895c6fe | 3117 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 3118 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 3119 | |
mbed_official | 340:28d1f895c6fe | 3120 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 3121 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3122 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3123 | { |
mbed_official | 340:28d1f895c6fe | 3124 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3125 | } |
mbed_official | 340:28d1f895c6fe | 3126 | else |
mbed_official | 340:28d1f895c6fe | 3127 | { |
mbed_official | 340:28d1f895c6fe | 3128 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3129 | } |
mbed_official | 340:28d1f895c6fe | 3130 | |
mbed_official | 340:28d1f895c6fe | 3131 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 3132 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3133 | { |
mbed_official | 340:28d1f895c6fe | 3134 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3135 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3136 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3137 | { |
mbed_official | 340:28d1f895c6fe | 3138 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3139 | { |
mbed_official | 340:28d1f895c6fe | 3140 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3141 | } |
mbed_official | 340:28d1f895c6fe | 3142 | else |
mbed_official | 340:28d1f895c6fe | 3143 | { |
mbed_official | 340:28d1f895c6fe | 3144 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3145 | } |
mbed_official | 340:28d1f895c6fe | 3146 | } |
mbed_official | 340:28d1f895c6fe | 3147 | |
mbed_official | 340:28d1f895c6fe | 3148 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3149 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3150 | |
mbed_official | 340:28d1f895c6fe | 3151 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3152 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3153 | |
mbed_official | 340:28d1f895c6fe | 3154 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3155 | |
mbed_official | 340:28d1f895c6fe | 3156 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3157 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3158 | } |
mbed_official | 340:28d1f895c6fe | 3159 | else |
mbed_official | 340:28d1f895c6fe | 3160 | { |
mbed_official | 340:28d1f895c6fe | 3161 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3162 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3163 | } |
mbed_official | 340:28d1f895c6fe | 3164 | } |
mbed_official | 340:28d1f895c6fe | 3165 | } |
mbed_official | 340:28d1f895c6fe | 3166 | else |
mbed_official | 340:28d1f895c6fe | 3167 | { |
mbed_official | 340:28d1f895c6fe | 3168 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3169 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3170 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3171 | { |
mbed_official | 340:28d1f895c6fe | 3172 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3173 | { |
mbed_official | 340:28d1f895c6fe | 3174 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3175 | } |
mbed_official | 340:28d1f895c6fe | 3176 | else |
mbed_official | 340:28d1f895c6fe | 3177 | { |
mbed_official | 340:28d1f895c6fe | 3178 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3179 | } |
mbed_official | 340:28d1f895c6fe | 3180 | } |
mbed_official | 340:28d1f895c6fe | 3181 | |
mbed_official | 340:28d1f895c6fe | 3182 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3183 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3184 | |
mbed_official | 340:28d1f895c6fe | 3185 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3186 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3187 | |
mbed_official | 340:28d1f895c6fe | 3188 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3189 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3190 | |
mbed_official | 340:28d1f895c6fe | 3191 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3192 | |
mbed_official | 340:28d1f895c6fe | 3193 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3194 | |
mbed_official | 340:28d1f895c6fe | 3195 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3196 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3197 | { |
mbed_official | 340:28d1f895c6fe | 3198 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3199 | } |
mbed_official | 340:28d1f895c6fe | 3200 | else |
mbed_official | 340:28d1f895c6fe | 3201 | { |
mbed_official | 340:28d1f895c6fe | 3202 | HAL_I2C_MasterTxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3203 | } |
mbed_official | 340:28d1f895c6fe | 3204 | } |
mbed_official | 340:28d1f895c6fe | 3205 | } |
mbed_official | 340:28d1f895c6fe | 3206 | |
mbed_official | 340:28d1f895c6fe | 3207 | /** |
mbed_official | 340:28d1f895c6fe | 3208 | * @brief DMA I2C slave transmit process complete callback. |
mbed_official | 340:28d1f895c6fe | 3209 | * @param hdma: DMA handle |
mbed_official | 340:28d1f895c6fe | 3210 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3211 | */ |
mbed_official | 340:28d1f895c6fe | 3212 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3213 | { |
mbed_official | 340:28d1f895c6fe | 3214 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3215 | |
mbed_official | 340:28d1f895c6fe | 3216 | /* Wait until STOP flag is set */ |
mbed_official | 340:28d1f895c6fe | 3217 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3218 | { |
mbed_official | 340:28d1f895c6fe | 3219 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3220 | { |
mbed_official | 340:28d1f895c6fe | 3221 | /* Normal Use case, a AF is generated by master */ |
mbed_official | 340:28d1f895c6fe | 3222 | /* to inform slave the end of transfer */ |
mbed_official | 340:28d1f895c6fe | 3223 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 3224 | } |
mbed_official | 340:28d1f895c6fe | 3225 | else |
mbed_official | 340:28d1f895c6fe | 3226 | { |
mbed_official | 340:28d1f895c6fe | 3227 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3228 | } |
mbed_official | 340:28d1f895c6fe | 3229 | } |
mbed_official | 340:28d1f895c6fe | 3230 | |
mbed_official | 340:28d1f895c6fe | 3231 | /* Clear STOP flag */ |
mbed_official | 340:28d1f895c6fe | 3232 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3233 | |
mbed_official | 340:28d1f895c6fe | 3234 | /* Wait until BUSY flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3235 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3236 | { |
mbed_official | 340:28d1f895c6fe | 3237 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3238 | } |
mbed_official | 340:28d1f895c6fe | 3239 | |
mbed_official | 340:28d1f895c6fe | 3240 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3241 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3242 | |
mbed_official | 340:28d1f895c6fe | 3243 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3244 | |
mbed_official | 340:28d1f895c6fe | 3245 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3246 | |
mbed_official | 340:28d1f895c6fe | 3247 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3248 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3249 | { |
mbed_official | 340:28d1f895c6fe | 3250 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3251 | } |
mbed_official | 340:28d1f895c6fe | 3252 | else |
mbed_official | 340:28d1f895c6fe | 3253 | { |
mbed_official | 340:28d1f895c6fe | 3254 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3255 | } |
mbed_official | 340:28d1f895c6fe | 3256 | } |
mbed_official | 340:28d1f895c6fe | 3257 | |
mbed_official | 340:28d1f895c6fe | 3258 | /** |
mbed_official | 340:28d1f895c6fe | 3259 | * @brief DMA I2C master receive process complete callback |
mbed_official | 340:28d1f895c6fe | 3260 | * @param hdma: DMA handle |
mbed_official | 340:28d1f895c6fe | 3261 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3262 | */ |
mbed_official | 340:28d1f895c6fe | 3263 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3264 | { |
mbed_official | 340:28d1f895c6fe | 3265 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3266 | uint16_t DevAddress; |
mbed_official | 340:28d1f895c6fe | 3267 | |
mbed_official | 340:28d1f895c6fe | 3268 | /* Check if last DMA request was done with RELOAD */ |
mbed_official | 340:28d1f895c6fe | 3269 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3270 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3271 | { |
mbed_official | 340:28d1f895c6fe | 3272 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 3273 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3274 | { |
mbed_official | 340:28d1f895c6fe | 3275 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3276 | } |
mbed_official | 340:28d1f895c6fe | 3277 | |
mbed_official | 340:28d1f895c6fe | 3278 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3279 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3280 | |
mbed_official | 340:28d1f895c6fe | 3281 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3282 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3283 | { |
mbed_official | 340:28d1f895c6fe | 3284 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3285 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3286 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3287 | { |
mbed_official | 340:28d1f895c6fe | 3288 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3289 | { |
mbed_official | 340:28d1f895c6fe | 3290 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3291 | } |
mbed_official | 340:28d1f895c6fe | 3292 | else |
mbed_official | 340:28d1f895c6fe | 3293 | { |
mbed_official | 340:28d1f895c6fe | 3294 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3295 | } |
mbed_official | 340:28d1f895c6fe | 3296 | } |
mbed_official | 340:28d1f895c6fe | 3297 | |
mbed_official | 340:28d1f895c6fe | 3298 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3299 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3300 | |
mbed_official | 340:28d1f895c6fe | 3301 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3302 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3303 | |
mbed_official | 340:28d1f895c6fe | 3304 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3305 | |
mbed_official | 340:28d1f895c6fe | 3306 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3307 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3308 | } |
mbed_official | 340:28d1f895c6fe | 3309 | else |
mbed_official | 340:28d1f895c6fe | 3310 | { |
mbed_official | 340:28d1f895c6fe | 3311 | hi2c->pBuffPtr += hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3312 | hi2c->XferCount -= hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3313 | if(hi2c->XferCount > 255) |
mbed_official | 340:28d1f895c6fe | 3314 | { |
mbed_official | 340:28d1f895c6fe | 3315 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 3316 | } |
mbed_official | 340:28d1f895c6fe | 3317 | else |
mbed_official | 340:28d1f895c6fe | 3318 | { |
mbed_official | 340:28d1f895c6fe | 3319 | hi2c->XferSize = hi2c->XferCount; |
mbed_official | 340:28d1f895c6fe | 3320 | } |
mbed_official | 340:28d1f895c6fe | 3321 | |
mbed_official | 340:28d1f895c6fe | 3322 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 340:28d1f895c6fe | 3323 | |
mbed_official | 340:28d1f895c6fe | 3324 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 3325 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 3326 | |
mbed_official | 340:28d1f895c6fe | 3327 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 3328 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3329 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3330 | { |
mbed_official | 340:28d1f895c6fe | 3331 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3332 | } |
mbed_official | 340:28d1f895c6fe | 3333 | else |
mbed_official | 340:28d1f895c6fe | 3334 | { |
mbed_official | 340:28d1f895c6fe | 3335 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3336 | } |
mbed_official | 340:28d1f895c6fe | 3337 | |
mbed_official | 340:28d1f895c6fe | 3338 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 3339 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3340 | { |
mbed_official | 340:28d1f895c6fe | 3341 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3342 | } |
mbed_official | 340:28d1f895c6fe | 3343 | |
mbed_official | 340:28d1f895c6fe | 3344 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3345 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3346 | { |
mbed_official | 340:28d1f895c6fe | 3347 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3348 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3349 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3350 | { |
mbed_official | 340:28d1f895c6fe | 3351 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3352 | { |
mbed_official | 340:28d1f895c6fe | 3353 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3354 | } |
mbed_official | 340:28d1f895c6fe | 3355 | else |
mbed_official | 340:28d1f895c6fe | 3356 | { |
mbed_official | 340:28d1f895c6fe | 3357 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3358 | } |
mbed_official | 340:28d1f895c6fe | 3359 | } |
mbed_official | 340:28d1f895c6fe | 3360 | |
mbed_official | 340:28d1f895c6fe | 3361 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3362 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3363 | |
mbed_official | 340:28d1f895c6fe | 3364 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3365 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3366 | |
mbed_official | 340:28d1f895c6fe | 3367 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3368 | |
mbed_official | 340:28d1f895c6fe | 3369 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3370 | |
mbed_official | 340:28d1f895c6fe | 3371 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3372 | } |
mbed_official | 340:28d1f895c6fe | 3373 | else |
mbed_official | 340:28d1f895c6fe | 3374 | { |
mbed_official | 340:28d1f895c6fe | 3375 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3376 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3377 | } |
mbed_official | 340:28d1f895c6fe | 3378 | } |
mbed_official | 340:28d1f895c6fe | 3379 | } |
mbed_official | 340:28d1f895c6fe | 3380 | else |
mbed_official | 340:28d1f895c6fe | 3381 | { |
mbed_official | 340:28d1f895c6fe | 3382 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3383 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3384 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3385 | { |
mbed_official | 340:28d1f895c6fe | 3386 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3387 | { |
mbed_official | 340:28d1f895c6fe | 3388 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3389 | } |
mbed_official | 340:28d1f895c6fe | 3390 | else |
mbed_official | 340:28d1f895c6fe | 3391 | { |
mbed_official | 340:28d1f895c6fe | 3392 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3393 | } |
mbed_official | 340:28d1f895c6fe | 3394 | } |
mbed_official | 340:28d1f895c6fe | 3395 | |
mbed_official | 340:28d1f895c6fe | 3396 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3397 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3398 | |
mbed_official | 340:28d1f895c6fe | 3399 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3400 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3401 | |
mbed_official | 340:28d1f895c6fe | 3402 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3403 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3404 | |
mbed_official | 340:28d1f895c6fe | 3405 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3406 | |
mbed_official | 340:28d1f895c6fe | 3407 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3408 | |
mbed_official | 340:28d1f895c6fe | 3409 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3410 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3411 | { |
mbed_official | 340:28d1f895c6fe | 3412 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3413 | } |
mbed_official | 340:28d1f895c6fe | 3414 | else |
mbed_official | 340:28d1f895c6fe | 3415 | { |
mbed_official | 340:28d1f895c6fe | 3416 | HAL_I2C_MasterRxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3417 | } |
mbed_official | 340:28d1f895c6fe | 3418 | } |
mbed_official | 340:28d1f895c6fe | 3419 | } |
mbed_official | 340:28d1f895c6fe | 3420 | |
mbed_official | 340:28d1f895c6fe | 3421 | /** |
mbed_official | 340:28d1f895c6fe | 3422 | * @brief DMA I2C slave receive process complete callback. |
mbed_official | 340:28d1f895c6fe | 3423 | * @param hdma: DMA handle |
mbed_official | 340:28d1f895c6fe | 3424 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3425 | */ |
mbed_official | 340:28d1f895c6fe | 3426 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3427 | { |
mbed_official | 340:28d1f895c6fe | 3428 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3429 | |
mbed_official | 340:28d1f895c6fe | 3430 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3431 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3432 | { |
mbed_official | 340:28d1f895c6fe | 3433 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3434 | { |
mbed_official | 340:28d1f895c6fe | 3435 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3436 | } |
mbed_official | 340:28d1f895c6fe | 3437 | else |
mbed_official | 340:28d1f895c6fe | 3438 | { |
mbed_official | 340:28d1f895c6fe | 3439 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3440 | } |
mbed_official | 340:28d1f895c6fe | 3441 | } |
mbed_official | 340:28d1f895c6fe | 3442 | |
mbed_official | 340:28d1f895c6fe | 3443 | /* Clear STOPF flag */ |
mbed_official | 340:28d1f895c6fe | 3444 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3445 | |
mbed_official | 340:28d1f895c6fe | 3446 | /* Wait until BUSY flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3447 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3448 | { |
mbed_official | 340:28d1f895c6fe | 3449 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3450 | } |
mbed_official | 340:28d1f895c6fe | 3451 | |
mbed_official | 340:28d1f895c6fe | 3452 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3453 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3454 | |
mbed_official | 340:28d1f895c6fe | 3455 | /* Disable Address Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 3456 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 3457 | |
mbed_official | 340:28d1f895c6fe | 3458 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3459 | |
mbed_official | 340:28d1f895c6fe | 3460 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3461 | |
mbed_official | 340:28d1f895c6fe | 3462 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3463 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3464 | { |
mbed_official | 340:28d1f895c6fe | 3465 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3466 | } |
mbed_official | 340:28d1f895c6fe | 3467 | else |
mbed_official | 340:28d1f895c6fe | 3468 | { |
mbed_official | 340:28d1f895c6fe | 3469 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3470 | } |
mbed_official | 340:28d1f895c6fe | 3471 | } |
mbed_official | 340:28d1f895c6fe | 3472 | |
mbed_official | 340:28d1f895c6fe | 3473 | /** |
mbed_official | 340:28d1f895c6fe | 3474 | * @brief DMA I2C Memory Write process complete callback |
mbed_official | 340:28d1f895c6fe | 3475 | * @param hdma : DMA handle |
mbed_official | 340:28d1f895c6fe | 3476 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3477 | */ |
mbed_official | 340:28d1f895c6fe | 3478 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3479 | { |
mbed_official | 340:28d1f895c6fe | 3480 | uint16_t DevAddress; |
mbed_official | 340:28d1f895c6fe | 3481 | I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3482 | |
mbed_official | 340:28d1f895c6fe | 3483 | /* Check if last DMA request was done with RELOAD */ |
mbed_official | 340:28d1f895c6fe | 3484 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3485 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3486 | { |
mbed_official | 340:28d1f895c6fe | 3487 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 3488 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3489 | { |
mbed_official | 340:28d1f895c6fe | 3490 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3491 | } |
mbed_official | 340:28d1f895c6fe | 3492 | |
mbed_official | 340:28d1f895c6fe | 3493 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3494 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3495 | |
mbed_official | 340:28d1f895c6fe | 3496 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3497 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3498 | { |
mbed_official | 340:28d1f895c6fe | 3499 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3500 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3501 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3502 | { |
mbed_official | 340:28d1f895c6fe | 3503 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3504 | { |
mbed_official | 340:28d1f895c6fe | 3505 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3506 | } |
mbed_official | 340:28d1f895c6fe | 3507 | else |
mbed_official | 340:28d1f895c6fe | 3508 | { |
mbed_official | 340:28d1f895c6fe | 3509 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3510 | } |
mbed_official | 340:28d1f895c6fe | 3511 | } |
mbed_official | 340:28d1f895c6fe | 3512 | |
mbed_official | 340:28d1f895c6fe | 3513 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3514 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3515 | |
mbed_official | 340:28d1f895c6fe | 3516 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3517 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3518 | |
mbed_official | 340:28d1f895c6fe | 3519 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3520 | |
mbed_official | 340:28d1f895c6fe | 3521 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3522 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3523 | } |
mbed_official | 340:28d1f895c6fe | 3524 | else |
mbed_official | 340:28d1f895c6fe | 3525 | { |
mbed_official | 340:28d1f895c6fe | 3526 | hi2c->pBuffPtr += hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3527 | hi2c->XferCount -= hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3528 | if(hi2c->XferCount > 255) |
mbed_official | 340:28d1f895c6fe | 3529 | { |
mbed_official | 340:28d1f895c6fe | 3530 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 3531 | } |
mbed_official | 340:28d1f895c6fe | 3532 | else |
mbed_official | 340:28d1f895c6fe | 3533 | { |
mbed_official | 340:28d1f895c6fe | 3534 | hi2c->XferSize = hi2c->XferCount; |
mbed_official | 340:28d1f895c6fe | 3535 | } |
mbed_official | 340:28d1f895c6fe | 3536 | |
mbed_official | 340:28d1f895c6fe | 3537 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 340:28d1f895c6fe | 3538 | |
mbed_official | 340:28d1f895c6fe | 3539 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 3540 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 3541 | |
mbed_official | 340:28d1f895c6fe | 3542 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 3543 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3544 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3545 | { |
mbed_official | 340:28d1f895c6fe | 3546 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3547 | } |
mbed_official | 340:28d1f895c6fe | 3548 | else |
mbed_official | 340:28d1f895c6fe | 3549 | { |
mbed_official | 340:28d1f895c6fe | 3550 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3551 | } |
mbed_official | 340:28d1f895c6fe | 3552 | |
mbed_official | 340:28d1f895c6fe | 3553 | /* Wait until TXIS flag is set */ |
mbed_official | 340:28d1f895c6fe | 3554 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3555 | { |
mbed_official | 340:28d1f895c6fe | 3556 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3557 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3558 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3559 | { |
mbed_official | 340:28d1f895c6fe | 3560 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3561 | { |
mbed_official | 340:28d1f895c6fe | 3562 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3563 | } |
mbed_official | 340:28d1f895c6fe | 3564 | else |
mbed_official | 340:28d1f895c6fe | 3565 | { |
mbed_official | 340:28d1f895c6fe | 3566 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3567 | } |
mbed_official | 340:28d1f895c6fe | 3568 | } |
mbed_official | 340:28d1f895c6fe | 3569 | |
mbed_official | 340:28d1f895c6fe | 3570 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3571 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3572 | |
mbed_official | 340:28d1f895c6fe | 3573 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3574 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3575 | |
mbed_official | 340:28d1f895c6fe | 3576 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3577 | |
mbed_official | 340:28d1f895c6fe | 3578 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3579 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3580 | } |
mbed_official | 340:28d1f895c6fe | 3581 | else |
mbed_official | 340:28d1f895c6fe | 3582 | { |
mbed_official | 340:28d1f895c6fe | 3583 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3584 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3585 | } |
mbed_official | 340:28d1f895c6fe | 3586 | } |
mbed_official | 340:28d1f895c6fe | 3587 | } |
mbed_official | 340:28d1f895c6fe | 3588 | else |
mbed_official | 340:28d1f895c6fe | 3589 | { |
mbed_official | 340:28d1f895c6fe | 3590 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3591 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3592 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3593 | { |
mbed_official | 340:28d1f895c6fe | 3594 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3595 | { |
mbed_official | 340:28d1f895c6fe | 3596 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3597 | } |
mbed_official | 340:28d1f895c6fe | 3598 | else |
mbed_official | 340:28d1f895c6fe | 3599 | { |
mbed_official | 340:28d1f895c6fe | 3600 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3601 | } |
mbed_official | 340:28d1f895c6fe | 3602 | } |
mbed_official | 340:28d1f895c6fe | 3603 | |
mbed_official | 340:28d1f895c6fe | 3604 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3605 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3606 | |
mbed_official | 340:28d1f895c6fe | 3607 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3608 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3609 | |
mbed_official | 340:28d1f895c6fe | 3610 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3611 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3612 | |
mbed_official | 340:28d1f895c6fe | 3613 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3614 | |
mbed_official | 340:28d1f895c6fe | 3615 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3616 | |
mbed_official | 340:28d1f895c6fe | 3617 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3618 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3619 | { |
mbed_official | 340:28d1f895c6fe | 3620 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3621 | } |
mbed_official | 340:28d1f895c6fe | 3622 | else |
mbed_official | 340:28d1f895c6fe | 3623 | { |
mbed_official | 340:28d1f895c6fe | 3624 | HAL_I2C_MemTxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3625 | } |
mbed_official | 340:28d1f895c6fe | 3626 | } |
mbed_official | 340:28d1f895c6fe | 3627 | } |
mbed_official | 340:28d1f895c6fe | 3628 | |
mbed_official | 340:28d1f895c6fe | 3629 | /** |
mbed_official | 340:28d1f895c6fe | 3630 | * @brief DMA I2C Memory Read process complete callback |
mbed_official | 340:28d1f895c6fe | 3631 | * @param hdma: DMA handle |
mbed_official | 340:28d1f895c6fe | 3632 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3633 | */ |
mbed_official | 340:28d1f895c6fe | 3634 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3635 | { |
mbed_official | 340:28d1f895c6fe | 3636 | I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3637 | uint16_t DevAddress; |
mbed_official | 340:28d1f895c6fe | 3638 | |
mbed_official | 340:28d1f895c6fe | 3639 | /* Check if last DMA request was done with RELOAD */ |
mbed_official | 340:28d1f895c6fe | 3640 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3641 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3642 | { |
mbed_official | 340:28d1f895c6fe | 3643 | /* Wait until TCR flag is set */ |
mbed_official | 340:28d1f895c6fe | 3644 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3645 | { |
mbed_official | 340:28d1f895c6fe | 3646 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3647 | } |
mbed_official | 340:28d1f895c6fe | 3648 | |
mbed_official | 340:28d1f895c6fe | 3649 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3650 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3651 | |
mbed_official | 340:28d1f895c6fe | 3652 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3653 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3654 | { |
mbed_official | 340:28d1f895c6fe | 3655 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3656 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3657 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3658 | { |
mbed_official | 340:28d1f895c6fe | 3659 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3660 | { |
mbed_official | 340:28d1f895c6fe | 3661 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3662 | } |
mbed_official | 340:28d1f895c6fe | 3663 | else |
mbed_official | 340:28d1f895c6fe | 3664 | { |
mbed_official | 340:28d1f895c6fe | 3665 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3666 | } |
mbed_official | 340:28d1f895c6fe | 3667 | } |
mbed_official | 340:28d1f895c6fe | 3668 | |
mbed_official | 340:28d1f895c6fe | 3669 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3670 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3671 | |
mbed_official | 340:28d1f895c6fe | 3672 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3673 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3674 | |
mbed_official | 340:28d1f895c6fe | 3675 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3676 | |
mbed_official | 340:28d1f895c6fe | 3677 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3678 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3679 | } |
mbed_official | 340:28d1f895c6fe | 3680 | else |
mbed_official | 340:28d1f895c6fe | 3681 | { |
mbed_official | 340:28d1f895c6fe | 3682 | hi2c->pBuffPtr += hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3683 | hi2c->XferCount -= hi2c->XferSize; |
mbed_official | 340:28d1f895c6fe | 3684 | if(hi2c->XferCount > 255) |
mbed_official | 340:28d1f895c6fe | 3685 | { |
mbed_official | 340:28d1f895c6fe | 3686 | hi2c->XferSize = 255; |
mbed_official | 340:28d1f895c6fe | 3687 | } |
mbed_official | 340:28d1f895c6fe | 3688 | else |
mbed_official | 340:28d1f895c6fe | 3689 | { |
mbed_official | 340:28d1f895c6fe | 3690 | hi2c->XferSize = hi2c->XferCount; |
mbed_official | 340:28d1f895c6fe | 3691 | } |
mbed_official | 340:28d1f895c6fe | 3692 | |
mbed_official | 340:28d1f895c6fe | 3693 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
mbed_official | 340:28d1f895c6fe | 3694 | |
mbed_official | 340:28d1f895c6fe | 3695 | /* Enable the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 3696 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); |
mbed_official | 340:28d1f895c6fe | 3697 | |
mbed_official | 340:28d1f895c6fe | 3698 | /* Send Slave Address */ |
mbed_official | 340:28d1f895c6fe | 3699 | /* Set NBYTES to write and reload if size > 255 */ |
mbed_official | 340:28d1f895c6fe | 3700 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
mbed_official | 340:28d1f895c6fe | 3701 | { |
mbed_official | 340:28d1f895c6fe | 3702 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3703 | } |
mbed_official | 340:28d1f895c6fe | 3704 | else |
mbed_official | 340:28d1f895c6fe | 3705 | { |
mbed_official | 340:28d1f895c6fe | 3706 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
mbed_official | 340:28d1f895c6fe | 3707 | } |
mbed_official | 340:28d1f895c6fe | 3708 | |
mbed_official | 340:28d1f895c6fe | 3709 | /* Wait until RXNE flag is set */ |
mbed_official | 340:28d1f895c6fe | 3710 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3711 | { |
mbed_official | 340:28d1f895c6fe | 3712 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3713 | } |
mbed_official | 340:28d1f895c6fe | 3714 | |
mbed_official | 340:28d1f895c6fe | 3715 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3716 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3717 | { |
mbed_official | 340:28d1f895c6fe | 3718 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3719 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3720 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3721 | { |
mbed_official | 340:28d1f895c6fe | 3722 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3723 | { |
mbed_official | 340:28d1f895c6fe | 3724 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3725 | } |
mbed_official | 340:28d1f895c6fe | 3726 | else |
mbed_official | 340:28d1f895c6fe | 3727 | { |
mbed_official | 340:28d1f895c6fe | 3728 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3729 | } |
mbed_official | 340:28d1f895c6fe | 3730 | } |
mbed_official | 340:28d1f895c6fe | 3731 | |
mbed_official | 340:28d1f895c6fe | 3732 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3733 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3734 | |
mbed_official | 340:28d1f895c6fe | 3735 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3736 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3737 | |
mbed_official | 340:28d1f895c6fe | 3738 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3739 | |
mbed_official | 340:28d1f895c6fe | 3740 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3741 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3742 | } |
mbed_official | 340:28d1f895c6fe | 3743 | else |
mbed_official | 340:28d1f895c6fe | 3744 | { |
mbed_official | 340:28d1f895c6fe | 3745 | /* Enable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3746 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3747 | } |
mbed_official | 340:28d1f895c6fe | 3748 | } |
mbed_official | 340:28d1f895c6fe | 3749 | } |
mbed_official | 340:28d1f895c6fe | 3750 | else |
mbed_official | 340:28d1f895c6fe | 3751 | { |
mbed_official | 340:28d1f895c6fe | 3752 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
mbed_official | 340:28d1f895c6fe | 3753 | /* Wait until STOPF flag is reset */ |
mbed_official | 340:28d1f895c6fe | 3754 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3755 | { |
mbed_official | 340:28d1f895c6fe | 3756 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 340:28d1f895c6fe | 3757 | { |
mbed_official | 340:28d1f895c6fe | 3758 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 3759 | } |
mbed_official | 340:28d1f895c6fe | 3760 | else |
mbed_official | 340:28d1f895c6fe | 3761 | { |
mbed_official | 340:28d1f895c6fe | 3762 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3763 | } |
mbed_official | 340:28d1f895c6fe | 3764 | } |
mbed_official | 340:28d1f895c6fe | 3765 | |
mbed_official | 340:28d1f895c6fe | 3766 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3767 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3768 | |
mbed_official | 340:28d1f895c6fe | 3769 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3770 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3771 | |
mbed_official | 340:28d1f895c6fe | 3772 | /* Disable DMA Request */ |
mbed_official | 340:28d1f895c6fe | 3773 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
mbed_official | 340:28d1f895c6fe | 3774 | |
mbed_official | 340:28d1f895c6fe | 3775 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3776 | |
mbed_official | 340:28d1f895c6fe | 3777 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3778 | |
mbed_official | 340:28d1f895c6fe | 3779 | /* Check if Errors has been detected during transfer */ |
mbed_official | 340:28d1f895c6fe | 3780 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 340:28d1f895c6fe | 3781 | { |
mbed_official | 340:28d1f895c6fe | 3782 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3783 | } |
mbed_official | 340:28d1f895c6fe | 3784 | else |
mbed_official | 340:28d1f895c6fe | 3785 | { |
mbed_official | 340:28d1f895c6fe | 3786 | HAL_I2C_MemRxCpltCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3787 | } |
mbed_official | 340:28d1f895c6fe | 3788 | } |
mbed_official | 340:28d1f895c6fe | 3789 | } |
mbed_official | 340:28d1f895c6fe | 3790 | |
mbed_official | 340:28d1f895c6fe | 3791 | /** |
mbed_official | 340:28d1f895c6fe | 3792 | * @brief DMA I2C communication error callback. |
mbed_official | 340:28d1f895c6fe | 3793 | * @param hdma : DMA handle |
mbed_official | 340:28d1f895c6fe | 3794 | * @retval None |
mbed_official | 340:28d1f895c6fe | 3795 | */ |
mbed_official | 340:28d1f895c6fe | 3796 | static void I2C_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 3797 | { |
mbed_official | 340:28d1f895c6fe | 3798 | I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 3799 | |
mbed_official | 340:28d1f895c6fe | 3800 | /* Disable Acknowledge */ |
mbed_official | 340:28d1f895c6fe | 3801 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
mbed_official | 340:28d1f895c6fe | 3802 | |
mbed_official | 340:28d1f895c6fe | 3803 | hi2c->XferCount = 0; |
mbed_official | 340:28d1f895c6fe | 3804 | |
mbed_official | 340:28d1f895c6fe | 3805 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3806 | |
mbed_official | 340:28d1f895c6fe | 3807 | hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; |
mbed_official | 340:28d1f895c6fe | 3808 | |
mbed_official | 340:28d1f895c6fe | 3809 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 340:28d1f895c6fe | 3810 | } |
mbed_official | 340:28d1f895c6fe | 3811 | |
mbed_official | 340:28d1f895c6fe | 3812 | /** |
mbed_official | 340:28d1f895c6fe | 3813 | * @brief This function handles I2C Communication Timeout. |
mbed_official | 340:28d1f895c6fe | 3814 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 3815 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 3816 | * @param Flag: specifies the I2C flag to check. |
mbed_official | 340:28d1f895c6fe | 3817 | * @param Status: The new Flag status (SET or RESET). |
mbed_official | 340:28d1f895c6fe | 3818 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 3819 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 3820 | */ |
mbed_official | 340:28d1f895c6fe | 3821 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 3822 | { |
mbed_official | 340:28d1f895c6fe | 3823 | uint32_t tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 3824 | |
mbed_official | 340:28d1f895c6fe | 3825 | /* Wait until flag is set */ |
mbed_official | 340:28d1f895c6fe | 3826 | if(Status == RESET) |
mbed_official | 340:28d1f895c6fe | 3827 | { |
mbed_official | 340:28d1f895c6fe | 3828 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) |
mbed_official | 340:28d1f895c6fe | 3829 | { |
mbed_official | 340:28d1f895c6fe | 3830 | /* Check for the Timeout */ |
mbed_official | 340:28d1f895c6fe | 3831 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 3832 | { |
mbed_official | 340:28d1f895c6fe | 3833 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 3834 | { |
mbed_official | 340:28d1f895c6fe | 3835 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3836 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 3837 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 3838 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3839 | } |
mbed_official | 340:28d1f895c6fe | 3840 | } |
mbed_official | 340:28d1f895c6fe | 3841 | } |
mbed_official | 340:28d1f895c6fe | 3842 | } |
mbed_official | 340:28d1f895c6fe | 3843 | else |
mbed_official | 340:28d1f895c6fe | 3844 | { |
mbed_official | 340:28d1f895c6fe | 3845 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET) |
mbed_official | 340:28d1f895c6fe | 3846 | { |
mbed_official | 340:28d1f895c6fe | 3847 | /* Check for the Timeout */ |
mbed_official | 340:28d1f895c6fe | 3848 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 3849 | { |
mbed_official | 340:28d1f895c6fe | 3850 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 3851 | { |
mbed_official | 340:28d1f895c6fe | 3852 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3853 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 3854 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 3855 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3856 | } |
mbed_official | 340:28d1f895c6fe | 3857 | } |
mbed_official | 340:28d1f895c6fe | 3858 | } |
mbed_official | 340:28d1f895c6fe | 3859 | } |
mbed_official | 340:28d1f895c6fe | 3860 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 3861 | } |
mbed_official | 340:28d1f895c6fe | 3862 | |
mbed_official | 340:28d1f895c6fe | 3863 | /** |
mbed_official | 340:28d1f895c6fe | 3864 | * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. |
mbed_official | 340:28d1f895c6fe | 3865 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 3866 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 3867 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 3868 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 3869 | */ |
mbed_official | 340:28d1f895c6fe | 3870 | static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 3871 | { |
mbed_official | 340:28d1f895c6fe | 3872 | uint32_t tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 3873 | |
mbed_official | 340:28d1f895c6fe | 3874 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) |
mbed_official | 340:28d1f895c6fe | 3875 | { |
mbed_official | 340:28d1f895c6fe | 3876 | /* Check if a NACK is detected */ |
mbed_official | 340:28d1f895c6fe | 3877 | if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3878 | { |
mbed_official | 340:28d1f895c6fe | 3879 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 3880 | } |
mbed_official | 340:28d1f895c6fe | 3881 | |
mbed_official | 340:28d1f895c6fe | 3882 | /* Check for the Timeout */ |
mbed_official | 340:28d1f895c6fe | 3883 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 3884 | { |
mbed_official | 340:28d1f895c6fe | 3885 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 3886 | { |
mbed_official | 340:28d1f895c6fe | 3887 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3888 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3889 | |
mbed_official | 340:28d1f895c6fe | 3890 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 3891 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 3892 | |
mbed_official | 340:28d1f895c6fe | 3893 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3894 | } |
mbed_official | 340:28d1f895c6fe | 3895 | } |
mbed_official | 340:28d1f895c6fe | 3896 | } |
mbed_official | 340:28d1f895c6fe | 3897 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 3898 | } |
mbed_official | 340:28d1f895c6fe | 3899 | |
mbed_official | 340:28d1f895c6fe | 3900 | /** |
mbed_official | 340:28d1f895c6fe | 3901 | * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. |
mbed_official | 340:28d1f895c6fe | 3902 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 3903 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 3904 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 3905 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 3906 | */ |
mbed_official | 340:28d1f895c6fe | 3907 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 3908 | { |
mbed_official | 340:28d1f895c6fe | 3909 | uint32_t tickstart = 0x00; |
mbed_official | 340:28d1f895c6fe | 3910 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 3911 | |
mbed_official | 340:28d1f895c6fe | 3912 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) |
mbed_official | 340:28d1f895c6fe | 3913 | { |
mbed_official | 340:28d1f895c6fe | 3914 | /* Check if a NACK is detected */ |
mbed_official | 340:28d1f895c6fe | 3915 | if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 3916 | { |
mbed_official | 340:28d1f895c6fe | 3917 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 3918 | } |
mbed_official | 340:28d1f895c6fe | 3919 | |
mbed_official | 340:28d1f895c6fe | 3920 | /* Check for the Timeout */ |
mbed_official | 340:28d1f895c6fe | 3921 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 3922 | { |
mbed_official | 340:28d1f895c6fe | 3923 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3924 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3925 | |
mbed_official | 340:28d1f895c6fe | 3926 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 3927 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 3928 | |
mbed_official | 340:28d1f895c6fe | 3929 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3930 | } |
mbed_official | 340:28d1f895c6fe | 3931 | } |
mbed_official | 340:28d1f895c6fe | 3932 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 3933 | } |
mbed_official | 340:28d1f895c6fe | 3934 | |
mbed_official | 340:28d1f895c6fe | 3935 | /** |
mbed_official | 340:28d1f895c6fe | 3936 | * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. |
mbed_official | 340:28d1f895c6fe | 3937 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 3938 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 3939 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 3940 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 3941 | */ |
mbed_official | 340:28d1f895c6fe | 3942 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 3943 | { |
mbed_official | 340:28d1f895c6fe | 3944 | uint32_t tickstart = 0x00; |
mbed_official | 340:28d1f895c6fe | 3945 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 3946 | |
mbed_official | 340:28d1f895c6fe | 3947 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) |
mbed_official | 340:28d1f895c6fe | 3948 | { |
mbed_official | 340:28d1f895c6fe | 3949 | /* Check if a STOPF is detected */ |
mbed_official | 340:28d1f895c6fe | 3950 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
mbed_official | 340:28d1f895c6fe | 3951 | { |
mbed_official | 340:28d1f895c6fe | 3952 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 3953 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 3954 | |
mbed_official | 340:28d1f895c6fe | 3955 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 3956 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 3957 | |
mbed_official | 340:28d1f895c6fe | 3958 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 3959 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3960 | |
mbed_official | 340:28d1f895c6fe | 3961 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 3962 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 3963 | |
mbed_official | 340:28d1f895c6fe | 3964 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 3965 | } |
mbed_official | 340:28d1f895c6fe | 3966 | |
mbed_official | 340:28d1f895c6fe | 3967 | /* Check for the Timeout */ |
mbed_official | 340:28d1f895c6fe | 3968 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 3969 | { |
mbed_official | 340:28d1f895c6fe | 3970 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3971 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 3972 | |
mbed_official | 340:28d1f895c6fe | 3973 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 3974 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 3975 | |
mbed_official | 340:28d1f895c6fe | 3976 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 3977 | } |
mbed_official | 340:28d1f895c6fe | 3978 | } |
mbed_official | 340:28d1f895c6fe | 3979 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 3980 | } |
mbed_official | 340:28d1f895c6fe | 3981 | |
mbed_official | 340:28d1f895c6fe | 3982 | /** |
mbed_official | 340:28d1f895c6fe | 3983 | * @brief This function handles Acknowledge failed detection during an I2C Communication. |
mbed_official | 340:28d1f895c6fe | 3984 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 3985 | * the configuration information for the specified I2C. |
mbed_official | 340:28d1f895c6fe | 3986 | * @param Timeout: Timeout duration |
mbed_official | 340:28d1f895c6fe | 3987 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 3988 | */ |
mbed_official | 340:28d1f895c6fe | 3989 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 3990 | { |
mbed_official | 340:28d1f895c6fe | 3991 | uint32_t tickstart = 0x00; |
mbed_official | 340:28d1f895c6fe | 3992 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 3993 | |
mbed_official | 340:28d1f895c6fe | 3994 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
mbed_official | 340:28d1f895c6fe | 3995 | { |
mbed_official | 340:28d1f895c6fe | 3996 | /* Generate stop if necessary only in case of I2C peripheral in MASTER mode */ |
mbed_official | 340:28d1f895c6fe | 3997 | if((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 3998 | || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)) |
mbed_official | 340:28d1f895c6fe | 3999 | { |
mbed_official | 340:28d1f895c6fe | 4000 | /* No need to generate the STOP condition if AUTOEND mode is enabled */ |
mbed_official | 340:28d1f895c6fe | 4001 | /* Generate the STOP condition only in case of SOFTEND mode is enabled */ |
mbed_official | 340:28d1f895c6fe | 4002 | if((hi2c->Instance->CR2 & I2C_AUTOEND_MODE) != I2C_AUTOEND_MODE) |
mbed_official | 340:28d1f895c6fe | 4003 | { |
mbed_official | 340:28d1f895c6fe | 4004 | /* Generate Stop */ |
mbed_official | 340:28d1f895c6fe | 4005 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
mbed_official | 340:28d1f895c6fe | 4006 | } |
mbed_official | 340:28d1f895c6fe | 4007 | } |
mbed_official | 340:28d1f895c6fe | 4008 | |
mbed_official | 340:28d1f895c6fe | 4009 | /* Wait until STOP Flag is reset */ |
mbed_official | 340:28d1f895c6fe | 4010 | /* AutoEnd should be initiate after AF */ |
mbed_official | 340:28d1f895c6fe | 4011 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) |
mbed_official | 340:28d1f895c6fe | 4012 | { |
mbed_official | 340:28d1f895c6fe | 4013 | /* Check for the Timeout */ |
mbed_official | 340:28d1f895c6fe | 4014 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 4015 | { |
mbed_official | 340:28d1f895c6fe | 4016 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 4017 | { |
mbed_official | 340:28d1f895c6fe | 4018 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 4019 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 4020 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 4021 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 4022 | } |
mbed_official | 340:28d1f895c6fe | 4023 | } |
mbed_official | 340:28d1f895c6fe | 4024 | } |
mbed_official | 340:28d1f895c6fe | 4025 | |
mbed_official | 340:28d1f895c6fe | 4026 | /* Clear NACKF Flag */ |
mbed_official | 340:28d1f895c6fe | 4027 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 340:28d1f895c6fe | 4028 | |
mbed_official | 340:28d1f895c6fe | 4029 | /* Clear STOP Flag */ |
mbed_official | 340:28d1f895c6fe | 4030 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 340:28d1f895c6fe | 4031 | |
mbed_official | 340:28d1f895c6fe | 4032 | /* Clear Configuration Register 2 */ |
mbed_official | 340:28d1f895c6fe | 4033 | __HAL_I2C_RESET_CR2(hi2c); |
mbed_official | 340:28d1f895c6fe | 4034 | |
mbed_official | 340:28d1f895c6fe | 4035 | hi2c->ErrorCode = HAL_I2C_ERROR_AF; |
mbed_official | 340:28d1f895c6fe | 4036 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 4037 | |
mbed_official | 340:28d1f895c6fe | 4038 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 4039 | __HAL_UNLOCK(hi2c); |
mbed_official | 340:28d1f895c6fe | 4040 | |
mbed_official | 340:28d1f895c6fe | 4041 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 4042 | } |
mbed_official | 340:28d1f895c6fe | 4043 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 4044 | } |
mbed_official | 340:28d1f895c6fe | 4045 | |
mbed_official | 340:28d1f895c6fe | 4046 | /** |
mbed_official | 340:28d1f895c6fe | 4047 | * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). |
mbed_official | 340:28d1f895c6fe | 4048 | * @param hi2c: I2C handle. |
mbed_official | 340:28d1f895c6fe | 4049 | * @param DevAddress: specifies the slave address to be programmed. |
mbed_official | 340:28d1f895c6fe | 4050 | * @param Size: specifies the number of bytes to be programmed. |
mbed_official | 340:28d1f895c6fe | 4051 | * This parameter must be a value between 0 and 255. |
mbed_official | 340:28d1f895c6fe | 4052 | * @param Mode: new state of the I2C START condition generation. |
mbed_official | 340:28d1f895c6fe | 4053 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 4054 | * @arg I2C_RELOAD_MODE: Enable Reload mode . |
mbed_official | 340:28d1f895c6fe | 4055 | * @arg I2C_AUTOEND_MODE: Enable Automatic end mode. |
mbed_official | 340:28d1f895c6fe | 4056 | * @arg I2C_SOFTEND_MODE: Enable Software end mode. |
mbed_official | 340:28d1f895c6fe | 4057 | * @param Request: new state of the I2C START condition generation. |
mbed_official | 340:28d1f895c6fe | 4058 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 4059 | * @arg I2C_NO_STARTSTOP: Don't Generate stop and start condition. |
mbed_official | 340:28d1f895c6fe | 4060 | * @arg I2C_GENERATE_STOP: Generate stop condition (Size should be set to 0). |
mbed_official | 340:28d1f895c6fe | 4061 | * @arg I2C_GENERATE_START_READ: Generate Restart for read request. |
mbed_official | 340:28d1f895c6fe | 4062 | * @arg I2C_GENERATE_START_WRITE: Generate Restart for write request. |
mbed_official | 340:28d1f895c6fe | 4063 | * @retval None |
mbed_official | 340:28d1f895c6fe | 4064 | */ |
mbed_official | 340:28d1f895c6fe | 4065 | static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) |
mbed_official | 340:28d1f895c6fe | 4066 | { |
mbed_official | 340:28d1f895c6fe | 4067 | uint32_t tmpreg = 0; |
mbed_official | 340:28d1f895c6fe | 4068 | |
mbed_official | 340:28d1f895c6fe | 4069 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 4070 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
mbed_official | 340:28d1f895c6fe | 4071 | assert_param(IS_TRANSFER_MODE(Mode)); |
mbed_official | 340:28d1f895c6fe | 4072 | assert_param(IS_TRANSFER_REQUEST(Request)); |
mbed_official | 340:28d1f895c6fe | 4073 | |
mbed_official | 340:28d1f895c6fe | 4074 | /* Get the CR2 register value */ |
mbed_official | 340:28d1f895c6fe | 4075 | tmpreg = hi2c->Instance->CR2; |
mbed_official | 340:28d1f895c6fe | 4076 | |
mbed_official | 340:28d1f895c6fe | 4077 | /* clear tmpreg specific bits */ |
mbed_official | 340:28d1f895c6fe | 4078 | tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP)); |
mbed_official | 340:28d1f895c6fe | 4079 | |
mbed_official | 340:28d1f895c6fe | 4080 | /* update tmpreg */ |
mbed_official | 340:28d1f895c6fe | 4081 | tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \ |
mbed_official | 340:28d1f895c6fe | 4082 | (uint32_t)Mode | (uint32_t)Request); |
mbed_official | 340:28d1f895c6fe | 4083 | |
mbed_official | 340:28d1f895c6fe | 4084 | /* update CR2 register */ |
mbed_official | 340:28d1f895c6fe | 4085 | hi2c->Instance->CR2 = tmpreg; |
mbed_official | 340:28d1f895c6fe | 4086 | } |
mbed_official | 340:28d1f895c6fe | 4087 | |
mbed_official | 340:28d1f895c6fe | 4088 | /** |
mbed_official | 340:28d1f895c6fe | 4089 | * @} |
mbed_official | 340:28d1f895c6fe | 4090 | */ |
mbed_official | 340:28d1f895c6fe | 4091 | |
mbed_official | 340:28d1f895c6fe | 4092 | #endif /* HAL_I2C_MODULE_ENABLED */ |
mbed_official | 340:28d1f895c6fe | 4093 | /** |
mbed_official | 340:28d1f895c6fe | 4094 | * @} |
mbed_official | 340:28d1f895c6fe | 4095 | */ |
mbed_official | 340:28d1f895c6fe | 4096 | |
mbed_official | 340:28d1f895c6fe | 4097 | /** |
mbed_official | 340:28d1f895c6fe | 4098 | * @} |
mbed_official | 340:28d1f895c6fe | 4099 | */ |
mbed_official | 340:28d1f895c6fe | 4100 | |
mbed_official | 340:28d1f895c6fe | 4101 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |