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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_tim.h@237:f3da66175598, 2014-06-24 (annotated)

Committer:: mbed_official
Date:: Tue Jun 24 14:45:08 2014 +0100
Revision:: 237:f3da66175598
Child:: 375:3d36234a1087

Synchronized with git revision 8ef659bca81f12dfc896b5a7af7c2abbd1a1b8b7



Full URL: https://github.com/mbedmicro/mbed/commit/8ef659bca81f12dfc896b5a7af7c2abbd1a1b8b7/



[NUCLEO_F334R8] Add platform files

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User	Revision	Line number	New contents of line
mbed_official	237:f3da66175598	1	/**
mbed_official	237:f3da66175598	2	******************************************************************************
mbed_official	237:f3da66175598	3	* @file stm32f3xx_hal_tim.h
mbed_official	237:f3da66175598	4	* @author MCD Application Team
mbed_official	237:f3da66175598	5	* @version V1.0.1
mbed_official	237:f3da66175598	6	* @date 18-June-2014
mbed_official	237:f3da66175598	7	* @brief Header file of TIM HAL module.
mbed_official	237:f3da66175598	8	******************************************************************************
mbed_official	237:f3da66175598	9	* @attention
mbed_official	237:f3da66175598	10	*
mbed_official	237:f3da66175598	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	237:f3da66175598	12	*
mbed_official	237:f3da66175598	13	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	237:f3da66175598	14	* are permitted provided that the following conditions are met:
mbed_official	237:f3da66175598	15	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	237:f3da66175598	16	* this list of conditions and the following disclaimer.
mbed_official	237:f3da66175598	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	237:f3da66175598	18	* this list of conditions and the following disclaimer in the documentation
mbed_official	237:f3da66175598	19	* and/or other materials provided with the distribution.
mbed_official	237:f3da66175598	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	237:f3da66175598	21	* may be used to endorse or promote products derived from this software
mbed_official	237:f3da66175598	22	* without specific prior written permission.
mbed_official	237:f3da66175598	23	*
mbed_official	237:f3da66175598	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	237:f3da66175598	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	237:f3da66175598	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	237:f3da66175598	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	237:f3da66175598	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	237:f3da66175598	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	237:f3da66175598	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	237:f3da66175598	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	237:f3da66175598	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	237:f3da66175598	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	237:f3da66175598	34	*
mbed_official	237:f3da66175598	35	******************************************************************************
mbed_official	237:f3da66175598	36	*/
mbed_official	237:f3da66175598	37
mbed_official	237:f3da66175598	38	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	237:f3da66175598	39	#ifndef __STM32F3xx_HAL_TIM_H
mbed_official	237:f3da66175598	40	#define __STM32F3xx_HAL_TIM_H
mbed_official	237:f3da66175598	41
mbed_official	237:f3da66175598	42	#ifdef __cplusplus
mbed_official	237:f3da66175598	43	extern "C" {
mbed_official	237:f3da66175598	44	#endif
mbed_official	237:f3da66175598	45
mbed_official	237:f3da66175598	46	/* Includes ------------------------------------------------------------------*/
mbed_official	237:f3da66175598	47	#include "stm32f3xx_hal_def.h"
mbed_official	237:f3da66175598	48
mbed_official	237:f3da66175598	49	/** @addtogroup STM32F3xx_HAL_Driver
mbed_official	237:f3da66175598	50	* @{
mbed_official	237:f3da66175598	51	*/
mbed_official	237:f3da66175598	52
mbed_official	237:f3da66175598	53	/** @addtogroup TIM
mbed_official	237:f3da66175598	54	* @{
mbed_official	237:f3da66175598	55	*/
mbed_official	237:f3da66175598	56
mbed_official	237:f3da66175598	57	/* Exported types ------------------------------------------------------------*/
mbed_official	237:f3da66175598	58
mbed_official	237:f3da66175598	59	/**
mbed_official	237:f3da66175598	60	* @brief TIM Time base Configuration Structure definition
mbed_official	237:f3da66175598	61	*/
mbed_official	237:f3da66175598	62	typedef struct
mbed_official	237:f3da66175598	63	{
mbed_official	237:f3da66175598	64	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official	237:f3da66175598	65	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	237:f3da66175598	66
mbed_official	237:f3da66175598	67	uint32_t CounterMode; /*!< Specifies the counter mode.
mbed_official	237:f3da66175598	68	This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official	237:f3da66175598	69
mbed_official	237:f3da66175598	70	uint32_t Period; /*!< Specifies the period value to be loaded into the active
mbed_official	237:f3da66175598	71	Auto-Reload Register at the next update event.
mbed_official	237:f3da66175598	72	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
mbed_official	237:f3da66175598	73
mbed_official	237:f3da66175598	74	uint32_t ClockDivision; /*!< Specifies the clock division.
mbed_official	237:f3da66175598	75	This parameter can be a value of @ref TIM_ClockDivision */
mbed_official	237:f3da66175598	76
mbed_official	237:f3da66175598	77	uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official	237:f3da66175598	78	reaches zero, an update event is generated and counting restarts
mbed_official	237:f3da66175598	79	from the RCR value (N).
mbed_official	237:f3da66175598	80	This means in PWM mode that (N+1) corresponds to:
mbed_official	237:f3da66175598	81	- the number of PWM periods in edge-aligned mode
mbed_official	237:f3da66175598	82	- the number of half PWM period in center-aligned mode
mbed_official	237:f3da66175598	83	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
mbed_official	237:f3da66175598	84	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	85	} TIM_Base_InitTypeDef;
mbed_official	237:f3da66175598	86
mbed_official	237:f3da66175598	87	/**
mbed_official	237:f3da66175598	88	* @brief TIM Output Compare Configuration Structure definition
mbed_official	237:f3da66175598	89	*/
mbed_official	237:f3da66175598	90	typedef struct
mbed_official	237:f3da66175598	91	{
mbed_official	237:f3da66175598	92	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	237:f3da66175598	93	This parameter can be a value of @ref TIMEx_Output_Compare_and_PWM_modes */
mbed_official	237:f3da66175598	94
mbed_official	237:f3da66175598	95	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	237:f3da66175598	96	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	237:f3da66175598	97
mbed_official	237:f3da66175598	98	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	237:f3da66175598	99	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	237:f3da66175598	100
mbed_official	237:f3da66175598	101	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	237:f3da66175598	102	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	237:f3da66175598	103	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	104
mbed_official	237:f3da66175598	105	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
mbed_official	237:f3da66175598	106	This parameter can be a value of @ref TIM_Output_Fast_State
mbed_official	237:f3da66175598	107	@note This parameter is valid only in PWM1 and PWM2 mode. */
mbed_official	237:f3da66175598	108
mbed_official	237:f3da66175598	109
mbed_official	237:f3da66175598	110	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	237:f3da66175598	111	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	237:f3da66175598	112	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	113
mbed_official	237:f3da66175598	114	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	237:f3da66175598	115	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	237:f3da66175598	116	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	117	} TIM_OC_InitTypeDef;
mbed_official	237:f3da66175598	118
mbed_official	237:f3da66175598	119	/**
mbed_official	237:f3da66175598	120	* @brief TIM One Pulse Mode Configuration Structure definition
mbed_official	237:f3da66175598	121	*/
mbed_official	237:f3da66175598	122	typedef struct
mbed_official	237:f3da66175598	123	{
mbed_official	237:f3da66175598	124	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	237:f3da66175598	125	This parameter can be a value of @ref TIMEx_Output_Compare_and_PWM_modes */
mbed_official	237:f3da66175598	126
mbed_official	237:f3da66175598	127	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	237:f3da66175598	128	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	237:f3da66175598	129
mbed_official	237:f3da66175598	130	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	237:f3da66175598	131	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	237:f3da66175598	132
mbed_official	237:f3da66175598	133	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	237:f3da66175598	134	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	237:f3da66175598	135	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	136
mbed_official	237:f3da66175598	137	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	237:f3da66175598	138	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	237:f3da66175598	139	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	140
mbed_official	237:f3da66175598	141	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	237:f3da66175598	142	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	237:f3da66175598	143	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	237:f3da66175598	144
mbed_official	237:f3da66175598	145	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	237:f3da66175598	146	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	237:f3da66175598	147
mbed_official	237:f3da66175598	148	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	237:f3da66175598	149	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	237:f3da66175598	150
mbed_official	237:f3da66175598	151	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	237:f3da66175598	152	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	237:f3da66175598	153	} TIM_OnePulse_InitTypeDef;
mbed_official	237:f3da66175598	154
mbed_official	237:f3da66175598	155
mbed_official	237:f3da66175598	156	/**
mbed_official	237:f3da66175598	157	* @brief TIM Input Capture Configuration Structure definition
mbed_official	237:f3da66175598	158	*/
mbed_official	237:f3da66175598	159	typedef struct
mbed_official	237:f3da66175598	160	{
mbed_official	237:f3da66175598	161	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	237:f3da66175598	162	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	237:f3da66175598	163
mbed_official	237:f3da66175598	164	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	237:f3da66175598	165	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	237:f3da66175598	166
mbed_official	237:f3da66175598	167	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	237:f3da66175598	168	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	237:f3da66175598	169
mbed_official	237:f3da66175598	170	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	237:f3da66175598	171	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	237:f3da66175598	172	} TIM_IC_InitTypeDef;
mbed_official	237:f3da66175598	173
mbed_official	237:f3da66175598	174	/**
mbed_official	237:f3da66175598	175	* @brief TIM Encoder Configuration Structure definition
mbed_official	237:f3da66175598	176	*/
mbed_official	237:f3da66175598	177	typedef struct
mbed_official	237:f3da66175598	178	{
mbed_official	237:f3da66175598	179	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
mbed_official	237:f3da66175598	180	This parameter can be a value of @ref TIM_Encoder_Mode */
mbed_official	237:f3da66175598	181
mbed_official	237:f3da66175598	182	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	237:f3da66175598	183	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	237:f3da66175598	184
mbed_official	237:f3da66175598	185	uint32_t IC1Selection; /*!< Specifies the input.
mbed_official	237:f3da66175598	186	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	237:f3da66175598	187
mbed_official	237:f3da66175598	188	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	237:f3da66175598	189	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	237:f3da66175598	190
mbed_official	237:f3da66175598	191	uint32_t IC1Filter; /*!< Specifies the input capture filter.
mbed_official	237:f3da66175598	192	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	237:f3da66175598	193
mbed_official	237:f3da66175598	194	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	237:f3da66175598	195	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	237:f3da66175598	196
mbed_official	237:f3da66175598	197	uint32_t IC2Selection; /*!< Specifies the input.
mbed_official	237:f3da66175598	198	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	237:f3da66175598	199
mbed_official	237:f3da66175598	200	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	237:f3da66175598	201	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	237:f3da66175598	202
mbed_official	237:f3da66175598	203	uint32_t IC2Filter; /*!< Specifies the input capture filter.
mbed_official	237:f3da66175598	204	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	237:f3da66175598	205	} TIM_Encoder_InitTypeDef;
mbed_official	237:f3da66175598	206
mbed_official	237:f3da66175598	207
mbed_official	237:f3da66175598	208	/**
mbed_official	237:f3da66175598	209	* @brief Clock Configuration Handle Structure definition
mbed_official	237:f3da66175598	210	*/
mbed_official	237:f3da66175598	211	typedef struct
mbed_official	237:f3da66175598	212	{
mbed_official	237:f3da66175598	213	uint32_t ClockSource; /*!< TIM clock sources
mbed_official	237:f3da66175598	214	This parameter can be a value of @ref TIM_Clock_Source */
mbed_official	237:f3da66175598	215	uint32_t ClockPolarity; /*!< TIM clock polarity
mbed_official	237:f3da66175598	216	This parameter can be a value of @ref TIM_Clock_Polarity */
mbed_official	237:f3da66175598	217	uint32_t ClockPrescaler; /*!< TIM clock prescaler
mbed_official	237:f3da66175598	218	This parameter can be a value of @ref TIM_Clock_Prescaler */
mbed_official	237:f3da66175598	219	uint32_t ClockFilter; /*!< TIM clock filter
mbed_official	237:f3da66175598	220	This parameter can be a value of @ref TIM_Clock_Filter */
mbed_official	237:f3da66175598	221	}TIM_ClockConfigTypeDef;
mbed_official	237:f3da66175598	222
mbed_official	237:f3da66175598	223	/**
mbed_official	237:f3da66175598	224	* @brief Clear Input Configuration Handle Structure definition
mbed_official	237:f3da66175598	225	*/
mbed_official	237:f3da66175598	226	typedef struct
mbed_official	237:f3da66175598	227	{
mbed_official	237:f3da66175598	228	uint32_t ClearInputState; /*!< TIM clear Input state
mbed_official	237:f3da66175598	229	This parameter can be ENABLE or DISABLE */
mbed_official	237:f3da66175598	230	uint32_t ClearInputSource; /*!< TIM clear Input sources
mbed_official	237:f3da66175598	231	This parameter can be a value of @ref TIMEx_ClearInput_Source */
mbed_official	237:f3da66175598	232	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
mbed_official	237:f3da66175598	233	This parameter can be a value of @ref TIM_ClearInput_Polarity */
mbed_official	237:f3da66175598	234	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
mbed_official	237:f3da66175598	235	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
mbed_official	237:f3da66175598	236	uint32_t ClearInputFilter; /*!< TIM Clear Input filter
mbed_official	237:f3da66175598	237	This parameter can be a value of @ref TIM_ClearInput_Filter */
mbed_official	237:f3da66175598	238	}TIM_ClearInputConfigTypeDef;
mbed_official	237:f3da66175598	239
mbed_official	237:f3da66175598	240	/**
mbed_official	237:f3da66175598	241	* @brief TIM Slave configuration Structure definition
mbed_official	237:f3da66175598	242	*/
mbed_official	237:f3da66175598	243	typedef struct {
mbed_official	237:f3da66175598	244	uint32_t SlaveMode; /*!< Slave mode selection
mbed_official	237:f3da66175598	245	This parameter can be a value of @ref TIMEx_Slave_Mode */
mbed_official	237:f3da66175598	246	uint32_t InputTrigger; /*!< Input Trigger source
mbed_official	237:f3da66175598	247	This parameter can be a value of @ref TIM_Trigger_Selection */
mbed_official	237:f3da66175598	248	uint32_t TriggerPolarity; /*!< Input Trigger polarity
mbed_official	237:f3da66175598	249	This parameter can be a value of @ref TIM_Trigger_Polarity */
mbed_official	237:f3da66175598	250	uint32_t TriggerPrescaler; /*!< Input trigger prescaler
mbed_official	237:f3da66175598	251	This parameter can be a value of @ref TIM_Trigger_Prescaler */
mbed_official	237:f3da66175598	252	uint32_t TriggerFilter; /*!< Input trigger filter
mbed_official	237:f3da66175598	253	This parameter can be a value of @ref TIM_Trigger_Filter */
mbed_official	237:f3da66175598	254
mbed_official	237:f3da66175598	255	}TIM_SlaveConfigTypeDef;
mbed_official	237:f3da66175598	256
mbed_official	237:f3da66175598	257	/**
mbed_official	237:f3da66175598	258	* @brief HAL State structures definition
mbed_official	237:f3da66175598	259	*/
mbed_official	237:f3da66175598	260	typedef enum
mbed_official	237:f3da66175598	261	{
mbed_official	237:f3da66175598	262	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
mbed_official	237:f3da66175598	263	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
mbed_official	237:f3da66175598	264	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
mbed_official	237:f3da66175598	265	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
mbed_official	237:f3da66175598	266	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
mbed_official	237:f3da66175598	267	}HAL_TIM_StateTypeDef;
mbed_official	237:f3da66175598	268
mbed_official	237:f3da66175598	269	/**
mbed_official	237:f3da66175598	270	* @brief HAL Active channel structures definition
mbed_official	237:f3da66175598	271	*/
mbed_official	237:f3da66175598	272	typedef enum
mbed_official	237:f3da66175598	273	{
mbed_official	237:f3da66175598	274	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
mbed_official	237:f3da66175598	275	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
mbed_official	237:f3da66175598	276	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
mbed_official	237:f3da66175598	277	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
mbed_official	237:f3da66175598	278	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
mbed_official	237:f3da66175598	279	}HAL_TIM_ActiveChannel;
mbed_official	237:f3da66175598	280
mbed_official	237:f3da66175598	281	/**
mbed_official	237:f3da66175598	282	* @brief TIM Time Base Handle Structure definition
mbed_official	237:f3da66175598	283	*/
mbed_official	237:f3da66175598	284	typedef struct
mbed_official	237:f3da66175598	285	{
mbed_official	237:f3da66175598	286	TIM_TypeDef Instance; /!< Register base address */
mbed_official	237:f3da66175598	287	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
mbed_official	237:f3da66175598	288	HAL_TIM_ActiveChannel Channel; /!< Active channel /
mbed_official	237:f3da66175598	289	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
mbed_official	237:f3da66175598	290	This array is accessed by a @ref DMA_Handle_index */
mbed_official	237:f3da66175598	291	HAL_LockTypeDef Lock; /!< Locking object /
mbed_official	237:f3da66175598	292	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
mbed_official	237:f3da66175598	293	}TIM_HandleTypeDef;
mbed_official	237:f3da66175598	294
mbed_official	237:f3da66175598	295	/* Exported constants --------------------------------------------------------*/
mbed_official	237:f3da66175598	296	/** @defgroup TIM_Exported_Constants
mbed_official	237:f3da66175598	297	* @{
mbed_official	237:f3da66175598	298	*/
mbed_official	237:f3da66175598	299
mbed_official	237:f3da66175598	300	/** @defgroup TIM_Input_Channel_Polarity
mbed_official	237:f3da66175598	301	* @{
mbed_official	237:f3da66175598	302	*/
mbed_official	237:f3da66175598	303	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
mbed_official	237:f3da66175598	304	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
mbed_official	237:f3da66175598	305	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
mbed_official	237:f3da66175598	306	/**
mbed_official	237:f3da66175598	307	* @}
mbed_official	237:f3da66175598	308	*/
mbed_official	237:f3da66175598	309
mbed_official	237:f3da66175598	310	/** @defgroup TIM_ETR_Polarity
mbed_official	237:f3da66175598	311	* @{
mbed_official	237:f3da66175598	312	*/
mbed_official	237:f3da66175598	313	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
mbed_official	237:f3da66175598	314	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
mbed_official	237:f3da66175598	315	/**
mbed_official	237:f3da66175598	316	* @}
mbed_official	237:f3da66175598	317	*/
mbed_official	237:f3da66175598	318
mbed_official	237:f3da66175598	319	/** @defgroup TIM_ETR_Prescaler
mbed_official	237:f3da66175598	320	* @{
mbed_official	237:f3da66175598	321	*/
mbed_official	237:f3da66175598	322	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
mbed_official	237:f3da66175598	323	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
mbed_official	237:f3da66175598	324	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
mbed_official	237:f3da66175598	325	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
mbed_official	237:f3da66175598	326	/**
mbed_official	237:f3da66175598	327	* @}
mbed_official	237:f3da66175598	328	*/
mbed_official	237:f3da66175598	329
mbed_official	237:f3da66175598	330	/** @defgroup TIM_Counter_Mode
mbed_official	237:f3da66175598	331	* @{
mbed_official	237:f3da66175598	332	*/
mbed_official	237:f3da66175598	333
mbed_official	237:f3da66175598	334	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
mbed_official	237:f3da66175598	335	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
mbed_official	237:f3da66175598	336	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
mbed_official	237:f3da66175598	337	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
mbed_official	237:f3da66175598	338	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
mbed_official	237:f3da66175598	339
mbed_official	237:f3da66175598	340	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) \|\| \
mbed_official	237:f3da66175598	341	((MODE) == TIM_COUNTERMODE_DOWN) \|\| \
mbed_official	237:f3da66175598	342	((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
mbed_official	237:f3da66175598	343	((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
mbed_official	237:f3da66175598	344	((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
mbed_official	237:f3da66175598	345	/**
mbed_official	237:f3da66175598	346	* @}
mbed_official	237:f3da66175598	347	*/
mbed_official	237:f3da66175598	348
mbed_official	237:f3da66175598	349	/** @defgroup TIM_ClockDivision
mbed_official	237:f3da66175598	350	* @{
mbed_official	237:f3da66175598	351	*/
mbed_official	237:f3da66175598	352
mbed_official	237:f3da66175598	353	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
mbed_official	237:f3da66175598	354	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
mbed_official	237:f3da66175598	355	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
mbed_official	237:f3da66175598	356
mbed_official	237:f3da66175598	357	#define IS_TIM_CLOCKDIVISION_DIV(DIV) (((DIV) == TIM_CLOCKDIVISION_DIV1) \|\| \
mbed_official	237:f3da66175598	358	((DIV) == TIM_CLOCKDIVISION_DIV2) \|\| \
mbed_official	237:f3da66175598	359	((DIV) == TIM_CLOCKDIVISION_DIV4))
mbed_official	237:f3da66175598	360	/**
mbed_official	237:f3da66175598	361	* @}
mbed_official	237:f3da66175598	362	*/
mbed_official	237:f3da66175598	363
mbed_official	237:f3da66175598	364	/** @defgroup TIM_Output_Compare_State
mbed_official	237:f3da66175598	365	* @{
mbed_official	237:f3da66175598	366	*/
mbed_official	237:f3da66175598	367
mbed_official	237:f3da66175598	368	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	369	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
mbed_official	237:f3da66175598	370
mbed_official	237:f3da66175598	371	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
mbed_official	237:f3da66175598	372	((STATE) == TIM_OUTPUTSTATE_ENABLE))
mbed_official	237:f3da66175598	373	/**
mbed_official	237:f3da66175598	374	* @}
mbed_official	237:f3da66175598	375	*/
mbed_official	237:f3da66175598	376	/** @defgroup TIM_Output_Fast_State
mbed_official	237:f3da66175598	377	* @{
mbed_official	237:f3da66175598	378	*/
mbed_official	237:f3da66175598	379	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	380	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
mbed_official	237:f3da66175598	381
mbed_official	237:f3da66175598	382	#define IS_TIM_FAST_STATE(STATE) (((STATE) == TIM_OCFAST_DISABLE) \|\| \
mbed_official	237:f3da66175598	383	((STATE) == TIM_OCFAST_ENABLE))
mbed_official	237:f3da66175598	384	/**
mbed_official	237:f3da66175598	385	* @}
mbed_official	237:f3da66175598	386	*/
mbed_official	237:f3da66175598	387	/** @defgroup TIM_Output_Compare_N_State
mbed_official	237:f3da66175598	388	* @{
mbed_official	237:f3da66175598	389	*/
mbed_official	237:f3da66175598	390
mbed_official	237:f3da66175598	391	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	392	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
mbed_official	237:f3da66175598	393
mbed_official	237:f3da66175598	394	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
mbed_official	237:f3da66175598	395	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
mbed_official	237:f3da66175598	396	/**
mbed_official	237:f3da66175598	397	* @}
mbed_official	237:f3da66175598	398	*/
mbed_official	237:f3da66175598	399
mbed_official	237:f3da66175598	400	/** @defgroup TIM_Output_Compare_Polarity
mbed_official	237:f3da66175598	401	* @{
mbed_official	237:f3da66175598	402	*/
mbed_official	237:f3da66175598	403
mbed_official	237:f3da66175598	404	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	237:f3da66175598	405	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
mbed_official	237:f3da66175598	406
mbed_official	237:f3da66175598	407	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPOLARITY_HIGH) \|\| \
mbed_official	237:f3da66175598	408	((POLARITY) == TIM_OCPOLARITY_LOW))
mbed_official	237:f3da66175598	409	/**
mbed_official	237:f3da66175598	410	* @}
mbed_official	237:f3da66175598	411	*/
mbed_official	237:f3da66175598	412
mbed_official	237:f3da66175598	413	/** @defgroup TIM_Output_Compare_N_Polarity
mbed_official	237:f3da66175598	414	* @{
mbed_official	237:f3da66175598	415	*/
mbed_official	237:f3da66175598	416
mbed_official	237:f3da66175598	417	#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	237:f3da66175598	418	#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
mbed_official	237:f3da66175598	419
mbed_official	237:f3da66175598	420	#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPOLARITY_HIGH) \|\| \
mbed_official	237:f3da66175598	421	((POLARITY) == TIM_OCNPOLARITY_LOW))
mbed_official	237:f3da66175598	422	/**
mbed_official	237:f3da66175598	423	* @}
mbed_official	237:f3da66175598	424	*/
mbed_official	237:f3da66175598	425
mbed_official	237:f3da66175598	426	/** @defgroup TIM_Output_Compare_Idle_State
mbed_official	237:f3da66175598	427	* @{
mbed_official	237:f3da66175598	428	*/
mbed_official	237:f3da66175598	429
mbed_official	237:f3da66175598	430	#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
mbed_official	237:f3da66175598	431	#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	237:f3da66175598	432	#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIDLESTATE_SET) \|\| \
mbed_official	237:f3da66175598	433	((STATE) == TIM_OCIDLESTATE_RESET))
mbed_official	237:f3da66175598	434	/**
mbed_official	237:f3da66175598	435	* @}
mbed_official	237:f3da66175598	436	*/
mbed_official	237:f3da66175598	437
mbed_official	237:f3da66175598	438	/** @defgroup TIM_Output_Compare_N_Idle_State
mbed_official	237:f3da66175598	439	* @{
mbed_official	237:f3da66175598	440	*/
mbed_official	237:f3da66175598	441
mbed_official	237:f3da66175598	442	#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
mbed_official	237:f3da66175598	443	#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	237:f3da66175598	444	#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIDLESTATE_SET) \|\| \
mbed_official	237:f3da66175598	445	((STATE) == TIM_OCNIDLESTATE_RESET))
mbed_official	237:f3da66175598	446	/**
mbed_official	237:f3da66175598	447	* @}
mbed_official	237:f3da66175598	448	*/
mbed_official	237:f3da66175598	449
mbed_official	237:f3da66175598	450
mbed_official	237:f3da66175598	451
mbed_official	237:f3da66175598	452	/** @defgroup TIM_Input_Capture_Polarity
mbed_official	237:f3da66175598	453	* @{
mbed_official	237:f3da66175598	454	*/
mbed_official	237:f3da66175598	455
mbed_official	237:f3da66175598	456	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
mbed_official	237:f3da66175598	457	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
mbed_official	237:f3da66175598	458	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
mbed_official	237:f3da66175598	459
mbed_official	237:f3da66175598	460	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) \|\| \
mbed_official	237:f3da66175598	461	((POLARITY) == TIM_ICPOLARITY_FALLING) \|\| \
mbed_official	237:f3da66175598	462	((POLARITY) == TIM_ICPOLARITY_BOTHEDGE))
mbed_official	237:f3da66175598	463	/**
mbed_official	237:f3da66175598	464	* @}
mbed_official	237:f3da66175598	465	*/
mbed_official	237:f3da66175598	466
mbed_official	237:f3da66175598	467	/** @defgroup TIM_Input_Capture_Selection
mbed_official	237:f3da66175598	468	* @{
mbed_official	237:f3da66175598	469	*/
mbed_official	237:f3da66175598	470
mbed_official	237:f3da66175598	471	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	237:f3da66175598	472	connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official	237:f3da66175598	473	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	237:f3da66175598	474	connected to IC2, IC1, IC4 or IC3, respectively */
mbed_official	237:f3da66175598	475	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
mbed_official	237:f3da66175598	476
mbed_official	237:f3da66175598	477	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) \|\| \
mbed_official	237:f3da66175598	478	((SELECTION) == TIM_ICSELECTION_INDIRECTTI) \|\| \
mbed_official	237:f3da66175598	479	((SELECTION) == TIM_ICSELECTION_TRC))
mbed_official	237:f3da66175598	480	/**
mbed_official	237:f3da66175598	481	* @}
mbed_official	237:f3da66175598	482	*/
mbed_official	237:f3da66175598	483
mbed_official	237:f3da66175598	484	/** @defgroup TIM_Input_Capture_Prescaler
mbed_official	237:f3da66175598	485	* @{
mbed_official	237:f3da66175598	486	*/
mbed_official	237:f3da66175598	487
mbed_official	237:f3da66175598	488	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
mbed_official	237:f3da66175598	489	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
mbed_official	237:f3da66175598	490	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
mbed_official	237:f3da66175598	491	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
mbed_official	237:f3da66175598	492
mbed_official	237:f3da66175598	493	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
mbed_official	237:f3da66175598	494	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
mbed_official	237:f3da66175598	495	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
mbed_official	237:f3da66175598	496	((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official	237:f3da66175598	497	/**
mbed_official	237:f3da66175598	498	* @}
mbed_official	237:f3da66175598	499	*/
mbed_official	237:f3da66175598	500
mbed_official	237:f3da66175598	501	/** @defgroup TIM_One_Pulse_Mode
mbed_official	237:f3da66175598	502	* @{
mbed_official	237:f3da66175598	503	*/
mbed_official	237:f3da66175598	504
mbed_official	237:f3da66175598	505	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
mbed_official	237:f3da66175598	506	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	507	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMODE_SINGLE) \|\| \
mbed_official	237:f3da66175598	508	((MODE) == TIM_OPMODE_REPETITIVE))
mbed_official	237:f3da66175598	509	/**
mbed_official	237:f3da66175598	510	* @}
mbed_official	237:f3da66175598	511	*/
mbed_official	237:f3da66175598	512	/** @defgroup TIM_Encoder_Mode
mbed_official	237:f3da66175598	513	* @{
mbed_official	237:f3da66175598	514	*/
mbed_official	237:f3da66175598	515	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
mbed_official	237:f3da66175598	516	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
mbed_official	237:f3da66175598	517	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
mbed_official	237:f3da66175598	518	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_ENCODERMODE_TI1) \|\| \
mbed_official	237:f3da66175598	519	((MODE) == TIM_ENCODERMODE_TI2) \|\| \
mbed_official	237:f3da66175598	520	((MODE) == TIM_ENCODERMODE_TI12))
mbed_official	237:f3da66175598	521	/**
mbed_official	237:f3da66175598	522	* @}
mbed_official	237:f3da66175598	523	*/
mbed_official	237:f3da66175598	524	/** @defgroup TIM_Interrupt_definition
mbed_official	237:f3da66175598	525	* @{
mbed_official	237:f3da66175598	526	*/
mbed_official	237:f3da66175598	527	#define TIM_IT_UPDATE (TIM_DIER_UIE)
mbed_official	237:f3da66175598	528	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
mbed_official	237:f3da66175598	529	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
mbed_official	237:f3da66175598	530	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
mbed_official	237:f3da66175598	531	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
mbed_official	237:f3da66175598	532	#define TIM_IT_COM (TIM_DIER_COMIE)
mbed_official	237:f3da66175598	533	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
mbed_official	237:f3da66175598	534	#define TIM_IT_BREAK (TIM_DIER_BIE)
mbed_official	237:f3da66175598	535
mbed_official	237:f3da66175598	536	#define IS_TIM_IT(IT) ((((IT) & 0xFFFFFF00) == 0x00000000) && ((IT) != 0x00000000))
mbed_official	237:f3da66175598	537
mbed_official	237:f3da66175598	538	#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_UPDATE) \|\| \
mbed_official	237:f3da66175598	539	((IT) == TIM_IT_CC1) \|\| \
mbed_official	237:f3da66175598	540	((IT) == TIM_IT_CC2) \|\| \
mbed_official	237:f3da66175598	541	((IT) == TIM_IT_CC3) \|\| \
mbed_official	237:f3da66175598	542	((IT) == TIM_IT_CC4) \|\| \
mbed_official	237:f3da66175598	543	((IT) == TIM_IT_COM) \|\| \
mbed_official	237:f3da66175598	544	((IT) == TIM_IT_TRIGGER) \|\| \
mbed_official	237:f3da66175598	545	((IT) == TIM_IT_BREAK))
mbed_official	237:f3da66175598	546	/**
mbed_official	237:f3da66175598	547	* @}
mbed_official	237:f3da66175598	548	*/
mbed_official	237:f3da66175598	549	#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
mbed_official	237:f3da66175598	550	#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	551
mbed_official	237:f3da66175598	552	/** @defgroup TIM_DMA_sources
mbed_official	237:f3da66175598	553	* @{
mbed_official	237:f3da66175598	554	*/
mbed_official	237:f3da66175598	555
mbed_official	237:f3da66175598	556	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
mbed_official	237:f3da66175598	557	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
mbed_official	237:f3da66175598	558	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
mbed_official	237:f3da66175598	559	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
mbed_official	237:f3da66175598	560	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
mbed_official	237:f3da66175598	561	#define TIM_DMA_COM (TIM_DIER_COMDE)
mbed_official	237:f3da66175598	562	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
mbed_official	237:f3da66175598	563	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFF80FF) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	237:f3da66175598	564
mbed_official	237:f3da66175598	565	/**
mbed_official	237:f3da66175598	566	* @}
mbed_official	237:f3da66175598	567	*/
mbed_official	237:f3da66175598	568
mbed_official	237:f3da66175598	569	/** @defgroup TIM_Flag_definition
mbed_official	237:f3da66175598	570	* @{
mbed_official	237:f3da66175598	571	*/
mbed_official	237:f3da66175598	572
mbed_official	237:f3da66175598	573	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
mbed_official	237:f3da66175598	574	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
mbed_official	237:f3da66175598	575	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
mbed_official	237:f3da66175598	576	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
mbed_official	237:f3da66175598	577	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
mbed_official	237:f3da66175598	578	#define TIM_FLAG_COM (TIM_SR_COMIF)
mbed_official	237:f3da66175598	579	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
mbed_official	237:f3da66175598	580	#define TIM_FLAG_BREAK (TIM_SR_BIF)
mbed_official	237:f3da66175598	581	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
mbed_official	237:f3da66175598	582	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
mbed_official	237:f3da66175598	583	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
mbed_official	237:f3da66175598	584	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
mbed_official	237:f3da66175598	585
mbed_official	237:f3da66175598	586	#define IS_TIM_FLAG(FLAG) (((FLAG) == TIM_FLAG_UPDATE) \|\| \
mbed_official	237:f3da66175598	587	((FLAG) == TIM_FLAG_CC1) \|\| \
mbed_official	237:f3da66175598	588	((FLAG) == TIM_FLAG_CC2) \|\| \
mbed_official	237:f3da66175598	589	((FLAG) == TIM_FLAG_CC3) \|\| \
mbed_official	237:f3da66175598	590	((FLAG) == TIM_FLAG_CC4) \|\| \
mbed_official	237:f3da66175598	591	((FLAG) == TIM_FLAG_COM) \|\| \
mbed_official	237:f3da66175598	592	((FLAG) == TIM_FLAG_TRIGGER) \|\| \
mbed_official	237:f3da66175598	593	((FLAG) == TIM_FLAG_BREAK) \|\| \
mbed_official	237:f3da66175598	594	((FLAG) == TIM_FLAG_CC1OF) \|\| \
mbed_official	237:f3da66175598	595	((FLAG) == TIM_FLAG_CC2OF) \|\| \
mbed_official	237:f3da66175598	596	((FLAG) == TIM_FLAG_CC3OF) \|\| \
mbed_official	237:f3da66175598	597	((FLAG) == TIM_FLAG_CC4OF))
mbed_official	237:f3da66175598	598	/**
mbed_official	237:f3da66175598	599	* @}
mbed_official	237:f3da66175598	600	*/
mbed_official	237:f3da66175598	601
mbed_official	237:f3da66175598	602	/** @defgroup TIM_Clock_Source
mbed_official	237:f3da66175598	603	* @{
mbed_official	237:f3da66175598	604	*/
mbed_official	237:f3da66175598	605	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
mbed_official	237:f3da66175598	606	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
mbed_official	237:f3da66175598	607	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
mbed_official	237:f3da66175598	608	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
mbed_official	237:f3da66175598	609	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
mbed_official	237:f3da66175598	610	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
mbed_official	237:f3da66175598	611	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
mbed_official	237:f3da66175598	612	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
mbed_official	237:f3da66175598	613	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
mbed_official	237:f3da66175598	614	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
mbed_official	237:f3da66175598	615
mbed_official	237:f3da66175598	616	#define IS_TIM_CLOCKSOURCE(CLOCK) (((CLOCK) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
mbed_official	237:f3da66175598	617	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
mbed_official	237:f3da66175598	618	((CLOCK) == TIM_CLOCKSOURCE_ITR0) \|\| \
mbed_official	237:f3da66175598	619	((CLOCK) == TIM_CLOCKSOURCE_ITR1) \|\| \
mbed_official	237:f3da66175598	620	((CLOCK) == TIM_CLOCKSOURCE_ITR2) \|\| \
mbed_official	237:f3da66175598	621	((CLOCK) == TIM_CLOCKSOURCE_ITR3) \|\| \
mbed_official	237:f3da66175598	622	((CLOCK) == TIM_CLOCKSOURCE_TI1ED) \|\| \
mbed_official	237:f3da66175598	623	((CLOCK) == TIM_CLOCKSOURCE_TI1) \|\| \
mbed_official	237:f3da66175598	624	((CLOCK) == TIM_CLOCKSOURCE_TI2) \|\| \
mbed_official	237:f3da66175598	625	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE1))
mbed_official	237:f3da66175598	626	/**
mbed_official	237:f3da66175598	627	* @}
mbed_official	237:f3da66175598	628	*/
mbed_official	237:f3da66175598	629
mbed_official	237:f3da66175598	630	/** @defgroup TIM_Clock_Polarity
mbed_official	237:f3da66175598	631	* @{
mbed_official	237:f3da66175598	632	*/
mbed_official	237:f3da66175598	633	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
mbed_official	237:f3da66175598	634	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
mbed_official	237:f3da66175598	635	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
mbed_official	237:f3da66175598	636	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
mbed_official	237:f3da66175598	637	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
mbed_official	237:f3da66175598	638
mbed_official	237:f3da66175598	639	#define IS_TIM_CLOCKPOLARITY(POLARITY) (((POLARITY) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
mbed_official	237:f3da66175598	640	((POLARITY) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
mbed_official	237:f3da66175598	641	((POLARITY) == TIM_CLOCKPOLARITY_RISING) \|\| \
mbed_official	237:f3da66175598	642	((POLARITY) == TIM_CLOCKPOLARITY_FALLING) \|\| \
mbed_official	237:f3da66175598	643	((POLARITY) == TIM_CLOCKPOLARITY_BOTHEDGE))
mbed_official	237:f3da66175598	644	/**
mbed_official	237:f3da66175598	645	* @}
mbed_official	237:f3da66175598	646	*/
mbed_official	237:f3da66175598	647	/** @defgroup TIM_Clock_Prescaler
mbed_official	237:f3da66175598	648	* @{
mbed_official	237:f3da66175598	649	*/
mbed_official	237:f3da66175598	650	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	237:f3da66175598	651	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
mbed_official	237:f3da66175598	652	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
mbed_official	237:f3da66175598	653	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
mbed_official	237:f3da66175598	654
mbed_official	237:f3da66175598	655	#define IS_TIM_CLOCKPRESCALER(PRESCALER) (((PRESCALER) == TIM_CLOCKPRESCALER_DIV1) \|\| \
mbed_official	237:f3da66175598	656	((PRESCALER) == TIM_CLOCKPRESCALER_DIV2) \|\| \
mbed_official	237:f3da66175598	657	((PRESCALER) == TIM_CLOCKPRESCALER_DIV4) \|\| \
mbed_official	237:f3da66175598	658	((PRESCALER) == TIM_CLOCKPRESCALER_DIV8))
mbed_official	237:f3da66175598	659	/**
mbed_official	237:f3da66175598	660	* @}
mbed_official	237:f3da66175598	661	*/
mbed_official	237:f3da66175598	662	/** @defgroup TIM_Clock_Filter
mbed_official	237:f3da66175598	663	* @{
mbed_official	237:f3da66175598	664	*/
mbed_official	237:f3da66175598	665
mbed_official	237:f3da66175598	666	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	237:f3da66175598	667	/**
mbed_official	237:f3da66175598	668	* @}
mbed_official	237:f3da66175598	669	*/
mbed_official	237:f3da66175598	670
mbed_official	237:f3da66175598	671	/** @defgroup TIM_ClearInput_Polarity
mbed_official	237:f3da66175598	672	* @{
mbed_official	237:f3da66175598	673	*/
mbed_official	237:f3da66175598	674	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
mbed_official	237:f3da66175598	675	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
mbed_official	237:f3da66175598	676
mbed_official	237:f3da66175598	677
mbed_official	237:f3da66175598	678	#define IS_TIM_CLEARINPUT_POLARITY(POLARITY) (((POLARITY) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
mbed_official	237:f3da66175598	679	((POLARITY) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
mbed_official	237:f3da66175598	680	/**
mbed_official	237:f3da66175598	681	* @}
mbed_official	237:f3da66175598	682	*/
mbed_official	237:f3da66175598	683
mbed_official	237:f3da66175598	684	/** @defgroup TIM_ClearInput_Prescaler
mbed_official	237:f3da66175598	685	* @{
mbed_official	237:f3da66175598	686	*/
mbed_official	237:f3da66175598	687	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	237:f3da66175598	688	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
mbed_official	237:f3da66175598	689	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
mbed_official	237:f3da66175598	690	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
mbed_official	237:f3da66175598	691	#define IS_TIM_CLEARINPUT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
mbed_official	237:f3da66175598	692	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
mbed_official	237:f3da66175598	693	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
mbed_official	237:f3da66175598	694	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV8))
mbed_official	237:f3da66175598	695	/**
mbed_official	237:f3da66175598	696	* @}
mbed_official	237:f3da66175598	697	*/
mbed_official	237:f3da66175598	698
mbed_official	237:f3da66175598	699	/** @defgroup TIM_ClearInput_Filter
mbed_official	237:f3da66175598	700	* @{
mbed_official	237:f3da66175598	701	*/
mbed_official	237:f3da66175598	702
mbed_official	237:f3da66175598	703	#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	237:f3da66175598	704	/**
mbed_official	237:f3da66175598	705	* @}
mbed_official	237:f3da66175598	706	*/
mbed_official	237:f3da66175598	707
mbed_official	237:f3da66175598	708	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official	237:f3da66175598	709	* @{
mbed_official	237:f3da66175598	710	*/
mbed_official	237:f3da66175598	711	#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
mbed_official	237:f3da66175598	712	#define TIM_OSSR_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	713
mbed_official	237:f3da66175598	714	#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) \|\| \
mbed_official	237:f3da66175598	715	((STATE) == TIM_OSSR_DISABLE))
mbed_official	237:f3da66175598	716	/**
mbed_official	237:f3da66175598	717	* @}
mbed_official	237:f3da66175598	718	*/
mbed_official	237:f3da66175598	719
mbed_official	237:f3da66175598	720	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official	237:f3da66175598	721	* @{
mbed_official	237:f3da66175598	722	*/
mbed_official	237:f3da66175598	723	#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
mbed_official	237:f3da66175598	724	#define TIM_OSSI_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	725
mbed_official	237:f3da66175598	726	#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) \|\| \
mbed_official	237:f3da66175598	727	((STATE) == TIM_OSSI_DISABLE))
mbed_official	237:f3da66175598	728	/**
mbed_official	237:f3da66175598	729	* @}
mbed_official	237:f3da66175598	730	*/
mbed_official	237:f3da66175598	731	/** @defgroup TIM_Lock_level
mbed_official	237:f3da66175598	732	* @{
mbed_official	237:f3da66175598	733	*/
mbed_official	237:f3da66175598	734	#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
mbed_official	237:f3da66175598	735	#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
mbed_official	237:f3da66175598	736	#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
mbed_official	237:f3da66175598	737	#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
mbed_official	237:f3da66175598	738
mbed_official	237:f3da66175598	739	#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) \|\| \
mbed_official	237:f3da66175598	740	((LEVEL) == TIM_LOCKLEVEL_1) \|\| \
mbed_official	237:f3da66175598	741	((LEVEL) == TIM_LOCKLEVEL_2) \|\| \
mbed_official	237:f3da66175598	742	((LEVEL) == TIM_LOCKLEVEL_3))
mbed_official	237:f3da66175598	743	/**
mbed_official	237:f3da66175598	744	* @}
mbed_official	237:f3da66175598	745	*/
mbed_official	237:f3da66175598	746	/** @defgroup TIM_Break_Input_enable_disable
mbed_official	237:f3da66175598	747	* @{
mbed_official	237:f3da66175598	748	*/
mbed_official	237:f3da66175598	749	#define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
mbed_official	237:f3da66175598	750	#define TIM_BREAK_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	751
mbed_official	237:f3da66175598	752	#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_BREAK_ENABLE) \|\| \
mbed_official	237:f3da66175598	753	((STATE) == TIM_BREAK_DISABLE))
mbed_official	237:f3da66175598	754	/**
mbed_official	237:f3da66175598	755	* @}
mbed_official	237:f3da66175598	756	*/
mbed_official	237:f3da66175598	757	/** @defgroup TIM_Break_Polarity
mbed_official	237:f3da66175598	758	* @{
mbed_official	237:f3da66175598	759	*/
mbed_official	237:f3da66175598	760	#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
mbed_official	237:f3da66175598	761	#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
mbed_official	237:f3da66175598	762
mbed_official	237:f3da66175598	763	#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BREAKPOLARITY_LOW) \|\| \
mbed_official	237:f3da66175598	764	((POLARITY) == TIM_BREAKPOLARITY_HIGH))
mbed_official	237:f3da66175598	765	/**
mbed_official	237:f3da66175598	766	* @}
mbed_official	237:f3da66175598	767	*/
mbed_official	237:f3da66175598	768	/** @defgroup TIM_AOE_Bit_Set_Reset
mbed_official	237:f3da66175598	769	* @{
mbed_official	237:f3da66175598	770	*/
mbed_official	237:f3da66175598	771	#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
mbed_official	237:f3da66175598	772	#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	773
mbed_official	237:f3da66175598	774	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) \|\| \
mbed_official	237:f3da66175598	775	((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
mbed_official	237:f3da66175598	776	/**
mbed_official	237:f3da66175598	777	* @}
mbed_official	237:f3da66175598	778	*/
mbed_official	237:f3da66175598	779
mbed_official	237:f3da66175598	780	/** @defgroup TIM_Master_Mode_Selection
mbed_official	237:f3da66175598	781	* @{
mbed_official	237:f3da66175598	782	*/
mbed_official	237:f3da66175598	783	#define TIM_TRGO_RESET ((uint32_t)0x0000)
mbed_official	237:f3da66175598	784	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
mbed_official	237:f3da66175598	785	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
mbed_official	237:f3da66175598	786	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	237:f3da66175598	787	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
mbed_official	237:f3da66175598	788	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
mbed_official	237:f3da66175598	789	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
mbed_official	237:f3da66175598	790	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	237:f3da66175598	791
mbed_official	237:f3da66175598	792	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) \|\| \
mbed_official	237:f3da66175598	793	((SOURCE) == TIM_TRGO_ENABLE) \|\| \
mbed_official	237:f3da66175598	794	((SOURCE) == TIM_TRGO_UPDATE) \|\| \
mbed_official	237:f3da66175598	795	((SOURCE) == TIM_TRGO_OC1) \|\| \
mbed_official	237:f3da66175598	796	((SOURCE) == TIM_TRGO_OC1REF) \|\| \
mbed_official	237:f3da66175598	797	((SOURCE) == TIM_TRGO_OC2REF) \|\| \
mbed_official	237:f3da66175598	798	((SOURCE) == TIM_TRGO_OC3REF) \|\| \
mbed_official	237:f3da66175598	799	((SOURCE) == TIM_TRGO_OC4REF))
mbed_official	237:f3da66175598	800
mbed_official	237:f3da66175598	801
mbed_official	237:f3da66175598	802	/**
mbed_official	237:f3da66175598	803	* @}
mbed_official	237:f3da66175598	804	*/
mbed_official	237:f3da66175598	805	/** @defgroup TIM_Master_Slave_Mode
mbed_official	237:f3da66175598	806	* @{
mbed_official	237:f3da66175598	807	*/
mbed_official	237:f3da66175598	808
mbed_official	237:f3da66175598	809	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
mbed_official	237:f3da66175598	810	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	811	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
mbed_official	237:f3da66175598	812	((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
mbed_official	237:f3da66175598	813	/**
mbed_official	237:f3da66175598	814	* @}
mbed_official	237:f3da66175598	815	*/
mbed_official	237:f3da66175598	816	/** @defgroup TIM_Trigger_Selection
mbed_official	237:f3da66175598	817	* @{
mbed_official	237:f3da66175598	818	*/
mbed_official	237:f3da66175598	819
mbed_official	237:f3da66175598	820	#define TIM_TS_ITR0 ((uint32_t)0x0000)
mbed_official	237:f3da66175598	821	#define TIM_TS_ITR1 ((uint32_t)0x0010)
mbed_official	237:f3da66175598	822	#define TIM_TS_ITR2 ((uint32_t)0x0020)
mbed_official	237:f3da66175598	823	#define TIM_TS_ITR3 ((uint32_t)0x0030)
mbed_official	237:f3da66175598	824	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
mbed_official	237:f3da66175598	825	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
mbed_official	237:f3da66175598	826	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
mbed_official	237:f3da66175598	827	#define TIM_TS_ETRF ((uint32_t)0x0070)
mbed_official	237:f3da66175598	828	#define TIM_TS_NONE ((uint32_t)0xFFFF)
mbed_official	237:f3da66175598	829	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	237:f3da66175598	830	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	237:f3da66175598	831	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	237:f3da66175598	832	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	237:f3da66175598	833	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
mbed_official	237:f3da66175598	834	((SELECTION) == TIM_TS_TI1FP1) \|\| \
mbed_official	237:f3da66175598	835	((SELECTION) == TIM_TS_TI2FP2) \|\| \
mbed_official	237:f3da66175598	836	((SELECTION) == TIM_TS_ETRF))
mbed_official	237:f3da66175598	837	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	237:f3da66175598	838	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	237:f3da66175598	839	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	237:f3da66175598	840	((SELECTION) == TIM_TS_ITR3))
mbed_official	237:f3da66175598	841	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	237:f3da66175598	842	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	237:f3da66175598	843	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	237:f3da66175598	844	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	237:f3da66175598	845	((SELECTION) == TIM_TS_NONE))
mbed_official	237:f3da66175598	846	/**
mbed_official	237:f3da66175598	847	* @}
mbed_official	237:f3da66175598	848	*/
mbed_official	237:f3da66175598	849
mbed_official	237:f3da66175598	850	/** @defgroup TIM_Trigger_Polarity
mbed_official	237:f3da66175598	851	* @{
mbed_official	237:f3da66175598	852	*/
mbed_official	237:f3da66175598	853	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
mbed_official	237:f3da66175598	854	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
mbed_official	237:f3da66175598	855	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	237:f3da66175598	856	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	237:f3da66175598	857	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	237:f3da66175598	858
mbed_official	237:f3da66175598	859	#define IS_TIM_TRIGGERPOLARITY(POLARITY) (((POLARITY) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
mbed_official	237:f3da66175598	860	((POLARITY) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
mbed_official	237:f3da66175598	861	((POLARITY) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
mbed_official	237:f3da66175598	862	((POLARITY) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
mbed_official	237:f3da66175598	863	((POLARITY) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
mbed_official	237:f3da66175598	864	/**
mbed_official	237:f3da66175598	865	* @}
mbed_official	237:f3da66175598	866	*/
mbed_official	237:f3da66175598	867
mbed_official	237:f3da66175598	868	/** @defgroup TIM_Trigger_Prescaler
mbed_official	237:f3da66175598	869	* @{
mbed_official	237:f3da66175598	870	*/
mbed_official	237:f3da66175598	871	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	237:f3da66175598	872	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
mbed_official	237:f3da66175598	873	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
mbed_official	237:f3da66175598	874	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
mbed_official	237:f3da66175598	875
mbed_official	237:f3da66175598	876	#define IS_TIM_TRIGGERPRESCALER(PRESCALER) (((PRESCALER) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
mbed_official	237:f3da66175598	877	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
mbed_official	237:f3da66175598	878	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
mbed_official	237:f3da66175598	879	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV8))
mbed_official	237:f3da66175598	880	/**
mbed_official	237:f3da66175598	881	* @}
mbed_official	237:f3da66175598	882	*/
mbed_official	237:f3da66175598	883
mbed_official	237:f3da66175598	884	/** @defgroup TIM_Trigger_Filter
mbed_official	237:f3da66175598	885	* @{
mbed_official	237:f3da66175598	886	*/
mbed_official	237:f3da66175598	887
mbed_official	237:f3da66175598	888	#define IS_TIM_TRIGGERFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	237:f3da66175598	889	/**
mbed_official	237:f3da66175598	890	* @}
mbed_official	237:f3da66175598	891	*/
mbed_official	237:f3da66175598	892
mbed_official	237:f3da66175598	893	/** @defgroup TIM_TI1_Selection
mbed_official	237:f3da66175598	894	* @{
mbed_official	237:f3da66175598	895	*/
mbed_official	237:f3da66175598	896
mbed_official	237:f3da66175598	897	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
mbed_official	237:f3da66175598	898	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
mbed_official	237:f3da66175598	899
mbed_official	237:f3da66175598	900	#define IS_TIM_TI1SELECTION(TI1SELECTION) (((TI1SELECTION) == TIM_TI1SELECTION_CH1) \|\| \
mbed_official	237:f3da66175598	901	((TI1SELECTION) == TIM_TI1SELECTION_XORCOMBINATION))
mbed_official	237:f3da66175598	902
mbed_official	237:f3da66175598	903	/**
mbed_official	237:f3da66175598	904	* @}
mbed_official	237:f3da66175598	905	*/
mbed_official	237:f3da66175598	906
mbed_official	237:f3da66175598	907	/** @defgroup TIM_DMA_Burst_Length
mbed_official	237:f3da66175598	908	* @{
mbed_official	237:f3da66175598	909	*/
mbed_official	237:f3da66175598	910
mbed_official	237:f3da66175598	911	#define TIM_DMABurstLength_1Transfer (0x00000000)
mbed_official	237:f3da66175598	912	#define TIM_DMABurstLength_2Transfers (0x00000100)
mbed_official	237:f3da66175598	913	#define TIM_DMABurstLength_3Transfers (0x00000200)
mbed_official	237:f3da66175598	914	#define TIM_DMABurstLength_4Transfers (0x00000300)
mbed_official	237:f3da66175598	915	#define TIM_DMABurstLength_5Transfers (0x00000400)
mbed_official	237:f3da66175598	916	#define TIM_DMABurstLength_6Transfers (0x00000500)
mbed_official	237:f3da66175598	917	#define TIM_DMABurstLength_7Transfers (0x00000600)
mbed_official	237:f3da66175598	918	#define TIM_DMABurstLength_8Transfers (0x00000700)
mbed_official	237:f3da66175598	919	#define TIM_DMABurstLength_9Transfers (0x00000800)
mbed_official	237:f3da66175598	920	#define TIM_DMABurstLength_10Transfers (0x00000900)
mbed_official	237:f3da66175598	921	#define TIM_DMABurstLength_11Transfers (0x00000A00)
mbed_official	237:f3da66175598	922	#define TIM_DMABurstLength_12Transfers (0x00000B00)
mbed_official	237:f3da66175598	923	#define TIM_DMABurstLength_13Transfers (0x00000C00)
mbed_official	237:f3da66175598	924	#define TIM_DMABurstLength_14Transfers (0x00000D00)
mbed_official	237:f3da66175598	925	#define TIM_DMABurstLength_15Transfers (0x00000E00)
mbed_official	237:f3da66175598	926	#define TIM_DMABurstLength_16Transfers (0x00000F00)
mbed_official	237:f3da66175598	927	#define TIM_DMABurstLength_17Transfers (0x00001000)
mbed_official	237:f3da66175598	928	#define TIM_DMABurstLength_18Transfers (0x00001100)
mbed_official	237:f3da66175598	929	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) \|\| \
mbed_official	237:f3da66175598	930	((LENGTH) == TIM_DMABurstLength_2Transfers) \|\| \
mbed_official	237:f3da66175598	931	((LENGTH) == TIM_DMABurstLength_3Transfers) \|\| \
mbed_official	237:f3da66175598	932	((LENGTH) == TIM_DMABurstLength_4Transfers) \|\| \
mbed_official	237:f3da66175598	933	((LENGTH) == TIM_DMABurstLength_5Transfers) \|\| \
mbed_official	237:f3da66175598	934	((LENGTH) == TIM_DMABurstLength_6Transfers) \|\| \
mbed_official	237:f3da66175598	935	((LENGTH) == TIM_DMABurstLength_7Transfers) \|\| \
mbed_official	237:f3da66175598	936	((LENGTH) == TIM_DMABurstLength_8Transfers) \|\| \
mbed_official	237:f3da66175598	937	((LENGTH) == TIM_DMABurstLength_9Transfers) \|\| \
mbed_official	237:f3da66175598	938	((LENGTH) == TIM_DMABurstLength_10Transfers) \|\| \
mbed_official	237:f3da66175598	939	((LENGTH) == TIM_DMABurstLength_11Transfers) \|\| \
mbed_official	237:f3da66175598	940	((LENGTH) == TIM_DMABurstLength_12Transfers) \|\| \
mbed_official	237:f3da66175598	941	((LENGTH) == TIM_DMABurstLength_13Transfers) \|\| \
mbed_official	237:f3da66175598	942	((LENGTH) == TIM_DMABurstLength_14Transfers) \|\| \
mbed_official	237:f3da66175598	943	((LENGTH) == TIM_DMABurstLength_15Transfers) \|\| \
mbed_official	237:f3da66175598	944	((LENGTH) == TIM_DMABurstLength_16Transfers) \|\| \
mbed_official	237:f3da66175598	945	((LENGTH) == TIM_DMABurstLength_17Transfers) \|\| \
mbed_official	237:f3da66175598	946	((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official	237:f3da66175598	947	/**
mbed_official	237:f3da66175598	948	* @}
mbed_official	237:f3da66175598	949	*/
mbed_official	237:f3da66175598	950
mbed_official	237:f3da66175598	951	/** @defgroup TIM_Input_Capture_Filer_Value
mbed_official	237:f3da66175598	952	* @{
mbed_official	237:f3da66175598	953	*/
mbed_official	237:f3da66175598	954
mbed_official	237:f3da66175598	955	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	237:f3da66175598	956	/**
mbed_official	237:f3da66175598	957	* @}
mbed_official	237:f3da66175598	958	*/
mbed_official	237:f3da66175598	959
mbed_official	237:f3da66175598	960	/** @defgroup DMA_Handle_index
mbed_official	237:f3da66175598	961	* @{
mbed_official	237:f3da66175598	962	*/
mbed_official	237:f3da66175598	963	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
mbed_official	237:f3da66175598	964	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
mbed_official	237:f3da66175598	965	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
mbed_official	237:f3da66175598	966	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
mbed_official	237:f3da66175598	967	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
mbed_official	237:f3da66175598	968	#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /!< Index of the DMA handle used for Commutation DMA requests /
mbed_official	237:f3da66175598	969	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /!< Index of the DMA handle used for Trigger DMA requests /
mbed_official	237:f3da66175598	970	/**
mbed_official	237:f3da66175598	971	* @}
mbed_official	237:f3da66175598	972	*/
mbed_official	237:f3da66175598	973
mbed_official	237:f3da66175598	974	/** @defgroup Channel_CC_State
mbed_official	237:f3da66175598	975	* @{
mbed_official	237:f3da66175598	976	*/
mbed_official	237:f3da66175598	977	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
mbed_official	237:f3da66175598	978	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	979	#define TIM_CCxN_ENABLE ((uint32_t)0x0004)
mbed_official	237:f3da66175598	980	#define TIM_CCxN_DISABLE ((uint32_t)0x0000)
mbed_official	237:f3da66175598	981	/**
mbed_official	237:f3da66175598	982	* @}
mbed_official	237:f3da66175598	983	*/
mbed_official	237:f3da66175598	984
mbed_official	237:f3da66175598	985	/**
mbed_official	237:f3da66175598	986	* @}
mbed_official	237:f3da66175598	987	*/
mbed_official	237:f3da66175598	988
mbed_official	237:f3da66175598	989	/* Exported macros -----------------------------------------------------------*/
mbed_official	237:f3da66175598	990	/** @defgroup TIM_Exported_Macros
mbed_official	237:f3da66175598	991	* @{
mbed_official	237:f3da66175598	992	*/
mbed_official	237:f3da66175598	993
mbed_official	237:f3da66175598	994	/** @brief Reset TIM handle state
mbed_official	237:f3da66175598	995	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	996	* @retval None
mbed_official	237:f3da66175598	997	*/
mbed_official	237:f3da66175598	998	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	999
mbed_official	237:f3da66175598	1000	/**
mbed_official	237:f3da66175598	1001	* @brief Enable the TIM peripheral.
mbed_official	237:f3da66175598	1002	* @param __HANDLE__: TIM handle
mbed_official	237:f3da66175598	1003	* @retval None
mbed_official	237:f3da66175598	1004	*/
mbed_official	237:f3da66175598	1005	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
mbed_official	237:f3da66175598	1006
mbed_official	237:f3da66175598	1007	/**
mbed_official	237:f3da66175598	1008	* @brief Enable the TIM main Output.
mbed_official	237:f3da66175598	1009	* @param __HANDLE__: TIM handle
mbed_official	237:f3da66175598	1010	* @retval None
mbed_official	237:f3da66175598	1011	*/
mbed_official	237:f3da66175598	1012	#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR\|=(TIM_BDTR_MOE))
mbed_official	237:f3da66175598	1013
mbed_official	237:f3da66175598	1014	/* The counter of a timer instance is disabled only if all the CCx and CCxN
mbed_official	237:f3da66175598	1015	channels have been disabled */
mbed_official	237:f3da66175598	1016	#define CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
mbed_official	237:f3da66175598	1017	#define CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE))
mbed_official	237:f3da66175598	1018
mbed_official	237:f3da66175598	1019	/**
mbed_official	237:f3da66175598	1020	* @brief Disable the TIM peripheral.
mbed_official	237:f3da66175598	1021	* @param __HANDLE__: TIM handle
mbed_official	237:f3da66175598	1022	* @retval None
mbed_official	237:f3da66175598	1023	*/
mbed_official	237:f3da66175598	1024	#define __HAL_TIM_DISABLE(__HANDLE__) \
mbed_official	237:f3da66175598	1025	do { \
mbed_official	237:f3da66175598	1026	if (((__HANDLE__)->Instance->CCER & CCER_CCxE_MASK) == 0) \
mbed_official	237:f3da66175598	1027	{ \
mbed_official	237:f3da66175598	1028	if(((__HANDLE__)->Instance->CCER & CCER_CCxNE_MASK) == 0) \
mbed_official	237:f3da66175598	1029	{ \
mbed_official	237:f3da66175598	1030	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
mbed_official	237:f3da66175598	1031	} \
mbed_official	237:f3da66175598	1032	} \
mbed_official	237:f3da66175598	1033	} while(0)
mbed_official	237:f3da66175598	1034	/* The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN
mbed_official	237:f3da66175598	1035	channels have been disabled */
mbed_official	237:f3da66175598	1036	/**
mbed_official	237:f3da66175598	1037	* @brief Disable the TIM main Output.
mbed_official	237:f3da66175598	1038	* @param __HANDLE__: TIM handle
mbed_official	237:f3da66175598	1039	* @retval None
mbed_official	237:f3da66175598	1040	*/
mbed_official	237:f3da66175598	1041	#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
mbed_official	237:f3da66175598	1042	do { \
mbed_official	237:f3da66175598	1043	if (((__HANDLE__)->Instance->CCER & CCER_CCxE_MASK) == 0) \
mbed_official	237:f3da66175598	1044	{ \
mbed_official	237:f3da66175598	1045	if(((__HANDLE__)->Instance->CCER & CCER_CCxNE_MASK) == 0) \
mbed_official	237:f3da66175598	1046	{ \
mbed_official	237:f3da66175598	1047	(__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
mbed_official	237:f3da66175598	1048	} \
mbed_official	237:f3da66175598	1049	} \
mbed_official	237:f3da66175598	1050	} while(0)
mbed_official	237:f3da66175598	1051
mbed_official	237:f3da66175598	1052	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
mbed_official	237:f3da66175598	1053	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
mbed_official	237:f3da66175598	1054	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
mbed_official	237:f3da66175598	1055	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
mbed_official	237:f3da66175598	1056	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
mbed_official	237:f3da66175598	1057	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
mbed_official	237:f3da66175598	1058
mbed_official	237:f3da66175598	1059	#define __HAL_TIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	237:f3da66175598	1060	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
mbed_official	237:f3da66175598	1061
mbed_official	237:f3da66175598	1062	#define __HAL_TIM_DIRECTION_STATUS(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
mbed_official	237:f3da66175598	1063	#define __HAL_TIM_PRESCALER (__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
mbed_official	237:f3da66175598	1064
mbed_official	237:f3da66175598	1065	#define __HAL_TIM_SetICPrescalerValue(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	237:f3da66175598	1066	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
mbed_official	237:f3da66175598	1067	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
mbed_official	237:f3da66175598	1068	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
mbed_official	237:f3da66175598	1069	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
mbed_official	237:f3da66175598	1070
mbed_official	237:f3da66175598	1071	#define __HAL_TIM_ResetICPrescalerValue(__HANDLE__, __CHANNEL__) \
mbed_official	237:f3da66175598	1072	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
mbed_official	237:f3da66175598	1073	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
mbed_official	237:f3da66175598	1074	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
mbed_official	237:f3da66175598	1075	((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
mbed_official	237:f3da66175598	1076
mbed_official	237:f3da66175598	1077	/**
mbed_official	237:f3da66175598	1078	* @brief Sets the TIM Counter Register value on runtime.
mbed_official	237:f3da66175598	1079	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1080	* @param __COUNTER__: specifies the Counter register new value.
mbed_official	237:f3da66175598	1081	* @retval None
mbed_official	237:f3da66175598	1082	*/
mbed_official	237:f3da66175598	1083	#define __HAL_TIM_SetCounter(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
mbed_official	237:f3da66175598	1084
mbed_official	237:f3da66175598	1085	/**
mbed_official	237:f3da66175598	1086	* @brief Gets the TIM Counter Register value on runtime.
mbed_official	237:f3da66175598	1087	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1088	* @retval None
mbed_official	237:f3da66175598	1089	*/
mbed_official	237:f3da66175598	1090	#define __HAL_TIM_GetCounter(__HANDLE__) \
mbed_official	237:f3da66175598	1091	((__HANDLE__)->Instance->CNT)
mbed_official	237:f3da66175598	1092
mbed_official	237:f3da66175598	1093	/**
mbed_official	237:f3da66175598	1094	* @brief Sets the TIM Autoreload Register value on runtime without calling
mbed_official	237:f3da66175598	1095	* another time any Init function.
mbed_official	237:f3da66175598	1096	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1097	* @param __AUTORELOAD__: specifies the Counter register new value.
mbed_official	237:f3da66175598	1098	* @retval None
mbed_official	237:f3da66175598	1099	*/
mbed_official	237:f3da66175598	1100	#define __HAL_TIM_SetAutoreload(__HANDLE__, __AUTORELOAD__) \
mbed_official	237:f3da66175598	1101	do{ \
mbed_official	237:f3da66175598	1102	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
mbed_official	237:f3da66175598	1103	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
mbed_official	237:f3da66175598	1104	} while(0)
mbed_official	237:f3da66175598	1105
mbed_official	237:f3da66175598	1106	/**
mbed_official	237:f3da66175598	1107	* @brief Gets the TIM Autoreload Register value on runtime
mbed_official	237:f3da66175598	1108	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1109	* @retval None
mbed_official	237:f3da66175598	1110	*/
mbed_official	237:f3da66175598	1111	#define __HAL_TIM_GetAutoreload(__HANDLE__) \
mbed_official	237:f3da66175598	1112	((__HANDLE__)->Instance->ARR)
mbed_official	237:f3da66175598	1113
mbed_official	237:f3da66175598	1114	/**
mbed_official	237:f3da66175598	1115	* @brief Sets the TIM Clock Division value on runtime without calling
mbed_official	237:f3da66175598	1116	* another time any Init function.
mbed_official	237:f3da66175598	1117	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1118	* @param __CKD__: specifies the clock division value.
mbed_official	237:f3da66175598	1119	* This parameter can be one of the following value:
mbed_official	237:f3da66175598	1120	* @arg TIM_CLOCKDIVISION_DIV1
mbed_official	237:f3da66175598	1121	* @arg TIM_CLOCKDIVISION_DIV2
mbed_official	237:f3da66175598	1122	* @arg TIM_CLOCKDIVISION_DIV4
mbed_official	237:f3da66175598	1123	* @retval None
mbed_official	237:f3da66175598	1124	*/
mbed_official	237:f3da66175598	1125	#define __HAL_TIM_SetClockDivision(__HANDLE__, __CKD__) \
mbed_official	237:f3da66175598	1126	do{ \
mbed_official	237:f3da66175598	1127	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
mbed_official	237:f3da66175598	1128	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
mbed_official	237:f3da66175598	1129	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
mbed_official	237:f3da66175598	1130	} while(0)
mbed_official	237:f3da66175598	1131
mbed_official	237:f3da66175598	1132	/**
mbed_official	237:f3da66175598	1133	* @brief Gets the TIM Clock Division value on runtime
mbed_official	237:f3da66175598	1134	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1135	* @retval None
mbed_official	237:f3da66175598	1136	*/
mbed_official	237:f3da66175598	1137	#define __HAL_TIM_GetClockDivision(__HANDLE__) \
mbed_official	237:f3da66175598	1138	((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
mbed_official	237:f3da66175598	1139
mbed_official	237:f3da66175598	1140	/**
mbed_official	237:f3da66175598	1141	* @brief Sets the TIM Input Capture prescaler on runtime without calling
mbed_official	237:f3da66175598	1142	* another time HAL_TIM_IC_ConfigChannel() function.
mbed_official	237:f3da66175598	1143	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1144	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	237:f3da66175598	1145	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1146	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1147	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1148	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1149	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1150	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
mbed_official	237:f3da66175598	1151	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1152	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	237:f3da66175598	1153	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	237:f3da66175598	1154	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	237:f3da66175598	1155	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	237:f3da66175598	1156	* @retval None
mbed_official	237:f3da66175598	1157	*/
mbed_official	237:f3da66175598	1158	#define __HAL_TIM_SetICPrescaler(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	237:f3da66175598	1159	do{ \
mbed_official	237:f3da66175598	1160	__HAL_TIM_ResetICPrescalerValue((__HANDLE__), (__CHANNEL__)); \
mbed_official	237:f3da66175598	1161	__HAL_TIM_SetICPrescalerValue((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
mbed_official	237:f3da66175598	1162	} while(0)
mbed_official	237:f3da66175598	1163
mbed_official	237:f3da66175598	1164	/**
mbed_official	237:f3da66175598	1165	* @brief Gets the TIM Input Capture prescaler on runtime
mbed_official	237:f3da66175598	1166	* @param __HANDLE__: TIM handle.
mbed_official	237:f3da66175598	1167	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	237:f3da66175598	1168	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1169	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
mbed_official	237:f3da66175598	1170	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
mbed_official	237:f3da66175598	1171	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
mbed_official	237:f3da66175598	1172	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
mbed_official	237:f3da66175598	1173	* @retval None
mbed_official	237:f3da66175598	1174	*/
mbed_official	237:f3da66175598	1175	#define __HAL_TIM_GetICPrescaler(__HANDLE__, __CHANNEL__) \
mbed_official	237:f3da66175598	1176	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
mbed_official	237:f3da66175598	1177	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
mbed_official	237:f3da66175598	1178	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
mbed_official	237:f3da66175598	1179	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
mbed_official	237:f3da66175598	1180
mbed_official	237:f3da66175598	1181	/**
mbed_official	237:f3da66175598	1182	* @}
mbed_official	237:f3da66175598	1183	*/
mbed_official	237:f3da66175598	1184
mbed_official	237:f3da66175598	1185	/* Include TIM HAL Extension module */
mbed_official	237:f3da66175598	1186	#include "stm32f3xx_hal_tim_ex.h"
mbed_official	237:f3da66175598	1187
mbed_official	237:f3da66175598	1188	/* Exported functions --------------------------------------------------------*/
mbed_official	237:f3da66175598	1189
mbed_official	237:f3da66175598	1190	/* Time Base functions ********************************************************/
mbed_official	237:f3da66175598	1191	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1192	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1193	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1194	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1195	/* Blocking mode: Polling */
mbed_official	237:f3da66175598	1196	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1197	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1198	/* Non-Blocking mode: Interrupt */
mbed_official	237:f3da66175598	1199	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1200	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1201	/* Non-Blocking mode: DMA */
mbed_official	237:f3da66175598	1202	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
mbed_official	237:f3da66175598	1203	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1204
mbed_official	237:f3da66175598	1205	/* Timer Output Compare functions **********************************************/
mbed_official	237:f3da66175598	1206	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1207	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1208	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1209	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1210	/* Blocking mode: Polling */
mbed_official	237:f3da66175598	1211	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1212	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1213	/* Non-Blocking mode: Interrupt */
mbed_official	237:f3da66175598	1214	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1215	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1216	/* Non-Blocking mode: DMA */
mbed_official	237:f3da66175598	1217	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	237:f3da66175598	1218	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1219
mbed_official	237:f3da66175598	1220	/* Timer PWM functions *********************************************************/
mbed_official	237:f3da66175598	1221	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1222	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1223	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1224	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1225	/* Blocking mode: Polling */
mbed_official	237:f3da66175598	1226	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1227	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1228	/* Non-Blocking mode: Interrupt */
mbed_official	237:f3da66175598	1229	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1230	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1231	/* Non-Blocking mode: DMA */
mbed_official	237:f3da66175598	1232	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	237:f3da66175598	1233	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1234
mbed_official	237:f3da66175598	1235	/* Timer Input Capture functions ***********************************************/
mbed_official	237:f3da66175598	1236	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1237	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1238	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1239	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1240	/* Blocking mode: Polling */
mbed_official	237:f3da66175598	1241	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1242	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1243	/* Non-Blocking mode: Interrupt */
mbed_official	237:f3da66175598	1244	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1245	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1246	/* Non-Blocking mode: DMA */
mbed_official	237:f3da66175598	1247	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	237:f3da66175598	1248	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1249
mbed_official	237:f3da66175598	1250	/* Timer One Pulse functions ***************************************************/
mbed_official	237:f3da66175598	1251	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
mbed_official	237:f3da66175598	1252	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1253	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1254	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1255	/* Blocking mode: Polling */
mbed_official	237:f3da66175598	1256	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	237:f3da66175598	1257	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	237:f3da66175598	1258	/* Non-Blocking mode: Interrupt */
mbed_official	237:f3da66175598	1259	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	237:f3da66175598	1260	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	237:f3da66175598	1261
mbed_official	237:f3da66175598	1262	/* Timer Encoder functions *****************************************************/
mbed_official	237:f3da66175598	1263	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
mbed_official	237:f3da66175598	1264	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1265
mbed_official	237:f3da66175598	1266
mbed_official	237:f3da66175598	1267
mbed_official	237:f3da66175598	1268
mbed_official	237:f3da66175598	1269
mbed_official	237:f3da66175598	1270
mbed_official	237:f3da66175598	1271
mbed_official	237:f3da66175598	1272	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1273	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1274	/* Blocking mode: Polling */
mbed_official	237:f3da66175598	1275	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1276	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1277	/* Non-Blocking mode: Interrupt */
mbed_official	237:f3da66175598	1278	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1279	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1280	/* Non-Blocking mode: DMA */
mbed_official	237:f3da66175598	1281	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
mbed_official	237:f3da66175598	1282	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1283
mbed_official	237:f3da66175598	1284	/* Interrupt Handler functions **********************************************/
mbed_official	237:f3da66175598	1285	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1286
mbed_official	237:f3da66175598	1287	/* Control functions *********************************************************/
mbed_official	237:f3da66175598	1288	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	237:f3da66175598	1289	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	237:f3da66175598	1290	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	237:f3da66175598	1291	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
mbed_official	237:f3da66175598	1292	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
mbed_official	237:f3da66175598	1293	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
mbed_official	237:f3da66175598	1294	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
mbed_official	237:f3da66175598	1295	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
mbed_official	237:f3da66175598	1296	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	237:f3da66175598	1297	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	237:f3da66175598	1298	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	237:f3da66175598	1299	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	237:f3da66175598	1300	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	237:f3da66175598	1301	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	237:f3da66175598	1302	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
mbed_official	237:f3da66175598	1303	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	237:f3da66175598	1304
mbed_official	237:f3da66175598	1305	/* Callback in non blocking modes (Interrupt and DMA) *************************/
mbed_official	237:f3da66175598	1306	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1307	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1308	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1309	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1310	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1311	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1312
mbed_official	237:f3da66175598	1313	/* Peripheral State functions **************************************************/
mbed_official	237:f3da66175598	1314	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1315	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1316	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1317	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1318	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1319	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
mbed_official	237:f3da66175598	1320
mbed_official	237:f3da66175598	1321	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure);
mbed_official	237:f3da66175598	1322	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	237:f3da66175598	1323	void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	237:f3da66175598	1324	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	237:f3da66175598	1325	void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	237:f3da66175598	1326	void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	237:f3da66175598	1327	void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official	237:f3da66175598	1328	uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
mbed_official	237:f3da66175598	1329
mbed_official	237:f3da66175598	1330	void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	1331	void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	1332	void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	1333	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
mbed_official	237:f3da66175598	1334
mbed_official	237:f3da66175598	1335
mbed_official	237:f3da66175598	1336
mbed_official	237:f3da66175598	1337
mbed_official	237:f3da66175598	1338	/**
mbed_official	237:f3da66175598	1339	* @}
mbed_official	237:f3da66175598	1340	*/
mbed_official	237:f3da66175598	1341
mbed_official	237:f3da66175598	1342	/**
mbed_official	237:f3da66175598	1343	* @}
mbed_official	237:f3da66175598	1344	*/
mbed_official	237:f3da66175598	1345
mbed_official	237:f3da66175598	1346	#ifdef __cplusplus
mbed_official	237:f3da66175598	1347	}
mbed_official	237:f3da66175598	1348	#endif
mbed_official	237:f3da66175598	1349
mbed_official	237:f3da66175598	1350	#endif /* __STM32F3xx_HAL_TIM_H */
mbed_official	237:f3da66175598	1351
mbed_official	237:f3da66175598	1352	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	14 Jan 2015
Imports:	4
Forks:	0
Commits:	446
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_tim.h@237:f3da66175598, 2014-06-24 (annotated)

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