mbed library sources
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_hal_pwr.c@354:e67efb2aab0e, 2014-10-16 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Oct 16 15:00:10 2014 +0100
- Revision:
- 354:e67efb2aab0e
Synchronized with git revision 36a8882a54cbf25645fa6e11af937c8b8048e184
Full URL: https://github.com/mbedmicro/mbed/commit/36a8882a54cbf25645fa6e11af937c8b8048e184/
Targets: NUCLEO_L152RE - Migration to STM32Cube driver (CMSIS and HAL)
Who changed what in which revision?
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mbed_official | 354:e67efb2aab0e | 1 | /** |
mbed_official | 354:e67efb2aab0e | 2 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 3 | * @file stm32l1xx_hal_pwr.c |
mbed_official | 354:e67efb2aab0e | 4 | * @author MCD Application Team |
mbed_official | 354:e67efb2aab0e | 5 | * @version V1.0.0 |
mbed_official | 354:e67efb2aab0e | 6 | * @date 5-September-2014 |
mbed_official | 354:e67efb2aab0e | 7 | * @brief PWR HAL module driver. |
mbed_official | 354:e67efb2aab0e | 8 | * |
mbed_official | 354:e67efb2aab0e | 9 | * This file provides firmware functions to manage the following |
mbed_official | 354:e67efb2aab0e | 10 | * functionalities of the Power Controller (PWR) peripheral: |
mbed_official | 354:e67efb2aab0e | 11 | * + Initialization/de-initialization functions |
mbed_official | 354:e67efb2aab0e | 12 | * + Peripheral Control functions |
mbed_official | 354:e67efb2aab0e | 13 | * |
mbed_official | 354:e67efb2aab0e | 14 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 15 | * @attention |
mbed_official | 354:e67efb2aab0e | 16 | * |
mbed_official | 354:e67efb2aab0e | 17 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 354:e67efb2aab0e | 18 | * |
mbed_official | 354:e67efb2aab0e | 19 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 354:e67efb2aab0e | 20 | * are permitted provided that the following conditions are met: |
mbed_official | 354:e67efb2aab0e | 21 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 22 | * this list of conditions and the following disclaimer. |
mbed_official | 354:e67efb2aab0e | 23 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 24 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 354:e67efb2aab0e | 25 | * and/or other materials provided with the distribution. |
mbed_official | 354:e67efb2aab0e | 26 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 354:e67efb2aab0e | 27 | * may be used to endorse or promote products derived from this software |
mbed_official | 354:e67efb2aab0e | 28 | * without specific prior written permission. |
mbed_official | 354:e67efb2aab0e | 29 | * |
mbed_official | 354:e67efb2aab0e | 30 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 354:e67efb2aab0e | 31 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 354:e67efb2aab0e | 32 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 354:e67efb2aab0e | 33 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 354:e67efb2aab0e | 34 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 354:e67efb2aab0e | 35 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 354:e67efb2aab0e | 36 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 354:e67efb2aab0e | 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 354:e67efb2aab0e | 38 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 354:e67efb2aab0e | 39 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 354:e67efb2aab0e | 40 | * |
mbed_official | 354:e67efb2aab0e | 41 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 42 | */ |
mbed_official | 354:e67efb2aab0e | 43 | |
mbed_official | 354:e67efb2aab0e | 44 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 45 | #include "stm32l1xx_hal.h" |
mbed_official | 354:e67efb2aab0e | 46 | |
mbed_official | 354:e67efb2aab0e | 47 | /** @addtogroup STM32L1xx_HAL_Driver |
mbed_official | 354:e67efb2aab0e | 48 | * @{ |
mbed_official | 354:e67efb2aab0e | 49 | */ |
mbed_official | 354:e67efb2aab0e | 50 | |
mbed_official | 354:e67efb2aab0e | 51 | /** @defgroup PWR PWR |
mbed_official | 354:e67efb2aab0e | 52 | * @brief PWR HAL module driver |
mbed_official | 354:e67efb2aab0e | 53 | * @{ |
mbed_official | 354:e67efb2aab0e | 54 | */ |
mbed_official | 354:e67efb2aab0e | 55 | |
mbed_official | 354:e67efb2aab0e | 56 | #ifdef HAL_PWR_MODULE_ENABLED |
mbed_official | 354:e67efb2aab0e | 57 | |
mbed_official | 354:e67efb2aab0e | 58 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 59 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 60 | #define PVD_MODE_IT ((uint32_t)0x00010000) |
mbed_official | 354:e67efb2aab0e | 61 | #define PVD_MODE_EVT ((uint32_t)0x00020000) |
mbed_official | 354:e67efb2aab0e | 62 | #define PVD_RISING_EDGE ((uint32_t)0x00000001) |
mbed_official | 354:e67efb2aab0e | 63 | #define PVD_FALLING_EDGE ((uint32_t)0x00000002) |
mbed_official | 354:e67efb2aab0e | 64 | |
mbed_official | 354:e67efb2aab0e | 65 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 66 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 67 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 68 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 69 | |
mbed_official | 354:e67efb2aab0e | 70 | /** @defgroup PWR_Exported_Functions PWR Exported Functions |
mbed_official | 354:e67efb2aab0e | 71 | * @{ |
mbed_official | 354:e67efb2aab0e | 72 | */ |
mbed_official | 354:e67efb2aab0e | 73 | |
mbed_official | 354:e67efb2aab0e | 74 | /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 354:e67efb2aab0e | 75 | * @brief Initialization and de-initialization functions |
mbed_official | 354:e67efb2aab0e | 76 | * |
mbed_official | 354:e67efb2aab0e | 77 | @verbatim |
mbed_official | 354:e67efb2aab0e | 78 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 79 | ##### Initialization and de-initialization functions ##### |
mbed_official | 354:e67efb2aab0e | 80 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 81 | [..] |
mbed_official | 354:e67efb2aab0e | 82 | After reset, the backup domain (RTC registers, RTC backup data |
mbed_official | 354:e67efb2aab0e | 83 | registers) is protected against possible unwanted |
mbed_official | 354:e67efb2aab0e | 84 | write accesses. |
mbed_official | 354:e67efb2aab0e | 85 | To enable access to the RTC Domain and RTC registers, proceed as follows: |
mbed_official | 354:e67efb2aab0e | 86 | (+) Enable the Power Controller (PWR) APB1 interface clock using the |
mbed_official | 354:e67efb2aab0e | 87 | __PWR_CLK_ENABLE() macro. |
mbed_official | 354:e67efb2aab0e | 88 | (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. |
mbed_official | 354:e67efb2aab0e | 89 | |
mbed_official | 354:e67efb2aab0e | 90 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 91 | * @{ |
mbed_official | 354:e67efb2aab0e | 92 | */ |
mbed_official | 354:e67efb2aab0e | 93 | |
mbed_official | 354:e67efb2aab0e | 94 | /** |
mbed_official | 354:e67efb2aab0e | 95 | * @brief Deinitializes the PWR peripheral registers to their default reset values. |
mbed_official | 354:e67efb2aab0e | 96 | * @note Before calling this function, the VOS[1:0] bits should be configured |
mbed_official | 354:e67efb2aab0e | 97 | * to "10" and the system frequency has to be configured accordingly. |
mbed_official | 354:e67efb2aab0e | 98 | * To configure the VOS[1:0] bits, use the PWR_VoltageScalingConfig() |
mbed_official | 354:e67efb2aab0e | 99 | * function. |
mbed_official | 354:e67efb2aab0e | 100 | * @note ULP and FWU bits are not reset by this function. |
mbed_official | 354:e67efb2aab0e | 101 | * @retval None |
mbed_official | 354:e67efb2aab0e | 102 | */ |
mbed_official | 354:e67efb2aab0e | 103 | void HAL_PWR_DeInit(void) |
mbed_official | 354:e67efb2aab0e | 104 | { |
mbed_official | 354:e67efb2aab0e | 105 | __PWR_FORCE_RESET(); |
mbed_official | 354:e67efb2aab0e | 106 | __PWR_RELEASE_RESET(); |
mbed_official | 354:e67efb2aab0e | 107 | } |
mbed_official | 354:e67efb2aab0e | 108 | |
mbed_official | 354:e67efb2aab0e | 109 | /** |
mbed_official | 354:e67efb2aab0e | 110 | * @brief Enables access to the backup domain (RTC registers, RTC |
mbed_official | 354:e67efb2aab0e | 111 | * backup data registers ). |
mbed_official | 354:e67efb2aab0e | 112 | * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the |
mbed_official | 354:e67efb2aab0e | 113 | * Backup Domain Access should be kept enabled. |
mbed_official | 354:e67efb2aab0e | 114 | * @retval None |
mbed_official | 354:e67efb2aab0e | 115 | */ |
mbed_official | 354:e67efb2aab0e | 116 | void HAL_PWR_EnableBkUpAccess(void) |
mbed_official | 354:e67efb2aab0e | 117 | { |
mbed_official | 354:e67efb2aab0e | 118 | /* Enable access to RTC and backup registers */ |
mbed_official | 354:e67efb2aab0e | 119 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; |
mbed_official | 354:e67efb2aab0e | 120 | } |
mbed_official | 354:e67efb2aab0e | 121 | |
mbed_official | 354:e67efb2aab0e | 122 | /** |
mbed_official | 354:e67efb2aab0e | 123 | * @brief Disables access to the backup domain (RTC registers, RTC |
mbed_official | 354:e67efb2aab0e | 124 | * backup data registers). |
mbed_official | 354:e67efb2aab0e | 125 | * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the |
mbed_official | 354:e67efb2aab0e | 126 | * Backup Domain Access should be kept enabled. |
mbed_official | 354:e67efb2aab0e | 127 | * @retval None |
mbed_official | 354:e67efb2aab0e | 128 | */ |
mbed_official | 354:e67efb2aab0e | 129 | void HAL_PWR_DisableBkUpAccess(void) |
mbed_official | 354:e67efb2aab0e | 130 | { |
mbed_official | 354:e67efb2aab0e | 131 | /* Disable access to RTC and backup registers */ |
mbed_official | 354:e67efb2aab0e | 132 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE; |
mbed_official | 354:e67efb2aab0e | 133 | } |
mbed_official | 354:e67efb2aab0e | 134 | |
mbed_official | 354:e67efb2aab0e | 135 | /** |
mbed_official | 354:e67efb2aab0e | 136 | * @} |
mbed_official | 354:e67efb2aab0e | 137 | */ |
mbed_official | 354:e67efb2aab0e | 138 | |
mbed_official | 354:e67efb2aab0e | 139 | /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions |
mbed_official | 354:e67efb2aab0e | 140 | * @brief Low Power modes configuration functions |
mbed_official | 354:e67efb2aab0e | 141 | * |
mbed_official | 354:e67efb2aab0e | 142 | @verbatim |
mbed_official | 354:e67efb2aab0e | 143 | |
mbed_official | 354:e67efb2aab0e | 144 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 145 | ##### Peripheral Control functions ##### |
mbed_official | 354:e67efb2aab0e | 146 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 147 | |
mbed_official | 354:e67efb2aab0e | 148 | *** PVD configuration *** |
mbed_official | 354:e67efb2aab0e | 149 | ========================= |
mbed_official | 354:e67efb2aab0e | 150 | [..] |
mbed_official | 354:e67efb2aab0e | 151 | (+) The PVD is used to monitor the VDD power supply by comparing it to a |
mbed_official | 354:e67efb2aab0e | 152 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). |
mbed_official | 354:e67efb2aab0e | 153 | (+) The PVD can use an external input analog voltage (PVD_IN) which is compared |
mbed_official | 354:e67efb2aab0e | 154 | internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode |
mbed_official | 354:e67efb2aab0e | 155 | when PWR_PVDLevel_7 is selected (PLS[2:0] = 111). |
mbed_official | 354:e67efb2aab0e | 156 | |
mbed_official | 354:e67efb2aab0e | 157 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower |
mbed_official | 354:e67efb2aab0e | 158 | than the PVD threshold. This event is internally connected to the EXTI |
mbed_official | 354:e67efb2aab0e | 159 | line16 and can generate an interrupt if enabled. This is done through |
mbed_official | 354:e67efb2aab0e | 160 | __HAL_PVD_EXTI_ENABLE_IT() macro. |
mbed_official | 354:e67efb2aab0e | 161 | (+) The PVD is stopped in Standby mode. |
mbed_official | 354:e67efb2aab0e | 162 | |
mbed_official | 354:e67efb2aab0e | 163 | *** WakeUp pin configuration *** |
mbed_official | 354:e67efb2aab0e | 164 | ================================ |
mbed_official | 354:e67efb2aab0e | 165 | [..] |
mbed_official | 354:e67efb2aab0e | 166 | (+) WakeUp pin is used to wake up the system from Standby mode. This pin is |
mbed_official | 354:e67efb2aab0e | 167 | forced in input pull-down configuration and is active on rising edges. |
mbed_official | 354:e67efb2aab0e | 168 | (+) There are two or three WakeUp pins: |
mbed_official | 354:e67efb2aab0e | 169 | WakeUp Pin 1 on PA.00. |
mbed_official | 354:e67efb2aab0e | 170 | WakeUp Pin 2 on PC.13. |
mbed_official | 354:e67efb2aab0e | 171 | WakeUp Pin 3 on PE.06. : Only on product with GPIOE available |
mbed_official | 354:e67efb2aab0e | 172 | |
mbed_official | 354:e67efb2aab0e | 173 | [..] |
mbed_official | 354:e67efb2aab0e | 174 | *** Main and Backup Regulators configuration *** |
mbed_official | 354:e67efb2aab0e | 175 | ================================================ |
mbed_official | 354:e67efb2aab0e | 176 | |
mbed_official | 354:e67efb2aab0e | 177 | (+) The main internal regulator can be configured to have a tradeoff between |
mbed_official | 354:e67efb2aab0e | 178 | performance and power consumption when the device does not operate at |
mbed_official | 354:e67efb2aab0e | 179 | the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG() |
mbed_official | 354:e67efb2aab0e | 180 | macro which configure VOS bit in PWR_CR register: |
mbed_official | 354:e67efb2aab0e | 181 | (++) When this bit is set (Regulator voltage output Scale 1 mode selected) |
mbed_official | 354:e67efb2aab0e | 182 | the System frequency can go up to 32 MHz. |
mbed_official | 354:e67efb2aab0e | 183 | (++) When this bit is reset (Regulator voltage output Scale 2 mode selected) |
mbed_official | 354:e67efb2aab0e | 184 | the System frequency can go up to 16 MHz. |
mbed_official | 354:e67efb2aab0e | 185 | (++) When this bit is reset (Regulator voltage output Scale 3 mode selected) |
mbed_official | 354:e67efb2aab0e | 186 | the System frequency can go up to 4.2 MHz. |
mbed_official | 354:e67efb2aab0e | 187 | |
mbed_official | 354:e67efb2aab0e | 188 | Refer to the datasheets for more details. |
mbed_official | 354:e67efb2aab0e | 189 | |
mbed_official | 354:e67efb2aab0e | 190 | *** Low Power modes configuration *** |
mbed_official | 354:e67efb2aab0e | 191 | ===================================== |
mbed_official | 354:e67efb2aab0e | 192 | [..] |
mbed_official | 354:e67efb2aab0e | 193 | The device features 5 low-power modes: |
mbed_official | 354:e67efb2aab0e | 194 | (+) Low power run mode: regulator in low power mode, limited clock frequency, |
mbed_official | 354:e67efb2aab0e | 195 | limited number of peripherals running. |
mbed_official | 354:e67efb2aab0e | 196 | (+) Sleep mode: Cortex-M3 core stopped, peripherals kept running. |
mbed_official | 354:e67efb2aab0e | 197 | (+) Low power sleep mode: Cortex-M3 core stopped, limited clock frequency, |
mbed_official | 354:e67efb2aab0e | 198 | limited number of peripherals running, regulator in low power mode. |
mbed_official | 354:e67efb2aab0e | 199 | (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode. |
mbed_official | 354:e67efb2aab0e | 200 | (+) Standby mode: VCORE domain powered off |
mbed_official | 354:e67efb2aab0e | 201 | |
mbed_official | 354:e67efb2aab0e | 202 | *** Low power run mode *** |
mbed_official | 354:e67efb2aab0e | 203 | ========================= |
mbed_official | 354:e67efb2aab0e | 204 | [..] |
mbed_official | 354:e67efb2aab0e | 205 | To further reduce the consumption when the system is in Run mode, the regulator can be |
mbed_official | 354:e67efb2aab0e | 206 | configured in low power mode. In this mode, the system frequency should not exceed |
mbed_official | 354:e67efb2aab0e | 207 | MSI frequency range1. |
mbed_official | 354:e67efb2aab0e | 208 | In Low power run mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 354:e67efb2aab0e | 209 | |
mbed_official | 354:e67efb2aab0e | 210 | (+) Entry: |
mbed_official | 354:e67efb2aab0e | 211 | (++) VCORE in range2 |
mbed_official | 354:e67efb2aab0e | 212 | (++) Decrease the system frequency tonot exceed the frequency of MSI frequency range1. |
mbed_official | 354:e67efb2aab0e | 213 | (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode() |
mbed_official | 354:e67efb2aab0e | 214 | function. |
mbed_official | 354:e67efb2aab0e | 215 | (+) Exit: |
mbed_official | 354:e67efb2aab0e | 216 | (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode() |
mbed_official | 354:e67efb2aab0e | 217 | function. |
mbed_official | 354:e67efb2aab0e | 218 | (++) Increase the system frequency if needed. |
mbed_official | 354:e67efb2aab0e | 219 | |
mbed_official | 354:e67efb2aab0e | 220 | *** Sleep mode *** |
mbed_official | 354:e67efb2aab0e | 221 | ================== |
mbed_official | 354:e67efb2aab0e | 222 | [..] |
mbed_official | 354:e67efb2aab0e | 223 | (+) Entry: |
mbed_official | 354:e67efb2aab0e | 224 | The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx) |
mbed_official | 354:e67efb2aab0e | 225 | functions with |
mbed_official | 354:e67efb2aab0e | 226 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 354:e67efb2aab0e | 227 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 354:e67efb2aab0e | 228 | |
mbed_official | 354:e67efb2aab0e | 229 | (+) Exit: |
mbed_official | 354:e67efb2aab0e | 230 | (++) Any peripheral interrupt acknowledged by the nested vectored interrupt |
mbed_official | 354:e67efb2aab0e | 231 | controller (NVIC) can wake up the device from Sleep mode. |
mbed_official | 354:e67efb2aab0e | 232 | |
mbed_official | 354:e67efb2aab0e | 233 | *** Low power sleep mode *** |
mbed_official | 354:e67efb2aab0e | 234 | ============================ |
mbed_official | 354:e67efb2aab0e | 235 | [..] |
mbed_official | 354:e67efb2aab0e | 236 | (+) Entry: |
mbed_official | 354:e67efb2aab0e | 237 | The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx) |
mbed_official | 354:e67efb2aab0e | 238 | functions with |
mbed_official | 354:e67efb2aab0e | 239 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 354:e67efb2aab0e | 240 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 354:e67efb2aab0e | 241 | (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register. |
mbed_official | 354:e67efb2aab0e | 242 | This reduces power consumption but increases the wake-up time. |
mbed_official | 354:e67efb2aab0e | 243 | |
mbed_official | 354:e67efb2aab0e | 244 | (+) Exit: |
mbed_official | 354:e67efb2aab0e | 245 | (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt |
mbed_official | 354:e67efb2aab0e | 246 | acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device |
mbed_official | 354:e67efb2aab0e | 247 | from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode, |
mbed_official | 354:e67efb2aab0e | 248 | the MCU exits Sleep mode as soon as an event occurs. |
mbed_official | 354:e67efb2aab0e | 249 | |
mbed_official | 354:e67efb2aab0e | 250 | *** Stop mode *** |
mbed_official | 354:e67efb2aab0e | 251 | ================= |
mbed_official | 354:e67efb2aab0e | 252 | [..] |
mbed_official | 354:e67efb2aab0e | 253 | The Stop mode is based on the Cortex-M3 deepsleep mode combined with peripheral |
mbed_official | 354:e67efb2aab0e | 254 | clock gating. The voltage regulator can be configured either in normal or low-power mode. |
mbed_official | 354:e67efb2aab0e | 255 | In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and |
mbed_official | 354:e67efb2aab0e | 256 | the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved. |
mbed_official | 354:e67efb2aab0e | 257 | To get the lowest consumption in Stop mode, the internal Flash memory also enters low |
mbed_official | 354:e67efb2aab0e | 258 | power mode. When the Flash memory is in power-down mode, an additional startup delay is |
mbed_official | 354:e67efb2aab0e | 259 | incurred when waking up from Stop mode. |
mbed_official | 354:e67efb2aab0e | 260 | To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature |
mbed_official | 354:e67efb2aab0e | 261 | sensor can be switched off before entering Stop mode. They can be switched on again by |
mbed_official | 354:e67efb2aab0e | 262 | software after exiting Stop mode using the ULP bit in the PWR_CR register. |
mbed_official | 354:e67efb2aab0e | 263 | In Stop mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 354:e67efb2aab0e | 264 | |
mbed_official | 354:e67efb2aab0e | 265 | (+) Entry: |
mbed_official | 354:e67efb2aab0e | 266 | The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI ) |
mbed_official | 354:e67efb2aab0e | 267 | function with: |
mbed_official | 354:e67efb2aab0e | 268 | (++) Main regulator ON. |
mbed_official | 354:e67efb2aab0e | 269 | (++) Low Power regulator ON. |
mbed_official | 354:e67efb2aab0e | 270 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 354:e67efb2aab0e | 271 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 354:e67efb2aab0e | 272 | (+) Exit: |
mbed_official | 354:e67efb2aab0e | 273 | (++) By issuing an interrupt or a wakeup event, the MSI RC oscillator is selected as system clock. |
mbed_official | 354:e67efb2aab0e | 274 | |
mbed_official | 354:e67efb2aab0e | 275 | *** Standby mode *** |
mbed_official | 354:e67efb2aab0e | 276 | ==================== |
mbed_official | 354:e67efb2aab0e | 277 | [..] |
mbed_official | 354:e67efb2aab0e | 278 | The Standby mode allows to achieve the lowest power consumption. It is based on the |
mbed_official | 354:e67efb2aab0e | 279 | Cortex-M3 deepsleep mode, with the voltage regulator disabled. The VCORE domain is |
mbed_official | 354:e67efb2aab0e | 280 | consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are |
mbed_official | 354:e67efb2aab0e | 281 | also switched off. SRAM and register contents are lost except for the RTC registers, RTC |
mbed_official | 354:e67efb2aab0e | 282 | backup registers and Standby circuitry. |
mbed_official | 354:e67efb2aab0e | 283 | |
mbed_official | 354:e67efb2aab0e | 284 | To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature |
mbed_official | 354:e67efb2aab0e | 285 | sensor can be switched off before entering the Standby mode. They can be switched |
mbed_official | 354:e67efb2aab0e | 286 | on again by software after exiting the Standby mode. |
mbed_official | 354:e67efb2aab0e | 287 | function. |
mbed_official | 354:e67efb2aab0e | 288 | |
mbed_official | 354:e67efb2aab0e | 289 | (+) Entry: |
mbed_official | 354:e67efb2aab0e | 290 | (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. |
mbed_official | 354:e67efb2aab0e | 291 | (+) Exit: |
mbed_official | 354:e67efb2aab0e | 292 | (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, |
mbed_official | 354:e67efb2aab0e | 293 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
mbed_official | 354:e67efb2aab0e | 294 | |
mbed_official | 354:e67efb2aab0e | 295 | *** Auto-wakeup (AWU) from low-power mode *** |
mbed_official | 354:e67efb2aab0e | 296 | ============================================= |
mbed_official | 354:e67efb2aab0e | 297 | [..] |
mbed_official | 354:e67efb2aab0e | 298 | The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC |
mbed_official | 354:e67efb2aab0e | 299 | Wakeup event, a tamper event, a time-stamp event, or a comparator event, |
mbed_official | 354:e67efb2aab0e | 300 | without depending on an external interrupt (Auto-wakeup mode). |
mbed_official | 354:e67efb2aab0e | 301 | |
mbed_official | 354:e67efb2aab0e | 302 | (+) RTC auto-wakeup (AWU) from the Stop mode |
mbed_official | 354:e67efb2aab0e | 303 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to: |
mbed_official | 354:e67efb2aab0e | 304 | (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt |
mbed_official | 354:e67efb2aab0e | 305 | or Event modes) and Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT() |
mbed_official | 354:e67efb2aab0e | 306 | function |
mbed_official | 354:e67efb2aab0e | 307 | (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init() |
mbed_official | 354:e67efb2aab0e | 308 | and HAL_RTC_SetTime() functions. |
mbed_official | 354:e67efb2aab0e | 309 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
mbed_official | 354:e67efb2aab0e | 310 | is necessary to: |
mbed_official | 354:e67efb2aab0e | 311 | (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt or Event modes) and |
mbed_official | 354:e67efb2aab0e | 312 | Enable the RTC Tamper or time stamp Interrupt using the HAL_RTCEx_SetTamper_IT() |
mbed_official | 354:e67efb2aab0e | 313 | or HAL_RTCEx_SetTimeStamp_IT() functions. |
mbed_official | 354:e67efb2aab0e | 314 | (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to: |
mbed_official | 354:e67efb2aab0e | 315 | (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt or Event modes) and |
mbed_official | 354:e67efb2aab0e | 316 | Enable the RTC WakeUp Interrupt using the HAL_RTCEx_SetWakeUpTimer_IT() function. |
mbed_official | 354:e67efb2aab0e | 317 | (+++) Configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer() |
mbed_official | 354:e67efb2aab0e | 318 | function. |
mbed_official | 354:e67efb2aab0e | 319 | |
mbed_official | 354:e67efb2aab0e | 320 | (+) RTC auto-wakeup (AWU) from the Standby mode |
mbed_official | 354:e67efb2aab0e | 321 | (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to: |
mbed_official | 354:e67efb2aab0e | 322 | (+++) Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT() function. |
mbed_official | 354:e67efb2aab0e | 323 | (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init() |
mbed_official | 354:e67efb2aab0e | 324 | and HAL_RTC_SetTime() functions. |
mbed_official | 354:e67efb2aab0e | 325 | (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it |
mbed_official | 354:e67efb2aab0e | 326 | is necessary to: |
mbed_official | 354:e67efb2aab0e | 327 | (+++) Enable the RTC Tamper or time stamp Interrupt and Configure the RTC to |
mbed_official | 354:e67efb2aab0e | 328 | detect the tamper or time stamp event using the HAL_RTCEx_SetTimeStamp_IT() |
mbed_official | 354:e67efb2aab0e | 329 | or HAL_RTCEx_SetTamper_IT()functions. |
mbed_official | 354:e67efb2aab0e | 330 | (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to: |
mbed_official | 354:e67efb2aab0e | 331 | (+++) Enable the RTC WakeUp Interrupt and Configure the RTC to generate the RTC WakeUp event |
mbed_official | 354:e67efb2aab0e | 332 | using the HAL_RTCEx_SetWakeUpTimer_IT() and HAL_RTCEx_SetWakeUpTimer() functions. |
mbed_official | 354:e67efb2aab0e | 333 | |
mbed_official | 354:e67efb2aab0e | 334 | (+) Comparator auto-wakeup (AWU) from the Stop mode |
mbed_official | 354:e67efb2aab0e | 335 | (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup |
mbed_official | 354:e67efb2aab0e | 336 | event, it is necessary to: |
mbed_official | 354:e67efb2aab0e | 337 | (+++) Configure the EXTI Line 21 or EXTI Line 22 for comparator to be sensitive to to the |
mbed_official | 354:e67efb2aab0e | 338 | selected edges (falling, rising or falling and rising) (Interrupt or Event modes) using |
mbed_official | 354:e67efb2aab0e | 339 | the COMP functions. |
mbed_official | 354:e67efb2aab0e | 340 | (+++) Configure the comparator to generate the event. |
mbed_official | 354:e67efb2aab0e | 341 | |
mbed_official | 354:e67efb2aab0e | 342 | |
mbed_official | 354:e67efb2aab0e | 343 | |
mbed_official | 354:e67efb2aab0e | 344 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 345 | * @{ |
mbed_official | 354:e67efb2aab0e | 346 | */ |
mbed_official | 354:e67efb2aab0e | 347 | |
mbed_official | 354:e67efb2aab0e | 348 | /** |
mbed_official | 354:e67efb2aab0e | 349 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). |
mbed_official | 354:e67efb2aab0e | 350 | * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration |
mbed_official | 354:e67efb2aab0e | 351 | * information for the PVD. |
mbed_official | 354:e67efb2aab0e | 352 | * @note Refer to the electrical characteristics of your device datasheet for |
mbed_official | 354:e67efb2aab0e | 353 | * more details about the voltage threshold corresponding to each |
mbed_official | 354:e67efb2aab0e | 354 | * detection level. |
mbed_official | 354:e67efb2aab0e | 355 | * @retval None |
mbed_official | 354:e67efb2aab0e | 356 | */ |
mbed_official | 354:e67efb2aab0e | 357 | void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD) |
mbed_official | 354:e67efb2aab0e | 358 | { |
mbed_official | 354:e67efb2aab0e | 359 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 360 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); |
mbed_official | 354:e67efb2aab0e | 361 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); |
mbed_official | 354:e67efb2aab0e | 362 | |
mbed_official | 354:e67efb2aab0e | 363 | /* Set PLS[7:5] bits according to PVDLevel value */ |
mbed_official | 354:e67efb2aab0e | 364 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); |
mbed_official | 354:e67efb2aab0e | 365 | |
mbed_official | 354:e67efb2aab0e | 366 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ |
mbed_official | 354:e67efb2aab0e | 367 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); |
mbed_official | 354:e67efb2aab0e | 368 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); |
mbed_official | 354:e67efb2aab0e | 369 | __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER(); |
mbed_official | 354:e67efb2aab0e | 370 | |
mbed_official | 354:e67efb2aab0e | 371 | /* Configure interrupt mode */ |
mbed_official | 354:e67efb2aab0e | 372 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) |
mbed_official | 354:e67efb2aab0e | 373 | { |
mbed_official | 354:e67efb2aab0e | 374 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); |
mbed_official | 354:e67efb2aab0e | 375 | } |
mbed_official | 354:e67efb2aab0e | 376 | |
mbed_official | 354:e67efb2aab0e | 377 | /* Configure event mode */ |
mbed_official | 354:e67efb2aab0e | 378 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) |
mbed_official | 354:e67efb2aab0e | 379 | { |
mbed_official | 354:e67efb2aab0e | 380 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); |
mbed_official | 354:e67efb2aab0e | 381 | } |
mbed_official | 354:e67efb2aab0e | 382 | |
mbed_official | 354:e67efb2aab0e | 383 | /* Configure the edge */ |
mbed_official | 354:e67efb2aab0e | 384 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) |
mbed_official | 354:e67efb2aab0e | 385 | { |
mbed_official | 354:e67efb2aab0e | 386 | __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER(); |
mbed_official | 354:e67efb2aab0e | 387 | } |
mbed_official | 354:e67efb2aab0e | 388 | |
mbed_official | 354:e67efb2aab0e | 389 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) |
mbed_official | 354:e67efb2aab0e | 390 | { |
mbed_official | 354:e67efb2aab0e | 391 | __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER(); |
mbed_official | 354:e67efb2aab0e | 392 | } |
mbed_official | 354:e67efb2aab0e | 393 | } |
mbed_official | 354:e67efb2aab0e | 394 | |
mbed_official | 354:e67efb2aab0e | 395 | /** |
mbed_official | 354:e67efb2aab0e | 396 | * @brief Enables the Power Voltage Detector(PVD). |
mbed_official | 354:e67efb2aab0e | 397 | * @retval None |
mbed_official | 354:e67efb2aab0e | 398 | */ |
mbed_official | 354:e67efb2aab0e | 399 | void HAL_PWR_EnablePVD(void) |
mbed_official | 354:e67efb2aab0e | 400 | { |
mbed_official | 354:e67efb2aab0e | 401 | /* Enable the power voltage detector */ |
mbed_official | 354:e67efb2aab0e | 402 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE; |
mbed_official | 354:e67efb2aab0e | 403 | } |
mbed_official | 354:e67efb2aab0e | 404 | |
mbed_official | 354:e67efb2aab0e | 405 | /** |
mbed_official | 354:e67efb2aab0e | 406 | * @brief Disables the Power Voltage Detector(PVD). |
mbed_official | 354:e67efb2aab0e | 407 | * @retval None |
mbed_official | 354:e67efb2aab0e | 408 | */ |
mbed_official | 354:e67efb2aab0e | 409 | void HAL_PWR_DisablePVD(void) |
mbed_official | 354:e67efb2aab0e | 410 | { |
mbed_official | 354:e67efb2aab0e | 411 | /* Disable the power voltage detector */ |
mbed_official | 354:e67efb2aab0e | 412 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE; |
mbed_official | 354:e67efb2aab0e | 413 | } |
mbed_official | 354:e67efb2aab0e | 414 | |
mbed_official | 354:e67efb2aab0e | 415 | /** |
mbed_official | 354:e67efb2aab0e | 416 | * @brief Enables the WakeUp PINx functionality. |
mbed_official | 354:e67efb2aab0e | 417 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable. |
mbed_official | 354:e67efb2aab0e | 418 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 419 | * @arg PWR_WAKEUP_PIN1 |
mbed_official | 354:e67efb2aab0e | 420 | * @arg PWR_WAKEUP_PIN2 |
mbed_official | 354:e67efb2aab0e | 421 | * @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available |
mbed_official | 354:e67efb2aab0e | 422 | * @retval None |
mbed_official | 354:e67efb2aab0e | 423 | */ |
mbed_official | 354:e67efb2aab0e | 424 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) |
mbed_official | 354:e67efb2aab0e | 425 | { |
mbed_official | 354:e67efb2aab0e | 426 | /* Check the parameter */ |
mbed_official | 354:e67efb2aab0e | 427 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
mbed_official | 354:e67efb2aab0e | 428 | /* Enable the EWUPx pin */ |
mbed_official | 354:e67efb2aab0e | 429 | *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)ENABLE; |
mbed_official | 354:e67efb2aab0e | 430 | } |
mbed_official | 354:e67efb2aab0e | 431 | |
mbed_official | 354:e67efb2aab0e | 432 | /** |
mbed_official | 354:e67efb2aab0e | 433 | * @brief Disables the WakeUp PINx functionality. |
mbed_official | 354:e67efb2aab0e | 434 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. |
mbed_official | 354:e67efb2aab0e | 435 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 436 | * @arg PWR_WAKEUP_PIN1 |
mbed_official | 354:e67efb2aab0e | 437 | * @arg PWR_WAKEUP_PIN2 |
mbed_official | 354:e67efb2aab0e | 438 | * @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available |
mbed_official | 354:e67efb2aab0e | 439 | * @retval None |
mbed_official | 354:e67efb2aab0e | 440 | */ |
mbed_official | 354:e67efb2aab0e | 441 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) |
mbed_official | 354:e67efb2aab0e | 442 | { |
mbed_official | 354:e67efb2aab0e | 443 | /* Check the parameter */ |
mbed_official | 354:e67efb2aab0e | 444 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
mbed_official | 354:e67efb2aab0e | 445 | /* Disable the EWUPx pin */ |
mbed_official | 354:e67efb2aab0e | 446 | *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)DISABLE; |
mbed_official | 354:e67efb2aab0e | 447 | } |
mbed_official | 354:e67efb2aab0e | 448 | |
mbed_official | 354:e67efb2aab0e | 449 | /** |
mbed_official | 354:e67efb2aab0e | 450 | * @brief Enters Sleep mode. |
mbed_official | 354:e67efb2aab0e | 451 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 354:e67efb2aab0e | 452 | * @param Regulator: Specifies the regulator state in SLEEP mode. |
mbed_official | 354:e67efb2aab0e | 453 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 454 | * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON |
mbed_official | 354:e67efb2aab0e | 455 | * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON |
mbed_official | 354:e67efb2aab0e | 456 | * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction. |
mbed_official | 354:e67efb2aab0e | 457 | * When WFI entry is used, tick interrupt have to be disabled if not desired as |
mbed_official | 354:e67efb2aab0e | 458 | * the interrupt wake up source. |
mbed_official | 354:e67efb2aab0e | 459 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 460 | * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 354:e67efb2aab0e | 461 | * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 354:e67efb2aab0e | 462 | * @retval None |
mbed_official | 354:e67efb2aab0e | 463 | */ |
mbed_official | 354:e67efb2aab0e | 464 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) |
mbed_official | 354:e67efb2aab0e | 465 | { |
mbed_official | 354:e67efb2aab0e | 466 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 467 | assert_param(IS_PWR_REGULATOR(Regulator)); |
mbed_official | 354:e67efb2aab0e | 468 | assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); |
mbed_official | 354:e67efb2aab0e | 469 | |
mbed_official | 354:e67efb2aab0e | 470 | /* Select the regulator state in Sleep mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */ |
mbed_official | 354:e67efb2aab0e | 471 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator); |
mbed_official | 354:e67efb2aab0e | 472 | |
mbed_official | 354:e67efb2aab0e | 473 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 354:e67efb2aab0e | 474 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
mbed_official | 354:e67efb2aab0e | 475 | |
mbed_official | 354:e67efb2aab0e | 476 | /* Select SLEEP mode entry -------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 477 | if(SLEEPEntry == PWR_SLEEPENTRY_WFI) |
mbed_official | 354:e67efb2aab0e | 478 | { |
mbed_official | 354:e67efb2aab0e | 479 | /* Request Wait For Interrupt */ |
mbed_official | 354:e67efb2aab0e | 480 | __WFI(); |
mbed_official | 354:e67efb2aab0e | 481 | } |
mbed_official | 354:e67efb2aab0e | 482 | else |
mbed_official | 354:e67efb2aab0e | 483 | { |
mbed_official | 354:e67efb2aab0e | 484 | /* Request Wait For Event */ |
mbed_official | 354:e67efb2aab0e | 485 | __SEV(); |
mbed_official | 354:e67efb2aab0e | 486 | __WFE(); |
mbed_official | 354:e67efb2aab0e | 487 | __WFE(); |
mbed_official | 354:e67efb2aab0e | 488 | } |
mbed_official | 354:e67efb2aab0e | 489 | } |
mbed_official | 354:e67efb2aab0e | 490 | |
mbed_official | 354:e67efb2aab0e | 491 | /** |
mbed_official | 354:e67efb2aab0e | 492 | * @brief Enters Stop mode. |
mbed_official | 354:e67efb2aab0e | 493 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 354:e67efb2aab0e | 494 | * @note When exiting Stop mode by using an interrupt or a wakeup event, |
mbed_official | 354:e67efb2aab0e | 495 | * MSI RC oscillator is selected as system clock. |
mbed_official | 354:e67efb2aab0e | 496 | * @note When the voltage regulator operates in low power mode, an additional |
mbed_official | 354:e67efb2aab0e | 497 | * startup delay is incurred when waking up from Stop mode. |
mbed_official | 354:e67efb2aab0e | 498 | * By keeping the internal regulator ON during Stop mode, the consumption |
mbed_official | 354:e67efb2aab0e | 499 | * is higher although the startup time is reduced. |
mbed_official | 354:e67efb2aab0e | 500 | * @param Regulator: Specifies the regulator state in Stop mode. |
mbed_official | 354:e67efb2aab0e | 501 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 502 | * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON |
mbed_official | 354:e67efb2aab0e | 503 | * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON |
mbed_official | 354:e67efb2aab0e | 504 | * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction. |
mbed_official | 354:e67efb2aab0e | 505 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 506 | * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction |
mbed_official | 354:e67efb2aab0e | 507 | * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction |
mbed_official | 354:e67efb2aab0e | 508 | * @retval None |
mbed_official | 354:e67efb2aab0e | 509 | */ |
mbed_official | 354:e67efb2aab0e | 510 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
mbed_official | 354:e67efb2aab0e | 511 | { |
mbed_official | 354:e67efb2aab0e | 512 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 513 | assert_param(IS_PWR_REGULATOR(Regulator)); |
mbed_official | 354:e67efb2aab0e | 514 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
mbed_official | 354:e67efb2aab0e | 515 | |
mbed_official | 354:e67efb2aab0e | 516 | /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */ |
mbed_official | 354:e67efb2aab0e | 517 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator); |
mbed_official | 354:e67efb2aab0e | 518 | |
mbed_official | 354:e67efb2aab0e | 519 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 354:e67efb2aab0e | 520 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
mbed_official | 354:e67efb2aab0e | 521 | |
mbed_official | 354:e67efb2aab0e | 522 | /* Select Stop mode entry --------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 523 | if(STOPEntry == PWR_STOPENTRY_WFI) |
mbed_official | 354:e67efb2aab0e | 524 | { |
mbed_official | 354:e67efb2aab0e | 525 | /* Request Wait For Interrupt */ |
mbed_official | 354:e67efb2aab0e | 526 | __WFI(); |
mbed_official | 354:e67efb2aab0e | 527 | } |
mbed_official | 354:e67efb2aab0e | 528 | else |
mbed_official | 354:e67efb2aab0e | 529 | { |
mbed_official | 354:e67efb2aab0e | 530 | /* Request Wait For Event */ |
mbed_official | 354:e67efb2aab0e | 531 | __SEV(); |
mbed_official | 354:e67efb2aab0e | 532 | __WFE(); |
mbed_official | 354:e67efb2aab0e | 533 | __WFE(); |
mbed_official | 354:e67efb2aab0e | 534 | } |
mbed_official | 354:e67efb2aab0e | 535 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 354:e67efb2aab0e | 536 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
mbed_official | 354:e67efb2aab0e | 537 | } |
mbed_official | 354:e67efb2aab0e | 538 | |
mbed_official | 354:e67efb2aab0e | 539 | /** |
mbed_official | 354:e67efb2aab0e | 540 | * @brief Enters Standby mode. |
mbed_official | 354:e67efb2aab0e | 541 | * @note In Standby mode, all I/O pins are high impedance except for: |
mbed_official | 354:e67efb2aab0e | 542 | * - Reset pad (still available) |
mbed_official | 354:e67efb2aab0e | 543 | * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC |
mbed_official | 354:e67efb2aab0e | 544 | * Alarm out, or RTC clock calibration out. |
mbed_official | 354:e67efb2aab0e | 545 | * - WKUP pin 1 (PA0) if enabled. |
mbed_official | 354:e67efb2aab0e | 546 | * - WKUP pin 2 (PC13) if enabled. |
mbed_official | 354:e67efb2aab0e | 547 | * - WKUP pin 3 (PE6) if enabled. |
mbed_official | 354:e67efb2aab0e | 548 | * @retval None |
mbed_official | 354:e67efb2aab0e | 549 | */ |
mbed_official | 354:e67efb2aab0e | 550 | void HAL_PWR_EnterSTANDBYMode(void) |
mbed_official | 354:e67efb2aab0e | 551 | { |
mbed_official | 354:e67efb2aab0e | 552 | /* Select Standby mode */ |
mbed_official | 354:e67efb2aab0e | 553 | SET_BIT(PWR->CR, PWR_CR_PDDS); |
mbed_official | 354:e67efb2aab0e | 554 | |
mbed_official | 354:e67efb2aab0e | 555 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 354:e67efb2aab0e | 556 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
mbed_official | 354:e67efb2aab0e | 557 | |
mbed_official | 354:e67efb2aab0e | 558 | /* This option is used to ensure that store operations are completed */ |
mbed_official | 354:e67efb2aab0e | 559 | #if defined ( __CC_ARM) |
mbed_official | 354:e67efb2aab0e | 560 | __force_stores(); |
mbed_official | 354:e67efb2aab0e | 561 | #endif |
mbed_official | 354:e67efb2aab0e | 562 | /* Request Wait For Interrupt */ |
mbed_official | 354:e67efb2aab0e | 563 | __WFI(); |
mbed_official | 354:e67efb2aab0e | 564 | } |
mbed_official | 354:e67efb2aab0e | 565 | |
mbed_official | 354:e67efb2aab0e | 566 | /** |
mbed_official | 354:e67efb2aab0e | 567 | * @brief This function handles the PWR PVD interrupt request. |
mbed_official | 354:e67efb2aab0e | 568 | * @note This API should be called under the PVD_IRQHandler(). |
mbed_official | 354:e67efb2aab0e | 569 | * @retval None |
mbed_official | 354:e67efb2aab0e | 570 | */ |
mbed_official | 354:e67efb2aab0e | 571 | void HAL_PWR_PVD_IRQHandler(void) |
mbed_official | 354:e67efb2aab0e | 572 | { |
mbed_official | 354:e67efb2aab0e | 573 | /* Check PWR exti flag */ |
mbed_official | 354:e67efb2aab0e | 574 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) |
mbed_official | 354:e67efb2aab0e | 575 | { |
mbed_official | 354:e67efb2aab0e | 576 | /* PWR PVD interrupt user callback */ |
mbed_official | 354:e67efb2aab0e | 577 | HAL_PWR_PVDCallback(); |
mbed_official | 354:e67efb2aab0e | 578 | |
mbed_official | 354:e67efb2aab0e | 579 | /* Clear PWR Exti pending bit */ |
mbed_official | 354:e67efb2aab0e | 580 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); |
mbed_official | 354:e67efb2aab0e | 581 | } |
mbed_official | 354:e67efb2aab0e | 582 | } |
mbed_official | 354:e67efb2aab0e | 583 | |
mbed_official | 354:e67efb2aab0e | 584 | /** |
mbed_official | 354:e67efb2aab0e | 585 | * @brief PWR PVD interrupt callback |
mbed_official | 354:e67efb2aab0e | 586 | * @retval None |
mbed_official | 354:e67efb2aab0e | 587 | */ |
mbed_official | 354:e67efb2aab0e | 588 | __weak void HAL_PWR_PVDCallback(void) |
mbed_official | 354:e67efb2aab0e | 589 | { |
mbed_official | 354:e67efb2aab0e | 590 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 354:e67efb2aab0e | 591 | the HAL_PWR_PVDCallback could be implemented in the user file |
mbed_official | 354:e67efb2aab0e | 592 | */ |
mbed_official | 354:e67efb2aab0e | 593 | } |
mbed_official | 354:e67efb2aab0e | 594 | |
mbed_official | 354:e67efb2aab0e | 595 | /** |
mbed_official | 354:e67efb2aab0e | 596 | * @} |
mbed_official | 354:e67efb2aab0e | 597 | */ |
mbed_official | 354:e67efb2aab0e | 598 | |
mbed_official | 354:e67efb2aab0e | 599 | /** |
mbed_official | 354:e67efb2aab0e | 600 | * @} |
mbed_official | 354:e67efb2aab0e | 601 | */ |
mbed_official | 354:e67efb2aab0e | 602 | |
mbed_official | 354:e67efb2aab0e | 603 | #endif /* HAL_PWR_MODULE_ENABLED */ |
mbed_official | 354:e67efb2aab0e | 604 | /** |
mbed_official | 354:e67efb2aab0e | 605 | * @} |
mbed_official | 354:e67efb2aab0e | 606 | */ |
mbed_official | 354:e67efb2aab0e | 607 | |
mbed_official | 354:e67efb2aab0e | 608 | /** |
mbed_official | 354:e67efb2aab0e | 609 | * @} |
mbed_official | 354:e67efb2aab0e | 610 | */ |
mbed_official | 354:e67efb2aab0e | 611 | |
mbed_official | 354:e67efb2aab0e | 612 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |