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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_tim_ex.c@441:d2c15dda23c1, 2015-01-06 (annotated)

Committer:
mbed_official
Date:
Tue Jan 06 16:15:36 2015 +0000
Revision:
441:d2c15dda23c1
Parent:
392:2b59412bb664 
Synchronized with git revision 245a60b29caabb42eabdd19658eeac7c3f68313b



Full URL: https://github.com/mbedmicro/mbed/commit/245a60b29caabb42eabdd19658eeac7c3f68313b/



NUCLEO_F072RB/F091RC - adding target to rtos lib and exporter for coide and gcc_arm

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_tim_ex.c
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 441:d2c15dda23c1 5 * @version V1.2.0
mbed_official 441:d2c15dda23c1 6 * @date 11-December-2014
mbed_official 340:28d1f895c6fe 7 * @brief TIM HAL module driver.
mbed_official 340:28d1f895c6fe 8 * This file provides firmware functions to manage the following
mbed_official 340:28d1f895c6fe 9 * functionalities of the Timer Extended peripheral:
mbed_official 340:28d1f895c6fe 10 * + Time Hall Sensor Interface Initialization
mbed_official 340:28d1f895c6fe 11 * + Time Hall Sensor Interface Start
mbed_official 340:28d1f895c6fe 12 * + Time Complementary signal bread and dead time configuration
mbed_official 340:28d1f895c6fe 13 * + Time Master and Slave synchronization configuration
mbed_official 340:28d1f895c6fe 14 * + Timer remapping capabilities configuration
mbed_official 340:28d1f895c6fe 15 @verbatim
mbed_official 340:28d1f895c6fe 16 ==============================================================================
mbed_official 340:28d1f895c6fe 17 ##### TIMER Extended features #####
mbed_official 340:28d1f895c6fe 18 ==============================================================================
mbed_official 340:28d1f895c6fe 19 [..]
mbed_official 340:28d1f895c6fe 20 The Timer Extended features include:
mbed_official 340:28d1f895c6fe 21 (#) Complementary outputs with programmable dead-time for :
mbed_official 340:28d1f895c6fe 22 (++) Output Compare
mbed_official 340:28d1f895c6fe 23 (++) PWM generation (Edge and Center-aligned Mode)
mbed_official 340:28d1f895c6fe 24 (++) One-pulse mode output
mbed_official 340:28d1f895c6fe 25 (#) Synchronization circuit to control the timer with external signals and to
mbed_official 340:28d1f895c6fe 26 interconnect several timers together.
mbed_official 340:28d1f895c6fe 27 (#) Break input to put the timer output signals in reset state or in a known state.
mbed_official 340:28d1f895c6fe 28 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
mbed_official 340:28d1f895c6fe 29 positioning purposes
mbed_official 340:28d1f895c6fe 30
mbed_official 340:28d1f895c6fe 31 ##### How to use this driver #####
mbed_official 340:28d1f895c6fe 32 ==============================================================================
mbed_official 340:28d1f895c6fe 33 [..]
mbed_official 340:28d1f895c6fe 34 (#) Initialize the TIM low level resources by implementing the following functions
mbed_official 340:28d1f895c6fe 35 depending from feature used :
mbed_official 340:28d1f895c6fe 36 (++) Complementary Output Compare : HAL_TIM_OC_MspInit()
mbed_official 340:28d1f895c6fe 37 (++) Complementary PWM generation : HAL_TIM_PWM_MspInit()
mbed_official 340:28d1f895c6fe 38 (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit()
mbed_official 340:28d1f895c6fe 39 (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit()
mbed_official 340:28d1f895c6fe 40
mbed_official 340:28d1f895c6fe 41 (#) Initialize the TIM low level resources :
mbed_official 340:28d1f895c6fe 42 (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE();
mbed_official 340:28d1f895c6fe 43 (##) TIM pins configuration
mbed_official 340:28d1f895c6fe 44 (+++) Enable the clock for the TIM GPIOs using the following function:
mbed_official 340:28d1f895c6fe 45 __GPIOx_CLK_ENABLE();
mbed_official 340:28d1f895c6fe 46 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official 340:28d1f895c6fe 47
mbed_official 340:28d1f895c6fe 48 (#) The external Clock can be configured, if needed (the default clock is the
mbed_official 340:28d1f895c6fe 49 internal clock from the APBx), using the following function:
mbed_official 340:28d1f895c6fe 50 HAL_TIM_ConfigClockSource, the clock configuration should be done before
mbed_official 340:28d1f895c6fe 51 any start function.
mbed_official 340:28d1f895c6fe 52
mbed_official 340:28d1f895c6fe 53 (#) Configure the TIM in the desired functioning mode using one of the
mbed_official 340:28d1f895c6fe 54 initialization function of this driver:
mbed_official 340:28d1f895c6fe 55 (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the
mbed_official 340:28d1f895c6fe 56 Timer Hall Sensor Interface and the commutation event with the corresponding
mbed_official 340:28d1f895c6fe 57 Interrupt and DMA request if needed (Note that One Timer is used to interface
mbed_official 340:28d1f895c6fe 58 with the Hall sensor Interface and another Timer should be used to use
mbed_official 340:28d1f895c6fe 59 the commutation event).
mbed_official 340:28d1f895c6fe 60
mbed_official 340:28d1f895c6fe 61 (#) Activate the TIM peripheral using one of the start functions:
mbed_official 340:28d1f895c6fe 62 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
mbed_official 340:28d1f895c6fe 63 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
mbed_official 340:28d1f895c6fe 64 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
mbed_official 340:28d1f895c6fe 65 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
mbed_official 340:28d1f895c6fe 66
mbed_official 340:28d1f895c6fe 67
mbed_official 340:28d1f895c6fe 68 @endverbatim
mbed_official 340:28d1f895c6fe 69 ******************************************************************************
mbed_official 340:28d1f895c6fe 70 * @attention
mbed_official 340:28d1f895c6fe 71 *
mbed_official 340:28d1f895c6fe 72 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 73 *
mbed_official 340:28d1f895c6fe 74 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 75 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 76 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 77 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 78 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 79 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 80 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 81 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 82 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 83 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 84 *
mbed_official 340:28d1f895c6fe 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 88 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 92 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 93 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 94 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 95 *
mbed_official 340:28d1f895c6fe 96 ******************************************************************************
mbed_official 340:28d1f895c6fe 97 */
mbed_official 340:28d1f895c6fe 98
mbed_official 340:28d1f895c6fe 99 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 100 #include "stm32f0xx_hal.h"
mbed_official 340:28d1f895c6fe 101
mbed_official 340:28d1f895c6fe 102 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 103 * @{
mbed_official 340:28d1f895c6fe 104 */
mbed_official 340:28d1f895c6fe 105
mbed_official 340:28d1f895c6fe 106 /** @defgroup TIMEx TIMEx Extended HAL module driver
mbed_official 340:28d1f895c6fe 107 * @brief TIM Extended HAL module driver
mbed_official 340:28d1f895c6fe 108 * @{
mbed_official 340:28d1f895c6fe 109 */
mbed_official 340:28d1f895c6fe 110
mbed_official 340:28d1f895c6fe 111 #ifdef HAL_TIM_MODULE_ENABLED
mbed_official 340:28d1f895c6fe 112
mbed_official 340:28d1f895c6fe 113 /* Private typedef -----------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 114 /* Private define ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 115 /* Private macro -------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 116 /* Private variables ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 117 /* Private function prototypes -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 118
mbed_official 340:28d1f895c6fe 119 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
mbed_official 340:28d1f895c6fe 120 * @{
mbed_official 340:28d1f895c6fe 121 */
mbed_official 340:28d1f895c6fe 122 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
mbed_official 340:28d1f895c6fe 123 /**
mbed_official 340:28d1f895c6fe 124 * @}
mbed_official 340:28d1f895c6fe 125 */
mbed_official 340:28d1f895c6fe 126
mbed_official 340:28d1f895c6fe 127 /* Exported functions ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 128
mbed_official 340:28d1f895c6fe 129 /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
mbed_official 340:28d1f895c6fe 130 * @{
mbed_official 340:28d1f895c6fe 131 */
mbed_official 340:28d1f895c6fe 132
mbed_official 340:28d1f895c6fe 133 /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions
mbed_official 340:28d1f895c6fe 134 * @brief Timer Hall Sensor functions
mbed_official 340:28d1f895c6fe 135 *
mbed_official 340:28d1f895c6fe 136 @verbatim
mbed_official 340:28d1f895c6fe 137 ==============================================================================
mbed_official 340:28d1f895c6fe 138 ##### Timer Hall Sensor functions #####
mbed_official 340:28d1f895c6fe 139 ==============================================================================
mbed_official 340:28d1f895c6fe 140 [..]
mbed_official 340:28d1f895c6fe 141 This section provides functions allowing to:
mbed_official 340:28d1f895c6fe 142 (+) Initialize and configure TIM HAL Sensor.
mbed_official 340:28d1f895c6fe 143 (+) De-initialize TIM HAL Sensor.
mbed_official 340:28d1f895c6fe 144 (+) Start the Hall Sensor Interface.
mbed_official 340:28d1f895c6fe 145 (+) Stop the Hall Sensor Interface.
mbed_official 340:28d1f895c6fe 146 (+) Start the Hall Sensor Interface and enable interrupts.
mbed_official 340:28d1f895c6fe 147 (+) Stop the Hall Sensor Interface and disable interrupts.
mbed_official 340:28d1f895c6fe 148 (+) Start the Hall Sensor Interface and enable DMA transfers.
mbed_official 340:28d1f895c6fe 149 (+) Stop the Hall Sensor Interface and disable DMA transfers.
mbed_official 340:28d1f895c6fe 150
mbed_official 340:28d1f895c6fe 151 @endverbatim
mbed_official 340:28d1f895c6fe 152 * @{
mbed_official 340:28d1f895c6fe 153 */
mbed_official 340:28d1f895c6fe 154 /**
mbed_official 340:28d1f895c6fe 155 * @brief Initializes the TIM Hall Sensor Interface and create the associated handle.
mbed_official 340:28d1f895c6fe 156 * @param htim : TIM Encoder Interface handle
mbed_official 340:28d1f895c6fe 157 * @param sConfig : TIM Hall Sensor configuration structure
mbed_official 340:28d1f895c6fe 158 * @retval HAL status
mbed_official 340:28d1f895c6fe 159 */
mbed_official 340:28d1f895c6fe 160 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
mbed_official 340:28d1f895c6fe 161 {
mbed_official 340:28d1f895c6fe 162 TIM_OC_InitTypeDef OC_Config;
mbed_official 340:28d1f895c6fe 163
mbed_official 340:28d1f895c6fe 164 /* Check the TIM handle allocation */
mbed_official 441:d2c15dda23c1 165 if(htim == NULL)
mbed_official 340:28d1f895c6fe 166 {
mbed_official 340:28d1f895c6fe 167 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 168 }
mbed_official 340:28d1f895c6fe 169
mbed_official 340:28d1f895c6fe 170 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 171 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 340:28d1f895c6fe 172 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 340:28d1f895c6fe 173 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official 340:28d1f895c6fe 174 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official 340:28d1f895c6fe 175 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official 340:28d1f895c6fe 176
mbed_official 340:28d1f895c6fe 177 /* Set the TIM state */
mbed_official 340:28d1f895c6fe 178 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 179
mbed_official 340:28d1f895c6fe 180 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 340:28d1f895c6fe 181 HAL_TIMEx_HallSensor_MspInit(htim);
mbed_official 340:28d1f895c6fe 182
mbed_official 340:28d1f895c6fe 183 /* Configure the Time base in the Encoder Mode */
mbed_official 340:28d1f895c6fe 184 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 340:28d1f895c6fe 185
mbed_official 340:28d1f895c6fe 186 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
mbed_official 340:28d1f895c6fe 187 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
mbed_official 340:28d1f895c6fe 188
mbed_official 340:28d1f895c6fe 189 /* Reset the IC1PSC Bits */
mbed_official 340:28d1f895c6fe 190 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 340:28d1f895c6fe 191 /* Set the IC1PSC value */
mbed_official 340:28d1f895c6fe 192 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
mbed_official 340:28d1f895c6fe 193
mbed_official 340:28d1f895c6fe 194 /* Enable the Hall sensor interface (XOR function of the three inputs) */
mbed_official 340:28d1f895c6fe 195 htim->Instance->CR2 |= TIM_CR2_TI1S;
mbed_official 340:28d1f895c6fe 196
mbed_official 340:28d1f895c6fe 197 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
mbed_official 340:28d1f895c6fe 198 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 340:28d1f895c6fe 199 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
mbed_official 340:28d1f895c6fe 200
mbed_official 340:28d1f895c6fe 201 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
mbed_official 340:28d1f895c6fe 202 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 340:28d1f895c6fe 203 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
mbed_official 340:28d1f895c6fe 204
mbed_official 340:28d1f895c6fe 205 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
mbed_official 340:28d1f895c6fe 206 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
mbed_official 340:28d1f895c6fe 207 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
mbed_official 340:28d1f895c6fe 208 OC_Config.OCMode = TIM_OCMODE_PWM2;
mbed_official 340:28d1f895c6fe 209 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
mbed_official 340:28d1f895c6fe 210 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
mbed_official 340:28d1f895c6fe 211 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
mbed_official 340:28d1f895c6fe 212 OC_Config.Pulse = sConfig->Commutation_Delay;
mbed_official 340:28d1f895c6fe 213
mbed_official 340:28d1f895c6fe 214 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
mbed_official 340:28d1f895c6fe 215
mbed_official 340:28d1f895c6fe 216 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
mbed_official 340:28d1f895c6fe 217 register to 101 */
mbed_official 340:28d1f895c6fe 218 htim->Instance->CR2 &= ~TIM_CR2_MMS;
mbed_official 340:28d1f895c6fe 219 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
mbed_official 340:28d1f895c6fe 220
mbed_official 340:28d1f895c6fe 221 /* Initialize the TIM state*/
mbed_official 340:28d1f895c6fe 222 htim->State= HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 223
mbed_official 340:28d1f895c6fe 224 return HAL_OK;
mbed_official 340:28d1f895c6fe 225 }
mbed_official 340:28d1f895c6fe 226
mbed_official 340:28d1f895c6fe 227 /**
mbed_official 340:28d1f895c6fe 228 * @brief DeInitializes the TIM Hall Sensor interface
mbed_official 340:28d1f895c6fe 229 * @param htim : TIM Hall Sensor handle
mbed_official 340:28d1f895c6fe 230 * @retval HAL status
mbed_official 340:28d1f895c6fe 231 */
mbed_official 340:28d1f895c6fe 232 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 233 {
mbed_official 340:28d1f895c6fe 234 /* Check the parameters */
mbed_official 340:28d1f895c6fe 235 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 236
mbed_official 340:28d1f895c6fe 237 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 238
mbed_official 340:28d1f895c6fe 239 /* Disable the TIM Peripheral Clock */
mbed_official 340:28d1f895c6fe 240 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 241
mbed_official 340:28d1f895c6fe 242 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 340:28d1f895c6fe 243 HAL_TIMEx_HallSensor_MspDeInit(htim);
mbed_official 340:28d1f895c6fe 244
mbed_official 340:28d1f895c6fe 245 /* Change TIM state */
mbed_official 340:28d1f895c6fe 246 htim->State = HAL_TIM_STATE_RESET;
mbed_official 340:28d1f895c6fe 247
mbed_official 340:28d1f895c6fe 248 /* Release Lock */
mbed_official 340:28d1f895c6fe 249 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 250
mbed_official 340:28d1f895c6fe 251 return HAL_OK;
mbed_official 340:28d1f895c6fe 252 }
mbed_official 340:28d1f895c6fe 253
mbed_official 340:28d1f895c6fe 254 /**
mbed_official 340:28d1f895c6fe 255 * @brief Initializes the TIM Hall Sensor MSP.
mbed_official 340:28d1f895c6fe 256 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 257 * @retval None
mbed_official 340:28d1f895c6fe 258 */
mbed_official 340:28d1f895c6fe 259 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 260 {
mbed_official 340:28d1f895c6fe 261 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 262 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 263 */
mbed_official 340:28d1f895c6fe 264 }
mbed_official 340:28d1f895c6fe 265
mbed_official 340:28d1f895c6fe 266 /**
mbed_official 340:28d1f895c6fe 267 * @brief DeInitializes TIM Hall Sensor MSP.
mbed_official 340:28d1f895c6fe 268 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 269 * @retval None
mbed_official 340:28d1f895c6fe 270 */
mbed_official 340:28d1f895c6fe 271 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 272 {
mbed_official 340:28d1f895c6fe 273 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 274 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 275 */
mbed_official 340:28d1f895c6fe 276 }
mbed_official 340:28d1f895c6fe 277
mbed_official 340:28d1f895c6fe 278 /**
mbed_official 340:28d1f895c6fe 279 * @brief Starts the TIM Hall Sensor Interface.
mbed_official 340:28d1f895c6fe 280 * @param htim : TIM Hall Sensor handle
mbed_official 340:28d1f895c6fe 281 * @retval HAL status
mbed_official 340:28d1f895c6fe 282 */
mbed_official 340:28d1f895c6fe 283 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 284 {
mbed_official 340:28d1f895c6fe 285 /* Check the parameters */
mbed_official 340:28d1f895c6fe 286 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 287
mbed_official 340:28d1f895c6fe 288 /* Enable the Input Capture channels 1
mbed_official 340:28d1f895c6fe 289 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 340:28d1f895c6fe 290 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 340:28d1f895c6fe 291
mbed_official 340:28d1f895c6fe 292 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 293 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 294
mbed_official 340:28d1f895c6fe 295 /* Return function status */
mbed_official 340:28d1f895c6fe 296 return HAL_OK;
mbed_official 340:28d1f895c6fe 297 }
mbed_official 340:28d1f895c6fe 298
mbed_official 340:28d1f895c6fe 299 /**
mbed_official 340:28d1f895c6fe 300 * @brief Stops the TIM Hall sensor Interface.
mbed_official 340:28d1f895c6fe 301 * @param htim : TIM Hall Sensor handle
mbed_official 340:28d1f895c6fe 302 * @retval HAL status
mbed_official 340:28d1f895c6fe 303 */
mbed_official 340:28d1f895c6fe 304 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 305 {
mbed_official 340:28d1f895c6fe 306 /* Check the parameters */
mbed_official 340:28d1f895c6fe 307 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 308
mbed_official 340:28d1f895c6fe 309 /* Disable the Input Capture channels 1, 2 and 3
mbed_official 340:28d1f895c6fe 310 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 340:28d1f895c6fe 311 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 340:28d1f895c6fe 312
mbed_official 340:28d1f895c6fe 313 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 314 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 315
mbed_official 340:28d1f895c6fe 316 /* Return function status */
mbed_official 340:28d1f895c6fe 317 return HAL_OK;
mbed_official 340:28d1f895c6fe 318 }
mbed_official 340:28d1f895c6fe 319
mbed_official 340:28d1f895c6fe 320 /**
mbed_official 340:28d1f895c6fe 321 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
mbed_official 340:28d1f895c6fe 322 * @param htim : TIM Hall Sensor handle
mbed_official 340:28d1f895c6fe 323 * @retval HAL status
mbed_official 340:28d1f895c6fe 324 */
mbed_official 340:28d1f895c6fe 325 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 326 {
mbed_official 340:28d1f895c6fe 327 /* Check the parameters */
mbed_official 340:28d1f895c6fe 328 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 329
mbed_official 340:28d1f895c6fe 330 /* Enable the capture compare Interrupts 1 event */
mbed_official 340:28d1f895c6fe 331 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 332
mbed_official 340:28d1f895c6fe 333 /* Enable the Input Capture channels 1
mbed_official 340:28d1f895c6fe 334 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 340:28d1f895c6fe 335 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 340:28d1f895c6fe 336
mbed_official 340:28d1f895c6fe 337 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 338 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 339
mbed_official 340:28d1f895c6fe 340 /* Return function status */
mbed_official 340:28d1f895c6fe 341 return HAL_OK;
mbed_official 340:28d1f895c6fe 342 }
mbed_official 340:28d1f895c6fe 343
mbed_official 340:28d1f895c6fe 344 /**
mbed_official 340:28d1f895c6fe 345 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
mbed_official 340:28d1f895c6fe 346 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 347 * @retval HAL status
mbed_official 340:28d1f895c6fe 348 */
mbed_official 340:28d1f895c6fe 349 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 350 {
mbed_official 340:28d1f895c6fe 351 /* Check the parameters */
mbed_official 340:28d1f895c6fe 352 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 353
mbed_official 340:28d1f895c6fe 354 /* Disable the Input Capture channels 1
mbed_official 340:28d1f895c6fe 355 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 340:28d1f895c6fe 356 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 340:28d1f895c6fe 357
mbed_official 340:28d1f895c6fe 358 /* Disable the capture compare Interrupts event */
mbed_official 340:28d1f895c6fe 359 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 360
mbed_official 340:28d1f895c6fe 361 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 362 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 363
mbed_official 340:28d1f895c6fe 364 /* Return function status */
mbed_official 340:28d1f895c6fe 365 return HAL_OK;
mbed_official 340:28d1f895c6fe 366 }
mbed_official 340:28d1f895c6fe 367
mbed_official 340:28d1f895c6fe 368 /**
mbed_official 340:28d1f895c6fe 369 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
mbed_official 340:28d1f895c6fe 370 * @param htim : TIM Hall Sensor handle
mbed_official 340:28d1f895c6fe 371 * @param pData : The destination Buffer address.
mbed_official 340:28d1f895c6fe 372 * @param Length : The length of data to be transferred from TIM peripheral to memory.
mbed_official 340:28d1f895c6fe 373 * @retval HAL status
mbed_official 340:28d1f895c6fe 374 */
mbed_official 340:28d1f895c6fe 375 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
mbed_official 340:28d1f895c6fe 376 {
mbed_official 340:28d1f895c6fe 377 /* Check the parameters */
mbed_official 340:28d1f895c6fe 378 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 379
mbed_official 340:28d1f895c6fe 380 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 340:28d1f895c6fe 381 {
mbed_official 340:28d1f895c6fe 382 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 383 }
mbed_official 340:28d1f895c6fe 384 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 340:28d1f895c6fe 385 {
mbed_official 340:28d1f895c6fe 386 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 340:28d1f895c6fe 387 {
mbed_official 340:28d1f895c6fe 388 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 389 }
mbed_official 340:28d1f895c6fe 390 else
mbed_official 340:28d1f895c6fe 391 {
mbed_official 340:28d1f895c6fe 392 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 393 }
mbed_official 340:28d1f895c6fe 394 }
mbed_official 340:28d1f895c6fe 395 /* Enable the Input Capture channels 1
mbed_official 340:28d1f895c6fe 396 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 340:28d1f895c6fe 397 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 340:28d1f895c6fe 398
mbed_official 340:28d1f895c6fe 399 /* Set the DMA Input Capture 1 Callback */
mbed_official 340:28d1f895c6fe 400 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 340:28d1f895c6fe 401 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 402 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 403
mbed_official 340:28d1f895c6fe 404 /* Enable the DMA channel for Capture 1*/
mbed_official 340:28d1f895c6fe 405 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official 340:28d1f895c6fe 406
mbed_official 340:28d1f895c6fe 407 /* Enable the capture compare 1 Interrupt */
mbed_official 340:28d1f895c6fe 408 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 340:28d1f895c6fe 409
mbed_official 340:28d1f895c6fe 410 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 411 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 412
mbed_official 340:28d1f895c6fe 413 /* Return function status */
mbed_official 340:28d1f895c6fe 414 return HAL_OK;
mbed_official 340:28d1f895c6fe 415 }
mbed_official 340:28d1f895c6fe 416
mbed_official 340:28d1f895c6fe 417 /**
mbed_official 340:28d1f895c6fe 418 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
mbed_official 340:28d1f895c6fe 419 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 420 * @retval HAL status
mbed_official 340:28d1f895c6fe 421 */
mbed_official 340:28d1f895c6fe 422 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 423 {
mbed_official 340:28d1f895c6fe 424 /* Check the parameters */
mbed_official 340:28d1f895c6fe 425 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 426
mbed_official 340:28d1f895c6fe 427 /* Disable the Input Capture channels 1
mbed_official 340:28d1f895c6fe 428 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 340:28d1f895c6fe 429 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 340:28d1f895c6fe 430
mbed_official 340:28d1f895c6fe 431
mbed_official 340:28d1f895c6fe 432 /* Disable the capture compare Interrupts 1 event */
mbed_official 340:28d1f895c6fe 433 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 340:28d1f895c6fe 434
mbed_official 340:28d1f895c6fe 435 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 436 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 437
mbed_official 340:28d1f895c6fe 438 /* Return function status */
mbed_official 340:28d1f895c6fe 439 return HAL_OK;
mbed_official 340:28d1f895c6fe 440 }
mbed_official 340:28d1f895c6fe 441
mbed_official 340:28d1f895c6fe 442 /**
mbed_official 340:28d1f895c6fe 443 * @}
mbed_official 340:28d1f895c6fe 444 */
mbed_official 340:28d1f895c6fe 445
mbed_official 340:28d1f895c6fe 446 /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions
mbed_official 340:28d1f895c6fe 447 * @brief Timer Complementary Output Compare functions
mbed_official 340:28d1f895c6fe 448 *
mbed_official 340:28d1f895c6fe 449 @verbatim
mbed_official 340:28d1f895c6fe 450 ==============================================================================
mbed_official 340:28d1f895c6fe 451 ##### Timer Complementary Output Compare functions #####
mbed_official 340:28d1f895c6fe 452 ==============================================================================
mbed_official 340:28d1f895c6fe 453 [..]
mbed_official 340:28d1f895c6fe 454 This section provides functions allowing to:
mbed_official 340:28d1f895c6fe 455 (+) Start the Complementary Output Compare/PWM.
mbed_official 340:28d1f895c6fe 456 (+) Stop the Complementary Output Compare/PWM.
mbed_official 340:28d1f895c6fe 457 (+) Start the Complementary Output Compare/PWM and enable interrupts.
mbed_official 340:28d1f895c6fe 458 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
mbed_official 340:28d1f895c6fe 459 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
mbed_official 340:28d1f895c6fe 460 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
mbed_official 340:28d1f895c6fe 461
mbed_official 340:28d1f895c6fe 462 @endverbatim
mbed_official 340:28d1f895c6fe 463 * @{
mbed_official 340:28d1f895c6fe 464 */
mbed_official 340:28d1f895c6fe 465
mbed_official 340:28d1f895c6fe 466 /**
mbed_official 340:28d1f895c6fe 467 * @brief Starts the TIM Output Compare signal generation on the complementary
mbed_official 340:28d1f895c6fe 468 * output.
mbed_official 340:28d1f895c6fe 469 * @param htim : TIM Output Compare handle
mbed_official 340:28d1f895c6fe 470 * @param Channel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 471 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 472 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 473 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 474 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 475 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 476 * @retval HAL status
mbed_official 340:28d1f895c6fe 477 */
mbed_official 340:28d1f895c6fe 478 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 479 {
mbed_official 340:28d1f895c6fe 480 /* Check the parameters */
mbed_official 340:28d1f895c6fe 481 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 482
mbed_official 340:28d1f895c6fe 483 /* Enable the Capture compare channel N */
mbed_official 340:28d1f895c6fe 484 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 485
mbed_official 340:28d1f895c6fe 486 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 487 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 488
mbed_official 340:28d1f895c6fe 489 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 490 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 491
mbed_official 340:28d1f895c6fe 492 /* Return function status */
mbed_official 340:28d1f895c6fe 493 return HAL_OK;
mbed_official 340:28d1f895c6fe 494 }
mbed_official 340:28d1f895c6fe 495
mbed_official 340:28d1f895c6fe 496 /**
mbed_official 340:28d1f895c6fe 497 * @brief Stops the TIM Output Compare signal generation on the complementary
mbed_official 340:28d1f895c6fe 498 * output.
mbed_official 340:28d1f895c6fe 499 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 500 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 501 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 502 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 503 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 504 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 505 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 506 * @retval HAL status
mbed_official 340:28d1f895c6fe 507 */
mbed_official 340:28d1f895c6fe 508 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 509 {
mbed_official 340:28d1f895c6fe 510 /* Check the parameters */
mbed_official 340:28d1f895c6fe 511 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 512
mbed_official 340:28d1f895c6fe 513 /* Disable the Capture compare channel N */
mbed_official 340:28d1f895c6fe 514 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 515
mbed_official 340:28d1f895c6fe 516 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 517 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 518
mbed_official 340:28d1f895c6fe 519 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 520 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 521
mbed_official 340:28d1f895c6fe 522 /* Return function status */
mbed_official 340:28d1f895c6fe 523 return HAL_OK;
mbed_official 340:28d1f895c6fe 524 }
mbed_official 340:28d1f895c6fe 525
mbed_official 340:28d1f895c6fe 526 /**
mbed_official 340:28d1f895c6fe 527 * @brief Starts the TIM Output Compare signal generation in interrupt mode
mbed_official 340:28d1f895c6fe 528 * on the complementary output.
mbed_official 340:28d1f895c6fe 529 * @param htim : TIM OC handle
mbed_official 340:28d1f895c6fe 530 * @param Channel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 531 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 532 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 533 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 534 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 535 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 536 * @retval HAL status
mbed_official 340:28d1f895c6fe 537 */
mbed_official 340:28d1f895c6fe 538 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 539 {
mbed_official 340:28d1f895c6fe 540 /* Check the parameters */
mbed_official 340:28d1f895c6fe 541 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 542
mbed_official 340:28d1f895c6fe 543 switch (Channel)
mbed_official 340:28d1f895c6fe 544 {
mbed_official 340:28d1f895c6fe 545 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 546 {
mbed_official 340:28d1f895c6fe 547 /* Enable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 548 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 549 }
mbed_official 340:28d1f895c6fe 550 break;
mbed_official 340:28d1f895c6fe 551
mbed_official 340:28d1f895c6fe 552 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 553 {
mbed_official 340:28d1f895c6fe 554 /* Enable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 555 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 340:28d1f895c6fe 556 }
mbed_official 340:28d1f895c6fe 557 break;
mbed_official 340:28d1f895c6fe 558
mbed_official 340:28d1f895c6fe 559 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 560 {
mbed_official 340:28d1f895c6fe 561 /* Enable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 562 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 340:28d1f895c6fe 563 }
mbed_official 340:28d1f895c6fe 564 break;
mbed_official 340:28d1f895c6fe 565
mbed_official 340:28d1f895c6fe 566 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 567 {
mbed_official 340:28d1f895c6fe 568 /* Enable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 569 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 340:28d1f895c6fe 570 }
mbed_official 340:28d1f895c6fe 571 break;
mbed_official 340:28d1f895c6fe 572
mbed_official 340:28d1f895c6fe 573 default:
mbed_official 340:28d1f895c6fe 574 break;
mbed_official 340:28d1f895c6fe 575 }
mbed_official 340:28d1f895c6fe 576
mbed_official 340:28d1f895c6fe 577 /* Enable the TIM Break interrupt */
mbed_official 340:28d1f895c6fe 578 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
mbed_official 340:28d1f895c6fe 579
mbed_official 340:28d1f895c6fe 580 /* Enable the Capture compare channel N */
mbed_official 340:28d1f895c6fe 581 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 582
mbed_official 340:28d1f895c6fe 583 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 584 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 585
mbed_official 340:28d1f895c6fe 586 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 587 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 588
mbed_official 340:28d1f895c6fe 589 /* Return function status */
mbed_official 340:28d1f895c6fe 590 return HAL_OK;
mbed_official 340:28d1f895c6fe 591 }
mbed_official 340:28d1f895c6fe 592
mbed_official 340:28d1f895c6fe 593 /**
mbed_official 340:28d1f895c6fe 594 * @brief Stops the TIM Output Compare signal generation in interrupt mode
mbed_official 340:28d1f895c6fe 595 * on the complementary output.
mbed_official 340:28d1f895c6fe 596 * @param htim : TIM Output Compare handle
mbed_official 340:28d1f895c6fe 597 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 598 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 599 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 600 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 601 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 602 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 603 * @retval HAL status
mbed_official 340:28d1f895c6fe 604 */
mbed_official 340:28d1f895c6fe 605 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 606 {
mbed_official 340:28d1f895c6fe 607 uint32_t tmpccer = 0;
mbed_official 340:28d1f895c6fe 608
mbed_official 340:28d1f895c6fe 609 /* Check the parameters */
mbed_official 340:28d1f895c6fe 610 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 611
mbed_official 340:28d1f895c6fe 612 switch (Channel)
mbed_official 340:28d1f895c6fe 613 {
mbed_official 340:28d1f895c6fe 614 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 615 {
mbed_official 340:28d1f895c6fe 616 /* Disable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 617 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 618 }
mbed_official 340:28d1f895c6fe 619 break;
mbed_official 340:28d1f895c6fe 620
mbed_official 340:28d1f895c6fe 621 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 622 {
mbed_official 340:28d1f895c6fe 623 /* Disable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 624 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 340:28d1f895c6fe 625 }
mbed_official 340:28d1f895c6fe 626 break;
mbed_official 340:28d1f895c6fe 627
mbed_official 340:28d1f895c6fe 628 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 629 {
mbed_official 340:28d1f895c6fe 630 /* Disable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 631 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 340:28d1f895c6fe 632 }
mbed_official 340:28d1f895c6fe 633 break;
mbed_official 340:28d1f895c6fe 634
mbed_official 340:28d1f895c6fe 635 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 636 {
mbed_official 340:28d1f895c6fe 637 /* Disable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 638 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 340:28d1f895c6fe 639 }
mbed_official 340:28d1f895c6fe 640 break;
mbed_official 340:28d1f895c6fe 641
mbed_official 340:28d1f895c6fe 642 default:
mbed_official 340:28d1f895c6fe 643 break;
mbed_official 340:28d1f895c6fe 644 }
mbed_official 340:28d1f895c6fe 645
mbed_official 340:28d1f895c6fe 646 /* Disable the Capture compare channel N */
mbed_official 340:28d1f895c6fe 647 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 648
mbed_official 340:28d1f895c6fe 649 /* Disable the TIM Break interrupt (only if no more channel is active) */
mbed_official 340:28d1f895c6fe 650 tmpccer = htim->Instance->CCER;
mbed_official 340:28d1f895c6fe 651 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
mbed_official 340:28d1f895c6fe 652 {
mbed_official 340:28d1f895c6fe 653 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
mbed_official 340:28d1f895c6fe 654 }
mbed_official 340:28d1f895c6fe 655
mbed_official 340:28d1f895c6fe 656 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 657 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 658
mbed_official 340:28d1f895c6fe 659 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 660 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 661
mbed_official 340:28d1f895c6fe 662 /* Return function status */
mbed_official 340:28d1f895c6fe 663 return HAL_OK;
mbed_official 340:28d1f895c6fe 664 }
mbed_official 340:28d1f895c6fe 665
mbed_official 340:28d1f895c6fe 666 /**
mbed_official 340:28d1f895c6fe 667 * @brief Starts the TIM Output Compare signal generation in DMA mode
mbed_official 340:28d1f895c6fe 668 * on the complementary output.
mbed_official 340:28d1f895c6fe 669 * @param htim : TIM Output Compare handle
mbed_official 340:28d1f895c6fe 670 * @param Channel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 671 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 672 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 673 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 674 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 675 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 676 * @param pData : The source Buffer address.
mbed_official 340:28d1f895c6fe 677 * @param Length : The length of data to be transferred from memory to TIM peripheral
mbed_official 340:28d1f895c6fe 678 * @retval HAL status
mbed_official 340:28d1f895c6fe 679 */
mbed_official 340:28d1f895c6fe 680 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 340:28d1f895c6fe 681 {
mbed_official 340:28d1f895c6fe 682 /* Check the parameters */
mbed_official 340:28d1f895c6fe 683 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 684
mbed_official 340:28d1f895c6fe 685 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 340:28d1f895c6fe 686 {
mbed_official 340:28d1f895c6fe 687 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 688 }
mbed_official 340:28d1f895c6fe 689 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 340:28d1f895c6fe 690 {
mbed_official 340:28d1f895c6fe 691 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 340:28d1f895c6fe 692 {
mbed_official 340:28d1f895c6fe 693 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 694 }
mbed_official 340:28d1f895c6fe 695 else
mbed_official 340:28d1f895c6fe 696 {
mbed_official 340:28d1f895c6fe 697 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 698 }
mbed_official 340:28d1f895c6fe 699 }
mbed_official 340:28d1f895c6fe 700 switch (Channel)
mbed_official 340:28d1f895c6fe 701 {
mbed_official 340:28d1f895c6fe 702 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 703 {
mbed_official 340:28d1f895c6fe 704 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 705 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 706
mbed_official 340:28d1f895c6fe 707 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 708 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 709
mbed_official 340:28d1f895c6fe 710 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 711 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 340:28d1f895c6fe 712
mbed_official 340:28d1f895c6fe 713 /* Enable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 714 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 340:28d1f895c6fe 715 }
mbed_official 340:28d1f895c6fe 716 break;
mbed_official 340:28d1f895c6fe 717
mbed_official 340:28d1f895c6fe 718 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 719 {
mbed_official 340:28d1f895c6fe 720 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 721 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 722
mbed_official 340:28d1f895c6fe 723 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 724 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 725
mbed_official 340:28d1f895c6fe 726 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 727 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 340:28d1f895c6fe 728
mbed_official 340:28d1f895c6fe 729 /* Enable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 730 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 340:28d1f895c6fe 731 }
mbed_official 340:28d1f895c6fe 732 break;
mbed_official 340:28d1f895c6fe 733
mbed_official 340:28d1f895c6fe 734 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 735 {
mbed_official 340:28d1f895c6fe 736 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 737 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 738
mbed_official 340:28d1f895c6fe 739 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 740 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 741
mbed_official 340:28d1f895c6fe 742 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 743 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 340:28d1f895c6fe 744
mbed_official 340:28d1f895c6fe 745 /* Enable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 746 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 340:28d1f895c6fe 747 }
mbed_official 340:28d1f895c6fe 748 break;
mbed_official 340:28d1f895c6fe 749
mbed_official 340:28d1f895c6fe 750 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 751 {
mbed_official 340:28d1f895c6fe 752 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 753 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 754
mbed_official 340:28d1f895c6fe 755 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 756 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 757
mbed_official 340:28d1f895c6fe 758 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 759 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 340:28d1f895c6fe 760
mbed_official 340:28d1f895c6fe 761 /* Enable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 762 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 340:28d1f895c6fe 763 }
mbed_official 340:28d1f895c6fe 764 break;
mbed_official 340:28d1f895c6fe 765
mbed_official 340:28d1f895c6fe 766 default:
mbed_official 340:28d1f895c6fe 767 break;
mbed_official 340:28d1f895c6fe 768 }
mbed_official 340:28d1f895c6fe 769
mbed_official 340:28d1f895c6fe 770 /* Enable the Capture compare channel N */
mbed_official 340:28d1f895c6fe 771 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 772
mbed_official 340:28d1f895c6fe 773 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 774 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 775
mbed_official 340:28d1f895c6fe 776 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 777 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 778
mbed_official 340:28d1f895c6fe 779 /* Return function status */
mbed_official 340:28d1f895c6fe 780 return HAL_OK;
mbed_official 340:28d1f895c6fe 781 }
mbed_official 340:28d1f895c6fe 782
mbed_official 340:28d1f895c6fe 783 /**
mbed_official 340:28d1f895c6fe 784 * @brief Stops the TIM Output Compare signal generation in DMA mode
mbed_official 340:28d1f895c6fe 785 * on the complementary output.
mbed_official 340:28d1f895c6fe 786 * @param htim : TIM Output Compare handle
mbed_official 340:28d1f895c6fe 787 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 788 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 789 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 790 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 791 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 792 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 793 * @retval HAL status
mbed_official 340:28d1f895c6fe 794 */
mbed_official 340:28d1f895c6fe 795 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 796 {
mbed_official 340:28d1f895c6fe 797 /* Check the parameters */
mbed_official 340:28d1f895c6fe 798 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 799
mbed_official 340:28d1f895c6fe 800 switch (Channel)
mbed_official 340:28d1f895c6fe 801 {
mbed_official 340:28d1f895c6fe 802 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 803 {
mbed_official 340:28d1f895c6fe 804 /* Disable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 805 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 340:28d1f895c6fe 806 }
mbed_official 340:28d1f895c6fe 807 break;
mbed_official 340:28d1f895c6fe 808
mbed_official 340:28d1f895c6fe 809 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 810 {
mbed_official 340:28d1f895c6fe 811 /* Disable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 812 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 340:28d1f895c6fe 813 }
mbed_official 340:28d1f895c6fe 814 break;
mbed_official 340:28d1f895c6fe 815
mbed_official 340:28d1f895c6fe 816 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 817 {
mbed_official 340:28d1f895c6fe 818 /* Disable the TIM Output Compare DMA request */
mbed_official 340:28d1f895c6fe 819 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 340:28d1f895c6fe 820 }
mbed_official 340:28d1f895c6fe 821 break;
mbed_official 340:28d1f895c6fe 822
mbed_official 340:28d1f895c6fe 823 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 824 {
mbed_official 340:28d1f895c6fe 825 /* Disable the TIM Output Compare interrupt */
mbed_official 340:28d1f895c6fe 826 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 340:28d1f895c6fe 827 }
mbed_official 340:28d1f895c6fe 828 break;
mbed_official 340:28d1f895c6fe 829
mbed_official 340:28d1f895c6fe 830 default:
mbed_official 340:28d1f895c6fe 831 break;
mbed_official 340:28d1f895c6fe 832 }
mbed_official 340:28d1f895c6fe 833
mbed_official 340:28d1f895c6fe 834 /* Disable the Capture compare channel N */
mbed_official 340:28d1f895c6fe 835 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 836
mbed_official 340:28d1f895c6fe 837 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 838 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 839
mbed_official 340:28d1f895c6fe 840 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 841 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 842
mbed_official 340:28d1f895c6fe 843 /* Change the htim state */
mbed_official 340:28d1f895c6fe 844 htim->State = HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 845
mbed_official 340:28d1f895c6fe 846 /* Return function status */
mbed_official 340:28d1f895c6fe 847 return HAL_OK;
mbed_official 340:28d1f895c6fe 848 }
mbed_official 340:28d1f895c6fe 849
mbed_official 340:28d1f895c6fe 850 /**
mbed_official 340:28d1f895c6fe 851 * @}
mbed_official 340:28d1f895c6fe 852 */
mbed_official 340:28d1f895c6fe 853
mbed_official 340:28d1f895c6fe 854 /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions
mbed_official 340:28d1f895c6fe 855 * @brief Timer Complementary PWM functions
mbed_official 340:28d1f895c6fe 856 *
mbed_official 340:28d1f895c6fe 857 @verbatim
mbed_official 340:28d1f895c6fe 858 ==============================================================================
mbed_official 340:28d1f895c6fe 859 ##### Timer Complementary PWM functions #####
mbed_official 340:28d1f895c6fe 860 ==============================================================================
mbed_official 340:28d1f895c6fe 861 [..]
mbed_official 340:28d1f895c6fe 862 This section provides functions allowing to:
mbed_official 340:28d1f895c6fe 863 (+) Start the Complementary PWM.
mbed_official 340:28d1f895c6fe 864 (+) Stop the Complementary PWM.
mbed_official 340:28d1f895c6fe 865 (+) Start the Complementary PWM and enable interrupts.
mbed_official 340:28d1f895c6fe 866 (+) Stop the Complementary PWM and disable interrupts.
mbed_official 340:28d1f895c6fe 867 (+) Start the Complementary PWM and enable DMA transfers.
mbed_official 340:28d1f895c6fe 868 (+) Stop the Complementary PWM and disable DMA transfers.
mbed_official 340:28d1f895c6fe 869 (+) Start the Complementary Input Capture measurement.
mbed_official 340:28d1f895c6fe 870 (+) Stop the Complementary Input Capture.
mbed_official 340:28d1f895c6fe 871 (+) Start the Complementary Input Capture and enable interrupts.
mbed_official 340:28d1f895c6fe 872 (+) Stop the Complementary Input Capture and disable interrupts.
mbed_official 340:28d1f895c6fe 873 (+) Start the Complementary Input Capture and enable DMA transfers.
mbed_official 340:28d1f895c6fe 874 (+) Stop the Complementary Input Capture and disable DMA transfers.
mbed_official 340:28d1f895c6fe 875 (+) Start the Complementary One Pulse generation.
mbed_official 340:28d1f895c6fe 876 (+) Stop the Complementary One Pulse.
mbed_official 340:28d1f895c6fe 877 (+) Start the Complementary One Pulse and enable interrupts.
mbed_official 340:28d1f895c6fe 878 (+) Stop the Complementary One Pulse and disable interrupts.
mbed_official 340:28d1f895c6fe 879
mbed_official 340:28d1f895c6fe 880 @endverbatim
mbed_official 340:28d1f895c6fe 881 * @{
mbed_official 340:28d1f895c6fe 882 */
mbed_official 340:28d1f895c6fe 883
mbed_official 340:28d1f895c6fe 884 /**
mbed_official 340:28d1f895c6fe 885 * @brief Starts the PWM signal generation on the complementary output.
mbed_official 340:28d1f895c6fe 886 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 887 * @param Channel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 888 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 889 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 890 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 891 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 892 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 893 * @retval HAL status
mbed_official 340:28d1f895c6fe 894 */
mbed_official 340:28d1f895c6fe 895 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 896 {
mbed_official 340:28d1f895c6fe 897 /* Check the parameters */
mbed_official 340:28d1f895c6fe 898 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 899
mbed_official 340:28d1f895c6fe 900 /* Enable the complementary PWM output */
mbed_official 340:28d1f895c6fe 901 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 902
mbed_official 340:28d1f895c6fe 903 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 904 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 905
mbed_official 340:28d1f895c6fe 906 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 907 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 908
mbed_official 340:28d1f895c6fe 909 /* Return function status */
mbed_official 340:28d1f895c6fe 910 return HAL_OK;
mbed_official 340:28d1f895c6fe 911 }
mbed_official 340:28d1f895c6fe 912
mbed_official 340:28d1f895c6fe 913 /**
mbed_official 340:28d1f895c6fe 914 * @brief Stops the PWM signal generation on the complementary output.
mbed_official 340:28d1f895c6fe 915 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 916 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 917 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 918 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 919 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 920 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 921 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 922 * @retval HAL status
mbed_official 340:28d1f895c6fe 923 */
mbed_official 340:28d1f895c6fe 924 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 925 {
mbed_official 340:28d1f895c6fe 926 /* Check the parameters */
mbed_official 340:28d1f895c6fe 927 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 928
mbed_official 340:28d1f895c6fe 929 /* Disable the complementary PWM output */
mbed_official 340:28d1f895c6fe 930 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 931
mbed_official 340:28d1f895c6fe 932 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 933 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 934
mbed_official 340:28d1f895c6fe 935 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 936 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 937
mbed_official 340:28d1f895c6fe 938 /* Return function status */
mbed_official 340:28d1f895c6fe 939 return HAL_OK;
mbed_official 340:28d1f895c6fe 940 }
mbed_official 340:28d1f895c6fe 941
mbed_official 340:28d1f895c6fe 942 /**
mbed_official 340:28d1f895c6fe 943 * @brief Starts the PWM signal generation in interrupt mode on the
mbed_official 340:28d1f895c6fe 944 * complementary output.
mbed_official 340:28d1f895c6fe 945 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 946 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 947 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 948 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 949 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 950 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 951 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 952 * @retval HAL status
mbed_official 340:28d1f895c6fe 953 */
mbed_official 340:28d1f895c6fe 954 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 955 {
mbed_official 340:28d1f895c6fe 956 /* Check the parameters */
mbed_official 340:28d1f895c6fe 957 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 958
mbed_official 340:28d1f895c6fe 959 switch (Channel)
mbed_official 340:28d1f895c6fe 960 {
mbed_official 340:28d1f895c6fe 961 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 962 {
mbed_official 340:28d1f895c6fe 963 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 340:28d1f895c6fe 964 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 965 }
mbed_official 340:28d1f895c6fe 966 break;
mbed_official 340:28d1f895c6fe 967
mbed_official 340:28d1f895c6fe 968 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 969 {
mbed_official 340:28d1f895c6fe 970 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 340:28d1f895c6fe 971 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 340:28d1f895c6fe 972 }
mbed_official 340:28d1f895c6fe 973 break;
mbed_official 340:28d1f895c6fe 974
mbed_official 340:28d1f895c6fe 975 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 976 {
mbed_official 340:28d1f895c6fe 977 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 340:28d1f895c6fe 978 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 340:28d1f895c6fe 979 }
mbed_official 340:28d1f895c6fe 980 break;
mbed_official 340:28d1f895c6fe 981
mbed_official 340:28d1f895c6fe 982 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 983 {
mbed_official 340:28d1f895c6fe 984 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 340:28d1f895c6fe 985 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 340:28d1f895c6fe 986 }
mbed_official 340:28d1f895c6fe 987 break;
mbed_official 340:28d1f895c6fe 988
mbed_official 340:28d1f895c6fe 989 default:
mbed_official 340:28d1f895c6fe 990 break;
mbed_official 340:28d1f895c6fe 991 }
mbed_official 340:28d1f895c6fe 992
mbed_official 340:28d1f895c6fe 993 /* Enable the TIM Break interrupt */
mbed_official 340:28d1f895c6fe 994 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
mbed_official 340:28d1f895c6fe 995
mbed_official 340:28d1f895c6fe 996 /* Enable the complementary PWM output */
mbed_official 340:28d1f895c6fe 997 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 998
mbed_official 340:28d1f895c6fe 999 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 1000 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 1001
mbed_official 340:28d1f895c6fe 1002 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 1003 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 1004
mbed_official 340:28d1f895c6fe 1005 /* Return function status */
mbed_official 340:28d1f895c6fe 1006 return HAL_OK;
mbed_official 340:28d1f895c6fe 1007 }
mbed_official 340:28d1f895c6fe 1008
mbed_official 340:28d1f895c6fe 1009 /**
mbed_official 340:28d1f895c6fe 1010 * @brief Stops the PWM signal generation in interrupt mode on the
mbed_official 340:28d1f895c6fe 1011 * complementary output.
mbed_official 340:28d1f895c6fe 1012 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1013 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 1014 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1015 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1016 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1017 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 1018 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 1019 * @retval HAL status
mbed_official 340:28d1f895c6fe 1020 */
mbed_official 340:28d1f895c6fe 1021 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 1022 {
mbed_official 340:28d1f895c6fe 1023 uint32_t tmpccer = 0;
mbed_official 340:28d1f895c6fe 1024
mbed_official 340:28d1f895c6fe 1025 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1026 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 1027
mbed_official 340:28d1f895c6fe 1028 switch (Channel)
mbed_official 340:28d1f895c6fe 1029 {
mbed_official 340:28d1f895c6fe 1030 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 1031 {
mbed_official 340:28d1f895c6fe 1032 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 340:28d1f895c6fe 1033 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 1034 }
mbed_official 340:28d1f895c6fe 1035 break;
mbed_official 340:28d1f895c6fe 1036
mbed_official 340:28d1f895c6fe 1037 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 1038 {
mbed_official 340:28d1f895c6fe 1039 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 340:28d1f895c6fe 1040 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 340:28d1f895c6fe 1041 }
mbed_official 340:28d1f895c6fe 1042 break;
mbed_official 340:28d1f895c6fe 1043
mbed_official 340:28d1f895c6fe 1044 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 1045 {
mbed_official 340:28d1f895c6fe 1046 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 340:28d1f895c6fe 1047 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 340:28d1f895c6fe 1048 }
mbed_official 340:28d1f895c6fe 1049 break;
mbed_official 340:28d1f895c6fe 1050
mbed_official 340:28d1f895c6fe 1051 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 1052 {
mbed_official 340:28d1f895c6fe 1053 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 340:28d1f895c6fe 1054 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 340:28d1f895c6fe 1055 }
mbed_official 340:28d1f895c6fe 1056 break;
mbed_official 340:28d1f895c6fe 1057
mbed_official 340:28d1f895c6fe 1058 default:
mbed_official 340:28d1f895c6fe 1059 break;
mbed_official 340:28d1f895c6fe 1060 }
mbed_official 340:28d1f895c6fe 1061
mbed_official 340:28d1f895c6fe 1062 /* Disable the complementary PWM output */
mbed_official 340:28d1f895c6fe 1063 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 1064
mbed_official 340:28d1f895c6fe 1065 /* Disable the TIM Break interrupt (only if no more channel is active) */
mbed_official 340:28d1f895c6fe 1066 tmpccer = htim->Instance->CCER;
mbed_official 340:28d1f895c6fe 1067 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
mbed_official 340:28d1f895c6fe 1068 {
mbed_official 340:28d1f895c6fe 1069 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
mbed_official 340:28d1f895c6fe 1070 }
mbed_official 340:28d1f895c6fe 1071
mbed_official 340:28d1f895c6fe 1072 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 1073 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1074
mbed_official 340:28d1f895c6fe 1075 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 1076 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1077
mbed_official 340:28d1f895c6fe 1078 /* Return function status */
mbed_official 340:28d1f895c6fe 1079 return HAL_OK;
mbed_official 340:28d1f895c6fe 1080 }
mbed_official 340:28d1f895c6fe 1081
mbed_official 340:28d1f895c6fe 1082 /**
mbed_official 340:28d1f895c6fe 1083 * @brief Starts the TIM PWM signal generation in DMA mode on the
mbed_official 340:28d1f895c6fe 1084 * complementary output
mbed_official 340:28d1f895c6fe 1085 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1086 * @param Channel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 1087 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1088 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1089 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1090 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 1091 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 1092 * @param pData : The source Buffer address.
mbed_official 340:28d1f895c6fe 1093 * @param Length : The length of data to be transferred from memory to TIM peripheral
mbed_official 340:28d1f895c6fe 1094 * @retval HAL status
mbed_official 340:28d1f895c6fe 1095 */
mbed_official 340:28d1f895c6fe 1096 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 340:28d1f895c6fe 1097 {
mbed_official 340:28d1f895c6fe 1098 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1099 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 1100
mbed_official 340:28d1f895c6fe 1101 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 340:28d1f895c6fe 1102 {
mbed_official 340:28d1f895c6fe 1103 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1104 }
mbed_official 340:28d1f895c6fe 1105 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 340:28d1f895c6fe 1106 {
mbed_official 340:28d1f895c6fe 1107 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 340:28d1f895c6fe 1108 {
mbed_official 340:28d1f895c6fe 1109 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1110 }
mbed_official 340:28d1f895c6fe 1111 else
mbed_official 340:28d1f895c6fe 1112 {
mbed_official 340:28d1f895c6fe 1113 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 1114 }
mbed_official 340:28d1f895c6fe 1115 }
mbed_official 340:28d1f895c6fe 1116 switch (Channel)
mbed_official 340:28d1f895c6fe 1117 {
mbed_official 340:28d1f895c6fe 1118 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 1119 {
mbed_official 340:28d1f895c6fe 1120 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 1121 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 1122
mbed_official 340:28d1f895c6fe 1123 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1124 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 1125
mbed_official 340:28d1f895c6fe 1126 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1127 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 340:28d1f895c6fe 1128
mbed_official 340:28d1f895c6fe 1129 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 340:28d1f895c6fe 1130 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 340:28d1f895c6fe 1131 }
mbed_official 340:28d1f895c6fe 1132 break;
mbed_official 340:28d1f895c6fe 1133
mbed_official 340:28d1f895c6fe 1134 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 1135 {
mbed_official 340:28d1f895c6fe 1136 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 1137 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 1138
mbed_official 340:28d1f895c6fe 1139 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1140 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 1141
mbed_official 340:28d1f895c6fe 1142 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1143 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 340:28d1f895c6fe 1144
mbed_official 340:28d1f895c6fe 1145 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 340:28d1f895c6fe 1146 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 340:28d1f895c6fe 1147 }
mbed_official 340:28d1f895c6fe 1148 break;
mbed_official 340:28d1f895c6fe 1149
mbed_official 340:28d1f895c6fe 1150 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 1151 {
mbed_official 340:28d1f895c6fe 1152 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 1153 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 1154
mbed_official 340:28d1f895c6fe 1155 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1156 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 1157
mbed_official 340:28d1f895c6fe 1158 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1159 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 340:28d1f895c6fe 1160
mbed_official 340:28d1f895c6fe 1161 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 340:28d1f895c6fe 1162 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 340:28d1f895c6fe 1163 }
mbed_official 340:28d1f895c6fe 1164 break;
mbed_official 340:28d1f895c6fe 1165
mbed_official 340:28d1f895c6fe 1166 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 1167 {
mbed_official 340:28d1f895c6fe 1168 /* Set the DMA Period elapsed callback */
mbed_official 340:28d1f895c6fe 1169 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 340:28d1f895c6fe 1170
mbed_official 340:28d1f895c6fe 1171 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1172 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 340:28d1f895c6fe 1173
mbed_official 340:28d1f895c6fe 1174 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1175 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 340:28d1f895c6fe 1176
mbed_official 340:28d1f895c6fe 1177 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 340:28d1f895c6fe 1178 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 340:28d1f895c6fe 1179 }
mbed_official 340:28d1f895c6fe 1180 break;
mbed_official 340:28d1f895c6fe 1181
mbed_official 340:28d1f895c6fe 1182 default:
mbed_official 340:28d1f895c6fe 1183 break;
mbed_official 340:28d1f895c6fe 1184 }
mbed_official 340:28d1f895c6fe 1185
mbed_official 340:28d1f895c6fe 1186 /* Enable the complementary PWM output */
mbed_official 340:28d1f895c6fe 1187 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 1188
mbed_official 340:28d1f895c6fe 1189 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 1190 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 1191
mbed_official 340:28d1f895c6fe 1192 /* Enable the Peripheral */
mbed_official 340:28d1f895c6fe 1193 __HAL_TIM_ENABLE(htim);
mbed_official 340:28d1f895c6fe 1194
mbed_official 340:28d1f895c6fe 1195 /* Return function status */
mbed_official 340:28d1f895c6fe 1196 return HAL_OK;
mbed_official 340:28d1f895c6fe 1197 }
mbed_official 340:28d1f895c6fe 1198
mbed_official 340:28d1f895c6fe 1199 /**
mbed_official 340:28d1f895c6fe 1200 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
mbed_official 340:28d1f895c6fe 1201 * output
mbed_official 340:28d1f895c6fe 1202 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1203 * @param Channel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 1204 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1205 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1206 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1207 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 340:28d1f895c6fe 1208 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 340:28d1f895c6fe 1209 * @retval HAL status
mbed_official 340:28d1f895c6fe 1210 */
mbed_official 340:28d1f895c6fe 1211 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 340:28d1f895c6fe 1212 {
mbed_official 340:28d1f895c6fe 1213 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1214 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 340:28d1f895c6fe 1215
mbed_official 340:28d1f895c6fe 1216 switch (Channel)
mbed_official 340:28d1f895c6fe 1217 {
mbed_official 340:28d1f895c6fe 1218 case TIM_CHANNEL_1:
mbed_official 340:28d1f895c6fe 1219 {
mbed_official 340:28d1f895c6fe 1220 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 340:28d1f895c6fe 1221 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 340:28d1f895c6fe 1222 }
mbed_official 340:28d1f895c6fe 1223 break;
mbed_official 340:28d1f895c6fe 1224
mbed_official 340:28d1f895c6fe 1225 case TIM_CHANNEL_2:
mbed_official 340:28d1f895c6fe 1226 {
mbed_official 340:28d1f895c6fe 1227 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 340:28d1f895c6fe 1228 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 340:28d1f895c6fe 1229 }
mbed_official 340:28d1f895c6fe 1230 break;
mbed_official 340:28d1f895c6fe 1231
mbed_official 340:28d1f895c6fe 1232 case TIM_CHANNEL_3:
mbed_official 340:28d1f895c6fe 1233 {
mbed_official 340:28d1f895c6fe 1234 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 340:28d1f895c6fe 1235 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 340:28d1f895c6fe 1236 }
mbed_official 340:28d1f895c6fe 1237 break;
mbed_official 340:28d1f895c6fe 1238
mbed_official 340:28d1f895c6fe 1239 case TIM_CHANNEL_4:
mbed_official 340:28d1f895c6fe 1240 {
mbed_official 340:28d1f895c6fe 1241 /* Disable the TIM Capture/Compare 4 DMA request */
mbed_official 340:28d1f895c6fe 1242 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 340:28d1f895c6fe 1243 }
mbed_official 340:28d1f895c6fe 1244 break;
mbed_official 340:28d1f895c6fe 1245
mbed_official 340:28d1f895c6fe 1246 default:
mbed_official 340:28d1f895c6fe 1247 break;
mbed_official 340:28d1f895c6fe 1248 }
mbed_official 340:28d1f895c6fe 1249
mbed_official 340:28d1f895c6fe 1250 /* Disable the complementary PWM output */
mbed_official 340:28d1f895c6fe 1251 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 1252
mbed_official 340:28d1f895c6fe 1253 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 1254 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1255
mbed_official 340:28d1f895c6fe 1256 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 1257 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1258
mbed_official 340:28d1f895c6fe 1259 /* Change the htim state */
mbed_official 340:28d1f895c6fe 1260 htim->State = HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 1261
mbed_official 340:28d1f895c6fe 1262 /* Return function status */
mbed_official 340:28d1f895c6fe 1263 return HAL_OK;
mbed_official 340:28d1f895c6fe 1264 }
mbed_official 340:28d1f895c6fe 1265
mbed_official 340:28d1f895c6fe 1266 /**
mbed_official 340:28d1f895c6fe 1267 * @}
mbed_official 340:28d1f895c6fe 1268 */
mbed_official 340:28d1f895c6fe 1269
mbed_official 340:28d1f895c6fe 1270 /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions
mbed_official 340:28d1f895c6fe 1271 * @brief Timer Complementary One Pulse functions
mbed_official 340:28d1f895c6fe 1272 *
mbed_official 340:28d1f895c6fe 1273 @verbatim
mbed_official 340:28d1f895c6fe 1274 ==============================================================================
mbed_official 340:28d1f895c6fe 1275 ##### Timer Complementary One Pulse functions #####
mbed_official 340:28d1f895c6fe 1276 ==============================================================================
mbed_official 340:28d1f895c6fe 1277 [..]
mbed_official 340:28d1f895c6fe 1278 This section provides functions allowing to:
mbed_official 340:28d1f895c6fe 1279 (+) Start the Complementary One Pulse generation.
mbed_official 340:28d1f895c6fe 1280 (+) Stop the Complementary One Pulse.
mbed_official 340:28d1f895c6fe 1281 (+) Start the Complementary One Pulse and enable interrupts.
mbed_official 340:28d1f895c6fe 1282 (+) Stop the Complementary One Pulse and disable interrupts.
mbed_official 340:28d1f895c6fe 1283
mbed_official 340:28d1f895c6fe 1284 @endverbatim
mbed_official 340:28d1f895c6fe 1285 * @{
mbed_official 340:28d1f895c6fe 1286 */
mbed_official 340:28d1f895c6fe 1287
mbed_official 340:28d1f895c6fe 1288 /**
mbed_official 340:28d1f895c6fe 1289 * @brief Starts the TIM One Pulse signal generation on the complemetary
mbed_official 340:28d1f895c6fe 1290 * output.
mbed_official 340:28d1f895c6fe 1291 * @param htim : TIM One Pulse handle
mbed_official 340:28d1f895c6fe 1292 * @param OutputChannel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 1293 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1294 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1295 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1296 * @retval HAL status
mbed_official 340:28d1f895c6fe 1297 */
mbed_official 340:28d1f895c6fe 1298 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 340:28d1f895c6fe 1299 {
mbed_official 340:28d1f895c6fe 1300 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1301 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 340:28d1f895c6fe 1302
mbed_official 340:28d1f895c6fe 1303 /* Enable the complementary One Pulse output */
mbed_official 340:28d1f895c6fe 1304 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 1305
mbed_official 340:28d1f895c6fe 1306 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 1307 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 1308
mbed_official 340:28d1f895c6fe 1309 /* Return function status */
mbed_official 340:28d1f895c6fe 1310 return HAL_OK;
mbed_official 340:28d1f895c6fe 1311 }
mbed_official 340:28d1f895c6fe 1312
mbed_official 340:28d1f895c6fe 1313 /**
mbed_official 340:28d1f895c6fe 1314 * @brief Stops the TIM One Pulse signal generation on the complementary
mbed_official 340:28d1f895c6fe 1315 * output.
mbed_official 340:28d1f895c6fe 1316 * @param htim : TIM One Pulse handle
mbed_official 340:28d1f895c6fe 1317 * @param OutputChannel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 1318 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1319 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1320 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1321 * @retval HAL status
mbed_official 340:28d1f895c6fe 1322 */
mbed_official 340:28d1f895c6fe 1323 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 340:28d1f895c6fe 1324 {
mbed_official 340:28d1f895c6fe 1325
mbed_official 340:28d1f895c6fe 1326 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1327 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 340:28d1f895c6fe 1328
mbed_official 340:28d1f895c6fe 1329 /* Disable the complementary One Pulse output */
mbed_official 340:28d1f895c6fe 1330 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 1331
mbed_official 340:28d1f895c6fe 1332 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 1333 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1334
mbed_official 340:28d1f895c6fe 1335 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 1336 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1337
mbed_official 340:28d1f895c6fe 1338 /* Return function status */
mbed_official 340:28d1f895c6fe 1339 return HAL_OK;
mbed_official 340:28d1f895c6fe 1340 }
mbed_official 340:28d1f895c6fe 1341
mbed_official 340:28d1f895c6fe 1342 /**
mbed_official 340:28d1f895c6fe 1343 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
mbed_official 340:28d1f895c6fe 1344 * complementary channel.
mbed_official 340:28d1f895c6fe 1345 * @param htim : TIM One Pulse handle
mbed_official 340:28d1f895c6fe 1346 * @param OutputChannel : TIM Channel to be enabled
mbed_official 340:28d1f895c6fe 1347 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1348 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1349 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1350 * @retval HAL status
mbed_official 340:28d1f895c6fe 1351 */
mbed_official 340:28d1f895c6fe 1352 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 340:28d1f895c6fe 1353 {
mbed_official 340:28d1f895c6fe 1354 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1355 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 340:28d1f895c6fe 1356
mbed_official 340:28d1f895c6fe 1357 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 340:28d1f895c6fe 1358 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 1359
mbed_official 340:28d1f895c6fe 1360 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 340:28d1f895c6fe 1361 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 340:28d1f895c6fe 1362
mbed_official 340:28d1f895c6fe 1363 /* Enable the complementary One Pulse output */
mbed_official 340:28d1f895c6fe 1364 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
mbed_official 340:28d1f895c6fe 1365
mbed_official 340:28d1f895c6fe 1366 /* Enable the Main Ouput */
mbed_official 340:28d1f895c6fe 1367 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 340:28d1f895c6fe 1368
mbed_official 340:28d1f895c6fe 1369 /* Return function status */
mbed_official 340:28d1f895c6fe 1370 return HAL_OK;
mbed_official 340:28d1f895c6fe 1371 }
mbed_official 340:28d1f895c6fe 1372
mbed_official 340:28d1f895c6fe 1373 /**
mbed_official 340:28d1f895c6fe 1374 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
mbed_official 340:28d1f895c6fe 1375 * complementary channel.
mbed_official 340:28d1f895c6fe 1376 * @param htim : TIM One Pulse handle
mbed_official 340:28d1f895c6fe 1377 * @param OutputChannel : TIM Channel to be disabled
mbed_official 340:28d1f895c6fe 1378 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1379 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 340:28d1f895c6fe 1380 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 340:28d1f895c6fe 1381 * @retval HAL status
mbed_official 340:28d1f895c6fe 1382 */
mbed_official 340:28d1f895c6fe 1383 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 340:28d1f895c6fe 1384 {
mbed_official 340:28d1f895c6fe 1385 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1386 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 340:28d1f895c6fe 1387
mbed_official 340:28d1f895c6fe 1388 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 340:28d1f895c6fe 1389 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 340:28d1f895c6fe 1390
mbed_official 340:28d1f895c6fe 1391 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 340:28d1f895c6fe 1392 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 340:28d1f895c6fe 1393
mbed_official 340:28d1f895c6fe 1394 /* Disable the complementary One Pulse output */
mbed_official 340:28d1f895c6fe 1395 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
mbed_official 340:28d1f895c6fe 1396
mbed_official 340:28d1f895c6fe 1397 /* Disable the Main Ouput */
mbed_official 340:28d1f895c6fe 1398 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1399
mbed_official 340:28d1f895c6fe 1400 /* Disable the Peripheral */
mbed_official 340:28d1f895c6fe 1401 __HAL_TIM_DISABLE(htim);
mbed_official 340:28d1f895c6fe 1402
mbed_official 340:28d1f895c6fe 1403 /* Return function status */
mbed_official 340:28d1f895c6fe 1404 return HAL_OK;
mbed_official 340:28d1f895c6fe 1405 }
mbed_official 340:28d1f895c6fe 1406
mbed_official 340:28d1f895c6fe 1407
mbed_official 340:28d1f895c6fe 1408
mbed_official 340:28d1f895c6fe 1409 /**
mbed_official 340:28d1f895c6fe 1410 * @}
mbed_official 340:28d1f895c6fe 1411 */
mbed_official 340:28d1f895c6fe 1412 /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions
mbed_official 340:28d1f895c6fe 1413 * @brief Peripheral Control functions
mbed_official 340:28d1f895c6fe 1414 *
mbed_official 340:28d1f895c6fe 1415 @verbatim
mbed_official 340:28d1f895c6fe 1416 ==============================================================================
mbed_official 340:28d1f895c6fe 1417 ##### Peripheral Control functions #####
mbed_official 340:28d1f895c6fe 1418 ==============================================================================
mbed_official 340:28d1f895c6fe 1419 [..]
mbed_official 340:28d1f895c6fe 1420 This section provides functions allowing to:
mbed_official 340:28d1f895c6fe 1421 (+) Configure the commutation event in case of use of the Hall sensor interface.
mbed_official 340:28d1f895c6fe 1422 (+) Configure Complementary channels, break features and dead time.
mbed_official 340:28d1f895c6fe 1423 (+) Configure Master synchronization.
mbed_official 340:28d1f895c6fe 1424 (+) Configure timer remapping capabilities.
mbed_official 340:28d1f895c6fe 1425
mbed_official 340:28d1f895c6fe 1426 @endverbatim
mbed_official 340:28d1f895c6fe 1427 * @{
mbed_official 340:28d1f895c6fe 1428 */
mbed_official 340:28d1f895c6fe 1429 /**
mbed_official 340:28d1f895c6fe 1430 * @brief Configure the TIM commutation event sequence.
mbed_official 340:28d1f895c6fe 1431 * @note: this function is mandatory to use the commutation event in order to
mbed_official 340:28d1f895c6fe 1432 * update the configuration at each commutation detection on the TRGI input of the Timer,
mbed_official 340:28d1f895c6fe 1433 * the typical use of this feature is with the use of another Timer(interface Timer)
mbed_official 340:28d1f895c6fe 1434 * configured in Hall sensor interface, this interface Timer will generate the
mbed_official 340:28d1f895c6fe 1435 * commutation at its TRGO output (connected to Timer used in this function) each time
mbed_official 340:28d1f895c6fe 1436 * the TI1 of the Interface Timer detect a commutation at its input TI1.
mbed_official 340:28d1f895c6fe 1437 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1438 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
mbed_official 340:28d1f895c6fe 1439 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1440 * @arg TIM_TS_ITR0: Internal trigger 0 selected
mbed_official 340:28d1f895c6fe 1441 * @arg TIM_TS_ITR1: Internal trigger 1 selected
mbed_official 340:28d1f895c6fe 1442 * @arg TIM_TS_ITR2: Internal trigger 2 selected
mbed_official 340:28d1f895c6fe 1443 * @arg TIM_TS_ITR3: Internal trigger 3 selected
mbed_official 340:28d1f895c6fe 1444 * @arg TIM_TS_NONE: No trigger is needed
mbed_official 340:28d1f895c6fe 1445 * @param CommutationSource : the Commutation Event source
mbed_official 340:28d1f895c6fe 1446 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1447 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
mbed_official 340:28d1f895c6fe 1448 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
mbed_official 340:28d1f895c6fe 1449 * @retval HAL status
mbed_official 340:28d1f895c6fe 1450 */
mbed_official 340:28d1f895c6fe 1451 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
mbed_official 340:28d1f895c6fe 1452 {
mbed_official 340:28d1f895c6fe 1453 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1454 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 1455 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
mbed_official 340:28d1f895c6fe 1456
mbed_official 340:28d1f895c6fe 1457 __HAL_LOCK(htim);
mbed_official 340:28d1f895c6fe 1458
mbed_official 340:28d1f895c6fe 1459 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
mbed_official 340:28d1f895c6fe 1460 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
mbed_official 340:28d1f895c6fe 1461 {
mbed_official 340:28d1f895c6fe 1462 /* Select the Input trigger */
mbed_official 340:28d1f895c6fe 1463 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 340:28d1f895c6fe 1464 htim->Instance->SMCR |= InputTrigger;
mbed_official 340:28d1f895c6fe 1465 }
mbed_official 340:28d1f895c6fe 1466
mbed_official 340:28d1f895c6fe 1467 /* Select the Capture Compare preload feature */
mbed_official 340:28d1f895c6fe 1468 htim->Instance->CR2 |= TIM_CR2_CCPC;
mbed_official 340:28d1f895c6fe 1469 /* Select the Commutation event source */
mbed_official 340:28d1f895c6fe 1470 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
mbed_official 340:28d1f895c6fe 1471 htim->Instance->CR2 |= CommutationSource;
mbed_official 340:28d1f895c6fe 1472
mbed_official 340:28d1f895c6fe 1473 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 1474
mbed_official 340:28d1f895c6fe 1475 return HAL_OK;
mbed_official 340:28d1f895c6fe 1476 }
mbed_official 340:28d1f895c6fe 1477
mbed_official 340:28d1f895c6fe 1478 /**
mbed_official 340:28d1f895c6fe 1479 * @brief Configure the TIM commutation event sequence with interrupt.
mbed_official 340:28d1f895c6fe 1480 * @note: this function is mandatory to use the commutation event in order to
mbed_official 340:28d1f895c6fe 1481 * update the configuration at each commutation detection on the TRGI input of the Timer,
mbed_official 340:28d1f895c6fe 1482 * the typical use of this feature is with the use of another Timer(interface Timer)
mbed_official 340:28d1f895c6fe 1483 * configured in Hall sensor interface, this interface Timer will generate the
mbed_official 340:28d1f895c6fe 1484 * commutation at its TRGO output (connected to Timer used in this function) each time
mbed_official 340:28d1f895c6fe 1485 * the TI1 of the Interface Timer detect a commutation at its input TI1.
mbed_official 340:28d1f895c6fe 1486 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1487 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
mbed_official 340:28d1f895c6fe 1488 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1489 * @arg TIM_TS_ITR0: Internal trigger 0 selected
mbed_official 340:28d1f895c6fe 1490 * @arg TIM_TS_ITR1: Internal trigger 1 selected
mbed_official 340:28d1f895c6fe 1491 * @arg TIM_TS_ITR2: Internal trigger 2 selected
mbed_official 340:28d1f895c6fe 1492 * @arg TIM_TS_ITR3: Internal trigger 3 selected
mbed_official 340:28d1f895c6fe 1493 * @arg TIM_TS_NONE: No trigger is needed
mbed_official 340:28d1f895c6fe 1494 * @param CommutationSource : the Commutation Event source
mbed_official 340:28d1f895c6fe 1495 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1496 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
mbed_official 340:28d1f895c6fe 1497 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
mbed_official 340:28d1f895c6fe 1498 * @retval HAL status
mbed_official 340:28d1f895c6fe 1499 */
mbed_official 340:28d1f895c6fe 1500 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
mbed_official 340:28d1f895c6fe 1501 {
mbed_official 340:28d1f895c6fe 1502 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1503 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 1504 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
mbed_official 340:28d1f895c6fe 1505
mbed_official 340:28d1f895c6fe 1506 __HAL_LOCK(htim);
mbed_official 340:28d1f895c6fe 1507
mbed_official 340:28d1f895c6fe 1508 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
mbed_official 340:28d1f895c6fe 1509 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
mbed_official 340:28d1f895c6fe 1510 {
mbed_official 340:28d1f895c6fe 1511 /* Select the Input trigger */
mbed_official 340:28d1f895c6fe 1512 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 340:28d1f895c6fe 1513 htim->Instance->SMCR |= InputTrigger;
mbed_official 340:28d1f895c6fe 1514 }
mbed_official 340:28d1f895c6fe 1515
mbed_official 340:28d1f895c6fe 1516 /* Select the Capture Compare preload feature */
mbed_official 340:28d1f895c6fe 1517 htim->Instance->CR2 |= TIM_CR2_CCPC;
mbed_official 340:28d1f895c6fe 1518 /* Select the Commutation event source */
mbed_official 340:28d1f895c6fe 1519 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
mbed_official 340:28d1f895c6fe 1520 htim->Instance->CR2 |= CommutationSource;
mbed_official 340:28d1f895c6fe 1521
mbed_official 340:28d1f895c6fe 1522 /* Enable the Commutation Interrupt Request */
mbed_official 340:28d1f895c6fe 1523 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
mbed_official 340:28d1f895c6fe 1524
mbed_official 340:28d1f895c6fe 1525 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 1526
mbed_official 340:28d1f895c6fe 1527 return HAL_OK;
mbed_official 340:28d1f895c6fe 1528 }
mbed_official 340:28d1f895c6fe 1529
mbed_official 340:28d1f895c6fe 1530 /**
mbed_official 340:28d1f895c6fe 1531 * @brief Configure the TIM commutation event sequence with DMA.
mbed_official 340:28d1f895c6fe 1532 * @note: this function is mandatory to use the commutation event in order to
mbed_official 340:28d1f895c6fe 1533 * update the configuration at each commutation detection on the TRGI input of the Timer,
mbed_official 340:28d1f895c6fe 1534 * the typical use of this feature is with the use of another Timer(interface Timer)
mbed_official 340:28d1f895c6fe 1535 * configured in Hall sensor interface, this interface Timer will generate the
mbed_official 340:28d1f895c6fe 1536 * commutation at its TRGO output (connected to Timer used in this function) each time
mbed_official 340:28d1f895c6fe 1537 * the TI1 of the Interface Timer detect a commutation at its input TI1.
mbed_official 340:28d1f895c6fe 1538 * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set
mbed_official 340:28d1f895c6fe 1539 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1540 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
mbed_official 340:28d1f895c6fe 1541 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1542 * @arg TIM_TS_ITR0: Internal trigger 0 selected
mbed_official 340:28d1f895c6fe 1543 * @arg TIM_TS_ITR1: Internal trigger 1 selected
mbed_official 340:28d1f895c6fe 1544 * @arg TIM_TS_ITR2: Internal trigger 2 selected
mbed_official 340:28d1f895c6fe 1545 * @arg TIM_TS_ITR3: Internal trigger 3 selected
mbed_official 340:28d1f895c6fe 1546 * @arg TIM_TS_NONE: No trigger is needed
mbed_official 340:28d1f895c6fe 1547 * @param CommutationSource : the Commutation Event source
mbed_official 340:28d1f895c6fe 1548 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1549 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
mbed_official 340:28d1f895c6fe 1550 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
mbed_official 340:28d1f895c6fe 1551 * @retval HAL status
mbed_official 340:28d1f895c6fe 1552 */
mbed_official 340:28d1f895c6fe 1553 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
mbed_official 340:28d1f895c6fe 1554 {
mbed_official 340:28d1f895c6fe 1555 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1556 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 1557 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
mbed_official 340:28d1f895c6fe 1558
mbed_official 340:28d1f895c6fe 1559 __HAL_LOCK(htim);
mbed_official 340:28d1f895c6fe 1560
mbed_official 340:28d1f895c6fe 1561 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
mbed_official 340:28d1f895c6fe 1562 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
mbed_official 340:28d1f895c6fe 1563 {
mbed_official 340:28d1f895c6fe 1564 /* Select the Input trigger */
mbed_official 340:28d1f895c6fe 1565 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 340:28d1f895c6fe 1566 htim->Instance->SMCR |= InputTrigger;
mbed_official 340:28d1f895c6fe 1567 }
mbed_official 340:28d1f895c6fe 1568
mbed_official 340:28d1f895c6fe 1569 /* Select the Capture Compare preload feature */
mbed_official 340:28d1f895c6fe 1570 htim->Instance->CR2 |= TIM_CR2_CCPC;
mbed_official 340:28d1f895c6fe 1571 /* Select the Commutation event source */
mbed_official 340:28d1f895c6fe 1572 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
mbed_official 340:28d1f895c6fe 1573 htim->Instance->CR2 |= CommutationSource;
mbed_official 340:28d1f895c6fe 1574
mbed_official 340:28d1f895c6fe 1575 /* Enable the Commutation DMA Request */
mbed_official 340:28d1f895c6fe 1576 /* Set the DMA Commutation Callback */
mbed_official 340:28d1f895c6fe 1577 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official 340:28d1f895c6fe 1578 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1579 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError;
mbed_official 340:28d1f895c6fe 1580
mbed_official 340:28d1f895c6fe 1581 /* Enable the Commutation DMA Request */
mbed_official 340:28d1f895c6fe 1582 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
mbed_official 340:28d1f895c6fe 1583
mbed_official 340:28d1f895c6fe 1584 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 1585
mbed_official 340:28d1f895c6fe 1586 return HAL_OK;
mbed_official 340:28d1f895c6fe 1587 }
mbed_official 340:28d1f895c6fe 1588
mbed_official 340:28d1f895c6fe 1589 /**
mbed_official 340:28d1f895c6fe 1590 * @brief Configures the TIM in master mode.
mbed_official 340:28d1f895c6fe 1591 * @param htim : TIM handle.
mbed_official 340:28d1f895c6fe 1592 * @param sMasterConfig : pointer to a TIM_MasterConfigTypeDef structure that
mbed_official 340:28d1f895c6fe 1593 * contains the selected trigger output (TRGO) and the Master/Slave
mbed_official 340:28d1f895c6fe 1594 * mode.
mbed_official 340:28d1f895c6fe 1595 * @retval HAL status
mbed_official 340:28d1f895c6fe 1596 */
mbed_official 340:28d1f895c6fe 1597 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig)
mbed_official 340:28d1f895c6fe 1598 {
mbed_official 340:28d1f895c6fe 1599 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1600 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 1601 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
mbed_official 340:28d1f895c6fe 1602 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
mbed_official 340:28d1f895c6fe 1603
mbed_official 340:28d1f895c6fe 1604 __HAL_LOCK(htim);
mbed_official 340:28d1f895c6fe 1605
mbed_official 340:28d1f895c6fe 1606 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 1607
mbed_official 340:28d1f895c6fe 1608 /* Reset the MMS Bits */
mbed_official 340:28d1f895c6fe 1609 htim->Instance->CR2 &= ~TIM_CR2_MMS;
mbed_official 340:28d1f895c6fe 1610 /* Select the TRGO source */
mbed_official 340:28d1f895c6fe 1611 htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
mbed_official 340:28d1f895c6fe 1612
mbed_official 340:28d1f895c6fe 1613 /* Reset the MSM Bit */
mbed_official 340:28d1f895c6fe 1614 htim->Instance->SMCR &= ~TIM_SMCR_MSM;
mbed_official 340:28d1f895c6fe 1615 /* Set or Reset the MSM Bit */
mbed_official 340:28d1f895c6fe 1616 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
mbed_official 340:28d1f895c6fe 1617
mbed_official 340:28d1f895c6fe 1618 htim->State = HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 1619
mbed_official 340:28d1f895c6fe 1620 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 1621
mbed_official 340:28d1f895c6fe 1622 return HAL_OK;
mbed_official 340:28d1f895c6fe 1623 }
mbed_official 340:28d1f895c6fe 1624
mbed_official 340:28d1f895c6fe 1625 /**
mbed_official 340:28d1f895c6fe 1626 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
mbed_official 340:28d1f895c6fe 1627 * and the AOE(automatic output enable).
mbed_official 340:28d1f895c6fe 1628 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1629 * @param sBreakDeadTimeConfig : pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
mbed_official 340:28d1f895c6fe 1630 * contains the BDTR Register configuration information for the TIM peripheral.
mbed_official 340:28d1f895c6fe 1631 * @retval HAL status
mbed_official 340:28d1f895c6fe 1632 */
mbed_official 340:28d1f895c6fe 1633 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
mbed_official 340:28d1f895c6fe 1634 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
mbed_official 340:28d1f895c6fe 1635 {
mbed_official 340:28d1f895c6fe 1636 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1637 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 1638 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
mbed_official 340:28d1f895c6fe 1639 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
mbed_official 340:28d1f895c6fe 1640 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
mbed_official 340:28d1f895c6fe 1641 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
mbed_official 340:28d1f895c6fe 1642 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
mbed_official 340:28d1f895c6fe 1643 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
mbed_official 340:28d1f895c6fe 1644 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
mbed_official 340:28d1f895c6fe 1645
mbed_official 340:28d1f895c6fe 1646 /* Process Locked */
mbed_official 340:28d1f895c6fe 1647 __HAL_LOCK(htim);
mbed_official 340:28d1f895c6fe 1648
mbed_official 340:28d1f895c6fe 1649 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 340:28d1f895c6fe 1650
mbed_official 340:28d1f895c6fe 1651 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
mbed_official 340:28d1f895c6fe 1652 the OSSI State, the dead time value and the Automatic Output Enable Bit */
mbed_official 340:28d1f895c6fe 1653 htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode |
mbed_official 340:28d1f895c6fe 1654 sBreakDeadTimeConfig->OffStateIDLEMode |
mbed_official 340:28d1f895c6fe 1655 sBreakDeadTimeConfig->LockLevel |
mbed_official 340:28d1f895c6fe 1656 sBreakDeadTimeConfig->DeadTime |
mbed_official 340:28d1f895c6fe 1657 sBreakDeadTimeConfig->BreakState |
mbed_official 340:28d1f895c6fe 1658 sBreakDeadTimeConfig->BreakPolarity |
mbed_official 340:28d1f895c6fe 1659 sBreakDeadTimeConfig->AutomaticOutput;
mbed_official 340:28d1f895c6fe 1660
mbed_official 340:28d1f895c6fe 1661
mbed_official 340:28d1f895c6fe 1662 htim->State = HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 1663
mbed_official 340:28d1f895c6fe 1664 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 1665
mbed_official 340:28d1f895c6fe 1666 return HAL_OK;
mbed_official 340:28d1f895c6fe 1667 }
mbed_official 340:28d1f895c6fe 1668
mbed_official 340:28d1f895c6fe 1669 /**
mbed_official 340:28d1f895c6fe 1670 * @brief Configures the TIM14 Remapping input capabilities.
mbed_official 340:28d1f895c6fe 1671 * @param htim : TIM handle.
mbed_official 340:28d1f895c6fe 1672 * @param Remap : specifies the TIM remapping source.
mbed_official 340:28d1f895c6fe 1673 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1674 * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO
mbed_official 340:28d1f895c6fe 1675 * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock
mbed_official 340:28d1f895c6fe 1676 * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32
mbed_official 340:28d1f895c6fe 1677 * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO
mbed_official 340:28d1f895c6fe 1678 * @retval HAL status
mbed_official 340:28d1f895c6fe 1679 */
mbed_official 340:28d1f895c6fe 1680 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
mbed_official 340:28d1f895c6fe 1681 {
mbed_official 340:28d1f895c6fe 1682 __HAL_LOCK(htim);
mbed_official 340:28d1f895c6fe 1683
mbed_official 340:28d1f895c6fe 1684 /* Check parameters */
mbed_official 340:28d1f895c6fe 1685 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
mbed_official 340:28d1f895c6fe 1686 assert_param(IS_TIM_REMAP(Remap));
mbed_official 340:28d1f895c6fe 1687
mbed_official 340:28d1f895c6fe 1688 /* Set the Timer remapping configuration */
mbed_official 340:28d1f895c6fe 1689 htim->Instance->OR = Remap;
mbed_official 340:28d1f895c6fe 1690
mbed_official 340:28d1f895c6fe 1691 htim->State = HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 1692
mbed_official 340:28d1f895c6fe 1693 __HAL_UNLOCK(htim);
mbed_official 340:28d1f895c6fe 1694
mbed_official 340:28d1f895c6fe 1695 return HAL_OK;
mbed_official 340:28d1f895c6fe 1696 }
mbed_official 340:28d1f895c6fe 1697
mbed_official 340:28d1f895c6fe 1698 /**
mbed_official 340:28d1f895c6fe 1699 * @}
mbed_official 340:28d1f895c6fe 1700 */
mbed_official 340:28d1f895c6fe 1701
mbed_official 340:28d1f895c6fe 1702 /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions
mbed_official 340:28d1f895c6fe 1703 * @brief Extension Callbacks functions
mbed_official 340:28d1f895c6fe 1704 *
mbed_official 340:28d1f895c6fe 1705 @verbatim
mbed_official 340:28d1f895c6fe 1706 ==============================================================================
mbed_official 340:28d1f895c6fe 1707 ##### Extension Callbacks functions #####
mbed_official 340:28d1f895c6fe 1708 ==============================================================================
mbed_official 340:28d1f895c6fe 1709 [..]
mbed_official 340:28d1f895c6fe 1710 This section provides Extension TIM callback functions:
mbed_official 340:28d1f895c6fe 1711 (+) Timer Commutation callback
mbed_official 340:28d1f895c6fe 1712 (+) Timer Break callback
mbed_official 340:28d1f895c6fe 1713
mbed_official 340:28d1f895c6fe 1714 @endverbatim
mbed_official 340:28d1f895c6fe 1715 * @{
mbed_official 340:28d1f895c6fe 1716 */
mbed_official 340:28d1f895c6fe 1717
mbed_official 340:28d1f895c6fe 1718 /**
mbed_official 340:28d1f895c6fe 1719 * @brief Hall commutation changed callback in non blocking mode
mbed_official 340:28d1f895c6fe 1720 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1721 * @retval None
mbed_official 340:28d1f895c6fe 1722 */
mbed_official 340:28d1f895c6fe 1723 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 1724 {
mbed_official 340:28d1f895c6fe 1725 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1726 the HAL_TIMEx_CommutationCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1727 */
mbed_official 340:28d1f895c6fe 1728 }
mbed_official 340:28d1f895c6fe 1729
mbed_official 340:28d1f895c6fe 1730 /**
mbed_official 340:28d1f895c6fe 1731 * @brief Hall Break detection callback in non blocking mode
mbed_official 340:28d1f895c6fe 1732 * @param htim : TIM handle
mbed_official 340:28d1f895c6fe 1733 * @retval None
mbed_official 340:28d1f895c6fe 1734 */
mbed_official 340:28d1f895c6fe 1735 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 1736 {
mbed_official 340:28d1f895c6fe 1737 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1738 the HAL_TIMEx_BreakCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1739 */
mbed_official 340:28d1f895c6fe 1740 }
mbed_official 340:28d1f895c6fe 1741
mbed_official 340:28d1f895c6fe 1742 /**
mbed_official 340:28d1f895c6fe 1743 * @brief TIM DMA Commutation callback.
mbed_official 340:28d1f895c6fe 1744 * @param hdma : pointer to DMA handle.
mbed_official 340:28d1f895c6fe 1745 * @retval None
mbed_official 340:28d1f895c6fe 1746 */
mbed_official 340:28d1f895c6fe 1747 void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1748 {
mbed_official 340:28d1f895c6fe 1749 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 1750
mbed_official 340:28d1f895c6fe 1751 htim->State= HAL_TIM_STATE_READY;
mbed_official 340:28d1f895c6fe 1752
mbed_official 340:28d1f895c6fe 1753 HAL_TIMEx_CommutationCallback(htim);
mbed_official 340:28d1f895c6fe 1754 }
mbed_official 340:28d1f895c6fe 1755
mbed_official 340:28d1f895c6fe 1756 /**
mbed_official 340:28d1f895c6fe 1757 * @}
mbed_official 340:28d1f895c6fe 1758 */
mbed_official 340:28d1f895c6fe 1759
mbed_official 340:28d1f895c6fe 1760 /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions
mbed_official 340:28d1f895c6fe 1761 * @brief Extension Peripheral State functions
mbed_official 340:28d1f895c6fe 1762 *
mbed_official 340:28d1f895c6fe 1763 @verbatim
mbed_official 340:28d1f895c6fe 1764 ==============================================================================
mbed_official 340:28d1f895c6fe 1765 ##### Extension Peripheral State functions #####
mbed_official 340:28d1f895c6fe 1766 ==============================================================================
mbed_official 340:28d1f895c6fe 1767 [..]
mbed_official 340:28d1f895c6fe 1768 This subsection permit to get in run-time the status of the peripheral
mbed_official 340:28d1f895c6fe 1769 and the data flow.
mbed_official 340:28d1f895c6fe 1770
mbed_official 340:28d1f895c6fe 1771 @endverbatim
mbed_official 340:28d1f895c6fe 1772 * @{
mbed_official 340:28d1f895c6fe 1773 */
mbed_official 340:28d1f895c6fe 1774
mbed_official 340:28d1f895c6fe 1775 /**
mbed_official 340:28d1f895c6fe 1776 * @brief Return the TIM Hall Sensor interface state
mbed_official 340:28d1f895c6fe 1777 * @param htim : TIM Hall Sensor handle
mbed_official 340:28d1f895c6fe 1778 * @retval HAL state
mbed_official 340:28d1f895c6fe 1779 */
mbed_official 340:28d1f895c6fe 1780 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
mbed_official 340:28d1f895c6fe 1781 {
mbed_official 340:28d1f895c6fe 1782 return htim->State;
mbed_official 340:28d1f895c6fe 1783 }
mbed_official 340:28d1f895c6fe 1784
mbed_official 340:28d1f895c6fe 1785 /**
mbed_official 340:28d1f895c6fe 1786 * @}
mbed_official 340:28d1f895c6fe 1787 */
mbed_official 340:28d1f895c6fe 1788
mbed_official 340:28d1f895c6fe 1789 /**
mbed_official 340:28d1f895c6fe 1790 * @}
mbed_official 340:28d1f895c6fe 1791 */
mbed_official 340:28d1f895c6fe 1792
mbed_official 340:28d1f895c6fe 1793 /** @addtogroup TIMEx_Private_Functions
mbed_official 340:28d1f895c6fe 1794 * @{
mbed_official 340:28d1f895c6fe 1795 */
mbed_official 340:28d1f895c6fe 1796
mbed_official 340:28d1f895c6fe 1797 /**
mbed_official 340:28d1f895c6fe 1798 * @brief Enables or disables the TIM Capture Compare Channel xN.
mbed_official 340:28d1f895c6fe 1799 * @param TIMx to select the TIM peripheral
mbed_official 340:28d1f895c6fe 1800 * @param Channel : specifies the TIM Channel
mbed_official 340:28d1f895c6fe 1801 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1802 * @arg TIM_Channel_1: TIM Channel 1
mbed_official 340:28d1f895c6fe 1803 * @arg TIM_Channel_2: TIM Channel 2
mbed_official 340:28d1f895c6fe 1804 * @arg TIM_Channel_3: TIM Channel 3
mbed_official 340:28d1f895c6fe 1805 * @param ChannelNState : specifies the TIM Channel CCxNE bit new state.
mbed_official 340:28d1f895c6fe 1806 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
mbed_official 340:28d1f895c6fe 1807 * @retval None
mbed_official 340:28d1f895c6fe 1808 */
mbed_official 340:28d1f895c6fe 1809 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
mbed_official 340:28d1f895c6fe 1810 {
mbed_official 340:28d1f895c6fe 1811 uint32_t tmp = 0;
mbed_official 340:28d1f895c6fe 1812
mbed_official 340:28d1f895c6fe 1813 tmp = TIM_CCER_CC1NE << Channel;
mbed_official 340:28d1f895c6fe 1814
mbed_official 340:28d1f895c6fe 1815 /* Reset the CCxNE Bit */
mbed_official 340:28d1f895c6fe 1816 TIMx->CCER &= ~tmp;
mbed_official 340:28d1f895c6fe 1817
mbed_official 340:28d1f895c6fe 1818 /* Set or reset the CCxNE Bit */
mbed_official 340:28d1f895c6fe 1819 TIMx->CCER |= (uint32_t)(ChannelNState << Channel);
mbed_official 340:28d1f895c6fe 1820 }
mbed_official 340:28d1f895c6fe 1821
mbed_official 340:28d1f895c6fe 1822 /**
mbed_official 340:28d1f895c6fe 1823 * @}
mbed_official 340:28d1f895c6fe 1824 */
mbed_official 340:28d1f895c6fe 1825
mbed_official 340:28d1f895c6fe 1826 #endif /* HAL_TIM_MODULE_ENABLED */
mbed_official 340:28d1f895c6fe 1827 /**
mbed_official 340:28d1f895c6fe 1828 * @}
mbed_official 340:28d1f895c6fe 1829 */
mbed_official 340:28d1f895c6fe 1830
mbed_official 340:28d1f895c6fe 1831 /**
mbed_official 340:28d1f895c6fe 1832 * @}
mbed_official 340:28d1f895c6fe 1833 */
mbed_official 340:28d1f895c6fe 1834
mbed_official 340:28d1f895c6fe 1835 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/