gabriel della-monica / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_smbus.c@445:9a3ffe6cfa19, 2015-01-14 (annotated)

Committer:
moirans2
Date:
Wed Jan 14 20:53:08 2015 +0000
Revision:
445:9a3ffe6cfa19
Parent:
441:d2c15dda23c1 
internal clock stm32L051

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_smbus.c
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 441:d2c15dda23c1 5 * @version V1.2.0
mbed_official 441:d2c15dda23c1 6 * @date 11-December-2014
mbed_official 340:28d1f895c6fe 7 * @brief SMBUS HAL module driver.
mbed_official 340:28d1f895c6fe 8 *
mbed_official 340:28d1f895c6fe 9 * This file provides firmware functions to manage the following
mbed_official 340:28d1f895c6fe 10 * functionalities of the System Management Bus (SMBus) peripheral,
mbed_official 340:28d1f895c6fe 11 * based on I2C principales of operation :
mbed_official 340:28d1f895c6fe 12 * + Initialization and de-initialization functions
mbed_official 340:28d1f895c6fe 13 * + IO operation functions
mbed_official 340:28d1f895c6fe 14 * + Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 15 @verbatim
mbed_official 340:28d1f895c6fe 16 ==============================================================================
mbed_official 340:28d1f895c6fe 17 ##### How to use this driver #####
mbed_official 340:28d1f895c6fe 18 ==============================================================================
mbed_official 340:28d1f895c6fe 19 [..]
mbed_official 340:28d1f895c6fe 20 The SMBUS HAL driver can be used as follows:
mbed_official 340:28d1f895c6fe 21
mbed_official 340:28d1f895c6fe 22 (#) Declare a SMBUS_HandleTypeDef handle structure, for example:
mbed_official 340:28d1f895c6fe 23 SMBUS_HandleTypeDef hsmbus;
mbed_official 340:28d1f895c6fe 24
mbed_official 340:28d1f895c6fe 25 (#)Initialize the SMBUS low level resources by implement the HAL_SMBUS_MspInit ()API:
mbed_official 340:28d1f895c6fe 26 (##) Enable the SMBUSx interface clock
mbed_official 340:28d1f895c6fe 27 (##) SMBUS pins configuration
mbed_official 340:28d1f895c6fe 28 (+++) Enable the clock for the SMBUS GPIOs
mbed_official 340:28d1f895c6fe 29 (+++) Configure SMBUS pins as alternate function open-drain
mbed_official 340:28d1f895c6fe 30 (##) NVIC configuration if you need to use interrupt process
mbed_official 340:28d1f895c6fe 31 (+++) Configure the SMBUSx interrupt priority
mbed_official 340:28d1f895c6fe 32 (+++) Enable the NVIC SMBUS IRQ Channel
mbed_official 340:28d1f895c6fe 33
mbed_official 340:28d1f895c6fe 34 (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Adressing Mode,
mbed_official 340:28d1f895c6fe 35 Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
mbed_official 340:28d1f895c6fe 36 Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
mbed_official 340:28d1f895c6fe 37
mbed_official 340:28d1f895c6fe 38 (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
mbed_official 340:28d1f895c6fe 39 (++) These API s configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
mbed_official 340:28d1f895c6fe 40 by calling the customed HAL_SMBUS_MspInit(&hsmbus) API.
mbed_official 340:28d1f895c6fe 41
mbed_official 340:28d1f895c6fe 42 (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
mbed_official 340:28d1f895c6fe 43
mbed_official 340:28d1f895c6fe 44 (#) For SMBUS IO operations, only one mode of operations is available within this driver :
mbed_official 340:28d1f895c6fe 45
mbed_official 340:28d1f895c6fe 46 *** Interrupt mode IO operation ***
mbed_official 340:28d1f895c6fe 47 ===================================
mbed_official 340:28d1f895c6fe 48 [..]
mbed_official 340:28d1f895c6fe 49 (+) Transmit in master/host SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Master_Transmit_IT()
mbed_official 340:28d1f895c6fe 50 (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 51 add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback
mbed_official 340:28d1f895c6fe 52 (+) Receive in master/host SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Master_Receive_IT()
mbed_official 340:28d1f895c6fe 53 (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 54 add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback
mbed_official 340:28d1f895c6fe 55 (+) Abort a master/host SMBUS process commnunication with Interrupt using HAL_SMBUS_Master_Abort_IT()
mbed_official 340:28d1f895c6fe 56 (++) The associated previous transfer callback is called at the end of abort process
mbed_official 340:28d1f895c6fe 57 (++) mean HAL_SMBUS_MasterTxCpltCallback in case of previous state was master transmit
mbed_official 340:28d1f895c6fe 58 (++) mean HAL_SMBUS_MasterRxCpltCallback in case of previous state was master receive
mbed_official 340:28d1f895c6fe 59 (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
mbed_official 340:28d1f895c6fe 60 using HAL_SMBUS_Slave_Listen_IT() HAL_SMBUS_DisableListen_IT()
mbed_official 340:28d1f895c6fe 61 (++) When address slave/device SMBUS match, HAL_SMBUS_SlaveAddrCallback is executed and user can
mbed_official 340:28d1f895c6fe 62 add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
mbed_official 340:28d1f895c6fe 63 (++) At Listen mode end HAL_SMBUS_SlaveListenCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 64 add his own code by customization of function pointer HAL_SMBUS_SlaveListenCpltCallback
mbed_official 340:28d1f895c6fe 65 (+) Transmit in slave/device SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Slave_Transmit_IT()
mbed_official 340:28d1f895c6fe 66 (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 67 add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback
mbed_official 340:28d1f895c6fe 68 (+) Receive in slave/device SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Slave_Receive_IT()
mbed_official 340:28d1f895c6fe 69 (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 70 add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback
mbed_official 340:28d1f895c6fe 71 (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT()
mbed_official 340:28d1f895c6fe 72 (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can
mbed_official 340:28d1f895c6fe 73 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback
mbed_official 340:28d1f895c6fe 74 to check the Alert Error Code using function HAL_SMBUS_GetError()
mbed_official 340:28d1f895c6fe 75 (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
mbed_official 340:28d1f895c6fe 76 (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can
mbed_official 340:28d1f895c6fe 77 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback
mbed_official 340:28d1f895c6fe 78 to check the Error Code using function HAL_SMBUS_GetError()
mbed_official 340:28d1f895c6fe 79
mbed_official 340:28d1f895c6fe 80 *** SMBUS HAL driver macros list ***
mbed_official 340:28d1f895c6fe 81 ==================================
mbed_official 340:28d1f895c6fe 82 [..]
mbed_official 340:28d1f895c6fe 83 Below the list of most used macros in SMBUS HAL driver.
mbed_official 340:28d1f895c6fe 84
mbed_official 340:28d1f895c6fe 85 (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral
mbed_official 340:28d1f895c6fe 86 (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral
mbed_official 340:28d1f895c6fe 87 (+) __HAL_SMBUS_GET_FLAG : Checks whether the specified SMBUS flag is set or not
mbed_official 340:28d1f895c6fe 88 (+) __HAL_SMBUS_CLEAR_FLAG : Clears the specified SMBUS pending flag
mbed_official 340:28d1f895c6fe 89 (+) __HAL_SMBUS_ENABLE_IT: Enables the specified SMBUS interrupt
mbed_official 340:28d1f895c6fe 90 (+) __HAL_SMBUS_DISABLE_IT: Disables the specified SMBUS interrupt
mbed_official 340:28d1f895c6fe 91
mbed_official 340:28d1f895c6fe 92 [..]
mbed_official 340:28d1f895c6fe 93 (@) You can refer to the SMBUS HAL driver header file for more useful macros
mbed_official 340:28d1f895c6fe 94
mbed_official 340:28d1f895c6fe 95
mbed_official 340:28d1f895c6fe 96 @endverbatim
mbed_official 340:28d1f895c6fe 97 ******************************************************************************
mbed_official 340:28d1f895c6fe 98 * @attention
mbed_official 340:28d1f895c6fe 99 *
mbed_official 340:28d1f895c6fe 100 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 101 *
mbed_official 340:28d1f895c6fe 102 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 103 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 104 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 105 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 106 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 107 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 108 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 109 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 110 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 111 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 112 *
mbed_official 340:28d1f895c6fe 113 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 114 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 115 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 116 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 117 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 118 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 119 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 120 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 121 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 122 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 123 *
mbed_official 340:28d1f895c6fe 124 ******************************************************************************
mbed_official 340:28d1f895c6fe 125 */
mbed_official 340:28d1f895c6fe 126
mbed_official 340:28d1f895c6fe 127 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 128 #include "stm32f0xx_hal.h"
mbed_official 340:28d1f895c6fe 129
mbed_official 340:28d1f895c6fe 130 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 131 * @{
mbed_official 340:28d1f895c6fe 132 */
mbed_official 340:28d1f895c6fe 133
mbed_official 340:28d1f895c6fe 134 /** @defgroup SMBUS SMBUS HAL module driver
mbed_official 340:28d1f895c6fe 135 * @brief SMBUS HAL module driver
mbed_official 340:28d1f895c6fe 136 * @{
mbed_official 340:28d1f895c6fe 137 */
mbed_official 340:28d1f895c6fe 138
mbed_official 340:28d1f895c6fe 139 #ifdef HAL_SMBUS_MODULE_ENABLED
mbed_official 340:28d1f895c6fe 140
mbed_official 340:28d1f895c6fe 141 /* Private typedef -----------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 142 /* Private define ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 143 /** @defgroup SMBUS_Private_Define SMBUS Private Define
mbed_official 340:28d1f895c6fe 144 * @{
mbed_official 340:28d1f895c6fe 145 */
mbed_official 340:28d1f895c6fe 146 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */
mbed_official 340:28d1f895c6fe 147 #define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
mbed_official 340:28d1f895c6fe 148 #define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 149 #define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 150 #define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 151 #define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 152 #define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 153 #define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 154 #define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 155 #define MAX_NBYTE_SIZE 255
mbed_official 340:28d1f895c6fe 156 /**
mbed_official 340:28d1f895c6fe 157 * @}
mbed_official 340:28d1f895c6fe 158 */
mbed_official 340:28d1f895c6fe 159
mbed_official 340:28d1f895c6fe 160 /* Private macro -------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 161 /** @defgroup SMBUS_Private_Macros SMBUS Private Macros
mbed_official 340:28d1f895c6fe 162 * @{
mbed_official 340:28d1f895c6fe 163 */
mbed_official 340:28d1f895c6fe 164 #define __SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
mbed_official 340:28d1f895c6fe 165 #define __SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
mbed_official 340:28d1f895c6fe 166 /**
mbed_official 340:28d1f895c6fe 167 * @}
mbed_official 340:28d1f895c6fe 168 */
mbed_official 340:28d1f895c6fe 169
mbed_official 340:28d1f895c6fe 170 /* Private variables ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 171 /* Private function prototypes -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 172 /** @defgroup SMBUS_Private_Functions SMBUS Private Functions
mbed_official 340:28d1f895c6fe 173 * @{
mbed_official 340:28d1f895c6fe 174 */
mbed_official 340:28d1f895c6fe 175 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 176
mbed_official 340:28d1f895c6fe 177 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
mbed_official 340:28d1f895c6fe 178 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
mbed_official 340:28d1f895c6fe 179 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
mbed_official 340:28d1f895c6fe 180 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
mbed_official 340:28d1f895c6fe 181
mbed_official 340:28d1f895c6fe 182 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
mbed_official 340:28d1f895c6fe 183 /**
mbed_official 340:28d1f895c6fe 184 * @}
mbed_official 340:28d1f895c6fe 185 */
mbed_official 340:28d1f895c6fe 186
mbed_official 340:28d1f895c6fe 187 /* Exported functions ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 188
mbed_official 340:28d1f895c6fe 189 /** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions
mbed_official 340:28d1f895c6fe 190 * @{
mbed_official 340:28d1f895c6fe 191 */
mbed_official 340:28d1f895c6fe 192
mbed_official 340:28d1f895c6fe 193 /** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 340:28d1f895c6fe 194 * @brief Initialization and Configuration functions
mbed_official 340:28d1f895c6fe 195 *
mbed_official 340:28d1f895c6fe 196 @verbatim
mbed_official 340:28d1f895c6fe 197 ===============================================================================
mbed_official 340:28d1f895c6fe 198 ##### Initialization and de-initialization functions #####
mbed_official 340:28d1f895c6fe 199 ===============================================================================
mbed_official 340:28d1f895c6fe 200 [..] This subsection provides a set of functions allowing to initialize and
mbed_official 340:28d1f895c6fe 201 de-initialiaze the SMBUSx peripheral:
mbed_official 340:28d1f895c6fe 202
mbed_official 340:28d1f895c6fe 203 (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
mbed_official 340:28d1f895c6fe 204 all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
mbed_official 340:28d1f895c6fe 205
mbed_official 340:28d1f895c6fe 206 (+) Call the function HAL_SMBUS_Init() to configure the selected device with
mbed_official 340:28d1f895c6fe 207 the selected configuration:
mbed_official 340:28d1f895c6fe 208 (++) Clock Timing
mbed_official 340:28d1f895c6fe 209 (++) Bus Timeout
mbed_official 340:28d1f895c6fe 210 (++) Analog Filer mode
mbed_official 340:28d1f895c6fe 211 (++) Own Address 1
mbed_official 340:28d1f895c6fe 212 (++) Addressing mode (Master, Slave)
mbed_official 340:28d1f895c6fe 213 (++) Dual Addressing mode
mbed_official 340:28d1f895c6fe 214 (++) Own Address 2
mbed_official 340:28d1f895c6fe 215 (++) Own Address 2 Mask
mbed_official 340:28d1f895c6fe 216 (++) General call mode
mbed_official 340:28d1f895c6fe 217 (++) Nostretch mode
mbed_official 340:28d1f895c6fe 218 (++) Packet Error Check mode
mbed_official 340:28d1f895c6fe 219 (++) Peripheral mode
mbed_official 340:28d1f895c6fe 220
mbed_official 340:28d1f895c6fe 221
mbed_official 340:28d1f895c6fe 222 (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
mbed_official 340:28d1f895c6fe 223 of the selected SMBUSx periperal.
mbed_official 340:28d1f895c6fe 224
mbed_official 340:28d1f895c6fe 225 @endverbatim
mbed_official 340:28d1f895c6fe 226 * @{
mbed_official 340:28d1f895c6fe 227 */
mbed_official 340:28d1f895c6fe 228
mbed_official 340:28d1f895c6fe 229 /**
mbed_official 340:28d1f895c6fe 230 * @brief Initializes the SMBUS according to the specified parameters
mbed_official 340:28d1f895c6fe 231 * in the SMBUS_InitTypeDef and create the associated handle.
mbed_official 340:28d1f895c6fe 232 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 233 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 234 * @retval HAL status
mbed_official 340:28d1f895c6fe 235 */
mbed_official 340:28d1f895c6fe 236 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 237 {
mbed_official 340:28d1f895c6fe 238 /* Check the SMBUS handle allocation */
mbed_official 441:d2c15dda23c1 239 if(hsmbus == NULL)
mbed_official 340:28d1f895c6fe 240 {
mbed_official 340:28d1f895c6fe 241 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 242 }
mbed_official 340:28d1f895c6fe 243
mbed_official 340:28d1f895c6fe 244 /* Check the parameters */
mbed_official 340:28d1f895c6fe 245 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
mbed_official 340:28d1f895c6fe 246 assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
mbed_official 340:28d1f895c6fe 247 assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1));
mbed_official 340:28d1f895c6fe 248 assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode));
mbed_official 340:28d1f895c6fe 249 assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode));
mbed_official 340:28d1f895c6fe 250 assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2));
mbed_official 340:28d1f895c6fe 251 assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks));
mbed_official 340:28d1f895c6fe 252 assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode));
mbed_official 340:28d1f895c6fe 253 assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode));
mbed_official 340:28d1f895c6fe 254 assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
mbed_official 340:28d1f895c6fe 255 assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
mbed_official 340:28d1f895c6fe 256
mbed_official 340:28d1f895c6fe 257 if(hsmbus->State == HAL_SMBUS_STATE_RESET)
mbed_official 340:28d1f895c6fe 258 {
mbed_official 340:28d1f895c6fe 259 /* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official 340:28d1f895c6fe 260 HAL_SMBUS_MspInit(hsmbus);
mbed_official 340:28d1f895c6fe 261 }
mbed_official 340:28d1f895c6fe 262
mbed_official 340:28d1f895c6fe 263 hsmbus->State = HAL_SMBUS_STATE_BUSY;
mbed_official 340:28d1f895c6fe 264
mbed_official 340:28d1f895c6fe 265 /* Disable the selected SMBUS peripheral */
mbed_official 340:28d1f895c6fe 266 __HAL_SMBUS_DISABLE(hsmbus);
mbed_official 340:28d1f895c6fe 267
mbed_official 340:28d1f895c6fe 268 /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
mbed_official 340:28d1f895c6fe 269 /* Configure SMBUSx: Frequency range */
mbed_official 340:28d1f895c6fe 270 hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
mbed_official 340:28d1f895c6fe 271
mbed_official 340:28d1f895c6fe 272 /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
mbed_official 340:28d1f895c6fe 273 /* Configure SMBUSx: Bus Timeout */
mbed_official 340:28d1f895c6fe 274 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
mbed_official 340:28d1f895c6fe 275 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
mbed_official 340:28d1f895c6fe 276 hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout;
mbed_official 340:28d1f895c6fe 277
mbed_official 340:28d1f895c6fe 278 /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
mbed_official 340:28d1f895c6fe 279 /* Configure SMBUSx: Own Address1 and ack own address1 mode */
mbed_official 340:28d1f895c6fe 280 hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
mbed_official 340:28d1f895c6fe 281
mbed_official 340:28d1f895c6fe 282 if(hsmbus->Init.OwnAddress1 != 0)
mbed_official 340:28d1f895c6fe 283 {
mbed_official 340:28d1f895c6fe 284 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
mbed_official 340:28d1f895c6fe 285 {
mbed_official 340:28d1f895c6fe 286 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
mbed_official 340:28d1f895c6fe 287 }
mbed_official 340:28d1f895c6fe 288 else /* SMBUS_ADDRESSINGMODE_10BIT */
mbed_official 340:28d1f895c6fe 289 {
mbed_official 340:28d1f895c6fe 290 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1);
mbed_official 340:28d1f895c6fe 291 }
mbed_official 340:28d1f895c6fe 292 }
mbed_official 340:28d1f895c6fe 293
mbed_official 340:28d1f895c6fe 294 /*---------------------------- SMBUSx CR2 Configuration ------------------------*/
mbed_official 340:28d1f895c6fe 295 /* Configure SMBUSx: Addressing Master mode */
mbed_official 340:28d1f895c6fe 296 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
mbed_official 340:28d1f895c6fe 297 {
mbed_official 340:28d1f895c6fe 298 hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
mbed_official 340:28d1f895c6fe 299 }
mbed_official 340:28d1f895c6fe 300 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
mbed_official 340:28d1f895c6fe 301 /* AUTOEND and NACK bit will be manage during Transfer process */
mbed_official 340:28d1f895c6fe 302 hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
mbed_official 340:28d1f895c6fe 303
mbed_official 340:28d1f895c6fe 304 /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
mbed_official 340:28d1f895c6fe 305 /* Configure SMBUSx: Dual mode and Own Address2 */
mbed_official 340:28d1f895c6fe 306 hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8));
mbed_official 340:28d1f895c6fe 307
mbed_official 340:28d1f895c6fe 308 /*---------------------------- SMBUSx CR1 Configuration ------------------------*/
mbed_official 340:28d1f895c6fe 309 /* Configure SMBUSx: Generalcall and NoStretch mode */
mbed_official 340:28d1f895c6fe 310 hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
mbed_official 340:28d1f895c6fe 311
mbed_official 340:28d1f895c6fe 312 /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
mbed_official 340:28d1f895c6fe 313 if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLED)
mbed_official 340:28d1f895c6fe 314 && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) )
mbed_official 340:28d1f895c6fe 315 {
mbed_official 340:28d1f895c6fe 316 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
mbed_official 340:28d1f895c6fe 317 }
mbed_official 340:28d1f895c6fe 318
mbed_official 340:28d1f895c6fe 319 /* Enable the selected SMBUS peripheral */
mbed_official 340:28d1f895c6fe 320 __HAL_SMBUS_ENABLE(hsmbus);
mbed_official 340:28d1f895c6fe 321
mbed_official 340:28d1f895c6fe 322 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 323 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 324 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 325
mbed_official 340:28d1f895c6fe 326 return HAL_OK;
mbed_official 340:28d1f895c6fe 327 }
mbed_official 340:28d1f895c6fe 328
mbed_official 340:28d1f895c6fe 329 /**
mbed_official 340:28d1f895c6fe 330 * @brief DeInitializes the SMBUS peripheral.
mbed_official 340:28d1f895c6fe 331 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 332 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 333 * @retval HAL status
mbed_official 340:28d1f895c6fe 334 */
mbed_official 340:28d1f895c6fe 335 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 336 {
mbed_official 340:28d1f895c6fe 337 /* Check the SMBUS handle allocation */
mbed_official 441:d2c15dda23c1 338 if(hsmbus == NULL)
mbed_official 340:28d1f895c6fe 339 {
mbed_official 340:28d1f895c6fe 340 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 341 }
mbed_official 340:28d1f895c6fe 342
mbed_official 340:28d1f895c6fe 343 /* Check the parameters */
mbed_official 340:28d1f895c6fe 344 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
mbed_official 340:28d1f895c6fe 345
mbed_official 340:28d1f895c6fe 346 hsmbus->State = HAL_SMBUS_STATE_BUSY;
mbed_official 340:28d1f895c6fe 347
mbed_official 340:28d1f895c6fe 348 /* Disable the SMBUS Peripheral Clock */
mbed_official 340:28d1f895c6fe 349 __HAL_SMBUS_DISABLE(hsmbus);
mbed_official 340:28d1f895c6fe 350
mbed_official 340:28d1f895c6fe 351 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 340:28d1f895c6fe 352 HAL_SMBUS_MspDeInit(hsmbus);
mbed_official 340:28d1f895c6fe 353
mbed_official 340:28d1f895c6fe 354 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 355 hsmbus->PreviousState = HAL_SMBUS_STATE_RESET;
mbed_official 340:28d1f895c6fe 356 hsmbus->State = HAL_SMBUS_STATE_RESET;
mbed_official 340:28d1f895c6fe 357
mbed_official 340:28d1f895c6fe 358 /* Release Lock */
mbed_official 340:28d1f895c6fe 359 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 360
mbed_official 340:28d1f895c6fe 361 return HAL_OK;
mbed_official 340:28d1f895c6fe 362 }
mbed_official 340:28d1f895c6fe 363
mbed_official 340:28d1f895c6fe 364 /**
mbed_official 340:28d1f895c6fe 365 * @brief SMBUS MSP Init.
mbed_official 340:28d1f895c6fe 366 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 367 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 368 * @retval None
mbed_official 340:28d1f895c6fe 369 */
mbed_official 340:28d1f895c6fe 370 __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 371 {
mbed_official 340:28d1f895c6fe 372 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 373 the HAL_SMBUS_MspInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 374 */
mbed_official 340:28d1f895c6fe 375 }
mbed_official 340:28d1f895c6fe 376
mbed_official 340:28d1f895c6fe 377 /**
mbed_official 340:28d1f895c6fe 378 * @brief SMBUS MSP DeInit
mbed_official 340:28d1f895c6fe 379 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 380 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 381 * @retval None
mbed_official 340:28d1f895c6fe 382 */
mbed_official 340:28d1f895c6fe 383 __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 384 {
mbed_official 340:28d1f895c6fe 385 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 386 the HAL_SMBUS_MspDeInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 387 */
mbed_official 340:28d1f895c6fe 388 }
mbed_official 340:28d1f895c6fe 389
mbed_official 340:28d1f895c6fe 390 /**
mbed_official 340:28d1f895c6fe 391 * @}
mbed_official 340:28d1f895c6fe 392 */
mbed_official 340:28d1f895c6fe 393
mbed_official 340:28d1f895c6fe 394 /** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
mbed_official 340:28d1f895c6fe 395 * @brief Data transfers functions
mbed_official 340:28d1f895c6fe 396 *
mbed_official 340:28d1f895c6fe 397 @verbatim
mbed_official 340:28d1f895c6fe 398 ===============================================================================
mbed_official 340:28d1f895c6fe 399 ##### IO operation functions #####
mbed_official 340:28d1f895c6fe 400 ===============================================================================
mbed_official 340:28d1f895c6fe 401 [..]
mbed_official 340:28d1f895c6fe 402 This subsection provides a set of functions allowing to manage the SMBUS data
mbed_official 340:28d1f895c6fe 403 transfers.
mbed_official 340:28d1f895c6fe 404
mbed_official 340:28d1f895c6fe 405 (#) Blocking mode function to check if device is ready for usage is :
mbed_official 340:28d1f895c6fe 406 (++) HAL_SMBUS_IsDeviceReady()
mbed_official 340:28d1f895c6fe 407
mbed_official 340:28d1f895c6fe 408 (#) There is only one mode of transfer:
mbed_official 340:28d1f895c6fe 409 (++) No-Blocking mode : The communication is performed using Interrupts.
mbed_official 340:28d1f895c6fe 410 These functions return the status of the transfer startup.
mbed_official 340:28d1f895c6fe 411 The end of the data processing will be indicated through the
mbed_official 340:28d1f895c6fe 412 dedicated SMBUS IRQ when using Interrupt mode.
mbed_official 340:28d1f895c6fe 413
mbed_official 340:28d1f895c6fe 414 (#) No-Blocking mode functions with Interrupt are :
mbed_official 340:28d1f895c6fe 415 (++) HAL_SMBUS_Master_Transmit_IT()
mbed_official 340:28d1f895c6fe 416 (++) HAL_SMBUS_Master_Receive_IT()
mbed_official 340:28d1f895c6fe 417 (++) HAL_SMBUS_Slave_Transmit_IT()
mbed_official 340:28d1f895c6fe 418 (++) HAL_SMBUS_Slave_Receive_IT()
mbed_official 340:28d1f895c6fe 419 (++) HAL_SMBUS_Slave_Listen_IT() or alias HAL_SMBUS_EnableListen_IT()
mbed_official 340:28d1f895c6fe 420 (++) HAL_SMBUS_DisableListen_IT()
mbed_official 340:28d1f895c6fe 421 (++) HAL_SMBUS_EnableAlert_IT()
mbed_official 340:28d1f895c6fe 422 (++) HAL_SMBUS_DisableAlert_IT()
mbed_official 340:28d1f895c6fe 423
mbed_official 340:28d1f895c6fe 424 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
mbed_official 340:28d1f895c6fe 425 (++) HAL_SMBUS_MasterTxCpltCallback()
mbed_official 340:28d1f895c6fe 426 (++) HAL_SMBUS_MasterRxCpltCallback()
mbed_official 340:28d1f895c6fe 427 (++) HAL_SMBUS_SlaveTxCpltCallback()
mbed_official 340:28d1f895c6fe 428 (++) HAL_SMBUS_SlaveRxCpltCallback()
mbed_official 340:28d1f895c6fe 429 (++) HAL_SMBUS_SlaveAddrCallback() or alias HAL_SMBUS_AddrCallback()
mbed_official 340:28d1f895c6fe 430 (++) HAL_SMBUS_SlaveListenCpltCallback() or alias HAL_SMBUS_ListenCpltCallback()
mbed_official 340:28d1f895c6fe 431 (++) HAL_SMBUS_ErrorCallback()
mbed_official 340:28d1f895c6fe 432
mbed_official 340:28d1f895c6fe 433 @endverbatim
mbed_official 340:28d1f895c6fe 434 * @{
mbed_official 340:28d1f895c6fe 435 */
mbed_official 340:28d1f895c6fe 436
mbed_official 340:28d1f895c6fe 437 /**
mbed_official 340:28d1f895c6fe 438 * @brief Transmit in master/host SMBUS mode an amount of data in no-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 439 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 440 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 441 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 442 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 443 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 444 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
mbed_official 340:28d1f895c6fe 445 * @retval HAL status
mbed_official 340:28d1f895c6fe 446 */
mbed_official 340:28d1f895c6fe 447 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
mbed_official 340:28d1f895c6fe 448 {
mbed_official 340:28d1f895c6fe 449 /* Check the parameters */
mbed_official 340:28d1f895c6fe 450 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
mbed_official 340:28d1f895c6fe 451
mbed_official 340:28d1f895c6fe 452 if(hsmbus->State == HAL_SMBUS_STATE_READY)
mbed_official 340:28d1f895c6fe 453 {
mbed_official 340:28d1f895c6fe 454 /* Process Locked */
mbed_official 340:28d1f895c6fe 455 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 456
mbed_official 340:28d1f895c6fe 457 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
mbed_official 340:28d1f895c6fe 458 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 459 /* Prepare transfer parameters */
mbed_official 340:28d1f895c6fe 460 hsmbus->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 461 hsmbus->XferCount = Size;
mbed_official 340:28d1f895c6fe 462 hsmbus->XferOptions = XferOptions;
mbed_official 340:28d1f895c6fe 463
mbed_official 340:28d1f895c6fe 464 /* In case of Quick command, remove autoend mode */
mbed_official 340:28d1f895c6fe 465 /* Manage the stop generation by software */
mbed_official 441:d2c15dda23c1 466 if(hsmbus->pBuffPtr == NULL)
mbed_official 340:28d1f895c6fe 467 {
mbed_official 340:28d1f895c6fe 468 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
mbed_official 340:28d1f895c6fe 469 }
mbed_official 340:28d1f895c6fe 470
mbed_official 340:28d1f895c6fe 471 if(Size > MAX_NBYTE_SIZE)
mbed_official 340:28d1f895c6fe 472 {
mbed_official 340:28d1f895c6fe 473 hsmbus->XferSize = MAX_NBYTE_SIZE;
mbed_official 340:28d1f895c6fe 474 }
mbed_official 340:28d1f895c6fe 475 else
mbed_official 340:28d1f895c6fe 476 {
mbed_official 340:28d1f895c6fe 477 hsmbus->XferSize = Size;
mbed_official 340:28d1f895c6fe 478 }
mbed_official 340:28d1f895c6fe 479
mbed_official 340:28d1f895c6fe 480 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 481 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
mbed_official 340:28d1f895c6fe 482 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
mbed_official 340:28d1f895c6fe 483 {
mbed_official 340:28d1f895c6fe 484 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 485 }
mbed_official 340:28d1f895c6fe 486 else
mbed_official 340:28d1f895c6fe 487 {
mbed_official 340:28d1f895c6fe 488 /* If transfer direction not change, do not generate Restart Condition */
mbed_official 340:28d1f895c6fe 489 /* Mean Previous state is same as current state */
mbed_official 340:28d1f895c6fe 490 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 491 {
mbed_official 340:28d1f895c6fe 492 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 493 }
mbed_official 340:28d1f895c6fe 494 /* Else transfer direction change, so generate Restart with new transfer direction */
mbed_official 340:28d1f895c6fe 495 else
mbed_official 340:28d1f895c6fe 496 {
mbed_official 340:28d1f895c6fe 497 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 498 }
mbed_official 340:28d1f895c6fe 499
mbed_official 340:28d1f895c6fe 500 /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
mbed_official 340:28d1f895c6fe 501 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
mbed_official 340:28d1f895c6fe 502 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
mbed_official 340:28d1f895c6fe 503 {
mbed_official 340:28d1f895c6fe 504 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 505 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 506 }
mbed_official 340:28d1f895c6fe 507 }
mbed_official 340:28d1f895c6fe 508
mbed_official 340:28d1f895c6fe 509 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 510 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 511
mbed_official 340:28d1f895c6fe 512 /* Note : The SMBUS interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 513 to avoid the risk of SMBUS interrupt handle execution before current
mbed_official 340:28d1f895c6fe 514 process unlock */
mbed_official 340:28d1f895c6fe 515 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 516
mbed_official 340:28d1f895c6fe 517 return HAL_OK;
mbed_official 340:28d1f895c6fe 518 }
mbed_official 340:28d1f895c6fe 519 else
mbed_official 340:28d1f895c6fe 520 {
mbed_official 340:28d1f895c6fe 521 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 522 }
mbed_official 340:28d1f895c6fe 523 }
mbed_official 340:28d1f895c6fe 524
mbed_official 340:28d1f895c6fe 525 /**
mbed_official 340:28d1f895c6fe 526 * @brief Receive in master/host SMBUS mode an amount of data in no-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 527 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 528 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 529 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 530 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 531 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 532 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
mbed_official 340:28d1f895c6fe 533 * @retval HAL status
mbed_official 340:28d1f895c6fe 534 */
mbed_official 340:28d1f895c6fe 535 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
mbed_official 340:28d1f895c6fe 536 {
mbed_official 340:28d1f895c6fe 537 /* Check the parameters */
mbed_official 340:28d1f895c6fe 538 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
mbed_official 340:28d1f895c6fe 539
mbed_official 340:28d1f895c6fe 540 if(hsmbus->State == HAL_SMBUS_STATE_READY)
mbed_official 340:28d1f895c6fe 541 {
mbed_official 340:28d1f895c6fe 542 /* Process Locked */
mbed_official 340:28d1f895c6fe 543 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 544
mbed_official 340:28d1f895c6fe 545 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
mbed_official 340:28d1f895c6fe 546 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 547
mbed_official 340:28d1f895c6fe 548 /* Prepare transfer parameters */
mbed_official 340:28d1f895c6fe 549 hsmbus->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 550 hsmbus->XferCount = Size;
mbed_official 340:28d1f895c6fe 551 hsmbus->XferOptions = XferOptions;
mbed_official 340:28d1f895c6fe 552
mbed_official 340:28d1f895c6fe 553 /* In case of Quick command, remove autoend mode */
mbed_official 340:28d1f895c6fe 554 /* Manage the stop generation by software */
mbed_official 441:d2c15dda23c1 555 if(hsmbus->pBuffPtr == NULL)
mbed_official 340:28d1f895c6fe 556 {
mbed_official 340:28d1f895c6fe 557 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
mbed_official 340:28d1f895c6fe 558 }
mbed_official 340:28d1f895c6fe 559
mbed_official 340:28d1f895c6fe 560 if(Size > MAX_NBYTE_SIZE)
mbed_official 340:28d1f895c6fe 561 {
mbed_official 340:28d1f895c6fe 562 hsmbus->XferSize = MAX_NBYTE_SIZE;
mbed_official 340:28d1f895c6fe 563 }
mbed_official 340:28d1f895c6fe 564 else
mbed_official 340:28d1f895c6fe 565 {
mbed_official 340:28d1f895c6fe 566 hsmbus->XferSize = Size;
mbed_official 340:28d1f895c6fe 567 }
mbed_official 340:28d1f895c6fe 568
mbed_official 340:28d1f895c6fe 569 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 570 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
mbed_official 340:28d1f895c6fe 571 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
mbed_official 340:28d1f895c6fe 572 {
mbed_official 340:28d1f895c6fe 573 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 574 }
mbed_official 340:28d1f895c6fe 575 else
mbed_official 340:28d1f895c6fe 576 {
mbed_official 340:28d1f895c6fe 577 /* If transfer direction not change, do not generate Restart Condition */
mbed_official 340:28d1f895c6fe 578 /* Mean Previous state is same as current state */
mbed_official 340:28d1f895c6fe 579 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 580 {
mbed_official 340:28d1f895c6fe 581 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 582 }
mbed_official 340:28d1f895c6fe 583 /* Else transfer direction change, so generate Restart with new transfer direction */
mbed_official 340:28d1f895c6fe 584 else
mbed_official 340:28d1f895c6fe 585 {
mbed_official 340:28d1f895c6fe 586 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 587 }
mbed_official 340:28d1f895c6fe 588 }
mbed_official 340:28d1f895c6fe 589
mbed_official 340:28d1f895c6fe 590 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 591 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 592
mbed_official 340:28d1f895c6fe 593 /* Note : The SMBUS interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 594 to avoid the risk of SMBUS interrupt handle execution before current
mbed_official 340:28d1f895c6fe 595 process unlock */
mbed_official 340:28d1f895c6fe 596 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 597
mbed_official 340:28d1f895c6fe 598 return HAL_OK;
mbed_official 340:28d1f895c6fe 599 }
mbed_official 340:28d1f895c6fe 600 else
mbed_official 340:28d1f895c6fe 601 {
mbed_official 340:28d1f895c6fe 602 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 603 }
mbed_official 340:28d1f895c6fe 604 }
mbed_official 340:28d1f895c6fe 605
mbed_official 340:28d1f895c6fe 606 /**
mbed_official 340:28d1f895c6fe 607 * @brief Abort a master/host SMBUS process commnunication with Interrupt
mbed_official 340:28d1f895c6fe 608 * @note : This abort can be called only if state is ready
mbed_official 340:28d1f895c6fe 609 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 610 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 611 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 612 * @retval HAL status
mbed_official 340:28d1f895c6fe 613 */
mbed_official 340:28d1f895c6fe 614 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
mbed_official 340:28d1f895c6fe 615 {
mbed_official 340:28d1f895c6fe 616 if(hsmbus->State == HAL_SMBUS_STATE_READY)
mbed_official 340:28d1f895c6fe 617 {
mbed_official 340:28d1f895c6fe 618 /* Process Locked */
mbed_official 340:28d1f895c6fe 619 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 620
mbed_official 340:28d1f895c6fe 621 /* Keep the same state as previous */
mbed_official 340:28d1f895c6fe 622 /* to perform as well the call of the corresponding end of transfer callback */
mbed_official 340:28d1f895c6fe 623 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 624 {
mbed_official 340:28d1f895c6fe 625 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
mbed_official 340:28d1f895c6fe 626 }
mbed_official 340:28d1f895c6fe 627 else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 628 {
mbed_official 340:28d1f895c6fe 629 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
mbed_official 340:28d1f895c6fe 630 }
mbed_official 340:28d1f895c6fe 631 else
mbed_official 340:28d1f895c6fe 632 {
mbed_official 340:28d1f895c6fe 633 /* Wrong usage of abort function */
mbed_official 340:28d1f895c6fe 634 /* This function should be used only in case of abort monitored by master device */
mbed_official 340:28d1f895c6fe 635 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 636 }
mbed_official 340:28d1f895c6fe 637 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 638
mbed_official 340:28d1f895c6fe 639 /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
mbed_official 340:28d1f895c6fe 640 /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
mbed_official 340:28d1f895c6fe 641 SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 642
mbed_official 340:28d1f895c6fe 643 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 644 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 645
mbed_official 340:28d1f895c6fe 646 /* Note : The SMBUS interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 647 to avoid the risk of SMBUS interrupt handle execution before current
mbed_official 340:28d1f895c6fe 648 process unlock */
mbed_official 340:28d1f895c6fe 649 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 650 {
mbed_official 340:28d1f895c6fe 651 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 652 }
mbed_official 340:28d1f895c6fe 653 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 654 {
mbed_official 340:28d1f895c6fe 655 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 656 }
mbed_official 340:28d1f895c6fe 657
mbed_official 340:28d1f895c6fe 658 return HAL_OK;
mbed_official 340:28d1f895c6fe 659 }
mbed_official 340:28d1f895c6fe 660 else
mbed_official 340:28d1f895c6fe 661 {
mbed_official 340:28d1f895c6fe 662 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 663 }
mbed_official 340:28d1f895c6fe 664 }
mbed_official 340:28d1f895c6fe 665
mbed_official 340:28d1f895c6fe 666 /**
mbed_official 340:28d1f895c6fe 667 * @brief Transmit in slave/device SMBUS mode an amount of data in no-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 668 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 669 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 670 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 671 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 672 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
mbed_official 340:28d1f895c6fe 673 * @retval HAL status
mbed_official 340:28d1f895c6fe 674 */
mbed_official 340:28d1f895c6fe 675 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
mbed_official 340:28d1f895c6fe 676 {
mbed_official 340:28d1f895c6fe 677 /* Check the parameters */
mbed_official 340:28d1f895c6fe 678 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
mbed_official 340:28d1f895c6fe 679
mbed_official 340:28d1f895c6fe 680 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 681 {
mbed_official 441:d2c15dda23c1 682 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 683 {
mbed_official 340:28d1f895c6fe 684 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 685 }
mbed_official 340:28d1f895c6fe 686
mbed_official 340:28d1f895c6fe 687 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
mbed_official 340:28d1f895c6fe 688 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 689
mbed_official 340:28d1f895c6fe 690 /* Process Locked */
mbed_official 340:28d1f895c6fe 691 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 692
mbed_official 340:28d1f895c6fe 693 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
mbed_official 340:28d1f895c6fe 694 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 695
mbed_official 340:28d1f895c6fe 696 /* Set SBC bit to manage Acknowledge at each bit */
mbed_official 340:28d1f895c6fe 697 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
mbed_official 340:28d1f895c6fe 698
mbed_official 340:28d1f895c6fe 699 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 700 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 701
mbed_official 340:28d1f895c6fe 702 /* Prepare transfer parameters */
mbed_official 340:28d1f895c6fe 703 hsmbus->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 704 hsmbus->XferSize = Size;
mbed_official 340:28d1f895c6fe 705 hsmbus->XferCount = Size;
mbed_official 340:28d1f895c6fe 706 hsmbus->XferOptions = XferOptions;
mbed_official 340:28d1f895c6fe 707
mbed_official 340:28d1f895c6fe 708 if(Size > MAX_NBYTE_SIZE)
mbed_official 340:28d1f895c6fe 709 {
mbed_official 340:28d1f895c6fe 710 hsmbus->XferSize = MAX_NBYTE_SIZE;
mbed_official 340:28d1f895c6fe 711 }
mbed_official 340:28d1f895c6fe 712 else
mbed_official 340:28d1f895c6fe 713 {
mbed_official 340:28d1f895c6fe 714 hsmbus->XferSize = Size;
mbed_official 340:28d1f895c6fe 715 }
mbed_official 340:28d1f895c6fe 716
mbed_official 340:28d1f895c6fe 717 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
mbed_official 340:28d1f895c6fe 718 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
mbed_official 340:28d1f895c6fe 719 {
mbed_official 340:28d1f895c6fe 720 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 721 }
mbed_official 340:28d1f895c6fe 722 else
mbed_official 340:28d1f895c6fe 723 {
mbed_official 340:28d1f895c6fe 724 /* Set NBYTE to transmit */
mbed_official 340:28d1f895c6fe 725 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 726
mbed_official 340:28d1f895c6fe 727 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
mbed_official 340:28d1f895c6fe 728 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
mbed_official 340:28d1f895c6fe 729 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
mbed_official 340:28d1f895c6fe 730 {
mbed_official 340:28d1f895c6fe 731 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 732 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 733 }
mbed_official 340:28d1f895c6fe 734 }
mbed_official 340:28d1f895c6fe 735
mbed_official 340:28d1f895c6fe 736 /* Clear ADDR flag after prepare the transfer parameters */
mbed_official 340:28d1f895c6fe 737 /* This action will generate an acknowledge to the HOST */
mbed_official 340:28d1f895c6fe 738 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 739
mbed_official 340:28d1f895c6fe 740 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 741 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 742
mbed_official 340:28d1f895c6fe 743 /* Note : The SMBUS interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 744 to avoid the risk of SMBUS interrupt handle execution before current
mbed_official 340:28d1f895c6fe 745 process unlock */
mbed_official 340:28d1f895c6fe 746 /* REnable ADDR interrupt */
mbed_official 340:28d1f895c6fe 747 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR);
mbed_official 340:28d1f895c6fe 748
mbed_official 340:28d1f895c6fe 749 return HAL_OK;
mbed_official 340:28d1f895c6fe 750 }
mbed_official 340:28d1f895c6fe 751 else
mbed_official 340:28d1f895c6fe 752 {
mbed_official 340:28d1f895c6fe 753 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 754 }
mbed_official 340:28d1f895c6fe 755 }
mbed_official 340:28d1f895c6fe 756
mbed_official 340:28d1f895c6fe 757 /**
mbed_official 340:28d1f895c6fe 758 * @brief Receive in slave/device SMBUS mode an amount of data in no-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 759 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 760 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 761 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 762 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 763 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
mbed_official 340:28d1f895c6fe 764 * @retval HAL status
mbed_official 340:28d1f895c6fe 765 */
mbed_official 340:28d1f895c6fe 766 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
mbed_official 340:28d1f895c6fe 767 {
mbed_official 340:28d1f895c6fe 768 /* Check the parameters */
mbed_official 340:28d1f895c6fe 769 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
mbed_official 340:28d1f895c6fe 770
mbed_official 340:28d1f895c6fe 771 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 772 {
mbed_official 441:d2c15dda23c1 773 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 774 {
mbed_official 340:28d1f895c6fe 775 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 776 }
mbed_official 340:28d1f895c6fe 777
mbed_official 340:28d1f895c6fe 778 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
mbed_official 340:28d1f895c6fe 779 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 780
mbed_official 340:28d1f895c6fe 781 /* Process Locked */
mbed_official 340:28d1f895c6fe 782 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 783
mbed_official 340:28d1f895c6fe 784 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
mbed_official 340:28d1f895c6fe 785 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 786
mbed_official 340:28d1f895c6fe 787 /* Set SBC bit to manage Acknowledge at each bit */
mbed_official 340:28d1f895c6fe 788 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
mbed_official 340:28d1f895c6fe 789
mbed_official 340:28d1f895c6fe 790 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 791 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 792
mbed_official 340:28d1f895c6fe 793 /* Prepare transfer parameters */
mbed_official 340:28d1f895c6fe 794 hsmbus->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 795 hsmbus->XferSize = Size;
mbed_official 340:28d1f895c6fe 796 hsmbus->XferCount = Size;
mbed_official 340:28d1f895c6fe 797 hsmbus->XferOptions = XferOptions;
mbed_official 340:28d1f895c6fe 798
mbed_official 340:28d1f895c6fe 799 /* Set NBYTE to receive */
mbed_official 340:28d1f895c6fe 800 /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
mbed_official 340:28d1f895c6fe 801 /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
mbed_official 340:28d1f895c6fe 802 /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
mbed_official 340:28d1f895c6fe 803 /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
mbed_official 340:28d1f895c6fe 804 if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
mbed_official 340:28d1f895c6fe 805 {
mbed_official 340:28d1f895c6fe 806 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 807 }
mbed_official 340:28d1f895c6fe 808 else
mbed_official 340:28d1f895c6fe 809 {
mbed_official 340:28d1f895c6fe 810 SMBUS_TransferConfig(hsmbus,0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 811 }
mbed_official 340:28d1f895c6fe 812
mbed_official 340:28d1f895c6fe 813 /* Clear ADDR flag after prepare the transfer parameters */
mbed_official 340:28d1f895c6fe 814 /* This action will generate an acknowledge to the HOST */
mbed_official 340:28d1f895c6fe 815 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 816
mbed_official 340:28d1f895c6fe 817 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 818 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 819
mbed_official 340:28d1f895c6fe 820 /* Note : The SMBUS interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 821 to avoid the risk of SMBUS interrupt handle execution before current
mbed_official 340:28d1f895c6fe 822 process unlock */
mbed_official 340:28d1f895c6fe 823 /* REnable ADDR interrupt */
mbed_official 340:28d1f895c6fe 824 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR);
mbed_official 340:28d1f895c6fe 825
mbed_official 340:28d1f895c6fe 826 return HAL_OK;
mbed_official 340:28d1f895c6fe 827 }
mbed_official 340:28d1f895c6fe 828 else
mbed_official 340:28d1f895c6fe 829 {
mbed_official 340:28d1f895c6fe 830 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 831 }
mbed_official 340:28d1f895c6fe 832 }
mbed_official 340:28d1f895c6fe 833
mbed_official 340:28d1f895c6fe 834 /**
mbed_official 340:28d1f895c6fe 835 * @brief This function enable the Address listen mode
mbed_official 340:28d1f895c6fe 836 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 837 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 838 * @retval HAL status
mbed_official 340:28d1f895c6fe 839 */
mbed_official 340:28d1f895c6fe 840 HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 841 {
mbed_official 340:28d1f895c6fe 842 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
mbed_official 340:28d1f895c6fe 843
mbed_official 340:28d1f895c6fe 844 /* Enable the Address Match interrupt */
mbed_official 340:28d1f895c6fe 845 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
mbed_official 340:28d1f895c6fe 846
mbed_official 340:28d1f895c6fe 847 return HAL_OK;
mbed_official 340:28d1f895c6fe 848 }
mbed_official 340:28d1f895c6fe 849
mbed_official 340:28d1f895c6fe 850 /**
mbed_official 340:28d1f895c6fe 851 * @brief This function disable the Address listen mode
mbed_official 340:28d1f895c6fe 852 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 853 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 854 * @retval HAL status
mbed_official 340:28d1f895c6fe 855 */
mbed_official 340:28d1f895c6fe 856 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 857 {
mbed_official 340:28d1f895c6fe 858 /* Disable Address listen mode only if a transfer is not ongoing */
mbed_official 340:28d1f895c6fe 859 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 860 {
mbed_official 340:28d1f895c6fe 861 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 862
mbed_official 340:28d1f895c6fe 863 /* Disable the Address Match interrupt */
mbed_official 340:28d1f895c6fe 864 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
mbed_official 340:28d1f895c6fe 865
mbed_official 340:28d1f895c6fe 866 return HAL_OK;
mbed_official 340:28d1f895c6fe 867 }
mbed_official 340:28d1f895c6fe 868 else
mbed_official 340:28d1f895c6fe 869 {
mbed_official 340:28d1f895c6fe 870 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 871 }
mbed_official 340:28d1f895c6fe 872 }
mbed_official 340:28d1f895c6fe 873
mbed_official 340:28d1f895c6fe 874 /**
mbed_official 340:28d1f895c6fe 875 * @brief This function enable the SMBUS alert mode.
mbed_official 340:28d1f895c6fe 876 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 877 * the configuration information for the specified SMBUSx peripheral.
mbed_official 340:28d1f895c6fe 878 * @retval HAL status
mbed_official 340:28d1f895c6fe 879 */
mbed_official 340:28d1f895c6fe 880 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 881 {
mbed_official 340:28d1f895c6fe 882 /* Enable SMBus alert */
mbed_official 340:28d1f895c6fe 883 hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
mbed_official 340:28d1f895c6fe 884
mbed_official 340:28d1f895c6fe 885 /* Clear ALERT flag */
mbed_official 340:28d1f895c6fe 886 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
mbed_official 340:28d1f895c6fe 887
mbed_official 340:28d1f895c6fe 888 /* Enable Alert Interrupt */
mbed_official 340:28d1f895c6fe 889 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
mbed_official 340:28d1f895c6fe 890
mbed_official 340:28d1f895c6fe 891 return HAL_OK;
mbed_official 340:28d1f895c6fe 892 }
mbed_official 340:28d1f895c6fe 893 /**
mbed_official 340:28d1f895c6fe 894 * @brief This function disable the SMBUS alert mode.
mbed_official 340:28d1f895c6fe 895 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 896 * the configuration information for the specified SMBUSx peripheral.
mbed_official 340:28d1f895c6fe 897 * @retval HAL status
mbed_official 340:28d1f895c6fe 898 */
mbed_official 340:28d1f895c6fe 899 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 900 {
mbed_official 340:28d1f895c6fe 901 /* Enable SMBus alert */
mbed_official 340:28d1f895c6fe 902 hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
mbed_official 340:28d1f895c6fe 903
mbed_official 340:28d1f895c6fe 904 /* Disable Alert Interrupt */
mbed_official 340:28d1f895c6fe 905 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
mbed_official 340:28d1f895c6fe 906
mbed_official 340:28d1f895c6fe 907 return HAL_OK;
mbed_official 340:28d1f895c6fe 908 }
mbed_official 340:28d1f895c6fe 909
mbed_official 340:28d1f895c6fe 910 /**
mbed_official 340:28d1f895c6fe 911 * @brief Checks if target device is ready for communication.
mbed_official 340:28d1f895c6fe 912 * @note This function is used with Memory devices
mbed_official 340:28d1f895c6fe 913 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 914 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 915 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 916 * @param Trials: Number of trials
mbed_official 340:28d1f895c6fe 917 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 918 * @retval HAL status
mbed_official 340:28d1f895c6fe 919 */
mbed_official 340:28d1f895c6fe 920 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 921 {
mbed_official 340:28d1f895c6fe 922 uint32_t tickstart = 0;
mbed_official 340:28d1f895c6fe 923
mbed_official 340:28d1f895c6fe 924 __IO uint32_t SMBUS_Trials = 0;
mbed_official 340:28d1f895c6fe 925
mbed_official 340:28d1f895c6fe 926 if(hsmbus->State == HAL_SMBUS_STATE_READY)
mbed_official 340:28d1f895c6fe 927 {
mbed_official 340:28d1f895c6fe 928 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
mbed_official 340:28d1f895c6fe 929 {
mbed_official 340:28d1f895c6fe 930 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 931 }
mbed_official 340:28d1f895c6fe 932
mbed_official 340:28d1f895c6fe 933 /* Process Locked */
mbed_official 340:28d1f895c6fe 934 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 935
mbed_official 340:28d1f895c6fe 936 hsmbus->State = HAL_SMBUS_STATE_BUSY;
mbed_official 340:28d1f895c6fe 937 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
mbed_official 340:28d1f895c6fe 938
mbed_official 340:28d1f895c6fe 939 do
mbed_official 340:28d1f895c6fe 940 {
mbed_official 340:28d1f895c6fe 941 /* Generate Start */
mbed_official 340:28d1f895c6fe 942 hsmbus->Instance->CR2 = __HAL_SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress);
mbed_official 340:28d1f895c6fe 943
mbed_official 340:28d1f895c6fe 944 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 945 /* Wait until STOPF flag is set or a NACK flag is set*/
mbed_official 340:28d1f895c6fe 946 tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 947 while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
mbed_official 340:28d1f895c6fe 948 {
mbed_official 340:28d1f895c6fe 949 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 950 {
mbed_official 340:28d1f895c6fe 951 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 952 {
mbed_official 340:28d1f895c6fe 953 /* Device is ready */
mbed_official 340:28d1f895c6fe 954 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 955
mbed_official 340:28d1f895c6fe 956 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 957 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 958 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 959 }
mbed_official 340:28d1f895c6fe 960 }
mbed_official 340:28d1f895c6fe 961 }
mbed_official 340:28d1f895c6fe 962
mbed_official 340:28d1f895c6fe 963 /* Check if the NACKF flag has not been set */
mbed_official 340:28d1f895c6fe 964 if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
mbed_official 340:28d1f895c6fe 965 {
mbed_official 340:28d1f895c6fe 966 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 967 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 968 {
mbed_official 340:28d1f895c6fe 969 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 970 }
mbed_official 340:28d1f895c6fe 971
mbed_official 340:28d1f895c6fe 972 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 973 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 974
mbed_official 340:28d1f895c6fe 975 /* Device is ready */
mbed_official 340:28d1f895c6fe 976 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 977
mbed_official 340:28d1f895c6fe 978 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 979 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 980
mbed_official 340:28d1f895c6fe 981 return HAL_OK;
mbed_official 340:28d1f895c6fe 982 }
mbed_official 340:28d1f895c6fe 983 else
mbed_official 340:28d1f895c6fe 984 {
mbed_official 340:28d1f895c6fe 985 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 986 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 987 {
mbed_official 340:28d1f895c6fe 988 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 989 }
mbed_official 340:28d1f895c6fe 990
mbed_official 340:28d1f895c6fe 991 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 992 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
mbed_official 340:28d1f895c6fe 993
mbed_official 340:28d1f895c6fe 994 /* Clear STOP Flag, auto generated with autoend*/
mbed_official 340:28d1f895c6fe 995 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 996 }
mbed_official 340:28d1f895c6fe 997
mbed_official 340:28d1f895c6fe 998 /* Check if the maximum allowed number of trials has been reached */
mbed_official 340:28d1f895c6fe 999 if (SMBUS_Trials++ == Trials)
mbed_official 340:28d1f895c6fe 1000 {
mbed_official 340:28d1f895c6fe 1001 /* Generate Stop */
mbed_official 340:28d1f895c6fe 1002 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
mbed_official 340:28d1f895c6fe 1003
mbed_official 340:28d1f895c6fe 1004 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 1005 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1006 {
mbed_official 340:28d1f895c6fe 1007 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1008 }
mbed_official 340:28d1f895c6fe 1009
mbed_official 340:28d1f895c6fe 1010 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 1011 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 1012 }
mbed_official 340:28d1f895c6fe 1013 }while(SMBUS_Trials < Trials);
mbed_official 340:28d1f895c6fe 1014
mbed_official 340:28d1f895c6fe 1015 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1016
mbed_official 340:28d1f895c6fe 1017 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1018 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1019
mbed_official 340:28d1f895c6fe 1020 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1021 }
mbed_official 340:28d1f895c6fe 1022 else
mbed_official 340:28d1f895c6fe 1023 {
mbed_official 340:28d1f895c6fe 1024 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1025 }
mbed_official 340:28d1f895c6fe 1026 }
mbed_official 340:28d1f895c6fe 1027
mbed_official 340:28d1f895c6fe 1028 /**
mbed_official 340:28d1f895c6fe 1029 * @brief This function handles SMBUS event interrupt request.
mbed_official 340:28d1f895c6fe 1030 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1031 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1032 * @retval None
mbed_official 340:28d1f895c6fe 1033 */
mbed_official 340:28d1f895c6fe 1034 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1035 {
mbed_official 340:28d1f895c6fe 1036 uint32_t tmpisrvalue = 0;
mbed_official 340:28d1f895c6fe 1037
mbed_official 340:28d1f895c6fe 1038 /* Use a local variable to store the current ISR flags */
mbed_official 340:28d1f895c6fe 1039 /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
mbed_official 340:28d1f895c6fe 1040 tmpisrvalue = __SMBUS_GET_ISR_REG(hsmbus);
mbed_official 340:28d1f895c6fe 1041
mbed_official 340:28d1f895c6fe 1042 /* SMBUS in mode Transmitter ---------------------------------------------------*/
mbed_official 340:28d1f895c6fe 1043 if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
mbed_official 340:28d1f895c6fe 1044 {
mbed_official 340:28d1f895c6fe 1045 /* Slave mode selected */
mbed_official 340:28d1f895c6fe 1046 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
mbed_official 340:28d1f895c6fe 1047 {
mbed_official 340:28d1f895c6fe 1048 SMBUS_Slave_ISR(hsmbus);
mbed_official 340:28d1f895c6fe 1049 }
mbed_official 340:28d1f895c6fe 1050 /* Master mode selected */
mbed_official 340:28d1f895c6fe 1051 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 1052 {
mbed_official 340:28d1f895c6fe 1053 SMBUS_Master_ISR(hsmbus);
mbed_official 340:28d1f895c6fe 1054 }
mbed_official 340:28d1f895c6fe 1055 }
mbed_official 340:28d1f895c6fe 1056
mbed_official 340:28d1f895c6fe 1057 /* SMBUS in mode Receiver ----------------------------------------------------*/
mbed_official 340:28d1f895c6fe 1058 if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
mbed_official 340:28d1f895c6fe 1059 {
mbed_official 340:28d1f895c6fe 1060 /* Slave mode selected */
mbed_official 340:28d1f895c6fe 1061 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
mbed_official 340:28d1f895c6fe 1062 {
mbed_official 340:28d1f895c6fe 1063 SMBUS_Slave_ISR(hsmbus);
mbed_official 340:28d1f895c6fe 1064 }
mbed_official 340:28d1f895c6fe 1065 /* Master mode selected */
mbed_official 340:28d1f895c6fe 1066 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 1067 {
mbed_official 340:28d1f895c6fe 1068 SMBUS_Master_ISR(hsmbus);
mbed_official 340:28d1f895c6fe 1069 }
mbed_official 340:28d1f895c6fe 1070 }
mbed_official 340:28d1f895c6fe 1071
mbed_official 340:28d1f895c6fe 1072 /* SMBUS in mode Listener Only --------------------------------------------------*/
mbed_official 340:28d1f895c6fe 1073 if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
mbed_official 340:28d1f895c6fe 1074 && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
mbed_official 340:28d1f895c6fe 1075 {
mbed_official 340:28d1f895c6fe 1076 if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 1077 {
mbed_official 340:28d1f895c6fe 1078 SMBUS_Slave_ISR(hsmbus);
mbed_official 340:28d1f895c6fe 1079 }
mbed_official 340:28d1f895c6fe 1080 }
mbed_official 340:28d1f895c6fe 1081 }
mbed_official 340:28d1f895c6fe 1082
mbed_official 340:28d1f895c6fe 1083 /**
mbed_official 340:28d1f895c6fe 1084 * @brief This function handles SMBUS error interrupt request.
mbed_official 340:28d1f895c6fe 1085 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1086 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1087 * @retval None
mbed_official 340:28d1f895c6fe 1088 */
mbed_official 340:28d1f895c6fe 1089 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1090 {
mbed_official 340:28d1f895c6fe 1091 /* SMBUS Bus error interrupt occurred ------------------------------------*/
mbed_official 340:28d1f895c6fe 1092 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
mbed_official 340:28d1f895c6fe 1093 {
mbed_official 340:28d1f895c6fe 1094 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
mbed_official 340:28d1f895c6fe 1095
mbed_official 340:28d1f895c6fe 1096 /* Clear BERR flag */
mbed_official 340:28d1f895c6fe 1097 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
mbed_official 340:28d1f895c6fe 1098 }
mbed_official 340:28d1f895c6fe 1099
mbed_official 340:28d1f895c6fe 1100 /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
mbed_official 340:28d1f895c6fe 1101 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
mbed_official 340:28d1f895c6fe 1102 {
mbed_official 340:28d1f895c6fe 1103 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
mbed_official 340:28d1f895c6fe 1104
mbed_official 340:28d1f895c6fe 1105 /* Clear OVR flag */
mbed_official 340:28d1f895c6fe 1106 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
mbed_official 340:28d1f895c6fe 1107 }
mbed_official 340:28d1f895c6fe 1108
mbed_official 340:28d1f895c6fe 1109 /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
mbed_official 340:28d1f895c6fe 1110 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
mbed_official 340:28d1f895c6fe 1111 {
mbed_official 340:28d1f895c6fe 1112 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
mbed_official 340:28d1f895c6fe 1113
mbed_official 340:28d1f895c6fe 1114 /* Clear ARLO flag */
mbed_official 340:28d1f895c6fe 1115 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
mbed_official 340:28d1f895c6fe 1116 }
mbed_official 340:28d1f895c6fe 1117
mbed_official 340:28d1f895c6fe 1118 /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
mbed_official 340:28d1f895c6fe 1119 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
mbed_official 340:28d1f895c6fe 1120 {
mbed_official 340:28d1f895c6fe 1121 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
mbed_official 340:28d1f895c6fe 1122
mbed_official 340:28d1f895c6fe 1123 /* Clear TIMEOUT flag */
mbed_official 340:28d1f895c6fe 1124 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
mbed_official 340:28d1f895c6fe 1125 }
mbed_official 340:28d1f895c6fe 1126
mbed_official 340:28d1f895c6fe 1127 /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 1128 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
mbed_official 340:28d1f895c6fe 1129 {
mbed_official 340:28d1f895c6fe 1130 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
mbed_official 340:28d1f895c6fe 1131
mbed_official 340:28d1f895c6fe 1132 /* Clear ALERT flag */
mbed_official 340:28d1f895c6fe 1133 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
mbed_official 340:28d1f895c6fe 1134 }
mbed_official 340:28d1f895c6fe 1135
mbed_official 340:28d1f895c6fe 1136 /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
mbed_official 340:28d1f895c6fe 1137 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
mbed_official 340:28d1f895c6fe 1138 {
mbed_official 340:28d1f895c6fe 1139 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
mbed_official 340:28d1f895c6fe 1140
mbed_official 340:28d1f895c6fe 1141 /* Clear PEC error flag */
mbed_official 340:28d1f895c6fe 1142 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
mbed_official 340:28d1f895c6fe 1143 }
mbed_official 340:28d1f895c6fe 1144
mbed_official 340:28d1f895c6fe 1145 /* Call the Error Callback in case of Error detected */
mbed_official 340:28d1f895c6fe 1146 if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
mbed_official 340:28d1f895c6fe 1147 {
mbed_official 340:28d1f895c6fe 1148 /* Do not Reset the the HAL state in case of ALERT error */
mbed_official 340:28d1f895c6fe 1149 if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
mbed_official 340:28d1f895c6fe 1150 {
mbed_official 340:28d1f895c6fe 1151 if(((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
mbed_official 340:28d1f895c6fe 1152 || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
mbed_official 340:28d1f895c6fe 1153 {
mbed_official 340:28d1f895c6fe 1154 /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
mbed_official 340:28d1f895c6fe 1155 /* keep HAL_SMBUS_STATE_LISTEN if set */
mbed_official 340:28d1f895c6fe 1156 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1157 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
mbed_official 340:28d1f895c6fe 1158 }
mbed_official 340:28d1f895c6fe 1159 }
mbed_official 340:28d1f895c6fe 1160
mbed_official 340:28d1f895c6fe 1161 /* Call the Error callback to prevent upper layer */
mbed_official 340:28d1f895c6fe 1162 HAL_SMBUS_ErrorCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1163 }
mbed_official 340:28d1f895c6fe 1164 }
mbed_official 340:28d1f895c6fe 1165
mbed_official 340:28d1f895c6fe 1166 /**
mbed_official 340:28d1f895c6fe 1167 * @brief Master Tx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 1168 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1169 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1170 * @retval None
mbed_official 340:28d1f895c6fe 1171 */
mbed_official 340:28d1f895c6fe 1172 __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1173 {
mbed_official 340:28d1f895c6fe 1174 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1175 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1176 */
mbed_official 340:28d1f895c6fe 1177 }
mbed_official 340:28d1f895c6fe 1178
mbed_official 340:28d1f895c6fe 1179 /**
mbed_official 340:28d1f895c6fe 1180 * @brief Master Rx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 1181 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1182 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1183 * @retval None
mbed_official 340:28d1f895c6fe 1184 */
mbed_official 340:28d1f895c6fe 1185 __weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1186 {
mbed_official 340:28d1f895c6fe 1187 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1188 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1189 */
mbed_official 340:28d1f895c6fe 1190 }
mbed_official 340:28d1f895c6fe 1191
mbed_official 340:28d1f895c6fe 1192 /** @brief Slave Tx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 1193 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1194 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1195 * @retval None
mbed_official 340:28d1f895c6fe 1196 */
mbed_official 340:28d1f895c6fe 1197 __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1198 {
mbed_official 340:28d1f895c6fe 1199 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1200 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1201 */
mbed_official 340:28d1f895c6fe 1202 }
mbed_official 340:28d1f895c6fe 1203
mbed_official 340:28d1f895c6fe 1204 /**
mbed_official 340:28d1f895c6fe 1205 * @brief Slave Rx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 1206 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1207 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1208 * @retval None
mbed_official 340:28d1f895c6fe 1209 */
mbed_official 340:28d1f895c6fe 1210 __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1211 {
mbed_official 340:28d1f895c6fe 1212 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1213 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1214 */
mbed_official 340:28d1f895c6fe 1215 }
mbed_official 340:28d1f895c6fe 1216
mbed_official 340:28d1f895c6fe 1217 /**
mbed_official 340:28d1f895c6fe 1218 * @brief Slave Address Match callbacks.
mbed_official 340:28d1f895c6fe 1219 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1220 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1221 * @param TransferDirection: Master request Transfer Direction (Write/Read)
mbed_official 340:28d1f895c6fe 1222 * @param AddrMatchCode: Address Match Code
mbed_official 340:28d1f895c6fe 1223 * @retval None
mbed_official 340:28d1f895c6fe 1224 */
mbed_official 340:28d1f895c6fe 1225 __weak void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
mbed_official 340:28d1f895c6fe 1226 {
mbed_official 340:28d1f895c6fe 1227 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1228 the HAL_SMBUS_SlaveAddrCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1229 */
mbed_official 340:28d1f895c6fe 1230 }
mbed_official 340:28d1f895c6fe 1231
mbed_official 340:28d1f895c6fe 1232 /**
mbed_official 340:28d1f895c6fe 1233 * @brief Listen Complete callbacks.
mbed_official 340:28d1f895c6fe 1234 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1235 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1236 * @retval None
mbed_official 340:28d1f895c6fe 1237 */
mbed_official 340:28d1f895c6fe 1238 __weak void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1239 {
mbed_official 340:28d1f895c6fe 1240 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1241 the HAL_SMBUS_SlaveListenCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1242 */
mbed_official 340:28d1f895c6fe 1243 }
mbed_official 340:28d1f895c6fe 1244
mbed_official 340:28d1f895c6fe 1245 /**
mbed_official 340:28d1f895c6fe 1246 * @brief SMBUS error callbacks.
mbed_official 340:28d1f895c6fe 1247 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1248 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1249 * @retval None
mbed_official 340:28d1f895c6fe 1250 */
mbed_official 340:28d1f895c6fe 1251 __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1252 {
mbed_official 340:28d1f895c6fe 1253 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1254 the HAL_SMBUS_ErrorCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1255 */
mbed_official 340:28d1f895c6fe 1256 }
mbed_official 340:28d1f895c6fe 1257
mbed_official 340:28d1f895c6fe 1258 /**
mbed_official 340:28d1f895c6fe 1259 * @}
mbed_official 340:28d1f895c6fe 1260 */
mbed_official 340:28d1f895c6fe 1261
mbed_official 340:28d1f895c6fe 1262 /** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 1263 * @brief Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 1264 *
mbed_official 340:28d1f895c6fe 1265 @verbatim
mbed_official 340:28d1f895c6fe 1266 ===============================================================================
mbed_official 340:28d1f895c6fe 1267 ##### Peripheral State and Errors functions #####
mbed_official 340:28d1f895c6fe 1268 ===============================================================================
mbed_official 340:28d1f895c6fe 1269 [..]
mbed_official 340:28d1f895c6fe 1270 This subsection permit to get in run-time the status of the peripheral
mbed_official 340:28d1f895c6fe 1271 and the data flow.
mbed_official 340:28d1f895c6fe 1272
mbed_official 340:28d1f895c6fe 1273 @endverbatim
mbed_official 340:28d1f895c6fe 1274 * @{
mbed_official 340:28d1f895c6fe 1275 */
mbed_official 340:28d1f895c6fe 1276
mbed_official 340:28d1f895c6fe 1277 /**
mbed_official 340:28d1f895c6fe 1278 * @brief Returns the SMBUS state.
mbed_official 340:28d1f895c6fe 1279 * @param hsmbus : SMBUS handle
mbed_official 340:28d1f895c6fe 1280 * @retval HAL state
mbed_official 340:28d1f895c6fe 1281 */
mbed_official 441:d2c15dda23c1 1282 uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1283 {
mbed_official 340:28d1f895c6fe 1284 return hsmbus->State;
mbed_official 340:28d1f895c6fe 1285 }
mbed_official 340:28d1f895c6fe 1286
mbed_official 340:28d1f895c6fe 1287 /**
mbed_official 340:28d1f895c6fe 1288 * @brief Return the SMBUS error code
mbed_official 340:28d1f895c6fe 1289 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1290 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1291 * @retval SMBUS Error Code
mbed_official 340:28d1f895c6fe 1292 */
mbed_official 340:28d1f895c6fe 1293 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1294 {
mbed_official 340:28d1f895c6fe 1295 return hsmbus->ErrorCode;
mbed_official 340:28d1f895c6fe 1296 }
mbed_official 340:28d1f895c6fe 1297
mbed_official 340:28d1f895c6fe 1298 /**
mbed_official 340:28d1f895c6fe 1299 * @}
mbed_official 340:28d1f895c6fe 1300 */
mbed_official 340:28d1f895c6fe 1301
mbed_official 340:28d1f895c6fe 1302 /**
mbed_official 340:28d1f895c6fe 1303 * @}
mbed_official 340:28d1f895c6fe 1304 */
mbed_official 340:28d1f895c6fe 1305
mbed_official 340:28d1f895c6fe 1306 /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
mbed_official 340:28d1f895c6fe 1307 * @brief Data transfers Private functions
mbed_official 340:28d1f895c6fe 1308 * @{
mbed_official 340:28d1f895c6fe 1309 */
mbed_official 340:28d1f895c6fe 1310
mbed_official 340:28d1f895c6fe 1311 /**
mbed_official 340:28d1f895c6fe 1312 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode
mbed_official 340:28d1f895c6fe 1313 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1314 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1315 * @retval HAL status
mbed_official 340:28d1f895c6fe 1316 */
mbed_official 340:28d1f895c6fe 1317 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1318 {
mbed_official 340:28d1f895c6fe 1319 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 1320
mbed_official 340:28d1f895c6fe 1321 /* Process Locked */
mbed_official 340:28d1f895c6fe 1322 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1323
mbed_official 340:28d1f895c6fe 1324 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
mbed_official 340:28d1f895c6fe 1325 {
mbed_official 340:28d1f895c6fe 1326 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 1327 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
mbed_official 340:28d1f895c6fe 1328
mbed_official 340:28d1f895c6fe 1329 /* Set corresponding Error Code */
mbed_official 340:28d1f895c6fe 1330 /* No need to generate STOP, it is automatically done */
mbed_official 340:28d1f895c6fe 1331 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
mbed_official 340:28d1f895c6fe 1332
mbed_official 340:28d1f895c6fe 1333 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1334 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1335
mbed_official 340:28d1f895c6fe 1336 /* Call the Error callback to prevent upper layer */
mbed_official 340:28d1f895c6fe 1337 HAL_SMBUS_ErrorCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1338 }
mbed_official 340:28d1f895c6fe 1339 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
mbed_official 340:28d1f895c6fe 1340 {
mbed_official 340:28d1f895c6fe 1341
mbed_official 340:28d1f895c6fe 1342 /* Call the corresponding callback to inform upper layer of End of Transfer */
mbed_official 340:28d1f895c6fe 1343 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 1344 {
mbed_official 340:28d1f895c6fe 1345 /* Disable Interrupt */
mbed_official 340:28d1f895c6fe 1346 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 1347
mbed_official 340:28d1f895c6fe 1348 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 1349 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 1350
mbed_official 340:28d1f895c6fe 1351 /* Clear Configuration Register 2 */
mbed_official 340:28d1f895c6fe 1352 __HAL_SMBUS_RESET_CR2(hsmbus);
mbed_official 340:28d1f895c6fe 1353
mbed_official 340:28d1f895c6fe 1354 /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
mbed_official 340:28d1f895c6fe 1355 /* Disable the selected SMBUS peripheral */
mbed_official 340:28d1f895c6fe 1356 __HAL_SMBUS_DISABLE(hsmbus);
mbed_official 340:28d1f895c6fe 1357
mbed_official 340:28d1f895c6fe 1358 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1359 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1360
mbed_official 340:28d1f895c6fe 1361 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1362 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1363
mbed_official 340:28d1f895c6fe 1364 /* REenable the selected SMBUS peripheral */
mbed_official 340:28d1f895c6fe 1365 __HAL_SMBUS_ENABLE(hsmbus);
mbed_official 340:28d1f895c6fe 1366
mbed_official 340:28d1f895c6fe 1367 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1368 }
mbed_official 340:28d1f895c6fe 1369 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 1370 {
mbed_official 340:28d1f895c6fe 1371 /* Disable Interrupt */
mbed_official 340:28d1f895c6fe 1372 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 1373
mbed_official 340:28d1f895c6fe 1374 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 1375 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 1376
mbed_official 340:28d1f895c6fe 1377 /* Clear Configuration Register 2 */
mbed_official 340:28d1f895c6fe 1378 __HAL_SMBUS_RESET_CR2(hsmbus);
mbed_official 340:28d1f895c6fe 1379
mbed_official 340:28d1f895c6fe 1380 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1381 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1382
mbed_official 340:28d1f895c6fe 1383 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1384 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1385
mbed_official 340:28d1f895c6fe 1386 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1387 }
mbed_official 340:28d1f895c6fe 1388 }
mbed_official 340:28d1f895c6fe 1389 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
mbed_official 340:28d1f895c6fe 1390 {
mbed_official 340:28d1f895c6fe 1391 /* Read data from RXDR */
mbed_official 340:28d1f895c6fe 1392 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
mbed_official 340:28d1f895c6fe 1393 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 1394 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 1395 }
mbed_official 340:28d1f895c6fe 1396 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
mbed_official 340:28d1f895c6fe 1397 {
mbed_official 340:28d1f895c6fe 1398 /* Write data to TXDR */
mbed_official 340:28d1f895c6fe 1399 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
mbed_official 340:28d1f895c6fe 1400 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 1401 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 1402 }
mbed_official 340:28d1f895c6fe 1403 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
mbed_official 340:28d1f895c6fe 1404 {
mbed_official 340:28d1f895c6fe 1405 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
mbed_official 340:28d1f895c6fe 1406 {
mbed_official 340:28d1f895c6fe 1407 DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 1408
mbed_official 340:28d1f895c6fe 1409 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
mbed_official 340:28d1f895c6fe 1410 {
mbed_official 340:28d1f895c6fe 1411 SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1412 hsmbus->XferSize = MAX_NBYTE_SIZE;
mbed_official 340:28d1f895c6fe 1413 }
mbed_official 340:28d1f895c6fe 1414 else
mbed_official 340:28d1f895c6fe 1415 {
mbed_official 340:28d1f895c6fe 1416 hsmbus->XferSize = hsmbus->XferCount;
mbed_official 340:28d1f895c6fe 1417 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1418 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
mbed_official 340:28d1f895c6fe 1419 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
mbed_official 340:28d1f895c6fe 1420 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
mbed_official 340:28d1f895c6fe 1421 {
mbed_official 340:28d1f895c6fe 1422 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 1423 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 1424 }
mbed_official 340:28d1f895c6fe 1425 }
mbed_official 340:28d1f895c6fe 1426 }
mbed_official 340:28d1f895c6fe 1427 else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0))
mbed_official 340:28d1f895c6fe 1428 {
mbed_official 340:28d1f895c6fe 1429 /* Call TxCpltCallback if no stop mode is set */
mbed_official 340:28d1f895c6fe 1430 if(__HAL_SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
mbed_official 340:28d1f895c6fe 1431 {
mbed_official 340:28d1f895c6fe 1432 /* Call the corresponding callback to inform upper layer of End of Transfer */
mbed_official 340:28d1f895c6fe 1433 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 1434 {
mbed_official 340:28d1f895c6fe 1435 /* Disable Interrupt */
mbed_official 340:28d1f895c6fe 1436 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 1437 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1438 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1439
mbed_official 340:28d1f895c6fe 1440 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1441 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1442
mbed_official 340:28d1f895c6fe 1443 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1444 }
mbed_official 340:28d1f895c6fe 1445 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 1446 {
mbed_official 340:28d1f895c6fe 1447 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 1448 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1449 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1450
mbed_official 340:28d1f895c6fe 1451 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1452 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1453
mbed_official 340:28d1f895c6fe 1454 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1455 }
mbed_official 340:28d1f895c6fe 1456 }
mbed_official 340:28d1f895c6fe 1457 }
mbed_official 340:28d1f895c6fe 1458 }
mbed_official 340:28d1f895c6fe 1459 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
mbed_official 340:28d1f895c6fe 1460 {
mbed_official 340:28d1f895c6fe 1461 if(hsmbus->XferCount == 0)
mbed_official 340:28d1f895c6fe 1462 {
mbed_official 340:28d1f895c6fe 1463 /* Specific use case for Quick command */
mbed_official 441:d2c15dda23c1 1464 if(hsmbus->pBuffPtr == NULL)
mbed_official 340:28d1f895c6fe 1465 {
mbed_official 340:28d1f895c6fe 1466 /* Generate a Stop command */
mbed_official 340:28d1f895c6fe 1467 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
mbed_official 340:28d1f895c6fe 1468 }
mbed_official 340:28d1f895c6fe 1469 /* Call TxCpltCallback if no stop mode is set */
mbed_official 340:28d1f895c6fe 1470 else if(__HAL_SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
mbed_official 340:28d1f895c6fe 1471 {
mbed_official 340:28d1f895c6fe 1472 /* No Generate Stop, to permit restart mode */
mbed_official 340:28d1f895c6fe 1473 /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
mbed_official 340:28d1f895c6fe 1474
mbed_official 340:28d1f895c6fe 1475 /* Call the corresponding callback to inform upper layer of End of Transfer */
mbed_official 340:28d1f895c6fe 1476 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
mbed_official 340:28d1f895c6fe 1477 {
mbed_official 340:28d1f895c6fe 1478 /* Disable Interrupt */
mbed_official 340:28d1f895c6fe 1479 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 1480 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1481 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1482
mbed_official 340:28d1f895c6fe 1483 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1484 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1485
mbed_official 340:28d1f895c6fe 1486 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1487 }
mbed_official 340:28d1f895c6fe 1488 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
mbed_official 340:28d1f895c6fe 1489 {
mbed_official 340:28d1f895c6fe 1490 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 1491 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1492 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1493
mbed_official 340:28d1f895c6fe 1494 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1495 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1496
mbed_official 340:28d1f895c6fe 1497 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1498 }
mbed_official 340:28d1f895c6fe 1499 }
mbed_official 340:28d1f895c6fe 1500 }
mbed_official 340:28d1f895c6fe 1501 }
mbed_official 340:28d1f895c6fe 1502
mbed_official 340:28d1f895c6fe 1503 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1504 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1505
mbed_official 340:28d1f895c6fe 1506 return HAL_OK;
mbed_official 340:28d1f895c6fe 1507 }
mbed_official 340:28d1f895c6fe 1508 /**
mbed_official 340:28d1f895c6fe 1509 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode
mbed_official 340:28d1f895c6fe 1510 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1511 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1512 * @retval HAL status
mbed_official 340:28d1f895c6fe 1513 */
mbed_official 340:28d1f895c6fe 1514 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
mbed_official 340:28d1f895c6fe 1515 {
mbed_official 340:28d1f895c6fe 1516 uint8_t TransferDirection = 0;
mbed_official 340:28d1f895c6fe 1517 uint16_t SlaveAddrCode = 0;
mbed_official 340:28d1f895c6fe 1518
mbed_official 340:28d1f895c6fe 1519 /* Process Locked */
mbed_official 340:28d1f895c6fe 1520 __HAL_LOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1521
mbed_official 340:28d1f895c6fe 1522 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
mbed_official 340:28d1f895c6fe 1523 {
mbed_official 340:28d1f895c6fe 1524 /* Check that SMBUS transfer finished */
mbed_official 340:28d1f895c6fe 1525 /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
mbed_official 340:28d1f895c6fe 1526 /* Mean XferCount == 0*/
mbed_official 340:28d1f895c6fe 1527 /* So clear Flag NACKF only */
mbed_official 340:28d1f895c6fe 1528 if(hsmbus->XferCount == 0)
mbed_official 340:28d1f895c6fe 1529 {
mbed_official 340:28d1f895c6fe 1530 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 1531 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
mbed_official 340:28d1f895c6fe 1532
mbed_official 340:28d1f895c6fe 1533 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1534 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1535 }
mbed_official 340:28d1f895c6fe 1536 else
mbed_official 340:28d1f895c6fe 1537 {
mbed_official 340:28d1f895c6fe 1538 /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/
mbed_official 340:28d1f895c6fe 1539 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 1540 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
mbed_official 340:28d1f895c6fe 1541
mbed_official 340:28d1f895c6fe 1542 /* Set HAL State to "Idle" State, mean to LISTEN state */
mbed_official 340:28d1f895c6fe 1543 /* So reset Slave Busy state */
mbed_official 340:28d1f895c6fe 1544 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1545 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
mbed_official 340:28d1f895c6fe 1546 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
mbed_official 340:28d1f895c6fe 1547
mbed_official 340:28d1f895c6fe 1548 /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
mbed_official 340:28d1f895c6fe 1549 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 1550
mbed_official 340:28d1f895c6fe 1551 /* Set ErrorCode corresponding to a Non-Acknowledge */
mbed_official 340:28d1f895c6fe 1552 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
mbed_official 340:28d1f895c6fe 1553
mbed_official 340:28d1f895c6fe 1554 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1555 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1556
mbed_official 340:28d1f895c6fe 1557 /* Call the Error callback to prevent upper layer */
mbed_official 340:28d1f895c6fe 1558 HAL_SMBUS_ErrorCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1559 }
mbed_official 340:28d1f895c6fe 1560 }
mbed_official 340:28d1f895c6fe 1561 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
mbed_official 340:28d1f895c6fe 1562 {
mbed_official 340:28d1f895c6fe 1563 TransferDirection = __HAL_SMBUS_GET_DIR(hsmbus);
mbed_official 340:28d1f895c6fe 1564 SlaveAddrCode = __HAL_SMBUS_GET_ADDR_MATCH(hsmbus);
mbed_official 340:28d1f895c6fe 1565
mbed_official 340:28d1f895c6fe 1566 /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
mbed_official 340:28d1f895c6fe 1567 /* Other ADDRInterrupt will be treat in next Listen usecase */
mbed_official 340:28d1f895c6fe 1568 __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
mbed_official 340:28d1f895c6fe 1569
mbed_official 340:28d1f895c6fe 1570 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1571 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1572
mbed_official 340:28d1f895c6fe 1573 /* Call Slave Addr callback */
mbed_official 340:28d1f895c6fe 1574 HAL_SMBUS_SlaveAddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
mbed_official 340:28d1f895c6fe 1575 }
mbed_official 340:28d1f895c6fe 1576 else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
mbed_official 340:28d1f895c6fe 1577 {
mbed_official 340:28d1f895c6fe 1578 if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
mbed_official 340:28d1f895c6fe 1579 {
mbed_official 340:28d1f895c6fe 1580 /* Read data from RXDR */
mbed_official 340:28d1f895c6fe 1581 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
mbed_official 340:28d1f895c6fe 1582 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 1583 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 1584
mbed_official 340:28d1f895c6fe 1585 if(hsmbus->XferCount == 1)
mbed_official 340:28d1f895c6fe 1586 {
mbed_official 340:28d1f895c6fe 1587 /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
mbed_official 340:28d1f895c6fe 1588 /* or only the last Byte of Transfer */
mbed_official 340:28d1f895c6fe 1589 /* So reset the RELOAD bit mode */
mbed_official 340:28d1f895c6fe 1590 hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
mbed_official 340:28d1f895c6fe 1591 SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1592 }
mbed_official 340:28d1f895c6fe 1593 else if(hsmbus->XferCount == 0)
mbed_official 340:28d1f895c6fe 1594 {
mbed_official 340:28d1f895c6fe 1595 /* Last Byte is received, disable Interrupt */
mbed_official 340:28d1f895c6fe 1596 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
mbed_official 340:28d1f895c6fe 1597
mbed_official 340:28d1f895c6fe 1598 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
mbed_official 340:28d1f895c6fe 1599 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1600 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
mbed_official 340:28d1f895c6fe 1601
mbed_official 340:28d1f895c6fe 1602 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1603 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1604
mbed_official 340:28d1f895c6fe 1605 /* Call the Rx complete callback to inform upper layer of the end of receive process */
mbed_official 340:28d1f895c6fe 1606 HAL_SMBUS_SlaveRxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1607 }
mbed_official 340:28d1f895c6fe 1608 else
mbed_official 340:28d1f895c6fe 1609 {
mbed_official 340:28d1f895c6fe 1610 /* Set Reload for next Bytes */
mbed_official 340:28d1f895c6fe 1611 SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1612
mbed_official 340:28d1f895c6fe 1613 /* Ack last Byte Read */
mbed_official 340:28d1f895c6fe 1614 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1615 }
mbed_official 340:28d1f895c6fe 1616 }
mbed_official 340:28d1f895c6fe 1617 else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
mbed_official 340:28d1f895c6fe 1618 {
mbed_official 340:28d1f895c6fe 1619 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
mbed_official 340:28d1f895c6fe 1620 {
mbed_official 340:28d1f895c6fe 1621 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
mbed_official 340:28d1f895c6fe 1622 {
mbed_official 340:28d1f895c6fe 1623 SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1624 hsmbus->XferSize = MAX_NBYTE_SIZE;
mbed_official 340:28d1f895c6fe 1625 }
mbed_official 340:28d1f895c6fe 1626 else
mbed_official 340:28d1f895c6fe 1627 {
mbed_official 340:28d1f895c6fe 1628 hsmbus->XferSize = hsmbus->XferCount;
mbed_official 340:28d1f895c6fe 1629 SMBUS_TransferConfig(hsmbus, 0, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1630 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
mbed_official 340:28d1f895c6fe 1631 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
mbed_official 340:28d1f895c6fe 1632 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
mbed_official 340:28d1f895c6fe 1633 {
mbed_official 340:28d1f895c6fe 1634 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 1635 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 1636 }
mbed_official 340:28d1f895c6fe 1637 }
mbed_official 340:28d1f895c6fe 1638 }
mbed_official 340:28d1f895c6fe 1639 }
mbed_official 340:28d1f895c6fe 1640 }
mbed_official 340:28d1f895c6fe 1641 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
mbed_official 340:28d1f895c6fe 1642 {
mbed_official 340:28d1f895c6fe 1643 /* Write data to TXDR only if XferCount not reach "0" */
mbed_official 340:28d1f895c6fe 1644 /* A TXIS flag can be set, during STOP treatment */
mbed_official 340:28d1f895c6fe 1645 /* Check if all Datas have already been sent */
mbed_official 340:28d1f895c6fe 1646 /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
mbed_official 340:28d1f895c6fe 1647 if(hsmbus->XferCount > 0)
mbed_official 340:28d1f895c6fe 1648 {
mbed_official 340:28d1f895c6fe 1649 /* Write data to TXDR */
mbed_official 340:28d1f895c6fe 1650 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
mbed_official 340:28d1f895c6fe 1651 hsmbus->XferCount--;
mbed_official 340:28d1f895c6fe 1652 hsmbus->XferSize--;
mbed_official 340:28d1f895c6fe 1653 }
mbed_official 340:28d1f895c6fe 1654
mbed_official 340:28d1f895c6fe 1655 if(hsmbus->XferCount == 0)
mbed_official 340:28d1f895c6fe 1656 {
mbed_official 340:28d1f895c6fe 1657 /* Last Byte is Transmitted */
mbed_official 340:28d1f895c6fe 1658 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
mbed_official 340:28d1f895c6fe 1659 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 1660 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1661 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
mbed_official 340:28d1f895c6fe 1662
mbed_official 340:28d1f895c6fe 1663 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1664 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1665
mbed_official 340:28d1f895c6fe 1666 /* Call the Tx complete callback to inform upper layer of the end of transmit process */
mbed_official 340:28d1f895c6fe 1667 HAL_SMBUS_SlaveTxCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1668 }
mbed_official 340:28d1f895c6fe 1669 }
mbed_official 340:28d1f895c6fe 1670
mbed_official 340:28d1f895c6fe 1671 /* Check if STOPF is set */
mbed_official 340:28d1f895c6fe 1672 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
mbed_official 340:28d1f895c6fe 1673 {
mbed_official 340:28d1f895c6fe 1674 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 1675 {
mbed_official 340:28d1f895c6fe 1676 /* Disable RX and TX Interrupts */
mbed_official 340:28d1f895c6fe 1677 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
mbed_official 340:28d1f895c6fe 1678
mbed_official 340:28d1f895c6fe 1679 /* Disable ADDR Interrupt */
mbed_official 340:28d1f895c6fe 1680 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
mbed_official 340:28d1f895c6fe 1681
mbed_official 340:28d1f895c6fe 1682 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1683 hsmbus->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1684
mbed_official 340:28d1f895c6fe 1685 /* Clear Configuration Register 2 */
mbed_official 340:28d1f895c6fe 1686 __HAL_SMBUS_RESET_CR2(hsmbus);
mbed_official 340:28d1f895c6fe 1687
mbed_official 340:28d1f895c6fe 1688 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 1689 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 1690
mbed_official 340:28d1f895c6fe 1691 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 1692 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 1693
mbed_official 340:28d1f895c6fe 1694 hsmbus->XferOptions = 0;
mbed_official 340:28d1f895c6fe 1695 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1696 hsmbus->State = HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1697
mbed_official 340:28d1f895c6fe 1698 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1699 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1700
mbed_official 340:28d1f895c6fe 1701 /* Call the Listen Complete callback, to prevent upper layer of the end of Listen usecase */
mbed_official 340:28d1f895c6fe 1702 HAL_SMBUS_SlaveListenCpltCallback(hsmbus);
mbed_official 340:28d1f895c6fe 1703 }
mbed_official 340:28d1f895c6fe 1704 }
mbed_official 340:28d1f895c6fe 1705
mbed_official 340:28d1f895c6fe 1706 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1707 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1708
mbed_official 340:28d1f895c6fe 1709 return HAL_OK;
mbed_official 340:28d1f895c6fe 1710 }
mbed_official 340:28d1f895c6fe 1711 /**
mbed_official 340:28d1f895c6fe 1712 * @brief Manage the enabling of Interrupts
mbed_official 340:28d1f895c6fe 1713 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1714 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1715 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
mbed_official 340:28d1f895c6fe 1716 * @retval HAL status
mbed_official 340:28d1f895c6fe 1717 */
mbed_official 340:28d1f895c6fe 1718 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
mbed_official 340:28d1f895c6fe 1719 {
mbed_official 340:28d1f895c6fe 1720 uint32_t tmpisr = 0;
mbed_official 340:28d1f895c6fe 1721
mbed_official 340:28d1f895c6fe 1722 if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
mbed_official 340:28d1f895c6fe 1723 {
mbed_official 340:28d1f895c6fe 1724 /* Enable ERR interrupt */
mbed_official 340:28d1f895c6fe 1725 tmpisr |= SMBUS_IT_ERRI;
mbed_official 340:28d1f895c6fe 1726 }
mbed_official 340:28d1f895c6fe 1727
mbed_official 340:28d1f895c6fe 1728 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
mbed_official 340:28d1f895c6fe 1729 {
mbed_official 340:28d1f895c6fe 1730 /* Enable ADDR, STOP interrupt */
mbed_official 340:28d1f895c6fe 1731 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
mbed_official 340:28d1f895c6fe 1732 }
mbed_official 340:28d1f895c6fe 1733
mbed_official 340:28d1f895c6fe 1734 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
mbed_official 340:28d1f895c6fe 1735 {
mbed_official 340:28d1f895c6fe 1736 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
mbed_official 340:28d1f895c6fe 1737 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
mbed_official 340:28d1f895c6fe 1738 }
mbed_official 340:28d1f895c6fe 1739
mbed_official 340:28d1f895c6fe 1740 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
mbed_official 340:28d1f895c6fe 1741 {
mbed_official 340:28d1f895c6fe 1742 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 1743 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
mbed_official 340:28d1f895c6fe 1744 }
mbed_official 340:28d1f895c6fe 1745
mbed_official 340:28d1f895c6fe 1746 /* Enable interrupts only at the end */
mbed_official 340:28d1f895c6fe 1747 /* to avoid the risk of SMBUS interrupt handle execution before */
mbed_official 340:28d1f895c6fe 1748 /* all interrupts requested done */
mbed_official 340:28d1f895c6fe 1749 __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
mbed_official 340:28d1f895c6fe 1750
mbed_official 340:28d1f895c6fe 1751 return HAL_OK;
mbed_official 340:28d1f895c6fe 1752 }
mbed_official 340:28d1f895c6fe 1753 /**
mbed_official 340:28d1f895c6fe 1754 * @brief Manage the disabling of Interrupts
mbed_official 340:28d1f895c6fe 1755 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1756 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1757 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
mbed_official 340:28d1f895c6fe 1758 * @retval HAL status
mbed_official 340:28d1f895c6fe 1759 */
mbed_official 340:28d1f895c6fe 1760 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
mbed_official 340:28d1f895c6fe 1761 {
mbed_official 340:28d1f895c6fe 1762 uint32_t tmpisr = 0;
mbed_official 340:28d1f895c6fe 1763
mbed_official 340:28d1f895c6fe 1764 if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
mbed_official 340:28d1f895c6fe 1765 {
mbed_official 340:28d1f895c6fe 1766 /* Disable ERR interrupt */
mbed_official 340:28d1f895c6fe 1767 tmpisr |= SMBUS_IT_ERRI;
mbed_official 340:28d1f895c6fe 1768 }
mbed_official 340:28d1f895c6fe 1769
mbed_official 340:28d1f895c6fe 1770 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
mbed_official 340:28d1f895c6fe 1771 {
mbed_official 340:28d1f895c6fe 1772 /* Disable TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 1773 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
mbed_official 340:28d1f895c6fe 1774
mbed_official 340:28d1f895c6fe 1775 if((__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
mbed_official 340:28d1f895c6fe 1776 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
mbed_official 340:28d1f895c6fe 1777 {
mbed_official 340:28d1f895c6fe 1778 /* Disable ERR interrupt */
mbed_official 340:28d1f895c6fe 1779 tmpisr |= SMBUS_IT_ERRI;
mbed_official 340:28d1f895c6fe 1780 }
mbed_official 340:28d1f895c6fe 1781
mbed_official 340:28d1f895c6fe 1782 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 1783 {
mbed_official 340:28d1f895c6fe 1784 /* Disable STOPI, NACKI */
mbed_official 340:28d1f895c6fe 1785 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
mbed_official 340:28d1f895c6fe 1786 }
mbed_official 340:28d1f895c6fe 1787 }
mbed_official 340:28d1f895c6fe 1788
mbed_official 340:28d1f895c6fe 1789 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
mbed_official 340:28d1f895c6fe 1790 {
mbed_official 340:28d1f895c6fe 1791 /* Disable TC, STOP, NACK, RXI interrupt */
mbed_official 340:28d1f895c6fe 1792 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
mbed_official 340:28d1f895c6fe 1793
mbed_official 340:28d1f895c6fe 1794 if((__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
mbed_official 340:28d1f895c6fe 1795 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
mbed_official 340:28d1f895c6fe 1796 {
mbed_official 340:28d1f895c6fe 1797 /* Disable ERR interrupt */
mbed_official 340:28d1f895c6fe 1798 tmpisr |= SMBUS_IT_ERRI;
mbed_official 340:28d1f895c6fe 1799 }
mbed_official 340:28d1f895c6fe 1800
mbed_official 340:28d1f895c6fe 1801 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
mbed_official 340:28d1f895c6fe 1802 {
mbed_official 340:28d1f895c6fe 1803 /* Disable STOPI, NACKI */
mbed_official 340:28d1f895c6fe 1804 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
mbed_official 340:28d1f895c6fe 1805 }
mbed_official 340:28d1f895c6fe 1806 }
mbed_official 340:28d1f895c6fe 1807
mbed_official 340:28d1f895c6fe 1808 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
mbed_official 340:28d1f895c6fe 1809 {
mbed_official 340:28d1f895c6fe 1810 /* Enable ADDR, STOP interrupt */
mbed_official 340:28d1f895c6fe 1811 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
mbed_official 340:28d1f895c6fe 1812
mbed_official 340:28d1f895c6fe 1813 if(__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
mbed_official 340:28d1f895c6fe 1814 {
mbed_official 340:28d1f895c6fe 1815 /* Disable ERR interrupt */
mbed_official 340:28d1f895c6fe 1816 tmpisr |= SMBUS_IT_ERRI;
mbed_official 340:28d1f895c6fe 1817 }
mbed_official 340:28d1f895c6fe 1818 }
mbed_official 340:28d1f895c6fe 1819
mbed_official 340:28d1f895c6fe 1820 /* Disable interrupts only at the end */
mbed_official 340:28d1f895c6fe 1821 /* to avoid a breaking situation like at "t" time */
mbed_official 340:28d1f895c6fe 1822 /* all disable interrupts request are not done */
mbed_official 340:28d1f895c6fe 1823 __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
mbed_official 340:28d1f895c6fe 1824
mbed_official 340:28d1f895c6fe 1825 return HAL_OK;
mbed_official 340:28d1f895c6fe 1826 }
mbed_official 340:28d1f895c6fe 1827 /**
mbed_official 340:28d1f895c6fe 1828 * @brief This function handles SMBUS Communication Timeout.
mbed_official 340:28d1f895c6fe 1829 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1830 * the configuration information for the specified SMBUS.
mbed_official 340:28d1f895c6fe 1831 * @param Flag: specifies the SMBUS flag to check.
mbed_official 340:28d1f895c6fe 1832 * @param Status: The new Flag status (SET or RESET).
mbed_official 340:28d1f895c6fe 1833 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 1834 * @retval HAL status
mbed_official 340:28d1f895c6fe 1835 */
mbed_official 340:28d1f895c6fe 1836 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 1837 {
mbed_official 340:28d1f895c6fe 1838 uint32_t tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 1839
mbed_official 340:28d1f895c6fe 1840 /* Wait until flag is set */
mbed_official 340:28d1f895c6fe 1841 if(Status == RESET)
mbed_official 340:28d1f895c6fe 1842 {
mbed_official 340:28d1f895c6fe 1843 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
mbed_official 340:28d1f895c6fe 1844 {
mbed_official 340:28d1f895c6fe 1845 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 1846 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 1847 {
mbed_official 340:28d1f895c6fe 1848 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 1849 {
mbed_official 340:28d1f895c6fe 1850 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1851 hsmbus->State= HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1852
mbed_official 340:28d1f895c6fe 1853 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1854 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1855
mbed_official 340:28d1f895c6fe 1856 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1857 }
mbed_official 340:28d1f895c6fe 1858 }
mbed_official 340:28d1f895c6fe 1859 }
mbed_official 340:28d1f895c6fe 1860 }
mbed_official 340:28d1f895c6fe 1861 else
mbed_official 340:28d1f895c6fe 1862 {
mbed_official 340:28d1f895c6fe 1863 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
mbed_official 340:28d1f895c6fe 1864 {
mbed_official 340:28d1f895c6fe 1865 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 1866 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 1867 {
mbed_official 340:28d1f895c6fe 1868 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 1869 {
mbed_official 340:28d1f895c6fe 1870 hsmbus->PreviousState = hsmbus->State;
mbed_official 340:28d1f895c6fe 1871 hsmbus->State= HAL_SMBUS_STATE_READY;
mbed_official 340:28d1f895c6fe 1872
mbed_official 340:28d1f895c6fe 1873 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1874 __HAL_UNLOCK(hsmbus);
mbed_official 340:28d1f895c6fe 1875
mbed_official 340:28d1f895c6fe 1876 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1877 }
mbed_official 340:28d1f895c6fe 1878 }
mbed_official 340:28d1f895c6fe 1879 }
mbed_official 340:28d1f895c6fe 1880 }
mbed_official 340:28d1f895c6fe 1881 return HAL_OK;
mbed_official 340:28d1f895c6fe 1882 }
mbed_official 340:28d1f895c6fe 1883
mbed_official 340:28d1f895c6fe 1884 /**
mbed_official 340:28d1f895c6fe 1885 * @brief Handles SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
mbed_official 340:28d1f895c6fe 1886 * @param hsmbus: SMBUS handle.
mbed_official 340:28d1f895c6fe 1887 * @param DevAddress: specifies the slave address to be programmed.
mbed_official 340:28d1f895c6fe 1888 * @param Size: specifies the number of bytes to be programmed.
mbed_official 340:28d1f895c6fe 1889 * This parameter must be a value between 0 and 255.
mbed_official 340:28d1f895c6fe 1890 * @param Mode: new state of the SMBUS START condition generation.
mbed_official 340:28d1f895c6fe 1891 * This parameter can be one or a combination of the following values:
mbed_official 340:28d1f895c6fe 1892 * @arg SMBUS_NO_MODE: No specific mode enabled.
mbed_official 340:28d1f895c6fe 1893 * @arg SMBUS_RELOAD_MODE: Enable Reload mode.
mbed_official 340:28d1f895c6fe 1894 * @arg SMBUS_AUTOEND_MODE: Enable Automatic end mode.
mbed_official 340:28d1f895c6fe 1895 * @arg SMBUS_SOFTEND_MODE: Enable Software end mode and Reload mode.
mbed_official 340:28d1f895c6fe 1896 * @param Request: new state of the SMBUS START condition generation.
mbed_official 340:28d1f895c6fe 1897 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 1898 * @arg SMBUS_NO_STARTSTOP: Don't Generate stop and start condition.
mbed_official 340:28d1f895c6fe 1899 * @arg SMBUS_GENERATE_STOP: Generate stop condition (Size should be set to 0).
mbed_official 340:28d1f895c6fe 1900 * @arg SMBUS_GENERATE_START_READ: Generate Restart for read request.
mbed_official 340:28d1f895c6fe 1901 * @arg SMBUS_GENERATE_START_WRITE: Generate Restart for write request.
mbed_official 340:28d1f895c6fe 1902 * @retval None
mbed_official 340:28d1f895c6fe 1903 */
mbed_official 340:28d1f895c6fe 1904 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
mbed_official 340:28d1f895c6fe 1905 {
mbed_official 340:28d1f895c6fe 1906 uint32_t tmpreg = 0;
mbed_official 340:28d1f895c6fe 1907
mbed_official 340:28d1f895c6fe 1908 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1909 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
mbed_official 340:28d1f895c6fe 1910 assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
mbed_official 340:28d1f895c6fe 1911 assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
mbed_official 340:28d1f895c6fe 1912
mbed_official 340:28d1f895c6fe 1913 /* Get the CR2 register value */
mbed_official 340:28d1f895c6fe 1914 tmpreg = hsmbus->Instance->CR2;
mbed_official 340:28d1f895c6fe 1915
mbed_official 340:28d1f895c6fe 1916 /* clear tmpreg specific bits */
mbed_official 340:28d1f895c6fe 1917 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
mbed_official 340:28d1f895c6fe 1918
mbed_official 340:28d1f895c6fe 1919 /* update tmpreg */
mbed_official 340:28d1f895c6fe 1920 tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
mbed_official 340:28d1f895c6fe 1921 (uint32_t)Mode | (uint32_t)Request);
mbed_official 340:28d1f895c6fe 1922
mbed_official 340:28d1f895c6fe 1923 /* update CR2 register */
mbed_official 340:28d1f895c6fe 1924 hsmbus->Instance->CR2 = tmpreg;
mbed_official 340:28d1f895c6fe 1925 }
mbed_official 340:28d1f895c6fe 1926 /**
mbed_official 340:28d1f895c6fe 1927 * @}
mbed_official 340:28d1f895c6fe 1928 */
mbed_official 340:28d1f895c6fe 1929
mbed_official 340:28d1f895c6fe 1930 #endif /* HAL_SMBUS_MODULE_ENABLED */
mbed_official 340:28d1f895c6fe 1931 /**
mbed_official 340:28d1f895c6fe 1932 * @}
mbed_official 340:28d1f895c6fe 1933 */
mbed_official 340:28d1f895c6fe 1934
mbed_official 340:28d1f895c6fe 1935 /**
mbed_official 340:28d1f895c6fe 1936 * @}
mbed_official 340:28d1f895c6fe 1937 */
mbed_official 340:28d1f895c6fe 1938
mbed_official 340:28d1f895c6fe 1939 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/