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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_dac_ex.c@445:9a3ffe6cfa19, 2015-01-14 (annotated)

Committer:
moirans2
Date:
Wed Jan 14 20:53:08 2015 +0000
Revision:
445:9a3ffe6cfa19
Parent:
441:d2c15dda23c1 
internal clock stm32L051

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_dac_ex.c
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 441:d2c15dda23c1 5 * @version V1.2.0
mbed_official 441:d2c15dda23c1 6 * @date 11-December-2014
mbed_official 340:28d1f895c6fe 7 * @brief DAC HAL module driver.
mbed_official 340:28d1f895c6fe 8 * This file provides firmware functions to manage the following
mbed_official 340:28d1f895c6fe 9 * functionalities of DAC extension peripheral:
mbed_official 340:28d1f895c6fe 10 * + Extended features functions
mbed_official 340:28d1f895c6fe 11 *
mbed_official 340:28d1f895c6fe 12 *
mbed_official 340:28d1f895c6fe 13 @verbatim
mbed_official 340:28d1f895c6fe 14 ==============================================================================
mbed_official 340:28d1f895c6fe 15 ##### How to use this driver #####
mbed_official 340:28d1f895c6fe 16 ==============================================================================
mbed_official 340:28d1f895c6fe 17 [..]
mbed_official 340:28d1f895c6fe 18 (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
mbed_official 340:28d1f895c6fe 19 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
mbed_official 340:28d1f895c6fe 20 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
mbed_official 340:28d1f895c6fe 21 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
mbed_official 340:28d1f895c6fe 22 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
mbed_official 340:28d1f895c6fe 23
mbed_official 340:28d1f895c6fe 24 @endverbatim
mbed_official 340:28d1f895c6fe 25 ******************************************************************************
mbed_official 340:28d1f895c6fe 26 * @attention
mbed_official 340:28d1f895c6fe 27 *
mbed_official 340:28d1f895c6fe 28 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 29 *
mbed_official 340:28d1f895c6fe 30 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 31 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 32 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 33 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 34 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 35 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 36 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 38 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 39 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 40 *
mbed_official 340:28d1f895c6fe 41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 51 *
mbed_official 340:28d1f895c6fe 52 ******************************************************************************
mbed_official 340:28d1f895c6fe 53 */
mbed_official 340:28d1f895c6fe 54
mbed_official 340:28d1f895c6fe 55
mbed_official 340:28d1f895c6fe 56 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 57 #include "stm32f0xx_hal.h"
mbed_official 340:28d1f895c6fe 58
mbed_official 441:d2c15dda23c1 59 #ifdef HAL_DAC_MODULE_ENABLED
mbed_official 441:d2c15dda23c1 60
mbed_official 441:d2c15dda23c1 61 #if defined(STM32F051x8) || defined(STM32F058xx) || \
mbed_official 441:d2c15dda23c1 62 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 441:d2c15dda23c1 63 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 441:d2c15dda23c1 64
mbed_official 340:28d1f895c6fe 65 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 66 * @{
mbed_official 340:28d1f895c6fe 67 */
mbed_official 340:28d1f895c6fe 68
mbed_official 340:28d1f895c6fe 69 /** @defgroup DACEx DACEx Extended HAL module driver
mbed_official 340:28d1f895c6fe 70 * @brief DACEx driver module
mbed_official 340:28d1f895c6fe 71 * @{
mbed_official 340:28d1f895c6fe 72 */
mbed_official 340:28d1f895c6fe 73
mbed_official 340:28d1f895c6fe 74 /* Private typedef -----------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 75 /* Private define ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 76 /* Private macro -------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 77 /* Private variables ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 78 /* Private function prototypes -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 79 /* Private functions ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 80 /** @defgroup DACEx_Private_Functions DACEx Private Functions
mbed_official 340:28d1f895c6fe 81 * @{
mbed_official 340:28d1f895c6fe 82 */
mbed_official 340:28d1f895c6fe 83 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 84 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 85 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 86 /**
mbed_official 340:28d1f895c6fe 87 * @}
mbed_official 340:28d1f895c6fe 88 */
mbed_official 340:28d1f895c6fe 89
mbed_official 340:28d1f895c6fe 90 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
mbed_official 340:28d1f895c6fe 91 * @{
mbed_official 340:28d1f895c6fe 92 */
mbed_official 340:28d1f895c6fe 93
mbed_official 340:28d1f895c6fe 94 /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
mbed_official 340:28d1f895c6fe 95 * @brief Extended features functions
mbed_official 340:28d1f895c6fe 96 *
mbed_official 340:28d1f895c6fe 97 @verbatim
mbed_official 340:28d1f895c6fe 98 ==============================================================================
mbed_official 340:28d1f895c6fe 99 ##### Extended features functions #####
mbed_official 340:28d1f895c6fe 100 ==============================================================================
mbed_official 340:28d1f895c6fe 101 [..] This section provides functions allowing to:
mbed_official 340:28d1f895c6fe 102 (+) Start conversion.
mbed_official 340:28d1f895c6fe 103 (+) Stop conversion.
mbed_official 340:28d1f895c6fe 104 (+) Start conversion and enable DMA transfer.
mbed_official 340:28d1f895c6fe 105 (+) Stop conversion and disable DMA transfer.
mbed_official 340:28d1f895c6fe 106 (+) Get result of conversion.
mbed_official 340:28d1f895c6fe 107 (+) Get result of dual mode conversion.
mbed_official 340:28d1f895c6fe 108
mbed_official 340:28d1f895c6fe 109 @endverbatim
mbed_official 340:28d1f895c6fe 110 * @{
mbed_official 340:28d1f895c6fe 111 */
mbed_official 340:28d1f895c6fe 112
mbed_official 340:28d1f895c6fe 113 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 114 /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 115 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 116
mbed_official 340:28d1f895c6fe 117 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 118 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 119
mbed_official 340:28d1f895c6fe 120 /**
mbed_official 340:28d1f895c6fe 121 * @brief Configures the selected DAC channel.
mbed_official 340:28d1f895c6fe 122 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 123 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 124 * @param sConfig: DAC configuration structure.
mbed_official 340:28d1f895c6fe 125 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 126 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 127 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 128 * @arg DAC_CHANNEL_2: DAC Channel2 selected
mbed_official 340:28d1f895c6fe 129 * @retval HAL status
mbed_official 340:28d1f895c6fe 130 */
mbed_official 340:28d1f895c6fe 131 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
mbed_official 340:28d1f895c6fe 132 {
mbed_official 340:28d1f895c6fe 133 uint32_t tmpreg1 = 0, tmpreg2 = 0;
mbed_official 340:28d1f895c6fe 134
mbed_official 340:28d1f895c6fe 135 /* Check the DAC parameters */
mbed_official 340:28d1f895c6fe 136 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
mbed_official 340:28d1f895c6fe 137 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
mbed_official 340:28d1f895c6fe 138 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
mbed_official 340:28d1f895c6fe 139 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 140
mbed_official 340:28d1f895c6fe 141 /* Process locked */
mbed_official 340:28d1f895c6fe 142 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 143
mbed_official 340:28d1f895c6fe 144 /* Change DAC state */
mbed_official 340:28d1f895c6fe 145 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 146
mbed_official 340:28d1f895c6fe 147 /* Get the DAC CR value */
mbed_official 340:28d1f895c6fe 148 tmpreg1 = DAC->CR;
mbed_official 340:28d1f895c6fe 149 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
mbed_official 340:28d1f895c6fe 150 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
mbed_official 340:28d1f895c6fe 151 /* Configure for the selected DAC channel: buffer output, trigger */
mbed_official 340:28d1f895c6fe 152 /* Set TSELx and TENx bits according to DAC_Trigger value */
mbed_official 340:28d1f895c6fe 153 /* Set BOFFx bit according to DAC_OutputBuffer value */
mbed_official 340:28d1f895c6fe 154 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
mbed_official 340:28d1f895c6fe 155 /* Calculate CR register value depending on DAC_Channel */
mbed_official 340:28d1f895c6fe 156 tmpreg1 |= tmpreg2 << Channel;
mbed_official 340:28d1f895c6fe 157 /* Write to DAC CR */
mbed_official 340:28d1f895c6fe 158 DAC->CR = tmpreg1;
mbed_official 340:28d1f895c6fe 159 /* Disable wave generation */
mbed_official 340:28d1f895c6fe 160 DAC->CR &= ~(DAC_CR_WAVE1 << Channel);
mbed_official 340:28d1f895c6fe 161
mbed_official 340:28d1f895c6fe 162 /* Change DAC state */
mbed_official 340:28d1f895c6fe 163 hdac->State = HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 164
mbed_official 340:28d1f895c6fe 165 /* Process unlocked */
mbed_official 340:28d1f895c6fe 166 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 167
mbed_official 340:28d1f895c6fe 168 /* Return function status */
mbed_official 340:28d1f895c6fe 169 return HAL_OK;
mbed_official 340:28d1f895c6fe 170 }
mbed_official 340:28d1f895c6fe 171
mbed_official 340:28d1f895c6fe 172 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 173 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 174
mbed_official 340:28d1f895c6fe 175 #if defined (STM32F051x8) || defined (STM32F058xx)
mbed_official 340:28d1f895c6fe 176
mbed_official 340:28d1f895c6fe 177 /**
mbed_official 340:28d1f895c6fe 178 * @brief Configures the selected DAC channel.
mbed_official 340:28d1f895c6fe 179 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 180 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 181 * @param sConfig: DAC configuration structure.
mbed_official 340:28d1f895c6fe 182 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 183 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 184 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 185 * @retval HAL status
mbed_official 340:28d1f895c6fe 186 */
mbed_official 340:28d1f895c6fe 187 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
mbed_official 340:28d1f895c6fe 188 {
mbed_official 340:28d1f895c6fe 189 uint32_t tmpreg1 = 0, tmpreg2 = 0;
mbed_official 340:28d1f895c6fe 190
mbed_official 340:28d1f895c6fe 191 /* Check the DAC parameters */
mbed_official 340:28d1f895c6fe 192 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
mbed_official 340:28d1f895c6fe 193 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
mbed_official 340:28d1f895c6fe 194 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
mbed_official 340:28d1f895c6fe 195 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 196
mbed_official 340:28d1f895c6fe 197 /* Process locked */
mbed_official 340:28d1f895c6fe 198 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 199
mbed_official 340:28d1f895c6fe 200 /* Change DAC state */
mbed_official 340:28d1f895c6fe 201 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 202
mbed_official 340:28d1f895c6fe 203 /* Get the DAC CR value */
mbed_official 340:28d1f895c6fe 204 tmpreg1 = DAC->CR;
mbed_official 340:28d1f895c6fe 205 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
mbed_official 340:28d1f895c6fe 206 // tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
mbed_official 340:28d1f895c6fe 207 tmpreg1 &= ~(((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
mbed_official 340:28d1f895c6fe 208 /* Configure for the selected DAC channel: buffer output, trigger */
mbed_official 340:28d1f895c6fe 209 /* Set TSELx and TENx bits according to DAC_Trigger value */
mbed_official 340:28d1f895c6fe 210 /* Set BOFFx bit according to DAC_OutputBuffer value */
mbed_official 340:28d1f895c6fe 211 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
mbed_official 340:28d1f895c6fe 212 /* Calculate CR register value depending on DAC_Channel */
mbed_official 340:28d1f895c6fe 213 tmpreg1 |= tmpreg2 << Channel;
mbed_official 340:28d1f895c6fe 214 /* Write to DAC CR */
mbed_official 340:28d1f895c6fe 215 DAC->CR = tmpreg1;
mbed_official 340:28d1f895c6fe 216 /* Disable wave generation */
mbed_official 340:28d1f895c6fe 217 // DAC->CR &= ~(DAC_CR_WAVE1 << Channel);
mbed_official 340:28d1f895c6fe 218
mbed_official 340:28d1f895c6fe 219 /* Change DAC state */
mbed_official 340:28d1f895c6fe 220 hdac->State = HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 221
mbed_official 340:28d1f895c6fe 222 /* Process unlocked */
mbed_official 340:28d1f895c6fe 223 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 224
mbed_official 340:28d1f895c6fe 225 /* Return function status */
mbed_official 340:28d1f895c6fe 226 return HAL_OK;
mbed_official 340:28d1f895c6fe 227 }
mbed_official 340:28d1f895c6fe 228
mbed_official 340:28d1f895c6fe 229 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 230
mbed_official 340:28d1f895c6fe 231 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 232 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 233 /* DAC 1 has 2 channels 1 & 2 */
mbed_official 340:28d1f895c6fe 234
mbed_official 340:28d1f895c6fe 235 /**
mbed_official 340:28d1f895c6fe 236 * @brief Returns the last data output value of the selected DAC channel.
mbed_official 340:28d1f895c6fe 237 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 238 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 239 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 240 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 241 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 242 * @arg DAC_CHANNEL_2: DAC Channel2 selected
mbed_official 340:28d1f895c6fe 243 * @retval The selected DAC channel data output value.
mbed_official 340:28d1f895c6fe 244 */
mbed_official 340:28d1f895c6fe 245 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
mbed_official 340:28d1f895c6fe 246 {
mbed_official 340:28d1f895c6fe 247 /* Check the parameters */
mbed_official 340:28d1f895c6fe 248 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 249
mbed_official 340:28d1f895c6fe 250 /* Returns the DAC channel data output register value */
mbed_official 340:28d1f895c6fe 251 if(Channel == DAC_CHANNEL_1)
mbed_official 340:28d1f895c6fe 252 {
mbed_official 340:28d1f895c6fe 253 return hdac->Instance->DOR1;
mbed_official 340:28d1f895c6fe 254 }
mbed_official 340:28d1f895c6fe 255 else
mbed_official 340:28d1f895c6fe 256 {
mbed_official 340:28d1f895c6fe 257 return hdac->Instance->DOR2;
mbed_official 340:28d1f895c6fe 258 }
mbed_official 340:28d1f895c6fe 259 }
mbed_official 340:28d1f895c6fe 260
mbed_official 340:28d1f895c6fe 261 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 262 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 263
mbed_official 340:28d1f895c6fe 264 #if defined (STM32F051x8) || defined (STM32F058xx)
mbed_official 340:28d1f895c6fe 265
mbed_official 340:28d1f895c6fe 266 /* DAC 1 has 1 channels */
mbed_official 340:28d1f895c6fe 267
mbed_official 340:28d1f895c6fe 268 /**
mbed_official 340:28d1f895c6fe 269 * @brief Returns the last data output value of the selected DAC channel.
mbed_official 340:28d1f895c6fe 270 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 271 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 272 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 273 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 274 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 275 * @retval The selected DAC channel data output value.
mbed_official 340:28d1f895c6fe 276 */
mbed_official 340:28d1f895c6fe 277 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
mbed_official 340:28d1f895c6fe 278 {
mbed_official 340:28d1f895c6fe 279 /* Check the parameters */
mbed_official 340:28d1f895c6fe 280 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 281
mbed_official 340:28d1f895c6fe 282 /* Returns the DAC channel data output register value */
mbed_official 340:28d1f895c6fe 283 return hdac->Instance->DOR1;
mbed_official 340:28d1f895c6fe 284 }
mbed_official 340:28d1f895c6fe 285
mbed_official 340:28d1f895c6fe 286
mbed_official 340:28d1f895c6fe 287
mbed_official 340:28d1f895c6fe 288 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 289
mbed_official 340:28d1f895c6fe 290 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 291 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 292
mbed_official 340:28d1f895c6fe 293 /**
mbed_official 340:28d1f895c6fe 294 * @brief Enables DAC and starts conversion of channel.
mbed_official 340:28d1f895c6fe 295 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 296 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 297 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 298 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 299 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 300 * @arg DAC_CHANNEL_2: DAC Channel2 selected
mbed_official 340:28d1f895c6fe 301 * @retval HAL status
mbed_official 340:28d1f895c6fe 302 */
mbed_official 340:28d1f895c6fe 303 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
mbed_official 340:28d1f895c6fe 304 {
mbed_official 340:28d1f895c6fe 305 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 340:28d1f895c6fe 306
mbed_official 340:28d1f895c6fe 307 /* Check the parameters */
mbed_official 340:28d1f895c6fe 308 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 309
mbed_official 340:28d1f895c6fe 310 /* Process locked */
mbed_official 340:28d1f895c6fe 311 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 312
mbed_official 340:28d1f895c6fe 313 /* Change DAC state */
mbed_official 340:28d1f895c6fe 314 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 315
mbed_official 340:28d1f895c6fe 316 /* Enable the Peripharal */
mbed_official 340:28d1f895c6fe 317 __HAL_DAC_ENABLE(hdac, Channel);
mbed_official 340:28d1f895c6fe 318
mbed_official 340:28d1f895c6fe 319 if(Channel == DAC_CHANNEL_1)
mbed_official 340:28d1f895c6fe 320 {
mbed_official 340:28d1f895c6fe 321 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
mbed_official 340:28d1f895c6fe 322 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
mbed_official 340:28d1f895c6fe 323 /* Check if software trigger enabled */
mbed_official 340:28d1f895c6fe 324 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
mbed_official 340:28d1f895c6fe 325 {
mbed_official 340:28d1f895c6fe 326 /* Enable the selected DAC software conversion */
mbed_official 340:28d1f895c6fe 327 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1;
mbed_official 340:28d1f895c6fe 328 }
mbed_official 340:28d1f895c6fe 329 }
mbed_official 340:28d1f895c6fe 330 else
mbed_official 340:28d1f895c6fe 331 {
mbed_official 340:28d1f895c6fe 332 tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
mbed_official 340:28d1f895c6fe 333 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
mbed_official 340:28d1f895c6fe 334 /* Check if software trigger enabled */
mbed_official 340:28d1f895c6fe 335 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
mbed_official 340:28d1f895c6fe 336 {
mbed_official 340:28d1f895c6fe 337 /* Enable the selected DAC software conversion*/
mbed_official 340:28d1f895c6fe 338 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2;
mbed_official 340:28d1f895c6fe 339 }
mbed_official 340:28d1f895c6fe 340 }
mbed_official 340:28d1f895c6fe 341
mbed_official 340:28d1f895c6fe 342 /* Change DAC state */
mbed_official 340:28d1f895c6fe 343 hdac->State = HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 344
mbed_official 340:28d1f895c6fe 345 /* Process unlocked */
mbed_official 340:28d1f895c6fe 346 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 347
mbed_official 340:28d1f895c6fe 348 /* Return function status */
mbed_official 340:28d1f895c6fe 349 return HAL_OK;
mbed_official 340:28d1f895c6fe 350 }
mbed_official 340:28d1f895c6fe 351
mbed_official 340:28d1f895c6fe 352 /**
mbed_official 340:28d1f895c6fe 353 * @brief Enables DAC and starts conversion of channel.
mbed_official 340:28d1f895c6fe 354 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 355 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 356 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 357 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 358 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 359 * @arg DAC_CHANNEL_2: DAC Channel2 selected
mbed_official 340:28d1f895c6fe 360 * @param pData: The destination peripheral Buffer address.
mbed_official 340:28d1f895c6fe 361 * @param Length: The length of data to be transferred from memory to DAC peripheral
mbed_official 340:28d1f895c6fe 362 * @param Alignment: Specifies the data alignment for DAC channel.
mbed_official 340:28d1f895c6fe 363 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 364 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
mbed_official 340:28d1f895c6fe 365 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
mbed_official 340:28d1f895c6fe 366 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
mbed_official 340:28d1f895c6fe 367 * @retval HAL status
mbed_official 340:28d1f895c6fe 368 */
mbed_official 340:28d1f895c6fe 369 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
mbed_official 340:28d1f895c6fe 370 {
mbed_official 340:28d1f895c6fe 371 uint32_t tmpreg = 0;
mbed_official 340:28d1f895c6fe 372
mbed_official 340:28d1f895c6fe 373 /* Check the parameters */
mbed_official 340:28d1f895c6fe 374 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 375 assert_param(IS_DAC_ALIGN(Alignment));
mbed_official 340:28d1f895c6fe 376
mbed_official 340:28d1f895c6fe 377 /* Process locked */
mbed_official 340:28d1f895c6fe 378 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 379
mbed_official 340:28d1f895c6fe 380 /* Change DAC state */
mbed_official 340:28d1f895c6fe 381 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 382
mbed_official 340:28d1f895c6fe 383 if(Channel == DAC_CHANNEL_1)
mbed_official 340:28d1f895c6fe 384 {
mbed_official 340:28d1f895c6fe 385 /* Set the DMA transfer complete callback for channel1 */
mbed_official 340:28d1f895c6fe 386 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
mbed_official 340:28d1f895c6fe 387
mbed_official 340:28d1f895c6fe 388 /* Set the DMA half transfer complete callback for channel1 */
mbed_official 340:28d1f895c6fe 389 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
mbed_official 340:28d1f895c6fe 390
mbed_official 340:28d1f895c6fe 391 /* Set the DMA error callback for channel1 */
mbed_official 340:28d1f895c6fe 392 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
mbed_official 340:28d1f895c6fe 393
mbed_official 340:28d1f895c6fe 394 /* Enable the selected DAC channel1 DMA request */
mbed_official 340:28d1f895c6fe 395 hdac->Instance->CR |= DAC_CR_DMAEN1;
mbed_official 340:28d1f895c6fe 396
mbed_official 340:28d1f895c6fe 397 /* Case of use of channel 1 */
mbed_official 340:28d1f895c6fe 398 switch(Alignment)
mbed_official 340:28d1f895c6fe 399 {
mbed_official 340:28d1f895c6fe 400 case DAC_ALIGN_12B_R:
mbed_official 340:28d1f895c6fe 401 /* Get DHR12R1 address */
mbed_official 340:28d1f895c6fe 402 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
mbed_official 340:28d1f895c6fe 403 break;
mbed_official 340:28d1f895c6fe 404 case DAC_ALIGN_12B_L:
mbed_official 340:28d1f895c6fe 405 /* Get DHR12L1 address */
mbed_official 340:28d1f895c6fe 406 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
mbed_official 340:28d1f895c6fe 407 break;
mbed_official 340:28d1f895c6fe 408 case DAC_ALIGN_8B_R:
mbed_official 340:28d1f895c6fe 409 /* Get DHR8R1 address */
mbed_official 340:28d1f895c6fe 410 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
mbed_official 340:28d1f895c6fe 411 break;
mbed_official 340:28d1f895c6fe 412 default:
mbed_official 340:28d1f895c6fe 413 break;
mbed_official 340:28d1f895c6fe 414 }
mbed_official 340:28d1f895c6fe 415 }
mbed_official 340:28d1f895c6fe 416 else
mbed_official 340:28d1f895c6fe 417 {
mbed_official 340:28d1f895c6fe 418 /* Set the DMA transfer complete callback for channel2 */
mbed_official 340:28d1f895c6fe 419 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
mbed_official 340:28d1f895c6fe 420
mbed_official 340:28d1f895c6fe 421 /* Set the DMA half transfer complete callback for channel2 */
mbed_official 340:28d1f895c6fe 422 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
mbed_official 340:28d1f895c6fe 423
mbed_official 340:28d1f895c6fe 424 /* Set the DMA error callback for channel2 */
mbed_official 340:28d1f895c6fe 425 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
mbed_official 340:28d1f895c6fe 426
mbed_official 340:28d1f895c6fe 427 /* Enable the selected DAC channel2 DMA request */
mbed_official 340:28d1f895c6fe 428 hdac->Instance->CR |= DAC_CR_DMAEN2;
mbed_official 340:28d1f895c6fe 429
mbed_official 340:28d1f895c6fe 430 /* Case of use of channel 2 */
mbed_official 340:28d1f895c6fe 431 switch(Alignment)
mbed_official 340:28d1f895c6fe 432 {
mbed_official 340:28d1f895c6fe 433 case DAC_ALIGN_12B_R:
mbed_official 340:28d1f895c6fe 434 /* Get DHR12R2 address */
mbed_official 340:28d1f895c6fe 435 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
mbed_official 340:28d1f895c6fe 436 break;
mbed_official 340:28d1f895c6fe 437 case DAC_ALIGN_12B_L:
mbed_official 340:28d1f895c6fe 438 /* Get DHR12L2 address */
mbed_official 340:28d1f895c6fe 439 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
mbed_official 340:28d1f895c6fe 440 break;
mbed_official 340:28d1f895c6fe 441 case DAC_ALIGN_8B_R:
mbed_official 340:28d1f895c6fe 442 /* Get DHR8R2 address */
mbed_official 340:28d1f895c6fe 443 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
mbed_official 340:28d1f895c6fe 444 break;
mbed_official 340:28d1f895c6fe 445 default:
mbed_official 340:28d1f895c6fe 446 break;
mbed_official 340:28d1f895c6fe 447 }
mbed_official 340:28d1f895c6fe 448 }
mbed_official 340:28d1f895c6fe 449
mbed_official 340:28d1f895c6fe 450 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 451 if(Channel == DAC_CHANNEL_1)
mbed_official 340:28d1f895c6fe 452 {
mbed_official 340:28d1f895c6fe 453 /* Enable the DAC DMA underrun interrupt */
mbed_official 340:28d1f895c6fe 454 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
mbed_official 340:28d1f895c6fe 455
mbed_official 340:28d1f895c6fe 456 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 457 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
mbed_official 340:28d1f895c6fe 458 }
mbed_official 340:28d1f895c6fe 459 else
mbed_official 340:28d1f895c6fe 460 {
mbed_official 340:28d1f895c6fe 461 /* Enable the DAC DMA underrun interrupt */
mbed_official 340:28d1f895c6fe 462 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
mbed_official 340:28d1f895c6fe 463
mbed_official 340:28d1f895c6fe 464 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 465 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
mbed_official 340:28d1f895c6fe 466 }
mbed_official 340:28d1f895c6fe 467
mbed_official 340:28d1f895c6fe 468 /* Enable the Peripharal */
mbed_official 340:28d1f895c6fe 469 __HAL_DAC_ENABLE(hdac, Channel);
mbed_official 340:28d1f895c6fe 470
mbed_official 340:28d1f895c6fe 471 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 472 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 473
mbed_official 340:28d1f895c6fe 474 /* Return function status */
mbed_official 340:28d1f895c6fe 475 return HAL_OK;
mbed_official 340:28d1f895c6fe 476 }
mbed_official 340:28d1f895c6fe 477
mbed_official 340:28d1f895c6fe 478
mbed_official 340:28d1f895c6fe 479
mbed_official 340:28d1f895c6fe 480 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 481 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 482
mbed_official 340:28d1f895c6fe 483 #if defined (STM32F051x8) || defined (STM32F058xx)
mbed_official 340:28d1f895c6fe 484
mbed_official 340:28d1f895c6fe 485 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
mbed_official 340:28d1f895c6fe 486 {
mbed_official 340:28d1f895c6fe 487 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 340:28d1f895c6fe 488
mbed_official 340:28d1f895c6fe 489 /* Check the parameters */
mbed_official 340:28d1f895c6fe 490 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 491
mbed_official 340:28d1f895c6fe 492 /* Process locked */
mbed_official 340:28d1f895c6fe 493 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 494
mbed_official 340:28d1f895c6fe 495 /* Change DAC state */
mbed_official 340:28d1f895c6fe 496 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 497
mbed_official 340:28d1f895c6fe 498 /* Enable the Peripharal */
mbed_official 340:28d1f895c6fe 499 __HAL_DAC_ENABLE(hdac, Channel);
mbed_official 340:28d1f895c6fe 500
mbed_official 340:28d1f895c6fe 501 if(Channel == DAC_CHANNEL_1)
mbed_official 340:28d1f895c6fe 502 {
mbed_official 340:28d1f895c6fe 503 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
mbed_official 340:28d1f895c6fe 504 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
mbed_official 340:28d1f895c6fe 505 /* Check if software trigger enabled */
mbed_official 340:28d1f895c6fe 506 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
mbed_official 340:28d1f895c6fe 507 {
mbed_official 340:28d1f895c6fe 508 /* Enable the selected DAC software conversion */
mbed_official 340:28d1f895c6fe 509 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1;
mbed_official 340:28d1f895c6fe 510 }
mbed_official 340:28d1f895c6fe 511 }
mbed_official 340:28d1f895c6fe 512
mbed_official 340:28d1f895c6fe 513 /* Change DAC state */
mbed_official 340:28d1f895c6fe 514 hdac->State = HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 515
mbed_official 340:28d1f895c6fe 516 /* Process unlocked */
mbed_official 340:28d1f895c6fe 517 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 518
mbed_official 340:28d1f895c6fe 519 /* Return function status */
mbed_official 340:28d1f895c6fe 520 return HAL_OK;
mbed_official 340:28d1f895c6fe 521 }
mbed_official 340:28d1f895c6fe 522
mbed_official 340:28d1f895c6fe 523 /**
mbed_official 340:28d1f895c6fe 524 * @brief Enables DAC and starts conversion of channel.
mbed_official 340:28d1f895c6fe 525 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 526 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 527 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 528 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 529 * @arg DAC_CHANNEL_1: DAC Channel1 selected
mbed_official 340:28d1f895c6fe 530 * @param pData: The destination peripheral Buffer address.
mbed_official 340:28d1f895c6fe 531 * @param Length: The length of data to be transferred from memory to DAC peripheral
mbed_official 340:28d1f895c6fe 532 * @param Alignment: Specifies the data alignment for DAC channel.
mbed_official 340:28d1f895c6fe 533 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 534 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
mbed_official 340:28d1f895c6fe 535 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
mbed_official 340:28d1f895c6fe 536 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
mbed_official 340:28d1f895c6fe 537 * @retval HAL status
mbed_official 340:28d1f895c6fe 538 */
mbed_official 340:28d1f895c6fe 539 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
mbed_official 340:28d1f895c6fe 540 {
mbed_official 340:28d1f895c6fe 541 uint32_t tmpreg = 0;
mbed_official 340:28d1f895c6fe 542
mbed_official 340:28d1f895c6fe 543 /* Check the parameters */
mbed_official 340:28d1f895c6fe 544 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 545 assert_param(IS_DAC_ALIGN(Alignment));
mbed_official 340:28d1f895c6fe 546
mbed_official 340:28d1f895c6fe 547 /* Process locked */
mbed_official 340:28d1f895c6fe 548 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 549
mbed_official 340:28d1f895c6fe 550 /* Change DAC state */
mbed_official 340:28d1f895c6fe 551 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 552
mbed_official 340:28d1f895c6fe 553 /* Set the DMA transfer complete callback for channel1 */
mbed_official 340:28d1f895c6fe 554 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
mbed_official 340:28d1f895c6fe 555
mbed_official 340:28d1f895c6fe 556 /* Set the DMA half transfer complete callback for channel1 */
mbed_official 340:28d1f895c6fe 557 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
mbed_official 340:28d1f895c6fe 558
mbed_official 340:28d1f895c6fe 559 /* Set the DMA error callback for channel1 */
mbed_official 340:28d1f895c6fe 560 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
mbed_official 340:28d1f895c6fe 561
mbed_official 340:28d1f895c6fe 562 /* Enable the selected DAC channel1 DMA request */
mbed_official 340:28d1f895c6fe 563 hdac->Instance->CR |= DAC_CR_DMAEN1;
mbed_official 340:28d1f895c6fe 564
mbed_official 340:28d1f895c6fe 565 /* Case of use of channel 1 */
mbed_official 340:28d1f895c6fe 566 switch(Alignment)
mbed_official 340:28d1f895c6fe 567 {
mbed_official 340:28d1f895c6fe 568 case DAC_ALIGN_12B_R:
mbed_official 340:28d1f895c6fe 569 /* Get DHR12R1 address */
mbed_official 340:28d1f895c6fe 570 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
mbed_official 340:28d1f895c6fe 571 break;
mbed_official 340:28d1f895c6fe 572 case DAC_ALIGN_12B_L:
mbed_official 340:28d1f895c6fe 573 /* Get DHR12L1 address */
mbed_official 340:28d1f895c6fe 574 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
mbed_official 340:28d1f895c6fe 575 break;
mbed_official 340:28d1f895c6fe 576 case DAC_ALIGN_8B_R:
mbed_official 340:28d1f895c6fe 577 /* Get DHR8R1 address */
mbed_official 340:28d1f895c6fe 578 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
mbed_official 340:28d1f895c6fe 579 break;
mbed_official 340:28d1f895c6fe 580 default:
mbed_official 340:28d1f895c6fe 581 break;
mbed_official 340:28d1f895c6fe 582 }
mbed_official 340:28d1f895c6fe 583
mbed_official 340:28d1f895c6fe 584 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 585 /* Enable the DAC DMA underrun interrupt */
mbed_official 340:28d1f895c6fe 586 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
mbed_official 340:28d1f895c6fe 587
mbed_official 340:28d1f895c6fe 588 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 589 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
mbed_official 340:28d1f895c6fe 590
mbed_official 340:28d1f895c6fe 591 /* Enable the DAC DMA underrun interrupt */
mbed_official 340:28d1f895c6fe 592 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
mbed_official 340:28d1f895c6fe 593
mbed_official 340:28d1f895c6fe 594 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 595 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
mbed_official 340:28d1f895c6fe 596
mbed_official 340:28d1f895c6fe 597 /* Enable the Peripharal */
mbed_official 340:28d1f895c6fe 598 __HAL_DAC_ENABLE(hdac, Channel);
mbed_official 340:28d1f895c6fe 599
mbed_official 340:28d1f895c6fe 600 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 601 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 602
mbed_official 340:28d1f895c6fe 603 /* Return function status */
mbed_official 340:28d1f895c6fe 604 return HAL_OK;
mbed_official 340:28d1f895c6fe 605 }
mbed_official 340:28d1f895c6fe 606
mbed_official 340:28d1f895c6fe 607 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 608
mbed_official 340:28d1f895c6fe 609 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 610 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 611 /* DAC channel 2 is available on top of DAC channel 1 */
mbed_official 340:28d1f895c6fe 612
mbed_official 340:28d1f895c6fe 613 /**
mbed_official 340:28d1f895c6fe 614 * @brief Handles DAC interrupt request
mbed_official 340:28d1f895c6fe 615 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 616 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 617 * @retval None
mbed_official 340:28d1f895c6fe 618 */
mbed_official 340:28d1f895c6fe 619 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
mbed_official 340:28d1f895c6fe 620 {
mbed_official 340:28d1f895c6fe 621 /* Check Overrun flag */
mbed_official 340:28d1f895c6fe 622 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
mbed_official 340:28d1f895c6fe 623 {
mbed_official 340:28d1f895c6fe 624 /* Change DAC state to error state */
mbed_official 340:28d1f895c6fe 625 hdac->State = HAL_DAC_STATE_ERROR;
mbed_official 340:28d1f895c6fe 626
mbed_official 340:28d1f895c6fe 627 /* Set DAC error code to chanel1 DMA underrun error */
mbed_official 340:28d1f895c6fe 628 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
mbed_official 340:28d1f895c6fe 629
mbed_official 340:28d1f895c6fe 630 /* Clear the underrun flag */
mbed_official 340:28d1f895c6fe 631 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
mbed_official 340:28d1f895c6fe 632
mbed_official 340:28d1f895c6fe 633 /* Disable the selected DAC channel1 DMA request */
mbed_official 340:28d1f895c6fe 634 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
mbed_official 340:28d1f895c6fe 635
mbed_official 340:28d1f895c6fe 636 /* Error callback */
mbed_official 340:28d1f895c6fe 637 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
mbed_official 340:28d1f895c6fe 638 }
mbed_official 340:28d1f895c6fe 639 else
mbed_official 340:28d1f895c6fe 640 {
mbed_official 340:28d1f895c6fe 641 /* Change DAC state to error state */
mbed_official 340:28d1f895c6fe 642 hdac->State = HAL_DAC_STATE_ERROR;
mbed_official 340:28d1f895c6fe 643
mbed_official 340:28d1f895c6fe 644 /* Set DAC error code to channel2 DMA underrun error */
mbed_official 340:28d1f895c6fe 645 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
mbed_official 340:28d1f895c6fe 646
mbed_official 340:28d1f895c6fe 647 /* Clear the underrun flag */
mbed_official 340:28d1f895c6fe 648 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
mbed_official 340:28d1f895c6fe 649
mbed_official 340:28d1f895c6fe 650 /* Disable the selected DAC channel1 DMA request */
mbed_official 340:28d1f895c6fe 651 hdac->Instance->CR &= ~DAC_CR_DMAEN2;
mbed_official 340:28d1f895c6fe 652
mbed_official 340:28d1f895c6fe 653 /* Error callback */
mbed_official 340:28d1f895c6fe 654 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
mbed_official 340:28d1f895c6fe 655 }
mbed_official 340:28d1f895c6fe 656 }
mbed_official 340:28d1f895c6fe 657
mbed_official 340:28d1f895c6fe 658 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 659 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 660
mbed_official 340:28d1f895c6fe 661 #if defined (STM32F051x8) || defined (STM32F058xx)
mbed_official 340:28d1f895c6fe 662 /* DAC channel 2 is NOT available. Only DAC channel 1 is available */
mbed_official 340:28d1f895c6fe 663
mbed_official 340:28d1f895c6fe 664 /**
mbed_official 340:28d1f895c6fe 665 * @brief Handles DAC interrupt request
mbed_official 340:28d1f895c6fe 666 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 667 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 668 * @retval None
mbed_official 340:28d1f895c6fe 669 */
mbed_official 340:28d1f895c6fe 670 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
mbed_official 340:28d1f895c6fe 671 {
mbed_official 340:28d1f895c6fe 672 /* Check Overrun flag */
mbed_official 340:28d1f895c6fe 673 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
mbed_official 340:28d1f895c6fe 674 {
mbed_official 340:28d1f895c6fe 675 /* Change DAC state to error state */
mbed_official 340:28d1f895c6fe 676 hdac->State = HAL_DAC_STATE_ERROR;
mbed_official 340:28d1f895c6fe 677
mbed_official 340:28d1f895c6fe 678 /* Set DAC error code to chanel1 DMA underrun error */
mbed_official 340:28d1f895c6fe 679 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
mbed_official 340:28d1f895c6fe 680
mbed_official 340:28d1f895c6fe 681 /* Clear the underrun flag */
mbed_official 340:28d1f895c6fe 682 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
mbed_official 340:28d1f895c6fe 683
mbed_official 340:28d1f895c6fe 684 /* Disable the selected DAC channel1 DMA request */
mbed_official 340:28d1f895c6fe 685 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
mbed_official 340:28d1f895c6fe 686
mbed_official 340:28d1f895c6fe 687 /* Error callback */
mbed_official 340:28d1f895c6fe 688 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
mbed_official 340:28d1f895c6fe 689 }
mbed_official 340:28d1f895c6fe 690 }
mbed_official 340:28d1f895c6fe 691
mbed_official 340:28d1f895c6fe 692 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 693
mbed_official 340:28d1f895c6fe 694 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 695 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 696
mbed_official 340:28d1f895c6fe 697 /**
mbed_official 340:28d1f895c6fe 698 * @brief Returns the last data output value of the selected DAC channel.
mbed_official 340:28d1f895c6fe 699 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 700 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 701 * @retval The selected DAC channel data output value.
mbed_official 340:28d1f895c6fe 702 */
mbed_official 340:28d1f895c6fe 703 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
mbed_official 340:28d1f895c6fe 704 {
mbed_official 340:28d1f895c6fe 705 uint32_t tmp = 0;
mbed_official 340:28d1f895c6fe 706
mbed_official 340:28d1f895c6fe 707 tmp |= hdac->Instance->DOR1;
mbed_official 340:28d1f895c6fe 708
mbed_official 340:28d1f895c6fe 709 /* DAC channel 2 is present in DAC 1 */
mbed_official 340:28d1f895c6fe 710 tmp |= hdac->Instance->DOR2 << 16;
mbed_official 340:28d1f895c6fe 711
mbed_official 340:28d1f895c6fe 712 /* Returns the DAC channel data output register value */
mbed_official 340:28d1f895c6fe 713 return tmp;
mbed_official 340:28d1f895c6fe 714 }
mbed_official 340:28d1f895c6fe 715
mbed_official 340:28d1f895c6fe 716 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 717 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 718
mbed_official 340:28d1f895c6fe 719 #if defined (STM32F051x8) || defined (STM32F058xx)
mbed_official 340:28d1f895c6fe 720
mbed_official 340:28d1f895c6fe 721 /**
mbed_official 340:28d1f895c6fe 722 * @brief Returns the last data output value of the selected DAC channel.
mbed_official 340:28d1f895c6fe 723 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 724 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 725 * @retval The selected DAC channel data output value.
mbed_official 340:28d1f895c6fe 726 */
mbed_official 340:28d1f895c6fe 727 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
mbed_official 340:28d1f895c6fe 728 {
mbed_official 340:28d1f895c6fe 729 uint32_t tmp = 0;
mbed_official 340:28d1f895c6fe 730
mbed_official 340:28d1f895c6fe 731 tmp |= hdac->Instance->DOR1;
mbed_official 340:28d1f895c6fe 732
mbed_official 340:28d1f895c6fe 733 /* Returns the DAC channel data output register value */
mbed_official 340:28d1f895c6fe 734 return tmp;
mbed_official 340:28d1f895c6fe 735 }
mbed_official 340:28d1f895c6fe 736
mbed_official 340:28d1f895c6fe 737 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 738
mbed_official 340:28d1f895c6fe 739 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 740 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 741
mbed_official 340:28d1f895c6fe 742 /**
mbed_official 340:28d1f895c6fe 743 * @brief Enables or disables the selected DAC channel wave generation.
mbed_official 340:28d1f895c6fe 744 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 745 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 746 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 747 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 748 * DAC_CHANNEL_1 / DAC_CHANNEL_2
mbed_official 340:28d1f895c6fe 749 * @param Amplitude: Select max triangle amplitude.
mbed_official 340:28d1f895c6fe 750 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 751 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
mbed_official 340:28d1f895c6fe 752 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
mbed_official 340:28d1f895c6fe 753 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
mbed_official 340:28d1f895c6fe 754 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
mbed_official 340:28d1f895c6fe 755 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
mbed_official 340:28d1f895c6fe 756 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
mbed_official 340:28d1f895c6fe 757 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
mbed_official 340:28d1f895c6fe 758 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
mbed_official 340:28d1f895c6fe 759 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
mbed_official 340:28d1f895c6fe 760 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
mbed_official 340:28d1f895c6fe 761 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
mbed_official 340:28d1f895c6fe 762 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
mbed_official 340:28d1f895c6fe 763 * @retval HAL status
mbed_official 340:28d1f895c6fe 764 */
mbed_official 340:28d1f895c6fe 765 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
mbed_official 340:28d1f895c6fe 766 {
mbed_official 340:28d1f895c6fe 767 /* Check the parameters */
mbed_official 340:28d1f895c6fe 768 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 769 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
mbed_official 340:28d1f895c6fe 770
mbed_official 340:28d1f895c6fe 771 /* Process locked */
mbed_official 340:28d1f895c6fe 772 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 773
mbed_official 340:28d1f895c6fe 774 /* Change DAC state */
mbed_official 340:28d1f895c6fe 775 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 776
mbed_official 340:28d1f895c6fe 777 /* Enable the selected wave generation for the selected DAC channel */
mbed_official 441:d2c15dda23c1 778 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_WAVE_TRIANGLE | Amplitude) << Channel);
mbed_official 340:28d1f895c6fe 779
mbed_official 340:28d1f895c6fe 780 /* Change DAC state */
mbed_official 340:28d1f895c6fe 781 hdac->State = HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 782
mbed_official 340:28d1f895c6fe 783 /* Process unlocked */
mbed_official 340:28d1f895c6fe 784 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 785
mbed_official 340:28d1f895c6fe 786 /* Return function status */
mbed_official 340:28d1f895c6fe 787 return HAL_OK;
mbed_official 340:28d1f895c6fe 788 }
mbed_official 340:28d1f895c6fe 789
mbed_official 340:28d1f895c6fe 790 /**
mbed_official 340:28d1f895c6fe 791 * @brief Enables or disables the selected DAC channel wave generation.
mbed_official 340:28d1f895c6fe 792 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 793 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 794 * @param Channel: The selected DAC channel.
mbed_official 340:28d1f895c6fe 795 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 796 * DAC_CHANNEL_1 / DAC_CHANNEL_2
mbed_official 340:28d1f895c6fe 797 * @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
mbed_official 340:28d1f895c6fe 798 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 799 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
mbed_official 340:28d1f895c6fe 800 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
mbed_official 340:28d1f895c6fe 801 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
mbed_official 340:28d1f895c6fe 802 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
mbed_official 340:28d1f895c6fe 803 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
mbed_official 340:28d1f895c6fe 804 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
mbed_official 340:28d1f895c6fe 805 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
mbed_official 340:28d1f895c6fe 806 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
mbed_official 340:28d1f895c6fe 807 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
mbed_official 340:28d1f895c6fe 808 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
mbed_official 340:28d1f895c6fe 809 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
mbed_official 340:28d1f895c6fe 810 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
mbed_official 340:28d1f895c6fe 811 * @retval HAL status
mbed_official 340:28d1f895c6fe 812 */
mbed_official 340:28d1f895c6fe 813 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
mbed_official 340:28d1f895c6fe 814 {
mbed_official 340:28d1f895c6fe 815 /* Check the parameters */
mbed_official 340:28d1f895c6fe 816 assert_param(IS_DAC_CHANNEL(Channel));
mbed_official 340:28d1f895c6fe 817 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
mbed_official 340:28d1f895c6fe 818
mbed_official 340:28d1f895c6fe 819 /* Process locked */
mbed_official 340:28d1f895c6fe 820 __HAL_LOCK(hdac);
mbed_official 340:28d1f895c6fe 821
mbed_official 340:28d1f895c6fe 822 /* Change DAC state */
mbed_official 340:28d1f895c6fe 823 hdac->State = HAL_DAC_STATE_BUSY;
mbed_official 340:28d1f895c6fe 824
mbed_official 340:28d1f895c6fe 825 /* Enable the selected wave generation for the selected DAC channel */
mbed_official 441:d2c15dda23c1 826 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_WAVE_NOISE | Amplitude) << Channel);
mbed_official 340:28d1f895c6fe 827
mbed_official 340:28d1f895c6fe 828 /* Change DAC state */
mbed_official 340:28d1f895c6fe 829 hdac->State = HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 830
mbed_official 340:28d1f895c6fe 831 /* Process unlocked */
mbed_official 340:28d1f895c6fe 832 __HAL_UNLOCK(hdac);
mbed_official 340:28d1f895c6fe 833
mbed_official 340:28d1f895c6fe 834 /* Return function status */
mbed_official 340:28d1f895c6fe 835 return HAL_OK;
mbed_official 340:28d1f895c6fe 836 }
mbed_official 340:28d1f895c6fe 837
mbed_official 340:28d1f895c6fe 838 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 839 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 840
mbed_official 340:28d1f895c6fe 841 #if defined(STM32F051x8) || defined(STM32F058xx) || \
mbed_official 340:28d1f895c6fe 842 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 843 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 844
mbed_official 340:28d1f895c6fe 845 /**
mbed_official 340:28d1f895c6fe 846 * @brief Set the specified data holding register value for dual DAC channel.
mbed_official 340:28d1f895c6fe 847 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 848 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 849 * @param Alignment: Specifies the data alignment for dual channel DAC.
mbed_official 340:28d1f895c6fe 850 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 851 * DAC_ALIGN_8B_R: 8bit right data alignment selected
mbed_official 340:28d1f895c6fe 852 * DAC_ALIGN_12B_L: 12bit left data alignment selected
mbed_official 340:28d1f895c6fe 853 * DAC_ALIGN_12B_R: 12bit right data alignment selected
mbed_official 340:28d1f895c6fe 854 * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
mbed_official 340:28d1f895c6fe 855 * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
mbed_official 340:28d1f895c6fe 856 * @note In dual mode, a unique register access is required to write in both
mbed_official 340:28d1f895c6fe 857 * DAC channels at the same time.
mbed_official 340:28d1f895c6fe 858 * @retval HAL status
mbed_official 340:28d1f895c6fe 859 */
mbed_official 340:28d1f895c6fe 860 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
mbed_official 340:28d1f895c6fe 861 {
mbed_official 340:28d1f895c6fe 862 uint32_t data = 0, tmp = 0;
mbed_official 340:28d1f895c6fe 863
mbed_official 340:28d1f895c6fe 864 /* Check the parameters */
mbed_official 340:28d1f895c6fe 865 assert_param(IS_DAC_ALIGN(Alignment));
mbed_official 340:28d1f895c6fe 866 assert_param(IS_DAC_DATA(Data1));
mbed_official 340:28d1f895c6fe 867 assert_param(IS_DAC_DATA(Data2));
mbed_official 340:28d1f895c6fe 868
mbed_official 340:28d1f895c6fe 869 /* Calculate and set dual DAC data holding register value */
mbed_official 340:28d1f895c6fe 870 if (Alignment == DAC_ALIGN_8B_R)
mbed_official 340:28d1f895c6fe 871 {
mbed_official 340:28d1f895c6fe 872 data = ((uint32_t)Data2 << 8) | Data1;
mbed_official 340:28d1f895c6fe 873 }
mbed_official 340:28d1f895c6fe 874 else
mbed_official 340:28d1f895c6fe 875 {
mbed_official 340:28d1f895c6fe 876 data = ((uint32_t)Data2 << 16) | Data1;
mbed_official 340:28d1f895c6fe 877 }
mbed_official 340:28d1f895c6fe 878
mbed_official 340:28d1f895c6fe 879 tmp = (uint32_t)hdac->Instance;
mbed_official 340:28d1f895c6fe 880 tmp += __HAL_DHR12RD_ALIGNEMENT(Alignment);
mbed_official 340:28d1f895c6fe 881
mbed_official 340:28d1f895c6fe 882 /* Set the dual DAC selected data holding register */
mbed_official 340:28d1f895c6fe 883 *(__IO uint32_t *)tmp = data;
mbed_official 340:28d1f895c6fe 884
mbed_official 340:28d1f895c6fe 885 /* Return function status */
mbed_official 340:28d1f895c6fe 886 return HAL_OK;
mbed_official 340:28d1f895c6fe 887 }
mbed_official 340:28d1f895c6fe 888
mbed_official 340:28d1f895c6fe 889 /**
mbed_official 340:28d1f895c6fe 890 * @}
mbed_official 340:28d1f895c6fe 891 */
mbed_official 340:28d1f895c6fe 892
mbed_official 340:28d1f895c6fe 893 /**
mbed_official 340:28d1f895c6fe 894 * @}
mbed_official 340:28d1f895c6fe 895 */
mbed_official 340:28d1f895c6fe 896
mbed_official 340:28d1f895c6fe 897 /** @addtogroup DACEx_Private_Functions
mbed_official 340:28d1f895c6fe 898 * @{
mbed_official 340:28d1f895c6fe 899 */
mbed_official 340:28d1f895c6fe 900
mbed_official 340:28d1f895c6fe 901 /**
mbed_official 340:28d1f895c6fe 902 * @brief DMA conversion complete callback.
mbed_official 340:28d1f895c6fe 903 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 904 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 905 * @retval None
mbed_official 340:28d1f895c6fe 906 */
mbed_official 340:28d1f895c6fe 907 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 908 {
mbed_official 340:28d1f895c6fe 909 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 910
mbed_official 340:28d1f895c6fe 911 HAL_DAC_ConvCpltCallbackCh1(hdac);
mbed_official 340:28d1f895c6fe 912
mbed_official 340:28d1f895c6fe 913 hdac->State= HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 914 }
mbed_official 340:28d1f895c6fe 915
mbed_official 340:28d1f895c6fe 916 /**
mbed_official 340:28d1f895c6fe 917 * @brief DMA half transfer complete callback.
mbed_official 340:28d1f895c6fe 918 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 919 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 920 * @retval None
mbed_official 340:28d1f895c6fe 921 */
mbed_official 340:28d1f895c6fe 922 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 923 {
mbed_official 340:28d1f895c6fe 924 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 925 /* Conversion complete callback */
mbed_official 340:28d1f895c6fe 926 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
mbed_official 340:28d1f895c6fe 927 }
mbed_official 340:28d1f895c6fe 928
mbed_official 340:28d1f895c6fe 929 /**
mbed_official 340:28d1f895c6fe 930 * @brief DMA error callback
mbed_official 340:28d1f895c6fe 931 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 932 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 933 * @retval None
mbed_official 340:28d1f895c6fe 934 */
mbed_official 340:28d1f895c6fe 935 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 936 {
mbed_official 340:28d1f895c6fe 937 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 938
mbed_official 340:28d1f895c6fe 939 /* Set DAC error code to DMA error */
mbed_official 340:28d1f895c6fe 940 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
mbed_official 340:28d1f895c6fe 941
mbed_official 340:28d1f895c6fe 942 HAL_DAC_ErrorCallbackCh1(hdac);
mbed_official 340:28d1f895c6fe 943
mbed_official 340:28d1f895c6fe 944 hdac->State= HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 945 }
mbed_official 340:28d1f895c6fe 946 /**
mbed_official 340:28d1f895c6fe 947 * @}
mbed_official 340:28d1f895c6fe 948 */
mbed_official 340:28d1f895c6fe 949 #endif /* STM32F051x8 STM32F058xx */
mbed_official 340:28d1f895c6fe 950 /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 340:28d1f895c6fe 951 /* STM32F091xC STM32F098xx */
mbed_official 340:28d1f895c6fe 952
mbed_official 340:28d1f895c6fe 953 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 340:28d1f895c6fe 954 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 340:28d1f895c6fe 955
mbed_official 340:28d1f895c6fe 956 /** @addtogroup DACEx_Exported_Functions
mbed_official 340:28d1f895c6fe 957 * @{
mbed_official 340:28d1f895c6fe 958 */
mbed_official 340:28d1f895c6fe 959
mbed_official 340:28d1f895c6fe 960 /** @addtogroup DACEx_Exported_Functions_Group1
mbed_official 340:28d1f895c6fe 961 * @brief Extended features functions
mbed_official 340:28d1f895c6fe 962 * @{
mbed_official 340:28d1f895c6fe 963 */
mbed_official 340:28d1f895c6fe 964 /**
mbed_official 340:28d1f895c6fe 965 * @brief Conversion complete callback in non blocking mode for Channel2
mbed_official 340:28d1f895c6fe 966 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 967 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 968 * @retval None
mbed_official 340:28d1f895c6fe 969 */
mbed_official 340:28d1f895c6fe 970 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
mbed_official 340:28d1f895c6fe 971 {
mbed_official 340:28d1f895c6fe 972 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 973 the HAL_DAC_ConvCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 974 */
mbed_official 340:28d1f895c6fe 975 }
mbed_official 340:28d1f895c6fe 976
mbed_official 340:28d1f895c6fe 977 /**
mbed_official 340:28d1f895c6fe 978 * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
mbed_official 340:28d1f895c6fe 979 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 980 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 981 * @retval None
mbed_official 340:28d1f895c6fe 982 */
mbed_official 340:28d1f895c6fe 983 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
mbed_official 340:28d1f895c6fe 984 {
mbed_official 340:28d1f895c6fe 985 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 986 the HAL_DAC_ConvHalfCpltCallbackCh2 could be implemented in the user file
mbed_official 340:28d1f895c6fe 987 */
mbed_official 340:28d1f895c6fe 988 }
mbed_official 340:28d1f895c6fe 989
mbed_official 340:28d1f895c6fe 990 /**
mbed_official 340:28d1f895c6fe 991 * @brief Error DAC callback for Channel2.
mbed_official 340:28d1f895c6fe 992 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 993 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 994 * @retval None
mbed_official 340:28d1f895c6fe 995 */
mbed_official 340:28d1f895c6fe 996 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
mbed_official 340:28d1f895c6fe 997 {
mbed_official 340:28d1f895c6fe 998 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 999 the HAL_DAC_ErrorCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1000 */
mbed_official 340:28d1f895c6fe 1001 }
mbed_official 340:28d1f895c6fe 1002
mbed_official 340:28d1f895c6fe 1003 /**
mbed_official 340:28d1f895c6fe 1004 * @brief DMA underrun DAC callback for channel2.
mbed_official 340:28d1f895c6fe 1005 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1006 * the configuration information for the specified DAC.
mbed_official 340:28d1f895c6fe 1007 * @retval None
mbed_official 340:28d1f895c6fe 1008 */
mbed_official 340:28d1f895c6fe 1009 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
mbed_official 340:28d1f895c6fe 1010 {
mbed_official 340:28d1f895c6fe 1011 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1012 the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
mbed_official 340:28d1f895c6fe 1013 */
mbed_official 340:28d1f895c6fe 1014 }
mbed_official 340:28d1f895c6fe 1015
mbed_official 340:28d1f895c6fe 1016 /**
mbed_official 340:28d1f895c6fe 1017 * @brief DMA conversion complete callback.
mbed_official 340:28d1f895c6fe 1018 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1019 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1020 * @retval None
mbed_official 340:28d1f895c6fe 1021 */
mbed_official 340:28d1f895c6fe 1022 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1023 {
mbed_official 340:28d1f895c6fe 1024 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 1025
mbed_official 340:28d1f895c6fe 1026 HAL_DACEx_ConvCpltCallbackCh2(hdac);
mbed_official 340:28d1f895c6fe 1027
mbed_official 340:28d1f895c6fe 1028 hdac->State= HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 1029 }
mbed_official 340:28d1f895c6fe 1030
mbed_official 340:28d1f895c6fe 1031 /**
mbed_official 340:28d1f895c6fe 1032 * @brief DMA half transfer complete callback.
mbed_official 340:28d1f895c6fe 1033 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1034 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1035 * @retval None
mbed_official 340:28d1f895c6fe 1036 */
mbed_official 340:28d1f895c6fe 1037 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1038 {
mbed_official 340:28d1f895c6fe 1039 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 1040 /* Conversion complete callback */
mbed_official 340:28d1f895c6fe 1041 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
mbed_official 340:28d1f895c6fe 1042 }
mbed_official 340:28d1f895c6fe 1043
mbed_official 340:28d1f895c6fe 1044 /**
mbed_official 340:28d1f895c6fe 1045 * @brief DMA error callback
mbed_official 340:28d1f895c6fe 1046 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1047 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1048 * @retval None
mbed_official 340:28d1f895c6fe 1049 */
mbed_official 340:28d1f895c6fe 1050 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1051 {
mbed_official 340:28d1f895c6fe 1052 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 1053
mbed_official 340:28d1f895c6fe 1054 /* Set DAC error code to DMA error */
mbed_official 340:28d1f895c6fe 1055 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
mbed_official 340:28d1f895c6fe 1056
mbed_official 340:28d1f895c6fe 1057 HAL_DACEx_ErrorCallbackCh2(hdac);
mbed_official 340:28d1f895c6fe 1058
mbed_official 340:28d1f895c6fe 1059 hdac->State= HAL_DAC_STATE_READY;
mbed_official 340:28d1f895c6fe 1060 }
mbed_official 340:28d1f895c6fe 1061
mbed_official 340:28d1f895c6fe 1062 /**
mbed_official 340:28d1f895c6fe 1063 * @}
mbed_official 340:28d1f895c6fe 1064 */
mbed_official 340:28d1f895c6fe 1065
mbed_official 340:28d1f895c6fe 1066 /**
mbed_official 340:28d1f895c6fe 1067 * @}
mbed_official 340:28d1f895c6fe 1068 */
mbed_official 340:28d1f895c6fe 1069
mbed_official 340:28d1f895c6fe 1070 /**
mbed_official 340:28d1f895c6fe 1071 * @}
mbed_official 340:28d1f895c6fe 1072 */
mbed_official 340:28d1f895c6fe 1073
mbed_official 340:28d1f895c6fe 1074 /**
mbed_official 340:28d1f895c6fe 1075 * @}
mbed_official 340:28d1f895c6fe 1076 */
mbed_official 340:28d1f895c6fe 1077
mbed_official 441:d2c15dda23c1 1078 #endif /* STM32F071xB STM32F072xB STM32F078xx */
mbed_official 441:d2c15dda23c1 1079 /* STM32F091xC STM32F098xx */
mbed_official 441:d2c15dda23c1 1080
mbed_official 441:d2c15dda23c1 1081 #endif /* HAL_DAC_MODULE_ENABLED */
mbed_official 441:d2c15dda23c1 1082
mbed_official 340:28d1f895c6fe 1083 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/