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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F091RC/stm32f0xx_hal_gpio.c@340:28d1f895c6fe, 2014-10-09 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Oct 09 08:15:07 2014 +0100
- Revision:
- 340:28d1f895c6fe
Synchronized with git revision b5a4c8e80393336b2656fb29ab46d405d3068602
Full URL: https://github.com/mbedmicro/mbed/commit/b5a4c8e80393336b2656fb29ab46d405d3068602/
HAL: nrf51822 - Few fixes for PWM and Serial
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 340:28d1f895c6fe | 1 | /** |
mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_gpio.c |
mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
mbed_official | 340:28d1f895c6fe | 5 | * @version V1.1.0 |
mbed_official | 340:28d1f895c6fe | 6 | * @date 03-Oct-2014 |
mbed_official | 340:28d1f895c6fe | 7 | * @brief GPIO HAL module driver. |
mbed_official | 340:28d1f895c6fe | 8 | * This file provides firmware functions to manage the following |
mbed_official | 340:28d1f895c6fe | 9 | * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
mbed_official | 340:28d1f895c6fe | 10 | * + Initialization and de-initialization functions |
mbed_official | 340:28d1f895c6fe | 11 | * + IO operation functions |
mbed_official | 340:28d1f895c6fe | 12 | * |
mbed_official | 340:28d1f895c6fe | 13 | @verbatim |
mbed_official | 340:28d1f895c6fe | 14 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 15 | ##### GPIO Peripheral features ##### |
mbed_official | 340:28d1f895c6fe | 16 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 17 | [..] |
mbed_official | 340:28d1f895c6fe | 18 | Each port bit of the general-purpose I/O (GPIO) ports can be individually |
mbed_official | 340:28d1f895c6fe | 19 | configured by software in several modes: |
mbed_official | 340:28d1f895c6fe | 20 | (+) Input mode |
mbed_official | 340:28d1f895c6fe | 21 | (+) Analog mode |
mbed_official | 340:28d1f895c6fe | 22 | (+) Output mode |
mbed_official | 340:28d1f895c6fe | 23 | (+) Alternate function mode |
mbed_official | 340:28d1f895c6fe | 24 | (+) External interrupt/event lines |
mbed_official | 340:28d1f895c6fe | 25 | |
mbed_official | 340:28d1f895c6fe | 26 | [..] |
mbed_official | 340:28d1f895c6fe | 27 | During and just after reset, the alternate functions and external interrupt |
mbed_official | 340:28d1f895c6fe | 28 | lines are not active and the I/O ports are configured in input floating mode. |
mbed_official | 340:28d1f895c6fe | 29 | |
mbed_official | 340:28d1f895c6fe | 30 | [..] |
mbed_official | 340:28d1f895c6fe | 31 | All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
mbed_official | 340:28d1f895c6fe | 32 | activated or not. |
mbed_official | 340:28d1f895c6fe | 33 | |
mbed_official | 340:28d1f895c6fe | 34 | [..] |
mbed_official | 340:28d1f895c6fe | 35 | In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
mbed_official | 340:28d1f895c6fe | 36 | type and the IO speed can be selected depending on the VDD value. |
mbed_official | 340:28d1f895c6fe | 37 | |
mbed_official | 340:28d1f895c6fe | 38 | [..] |
mbed_official | 340:28d1f895c6fe | 39 | The microcontroller IO pins are connected to onboard peripherals/modules through a |
mbed_official | 340:28d1f895c6fe | 40 | multiplexer that allows only one peripheral s alternate function (AF) connected |
mbed_official | 340:28d1f895c6fe | 41 | to an IO pin at a time. In this way, there can be no conflict between peripherals |
mbed_official | 340:28d1f895c6fe | 42 | sharing the same IO pin. |
mbed_official | 340:28d1f895c6fe | 43 | |
mbed_official | 340:28d1f895c6fe | 44 | [..] |
mbed_official | 340:28d1f895c6fe | 45 | All ports have external interrupt/event capability. To use external interrupt |
mbed_official | 340:28d1f895c6fe | 46 | lines, the port must be configured in input mode. All available GPIO pins are |
mbed_official | 340:28d1f895c6fe | 47 | connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
mbed_official | 340:28d1f895c6fe | 48 | |
mbed_official | 340:28d1f895c6fe | 49 | [..] |
mbed_official | 340:28d1f895c6fe | 50 | The external interrupt/event controller consists of up to 23 edge detectors |
mbed_official | 340:28d1f895c6fe | 51 | (16 lines are connected to GPIO) for generating event/interrupt requests (each |
mbed_official | 340:28d1f895c6fe | 52 | input line can be independently configured to select the type (interrupt or event) |
mbed_official | 340:28d1f895c6fe | 53 | and the corresponding trigger event (rising or falling or both). Each line can |
mbed_official | 340:28d1f895c6fe | 54 | also be masked independently. |
mbed_official | 340:28d1f895c6fe | 55 | |
mbed_official | 340:28d1f895c6fe | 56 | ##### How to use this driver ##### |
mbed_official | 340:28d1f895c6fe | 57 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 58 | [..] |
mbed_official | 340:28d1f895c6fe | 59 | (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE(). |
mbed_official | 340:28d1f895c6fe | 60 | |
mbed_official | 340:28d1f895c6fe | 61 | (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
mbed_official | 340:28d1f895c6fe | 62 | (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
mbed_official | 340:28d1f895c6fe | 63 | (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
mbed_official | 340:28d1f895c6fe | 64 | structure. |
mbed_official | 340:28d1f895c6fe | 65 | (++) In case of Output or alternate function mode selection: the speed is |
mbed_official | 340:28d1f895c6fe | 66 | configured through "Speed" member from GPIO_InitTypeDef structure, |
mbed_official | 340:28d1f895c6fe | 67 | the speed is configurable: 2 MHz, 10 MHz and 50 MHz. |
mbed_official | 340:28d1f895c6fe | 68 | (++) If alternate mode is selected, the alternate function connected to the IO |
mbed_official | 340:28d1f895c6fe | 69 | is configured through "Alternate" member from GPIO_InitTypeDef structure |
mbed_official | 340:28d1f895c6fe | 70 | (++) Analog mode is required when a pin is to be used as ADC channel |
mbed_official | 340:28d1f895c6fe | 71 | or DAC output. |
mbed_official | 340:28d1f895c6fe | 72 | (++) In case of external interrupt/event selection the "Mode" member from |
mbed_official | 340:28d1f895c6fe | 73 | GPIO_InitTypeDef structure select the type (interrupt or event) and |
mbed_official | 340:28d1f895c6fe | 74 | the corresponding trigger event (rising or falling or both). |
mbed_official | 340:28d1f895c6fe | 75 | |
mbed_official | 340:28d1f895c6fe | 76 | (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
mbed_official | 340:28d1f895c6fe | 77 | mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
mbed_official | 340:28d1f895c6fe | 78 | HAL_NVIC_EnableIRQ(). |
mbed_official | 340:28d1f895c6fe | 79 | |
mbed_official | 340:28d1f895c6fe | 80 | (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
mbed_official | 340:28d1f895c6fe | 81 | |
mbed_official | 340:28d1f895c6fe | 82 | (#) To set/reset the level of a pin configured in output mode use |
mbed_official | 340:28d1f895c6fe | 83 | HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
mbed_official | 340:28d1f895c6fe | 84 | |
mbed_official | 340:28d1f895c6fe | 85 | (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
mbed_official | 340:28d1f895c6fe | 86 | |
mbed_official | 340:28d1f895c6fe | 87 | (#) During and just after reset, the alternate functions are not |
mbed_official | 340:28d1f895c6fe | 88 | active and the GPIO pins are configured in input floating mode (except JTAG |
mbed_official | 340:28d1f895c6fe | 89 | pins). |
mbed_official | 340:28d1f895c6fe | 90 | |
mbed_official | 340:28d1f895c6fe | 91 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
mbed_official | 340:28d1f895c6fe | 92 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
mbed_official | 340:28d1f895c6fe | 93 | priority over the GPIO function. |
mbed_official | 340:28d1f895c6fe | 94 | |
mbed_official | 340:28d1f895c6fe | 95 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
mbed_official | 340:28d1f895c6fe | 96 | general purpose PD0 and PD1, respectively, when the HSE oscillator is off. |
mbed_official | 340:28d1f895c6fe | 97 | The HSE has priority over the GPIO function. |
mbed_official | 340:28d1f895c6fe | 98 | |
mbed_official | 340:28d1f895c6fe | 99 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 100 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 101 | * @attention |
mbed_official | 340:28d1f895c6fe | 102 | * |
mbed_official | 340:28d1f895c6fe | 103 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 340:28d1f895c6fe | 104 | * |
mbed_official | 340:28d1f895c6fe | 105 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 340:28d1f895c6fe | 106 | * are permitted provided that the following conditions are met: |
mbed_official | 340:28d1f895c6fe | 107 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 108 | * this list of conditions and the following disclaimer. |
mbed_official | 340:28d1f895c6fe | 109 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 110 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 340:28d1f895c6fe | 111 | * and/or other materials provided with the distribution. |
mbed_official | 340:28d1f895c6fe | 112 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 340:28d1f895c6fe | 113 | * may be used to endorse or promote products derived from this software |
mbed_official | 340:28d1f895c6fe | 114 | * without specific prior written permission. |
mbed_official | 340:28d1f895c6fe | 115 | * |
mbed_official | 340:28d1f895c6fe | 116 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 340:28d1f895c6fe | 117 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 340:28d1f895c6fe | 118 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 340:28d1f895c6fe | 119 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 340:28d1f895c6fe | 120 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 340:28d1f895c6fe | 121 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 340:28d1f895c6fe | 122 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 340:28d1f895c6fe | 123 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 340:28d1f895c6fe | 124 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 340:28d1f895c6fe | 125 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 340:28d1f895c6fe | 126 | * |
mbed_official | 340:28d1f895c6fe | 127 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 128 | */ |
mbed_official | 340:28d1f895c6fe | 129 | |
mbed_official | 340:28d1f895c6fe | 130 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 131 | #include "stm32f0xx_hal.h" |
mbed_official | 340:28d1f895c6fe | 132 | |
mbed_official | 340:28d1f895c6fe | 133 | /** @addtogroup STM32F0xx_HAL_Driver |
mbed_official | 340:28d1f895c6fe | 134 | * @{ |
mbed_official | 340:28d1f895c6fe | 135 | */ |
mbed_official | 340:28d1f895c6fe | 136 | |
mbed_official | 340:28d1f895c6fe | 137 | /** @defgroup GPIO GPIO HAL module driver |
mbed_official | 340:28d1f895c6fe | 138 | * @brief GPIO HAL module driver |
mbed_official | 340:28d1f895c6fe | 139 | * @{ |
mbed_official | 340:28d1f895c6fe | 140 | */ |
mbed_official | 340:28d1f895c6fe | 141 | |
mbed_official | 340:28d1f895c6fe | 142 | #ifdef HAL_GPIO_MODULE_ENABLED |
mbed_official | 340:28d1f895c6fe | 143 | |
mbed_official | 340:28d1f895c6fe | 144 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 145 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 146 | /** @defgroup GPIO_Private_Define GPIO Private Define |
mbed_official | 340:28d1f895c6fe | 147 | * @{ |
mbed_official | 340:28d1f895c6fe | 148 | */ |
mbed_official | 340:28d1f895c6fe | 149 | #define GPIO_MODE ((uint32_t)0x00000003) |
mbed_official | 340:28d1f895c6fe | 150 | #define EXTI_MODE ((uint32_t)0x10000000) |
mbed_official | 340:28d1f895c6fe | 151 | #define GPIO_MODE_IT ((uint32_t)0x00010000) |
mbed_official | 340:28d1f895c6fe | 152 | #define GPIO_MODE_EVT ((uint32_t)0x00020000) |
mbed_official | 340:28d1f895c6fe | 153 | #define RISING_EDGE ((uint32_t)0x00100000) |
mbed_official | 340:28d1f895c6fe | 154 | #define FALLING_EDGE ((uint32_t)0x00200000) |
mbed_official | 340:28d1f895c6fe | 155 | #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) |
mbed_official | 340:28d1f895c6fe | 156 | |
mbed_official | 340:28d1f895c6fe | 157 | #define GPIO_NUMBER ((uint32_t)16) |
mbed_official | 340:28d1f895c6fe | 158 | |
mbed_official | 340:28d1f895c6fe | 159 | /** |
mbed_official | 340:28d1f895c6fe | 160 | * @} |
mbed_official | 340:28d1f895c6fe | 161 | */ |
mbed_official | 340:28d1f895c6fe | 162 | |
mbed_official | 340:28d1f895c6fe | 163 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 164 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 165 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 166 | /* Exporte functions ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 167 | |
mbed_official | 340:28d1f895c6fe | 168 | /** @defgroup GPIO_Exported_Functions GPIO Exported Functions |
mbed_official | 340:28d1f895c6fe | 169 | * @{ |
mbed_official | 340:28d1f895c6fe | 170 | */ |
mbed_official | 340:28d1f895c6fe | 171 | |
mbed_official | 340:28d1f895c6fe | 172 | /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions |
mbed_official | 340:28d1f895c6fe | 173 | * @brief Initialization and Configuration functions |
mbed_official | 340:28d1f895c6fe | 174 | * |
mbed_official | 340:28d1f895c6fe | 175 | @verbatim |
mbed_official | 340:28d1f895c6fe | 176 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 177 | ##### Initialization and de-initialization functions ##### |
mbed_official | 340:28d1f895c6fe | 178 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 179 | |
mbed_official | 340:28d1f895c6fe | 180 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 181 | * @{ |
mbed_official | 340:28d1f895c6fe | 182 | */ |
mbed_official | 340:28d1f895c6fe | 183 | |
mbed_official | 340:28d1f895c6fe | 184 | /** |
mbed_official | 340:28d1f895c6fe | 185 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
mbed_official | 340:28d1f895c6fe | 186 | * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family |
mbed_official | 340:28d1f895c6fe | 187 | * @note GPIOD is only available on STM32F05xx, STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 188 | * @note GPIOE is only available on STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 189 | * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 190 | * the configuration information for the specified GPIO peripheral. |
mbed_official | 340:28d1f895c6fe | 191 | * @retval None |
mbed_official | 340:28d1f895c6fe | 192 | */ |
mbed_official | 340:28d1f895c6fe | 193 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
mbed_official | 340:28d1f895c6fe | 194 | { |
mbed_official | 340:28d1f895c6fe | 195 | uint32_t position; |
mbed_official | 340:28d1f895c6fe | 196 | uint32_t ioposition = 0x00; |
mbed_official | 340:28d1f895c6fe | 197 | uint32_t iocurrent = 0x00; |
mbed_official | 340:28d1f895c6fe | 198 | uint32_t temp = 0x00; |
mbed_official | 340:28d1f895c6fe | 199 | |
mbed_official | 340:28d1f895c6fe | 200 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 201 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
mbed_official | 340:28d1f895c6fe | 202 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
mbed_official | 340:28d1f895c6fe | 203 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
mbed_official | 340:28d1f895c6fe | 204 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
mbed_official | 340:28d1f895c6fe | 205 | |
mbed_official | 340:28d1f895c6fe | 206 | /* Configure the port pins */ |
mbed_official | 340:28d1f895c6fe | 207 | for (position = 0; position < GPIO_NUMBER; position++) |
mbed_official | 340:28d1f895c6fe | 208 | { |
mbed_official | 340:28d1f895c6fe | 209 | /* Get the IO position */ |
mbed_official | 340:28d1f895c6fe | 210 | ioposition = ((uint32_t)0x01) << position; |
mbed_official | 340:28d1f895c6fe | 211 | /* Get the current IO position */ |
mbed_official | 340:28d1f895c6fe | 212 | iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; |
mbed_official | 340:28d1f895c6fe | 213 | |
mbed_official | 340:28d1f895c6fe | 214 | if (iocurrent == ioposition) |
mbed_official | 340:28d1f895c6fe | 215 | { |
mbed_official | 340:28d1f895c6fe | 216 | /*--------------------- GPIO Mode Configuration ------------------------*/ |
mbed_official | 340:28d1f895c6fe | 217 | /* In case of Alternate function mode selection */ |
mbed_official | 340:28d1f895c6fe | 218 | if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
mbed_official | 340:28d1f895c6fe | 219 | { |
mbed_official | 340:28d1f895c6fe | 220 | /* Check the Alternate function parameter */ |
mbed_official | 340:28d1f895c6fe | 221 | assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); |
mbed_official | 340:28d1f895c6fe | 222 | /* Configure Alternate function mapped with the current IO */ |
mbed_official | 340:28d1f895c6fe | 223 | temp = GPIOx->AFR[position >> 3]; |
mbed_official | 340:28d1f895c6fe | 224 | temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; |
mbed_official | 340:28d1f895c6fe | 225 | temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); |
mbed_official | 340:28d1f895c6fe | 226 | GPIOx->AFR[position >> 3] = temp; |
mbed_official | 340:28d1f895c6fe | 227 | } |
mbed_official | 340:28d1f895c6fe | 228 | |
mbed_official | 340:28d1f895c6fe | 229 | /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ |
mbed_official | 340:28d1f895c6fe | 230 | temp = GPIOx->MODER; |
mbed_official | 340:28d1f895c6fe | 231 | temp &= ~(GPIO_MODER_MODER0 << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 232 | temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 233 | GPIOx->MODER = temp; |
mbed_official | 340:28d1f895c6fe | 234 | |
mbed_official | 340:28d1f895c6fe | 235 | /* In case of Output or Alternate function mode selection */ |
mbed_official | 340:28d1f895c6fe | 236 | if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || |
mbed_official | 340:28d1f895c6fe | 237 | (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
mbed_official | 340:28d1f895c6fe | 238 | { |
mbed_official | 340:28d1f895c6fe | 239 | /* Check the Speed parameter */ |
mbed_official | 340:28d1f895c6fe | 240 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
mbed_official | 340:28d1f895c6fe | 241 | /* Configure the IO Speed */ |
mbed_official | 340:28d1f895c6fe | 242 | temp = GPIOx->OSPEEDR; |
mbed_official | 340:28d1f895c6fe | 243 | temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 244 | temp |= (GPIO_Init->Speed << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 245 | GPIOx->OSPEEDR = temp; |
mbed_official | 340:28d1f895c6fe | 246 | |
mbed_official | 340:28d1f895c6fe | 247 | /* Configure the IO Output Type */ |
mbed_official | 340:28d1f895c6fe | 248 | temp = GPIOx->OTYPER; |
mbed_official | 340:28d1f895c6fe | 249 | temp &= ~(GPIO_OTYPER_OT_0 << position) ; |
mbed_official | 340:28d1f895c6fe | 250 | temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); |
mbed_official | 340:28d1f895c6fe | 251 | GPIOx->OTYPER = temp; |
mbed_official | 340:28d1f895c6fe | 252 | } |
mbed_official | 340:28d1f895c6fe | 253 | |
mbed_official | 340:28d1f895c6fe | 254 | /* Activate the Pull-up or Pull down resistor for the current IO */ |
mbed_official | 340:28d1f895c6fe | 255 | temp = GPIOx->PUPDR; |
mbed_official | 340:28d1f895c6fe | 256 | temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 257 | temp |= ((GPIO_Init->Pull) << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 258 | GPIOx->PUPDR = temp; |
mbed_official | 340:28d1f895c6fe | 259 | |
mbed_official | 340:28d1f895c6fe | 260 | /*--------------------- EXTI Mode Configuration ------------------------*/ |
mbed_official | 340:28d1f895c6fe | 261 | /* Configure the External Interrupt or event for the current IO */ |
mbed_official | 340:28d1f895c6fe | 262 | if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) |
mbed_official | 340:28d1f895c6fe | 263 | { |
mbed_official | 340:28d1f895c6fe | 264 | /* Enable SYSCFG Clock */ |
mbed_official | 340:28d1f895c6fe | 265 | __SYSCFG_CLK_ENABLE(); |
mbed_official | 340:28d1f895c6fe | 266 | |
mbed_official | 340:28d1f895c6fe | 267 | temp = SYSCFG->EXTICR[position >> 2]; |
mbed_official | 340:28d1f895c6fe | 268 | temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); |
mbed_official | 340:28d1f895c6fe | 269 | temp |= (GET_GPIO_INDEX(GPIOx) << (4 * (position & 0x03))); |
mbed_official | 340:28d1f895c6fe | 270 | SYSCFG->EXTICR[position >> 2] = temp; |
mbed_official | 340:28d1f895c6fe | 271 | |
mbed_official | 340:28d1f895c6fe | 272 | /* Clear EXTI line configuration */ |
mbed_official | 340:28d1f895c6fe | 273 | temp = EXTI->IMR; |
mbed_official | 340:28d1f895c6fe | 274 | temp &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 275 | if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) |
mbed_official | 340:28d1f895c6fe | 276 | { |
mbed_official | 340:28d1f895c6fe | 277 | temp |= iocurrent; |
mbed_official | 340:28d1f895c6fe | 278 | } |
mbed_official | 340:28d1f895c6fe | 279 | EXTI->IMR = temp; |
mbed_official | 340:28d1f895c6fe | 280 | |
mbed_official | 340:28d1f895c6fe | 281 | temp = EXTI->EMR; |
mbed_official | 340:28d1f895c6fe | 282 | temp &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 283 | if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) |
mbed_official | 340:28d1f895c6fe | 284 | { |
mbed_official | 340:28d1f895c6fe | 285 | temp |= iocurrent; |
mbed_official | 340:28d1f895c6fe | 286 | } |
mbed_official | 340:28d1f895c6fe | 287 | EXTI->EMR = temp; |
mbed_official | 340:28d1f895c6fe | 288 | |
mbed_official | 340:28d1f895c6fe | 289 | /* Clear Rising Falling edge configuration */ |
mbed_official | 340:28d1f895c6fe | 290 | temp = EXTI->RTSR; |
mbed_official | 340:28d1f895c6fe | 291 | temp &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 292 | if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) |
mbed_official | 340:28d1f895c6fe | 293 | { |
mbed_official | 340:28d1f895c6fe | 294 | temp |= iocurrent; |
mbed_official | 340:28d1f895c6fe | 295 | } |
mbed_official | 340:28d1f895c6fe | 296 | EXTI->RTSR = temp; |
mbed_official | 340:28d1f895c6fe | 297 | |
mbed_official | 340:28d1f895c6fe | 298 | temp = EXTI->FTSR; |
mbed_official | 340:28d1f895c6fe | 299 | temp &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 300 | if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) |
mbed_official | 340:28d1f895c6fe | 301 | { |
mbed_official | 340:28d1f895c6fe | 302 | temp |= iocurrent; |
mbed_official | 340:28d1f895c6fe | 303 | } |
mbed_official | 340:28d1f895c6fe | 304 | EXTI->FTSR = temp; |
mbed_official | 340:28d1f895c6fe | 305 | } |
mbed_official | 340:28d1f895c6fe | 306 | else |
mbed_official | 340:28d1f895c6fe | 307 | { |
mbed_official | 340:28d1f895c6fe | 308 | temp = SYSCFG->EXTICR[position >> 2]; |
mbed_official | 340:28d1f895c6fe | 309 | temp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); |
mbed_official | 340:28d1f895c6fe | 310 | if(temp == (GET_GPIO_INDEX(GPIOx) << (4 * (position & 0x03)))) |
mbed_official | 340:28d1f895c6fe | 311 | { |
mbed_official | 340:28d1f895c6fe | 312 | /* Configure the External Interrupt or event for the current IO */ |
mbed_official | 340:28d1f895c6fe | 313 | temp = ((uint32_t)0x0F) << (4 * (position & 0x03)); |
mbed_official | 340:28d1f895c6fe | 314 | SYSCFG->EXTICR[position >> 2] &= ~temp; |
mbed_official | 340:28d1f895c6fe | 315 | |
mbed_official | 340:28d1f895c6fe | 316 | /* Clear EXTI line configuration */ |
mbed_official | 340:28d1f895c6fe | 317 | EXTI->IMR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 318 | EXTI->EMR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 319 | |
mbed_official | 340:28d1f895c6fe | 320 | /* Clear Rising Falling edge configuration */ |
mbed_official | 340:28d1f895c6fe | 321 | EXTI->RTSR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 322 | EXTI->FTSR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 323 | } |
mbed_official | 340:28d1f895c6fe | 324 | } |
mbed_official | 340:28d1f895c6fe | 325 | } |
mbed_official | 340:28d1f895c6fe | 326 | } |
mbed_official | 340:28d1f895c6fe | 327 | } |
mbed_official | 340:28d1f895c6fe | 328 | |
mbed_official | 340:28d1f895c6fe | 329 | /** |
mbed_official | 340:28d1f895c6fe | 330 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
mbed_official | 340:28d1f895c6fe | 331 | * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family |
mbed_official | 340:28d1f895c6fe | 332 | * @note GPIOD is only available on STM32F05xx, STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 333 | * @note GPIOE is only available on STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 334 | * @param GPIO_Pin: specifies the port bit to be written. |
mbed_official | 340:28d1f895c6fe | 335 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
mbed_official | 340:28d1f895c6fe | 336 | * @retval None |
mbed_official | 340:28d1f895c6fe | 337 | */ |
mbed_official | 340:28d1f895c6fe | 338 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
mbed_official | 340:28d1f895c6fe | 339 | { |
mbed_official | 340:28d1f895c6fe | 340 | uint32_t position; |
mbed_official | 340:28d1f895c6fe | 341 | uint32_t ioposition = 0x00; |
mbed_official | 340:28d1f895c6fe | 342 | uint32_t iocurrent = 0x00; |
mbed_official | 340:28d1f895c6fe | 343 | uint32_t tmp = 0x00; |
mbed_official | 340:28d1f895c6fe | 344 | |
mbed_official | 340:28d1f895c6fe | 345 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 346 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
mbed_official | 340:28d1f895c6fe | 347 | |
mbed_official | 340:28d1f895c6fe | 348 | /* Configure the port pins */ |
mbed_official | 340:28d1f895c6fe | 349 | for (position = 0; position < GPIO_NUMBER; position++) |
mbed_official | 340:28d1f895c6fe | 350 | { |
mbed_official | 340:28d1f895c6fe | 351 | /* Get the IO position */ |
mbed_official | 340:28d1f895c6fe | 352 | ioposition = ((uint32_t)0x01) << position; |
mbed_official | 340:28d1f895c6fe | 353 | /* Get the current IO position */ |
mbed_official | 340:28d1f895c6fe | 354 | iocurrent = (GPIO_Pin) & ioposition; |
mbed_official | 340:28d1f895c6fe | 355 | |
mbed_official | 340:28d1f895c6fe | 356 | if (iocurrent == ioposition) |
mbed_official | 340:28d1f895c6fe | 357 | { |
mbed_official | 340:28d1f895c6fe | 358 | /*------------------------- GPIO Mode Configuration --------------------*/ |
mbed_official | 340:28d1f895c6fe | 359 | /* Configure IO Direction in Input Floting Mode */ |
mbed_official | 340:28d1f895c6fe | 360 | GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 361 | |
mbed_official | 340:28d1f895c6fe | 362 | /* Configure the default Alternate Function in current IO */ |
mbed_official | 340:28d1f895c6fe | 363 | GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; |
mbed_official | 340:28d1f895c6fe | 364 | |
mbed_official | 340:28d1f895c6fe | 365 | /* Configure the default value for IO Speed */ |
mbed_official | 340:28d1f895c6fe | 366 | GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 367 | |
mbed_official | 340:28d1f895c6fe | 368 | /* Configure the default value IO Output Type */ |
mbed_official | 340:28d1f895c6fe | 369 | GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; |
mbed_official | 340:28d1f895c6fe | 370 | |
mbed_official | 340:28d1f895c6fe | 371 | /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ |
mbed_official | 340:28d1f895c6fe | 372 | GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2)); |
mbed_official | 340:28d1f895c6fe | 373 | |
mbed_official | 340:28d1f895c6fe | 374 | /*------------------------- EXTI Mode Configuration --------------------*/ |
mbed_official | 340:28d1f895c6fe | 375 | /* Clear the External Interrupt or Event for the current IO */ |
mbed_official | 340:28d1f895c6fe | 376 | |
mbed_official | 340:28d1f895c6fe | 377 | tmp = SYSCFG->EXTICR[position >> 2]; |
mbed_official | 340:28d1f895c6fe | 378 | tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); |
mbed_official | 340:28d1f895c6fe | 379 | if(tmp == (GET_GPIO_INDEX(GPIOx) << (4 * (position & 0x03)))) |
mbed_official | 340:28d1f895c6fe | 380 | { |
mbed_official | 340:28d1f895c6fe | 381 | tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); |
mbed_official | 340:28d1f895c6fe | 382 | SYSCFG->EXTICR[position >> 2] &= ~tmp; |
mbed_official | 340:28d1f895c6fe | 383 | |
mbed_official | 340:28d1f895c6fe | 384 | /* Clear EXTI line configuration */ |
mbed_official | 340:28d1f895c6fe | 385 | EXTI->IMR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 386 | EXTI->EMR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 387 | |
mbed_official | 340:28d1f895c6fe | 388 | /* Clear Rising Falling edge configuration */ |
mbed_official | 340:28d1f895c6fe | 389 | EXTI->RTSR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 390 | EXTI->FTSR &= ~((uint32_t)iocurrent); |
mbed_official | 340:28d1f895c6fe | 391 | } |
mbed_official | 340:28d1f895c6fe | 392 | } |
mbed_official | 340:28d1f895c6fe | 393 | } |
mbed_official | 340:28d1f895c6fe | 394 | } |
mbed_official | 340:28d1f895c6fe | 395 | |
mbed_official | 340:28d1f895c6fe | 396 | /** |
mbed_official | 340:28d1f895c6fe | 397 | * @} |
mbed_official | 340:28d1f895c6fe | 398 | */ |
mbed_official | 340:28d1f895c6fe | 399 | |
mbed_official | 340:28d1f895c6fe | 400 | /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions |
mbed_official | 340:28d1f895c6fe | 401 | * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. |
mbed_official | 340:28d1f895c6fe | 402 | * |
mbed_official | 340:28d1f895c6fe | 403 | @verbatim |
mbed_official | 340:28d1f895c6fe | 404 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 405 | ##### IO operation functions ##### |
mbed_official | 340:28d1f895c6fe | 406 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 407 | |
mbed_official | 340:28d1f895c6fe | 408 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 409 | * @{ |
mbed_official | 340:28d1f895c6fe | 410 | */ |
mbed_official | 340:28d1f895c6fe | 411 | |
mbed_official | 340:28d1f895c6fe | 412 | /** |
mbed_official | 340:28d1f895c6fe | 413 | * @brief Reads the specified input port pin. |
mbed_official | 340:28d1f895c6fe | 414 | * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family |
mbed_official | 340:28d1f895c6fe | 415 | * @note GPIOD is only available on STM32F05xx, STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 416 | * @note GPIOE is only available on STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 417 | * @param GPIO_Pin: specifies the port bit to read. |
mbed_official | 340:28d1f895c6fe | 418 | * This parameter can be GPIO_PIN_x where x can be (0..15). |
mbed_official | 340:28d1f895c6fe | 419 | * @retval The input port pin value. |
mbed_official | 340:28d1f895c6fe | 420 | */ |
mbed_official | 340:28d1f895c6fe | 421 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
mbed_official | 340:28d1f895c6fe | 422 | { |
mbed_official | 340:28d1f895c6fe | 423 | GPIO_PinState bitstatus; |
mbed_official | 340:28d1f895c6fe | 424 | |
mbed_official | 340:28d1f895c6fe | 425 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 426 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
mbed_official | 340:28d1f895c6fe | 427 | |
mbed_official | 340:28d1f895c6fe | 428 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) |
mbed_official | 340:28d1f895c6fe | 429 | { |
mbed_official | 340:28d1f895c6fe | 430 | bitstatus = GPIO_PIN_SET; |
mbed_official | 340:28d1f895c6fe | 431 | } |
mbed_official | 340:28d1f895c6fe | 432 | else |
mbed_official | 340:28d1f895c6fe | 433 | { |
mbed_official | 340:28d1f895c6fe | 434 | bitstatus = GPIO_PIN_RESET; |
mbed_official | 340:28d1f895c6fe | 435 | } |
mbed_official | 340:28d1f895c6fe | 436 | return bitstatus; |
mbed_official | 340:28d1f895c6fe | 437 | } |
mbed_official | 340:28d1f895c6fe | 438 | |
mbed_official | 340:28d1f895c6fe | 439 | /** |
mbed_official | 340:28d1f895c6fe | 440 | * @brief Sets or clears the selected data port bit. |
mbed_official | 340:28d1f895c6fe | 441 | * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
mbed_official | 340:28d1f895c6fe | 442 | * accesses. In this way, there is no risk of an IRQ occurring between |
mbed_official | 340:28d1f895c6fe | 443 | * the read and the modify access. |
mbed_official | 340:28d1f895c6fe | 444 | * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family |
mbed_official | 340:28d1f895c6fe | 445 | * @note GPIOD is only available on STM32F05xx, STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 446 | * @note GPIOE is only available on STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 447 | * @param GPIO_Pin: specifies the port bit to be written. |
mbed_official | 340:28d1f895c6fe | 448 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
mbed_official | 340:28d1f895c6fe | 449 | * @param PinState: specifies the value to be written to the selected bit. |
mbed_official | 340:28d1f895c6fe | 450 | * This parameter can be one of the GPIO_PinState enum values: |
mbed_official | 340:28d1f895c6fe | 451 | * @arg GPIO_PIN_RESET: to clear the port pin |
mbed_official | 340:28d1f895c6fe | 452 | * @arg GPIO_PIN_SET: to set the port pin |
mbed_official | 340:28d1f895c6fe | 453 | * @retval None |
mbed_official | 340:28d1f895c6fe | 454 | */ |
mbed_official | 340:28d1f895c6fe | 455 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
mbed_official | 340:28d1f895c6fe | 456 | { |
mbed_official | 340:28d1f895c6fe | 457 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 458 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
mbed_official | 340:28d1f895c6fe | 459 | assert_param(IS_GPIO_PIN_ACTION(PinState)); |
mbed_official | 340:28d1f895c6fe | 460 | |
mbed_official | 340:28d1f895c6fe | 461 | if (PinState != GPIO_PIN_RESET) |
mbed_official | 340:28d1f895c6fe | 462 | { |
mbed_official | 340:28d1f895c6fe | 463 | GPIOx->BSRR = (uint32_t)GPIO_Pin; |
mbed_official | 340:28d1f895c6fe | 464 | } |
mbed_official | 340:28d1f895c6fe | 465 | else |
mbed_official | 340:28d1f895c6fe | 466 | { |
mbed_official | 340:28d1f895c6fe | 467 | GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; |
mbed_official | 340:28d1f895c6fe | 468 | } |
mbed_official | 340:28d1f895c6fe | 469 | } |
mbed_official | 340:28d1f895c6fe | 470 | |
mbed_official | 340:28d1f895c6fe | 471 | /** |
mbed_official | 340:28d1f895c6fe | 472 | * @brief Toggles the specified GPIO pin |
mbed_official | 340:28d1f895c6fe | 473 | * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family |
mbed_official | 340:28d1f895c6fe | 474 | * @note GPIOD is only available on STM32F05xx, STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 475 | * @note GPIOE is only available on STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 476 | * @param GPIO_Pin: specifies the pins to be toggled. |
mbed_official | 340:28d1f895c6fe | 477 | * @retval None |
mbed_official | 340:28d1f895c6fe | 478 | */ |
mbed_official | 340:28d1f895c6fe | 479 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
mbed_official | 340:28d1f895c6fe | 480 | { |
mbed_official | 340:28d1f895c6fe | 481 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 482 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
mbed_official | 340:28d1f895c6fe | 483 | |
mbed_official | 340:28d1f895c6fe | 484 | GPIOx->ODR ^= GPIO_Pin; |
mbed_official | 340:28d1f895c6fe | 485 | } |
mbed_official | 340:28d1f895c6fe | 486 | |
mbed_official | 340:28d1f895c6fe | 487 | /** |
mbed_official | 340:28d1f895c6fe | 488 | * @brief Locks GPIO Pins configuration registers. |
mbed_official | 340:28d1f895c6fe | 489 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
mbed_official | 340:28d1f895c6fe | 490 | * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. |
mbed_official | 340:28d1f895c6fe | 491 | * @note The configuration of the locked GPIO pins can no longer be modified |
mbed_official | 340:28d1f895c6fe | 492 | * until the next reset. |
mbed_official | 340:28d1f895c6fe | 493 | * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family |
mbed_official | 340:28d1f895c6fe | 494 | * @note GPIOD is only available on STM32F05xx, STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 495 | * @note GPIOE is only available on STM32F07xx and STM32F09xx |
mbed_official | 340:28d1f895c6fe | 496 | * @param GPIO_Pin: specifies the port bit to be locked. |
mbed_official | 340:28d1f895c6fe | 497 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
mbed_official | 340:28d1f895c6fe | 498 | * @retval None |
mbed_official | 340:28d1f895c6fe | 499 | */ |
mbed_official | 340:28d1f895c6fe | 500 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
mbed_official | 340:28d1f895c6fe | 501 | { |
mbed_official | 340:28d1f895c6fe | 502 | __IO uint32_t tmp = GPIO_LCKR_LCKK; |
mbed_official | 340:28d1f895c6fe | 503 | |
mbed_official | 340:28d1f895c6fe | 504 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 505 | assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); |
mbed_official | 340:28d1f895c6fe | 506 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
mbed_official | 340:28d1f895c6fe | 507 | |
mbed_official | 340:28d1f895c6fe | 508 | /* Apply lock key write sequence */ |
mbed_official | 340:28d1f895c6fe | 509 | tmp |= GPIO_Pin; |
mbed_official | 340:28d1f895c6fe | 510 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
mbed_official | 340:28d1f895c6fe | 511 | GPIOx->LCKR = tmp; |
mbed_official | 340:28d1f895c6fe | 512 | /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
mbed_official | 340:28d1f895c6fe | 513 | GPIOx->LCKR = GPIO_Pin; |
mbed_official | 340:28d1f895c6fe | 514 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
mbed_official | 340:28d1f895c6fe | 515 | GPIOx->LCKR = tmp; |
mbed_official | 340:28d1f895c6fe | 516 | /* Read LCKK bit*/ |
mbed_official | 340:28d1f895c6fe | 517 | tmp = GPIOx->LCKR; |
mbed_official | 340:28d1f895c6fe | 518 | |
mbed_official | 340:28d1f895c6fe | 519 | if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) |
mbed_official | 340:28d1f895c6fe | 520 | { |
mbed_official | 340:28d1f895c6fe | 521 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 522 | } |
mbed_official | 340:28d1f895c6fe | 523 | else |
mbed_official | 340:28d1f895c6fe | 524 | { |
mbed_official | 340:28d1f895c6fe | 525 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 526 | } |
mbed_official | 340:28d1f895c6fe | 527 | } |
mbed_official | 340:28d1f895c6fe | 528 | |
mbed_official | 340:28d1f895c6fe | 529 | /** |
mbed_official | 340:28d1f895c6fe | 530 | * @brief This function handles EXTI interrupt request. |
mbed_official | 340:28d1f895c6fe | 531 | * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. |
mbed_official | 340:28d1f895c6fe | 532 | * @retval None |
mbed_official | 340:28d1f895c6fe | 533 | */ |
mbed_official | 340:28d1f895c6fe | 534 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
mbed_official | 340:28d1f895c6fe | 535 | { |
mbed_official | 340:28d1f895c6fe | 536 | /* EXTI line interrupt detected */ |
mbed_official | 340:28d1f895c6fe | 537 | if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
mbed_official | 340:28d1f895c6fe | 538 | { |
mbed_official | 340:28d1f895c6fe | 539 | __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
mbed_official | 340:28d1f895c6fe | 540 | HAL_GPIO_EXTI_Callback(GPIO_Pin); |
mbed_official | 340:28d1f895c6fe | 541 | } |
mbed_official | 340:28d1f895c6fe | 542 | } |
mbed_official | 340:28d1f895c6fe | 543 | |
mbed_official | 340:28d1f895c6fe | 544 | /** |
mbed_official | 340:28d1f895c6fe | 545 | * @brief EXTI line detection callbacks. |
mbed_official | 340:28d1f895c6fe | 546 | * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. |
mbed_official | 340:28d1f895c6fe | 547 | * @retval None |
mbed_official | 340:28d1f895c6fe | 548 | */ |
mbed_official | 340:28d1f895c6fe | 549 | __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
mbed_official | 340:28d1f895c6fe | 550 | { |
mbed_official | 340:28d1f895c6fe | 551 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 552 | the HAL_GPIO_EXTI_Callback could be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 553 | */ |
mbed_official | 340:28d1f895c6fe | 554 | } |
mbed_official | 340:28d1f895c6fe | 555 | |
mbed_official | 340:28d1f895c6fe | 556 | /** |
mbed_official | 340:28d1f895c6fe | 557 | * @} |
mbed_official | 340:28d1f895c6fe | 558 | */ |
mbed_official | 340:28d1f895c6fe | 559 | |
mbed_official | 340:28d1f895c6fe | 560 | |
mbed_official | 340:28d1f895c6fe | 561 | /** |
mbed_official | 340:28d1f895c6fe | 562 | * @} |
mbed_official | 340:28d1f895c6fe | 563 | */ |
mbed_official | 340:28d1f895c6fe | 564 | |
mbed_official | 340:28d1f895c6fe | 565 | #endif /* HAL_GPIO_MODULE_ENABLED */ |
mbed_official | 340:28d1f895c6fe | 566 | /** |
mbed_official | 340:28d1f895c6fe | 567 | * @} |
mbed_official | 340:28d1f895c6fe | 568 | */ |
mbed_official | 340:28d1f895c6fe | 569 | |
mbed_official | 340:28d1f895c6fe | 570 | /** |
mbed_official | 340:28d1f895c6fe | 571 | * @} |
mbed_official | 340:28d1f895c6fe | 572 | */ |
mbed_official | 340:28d1f895c6fe | 573 | |
mbed_official | 340:28d1f895c6fe | 574 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |