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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F091RC/stm32f0xx_hal_adc.c@340:28d1f895c6fe, 2014-10-09 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Oct 09 08:15:07 2014 +0100
- Revision:
- 340:28d1f895c6fe
Synchronized with git revision b5a4c8e80393336b2656fb29ab46d405d3068602
Full URL: https://github.com/mbedmicro/mbed/commit/b5a4c8e80393336b2656fb29ab46d405d3068602/
HAL: nrf51822 - Few fixes for PWM and Serial
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 340:28d1f895c6fe | 1 | /** |
mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_adc.c |
mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
mbed_official | 340:28d1f895c6fe | 5 | * @version V1.1.0 |
mbed_official | 340:28d1f895c6fe | 6 | * @date 03-Oct-2014 |
mbed_official | 340:28d1f895c6fe | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 340:28d1f895c6fe | 8 | * functionalities of the Analog to Digital Convertor (ADC) |
mbed_official | 340:28d1f895c6fe | 9 | * peripheral: |
mbed_official | 340:28d1f895c6fe | 10 | * + Initialization and de-initialization functions |
mbed_official | 340:28d1f895c6fe | 11 | * ++ Initialization and Configuration of ADC |
mbed_official | 340:28d1f895c6fe | 12 | * + Operation functions |
mbed_official | 340:28d1f895c6fe | 13 | * ++ Start, stop, get result of conversions of regular group, |
mbed_official | 340:28d1f895c6fe | 14 | * using 3 possible modes: polling, interruption or DMA. |
mbed_official | 340:28d1f895c6fe | 15 | * + Control functions |
mbed_official | 340:28d1f895c6fe | 16 | * ++ Analog Watchdog configuration |
mbed_official | 340:28d1f895c6fe | 17 | * ++ Channels configuration on regular group |
mbed_official | 340:28d1f895c6fe | 18 | * + State functions |
mbed_official | 340:28d1f895c6fe | 19 | * ++ ADC state machine management |
mbed_official | 340:28d1f895c6fe | 20 | * ++ Interrupts and flags management |
mbed_official | 340:28d1f895c6fe | 21 | * |
mbed_official | 340:28d1f895c6fe | 22 | @verbatim |
mbed_official | 340:28d1f895c6fe | 23 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 24 | ##### ADC specific features ##### |
mbed_official | 340:28d1f895c6fe | 25 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 26 | [..] |
mbed_official | 340:28d1f895c6fe | 27 | (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution |
mbed_official | 340:28d1f895c6fe | 28 | |
mbed_official | 340:28d1f895c6fe | 29 | (#) Interrupt generation at the end of regular conversion and in case of |
mbed_official | 340:28d1f895c6fe | 30 | analog watchdog or overrun events. |
mbed_official | 340:28d1f895c6fe | 31 | |
mbed_official | 340:28d1f895c6fe | 32 | (#) Single and continuous conversion modes. |
mbed_official | 340:28d1f895c6fe | 33 | |
mbed_official | 340:28d1f895c6fe | 34 | (#) Scan mode for automatic conversion of channel 0 to channel 'n'. |
mbed_official | 340:28d1f895c6fe | 35 | |
mbed_official | 340:28d1f895c6fe | 36 | (#) Data alignment with in-built data coherency. |
mbed_official | 340:28d1f895c6fe | 37 | |
mbed_official | 340:28d1f895c6fe | 38 | (#) Programmable sampling time. |
mbed_official | 340:28d1f895c6fe | 39 | |
mbed_official | 340:28d1f895c6fe | 40 | (#) ADC conversion group Regular. |
mbed_official | 340:28d1f895c6fe | 41 | |
mbed_official | 340:28d1f895c6fe | 42 | (#) External trigger (timer or EXTI) with configurable polarity. |
mbed_official | 340:28d1f895c6fe | 43 | |
mbed_official | 340:28d1f895c6fe | 44 | (#) DMA request generation for transfer of conversions data of regular group. |
mbed_official | 340:28d1f895c6fe | 45 | |
mbed_official | 340:28d1f895c6fe | 46 | (#) ADC calibration |
mbed_official | 340:28d1f895c6fe | 47 | |
mbed_official | 340:28d1f895c6fe | 48 | (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at |
mbed_official | 340:28d1f895c6fe | 49 | slower speed. |
mbed_official | 340:28d1f895c6fe | 50 | |
mbed_official | 340:28d1f895c6fe | 51 | (#) ADC input range: from Vref minus (connected to Vssa) to Vref plus (connected to |
mbed_official | 340:28d1f895c6fe | 52 | Vdda or to an external voltage reference). |
mbed_official | 340:28d1f895c6fe | 53 | |
mbed_official | 340:28d1f895c6fe | 54 | |
mbed_official | 340:28d1f895c6fe | 55 | ##### How to use this driver ##### |
mbed_official | 340:28d1f895c6fe | 56 | ============================================================================== |
mbed_official | 340:28d1f895c6fe | 57 | [..] |
mbed_official | 340:28d1f895c6fe | 58 | |
mbed_official | 340:28d1f895c6fe | 59 | (#) Enable the ADC interface |
mbed_official | 340:28d1f895c6fe | 60 | (++) As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured |
mbed_official | 340:28d1f895c6fe | 61 | at RCC top level: clock source and clock prescaler. |
mbed_official | 340:28d1f895c6fe | 62 | (++)Two possible clock sources: synchronous clock derived from APB clock |
mbed_official | 340:28d1f895c6fe | 63 | or asynchronous clock derived from ADC dedicated HSI RC oscillator |
mbed_official | 340:28d1f895c6fe | 64 | 14MHz. |
mbed_official | 340:28d1f895c6fe | 65 | (++)Example: |
mbed_official | 340:28d1f895c6fe | 66 | __ADC1_CLK_ENABLE(); (mandatory) |
mbed_official | 340:28d1f895c6fe | 67 | |
mbed_official | 340:28d1f895c6fe | 68 | HI14 enable or let under control of ADC: (optional) |
mbed_official | 340:28d1f895c6fe | 69 | |
mbed_official | 340:28d1f895c6fe | 70 | RCC_OscInitTypeDef RCC_OscInitStructure; |
mbed_official | 340:28d1f895c6fe | 71 | RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; |
mbed_official | 340:28d1f895c6fe | 72 | RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; |
mbed_official | 340:28d1f895c6fe | 73 | RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL; |
mbed_official | 340:28d1f895c6fe | 74 | RCC_OscInitStructure.PLL... (optional if used for system clock) |
mbed_official | 340:28d1f895c6fe | 75 | HAL_RCC_OscConfig(&RCC_OscInitStructure); |
mbed_official | 340:28d1f895c6fe | 76 | |
mbed_official | 340:28d1f895c6fe | 77 | Parameter "HSI14State" must be set either: |
mbed_official | 340:28d1f895c6fe | 78 | - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control |
mbed_official | 340:28d1f895c6fe | 79 | the HSI14 oscillator enable/disable (if not used to supply the main |
mbed_official | 340:28d1f895c6fe | 80 | system clock): feature used if ADC mode LowPowerAutoPowerOff is |
mbed_official | 340:28d1f895c6fe | 81 | enabled. |
mbed_official | 340:28d1f895c6fe | 82 | - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator |
mbed_official | 340:28d1f895c6fe | 83 | always enabled: can be used to supply the main system clock. |
mbed_official | 340:28d1f895c6fe | 84 | |
mbed_official | 340:28d1f895c6fe | 85 | (#) ADC pins configuration |
mbed_official | 340:28d1f895c6fe | 86 | (++) Enable the clock for the ADC GPIOs using the following function: |
mbed_official | 340:28d1f895c6fe | 87 | __GPIOx_CLK_ENABLE(); |
mbed_official | 340:28d1f895c6fe | 88 | (++) Configure these ADC pins in analog mode using HAL_GPIO_Init(); |
mbed_official | 340:28d1f895c6fe | 89 | |
mbed_official | 340:28d1f895c6fe | 90 | (#) Configure the ADC parameters (conversion resolution, data alignment, |
mbed_official | 340:28d1f895c6fe | 91 | continuous mode, ...) using the HAL_ADC_Init() function. |
mbed_official | 340:28d1f895c6fe | 92 | |
mbed_official | 340:28d1f895c6fe | 93 | (#) Activate the ADC peripheral using one of the start functions: |
mbed_official | 340:28d1f895c6fe | 94 | HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA(). |
mbed_official | 340:28d1f895c6fe | 95 | |
mbed_official | 340:28d1f895c6fe | 96 | *** Channels configuration to regular group *** |
mbed_official | 340:28d1f895c6fe | 97 | ================================================ |
mbed_official | 340:28d1f895c6fe | 98 | [..] |
mbed_official | 340:28d1f895c6fe | 99 | (+) To configure the ADC regular group features, use |
mbed_official | 340:28d1f895c6fe | 100 | HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions. |
mbed_official | 340:28d1f895c6fe | 101 | (+) To activate the continuous mode, use the HAL_ADC_Init() function. |
mbed_official | 340:28d1f895c6fe | 102 | (+) To read the ADC converted values, use the HAL_ADC_GetValue() function. |
mbed_official | 340:28d1f895c6fe | 103 | |
mbed_official | 340:28d1f895c6fe | 104 | *** DMA for regular configuration *** |
mbed_official | 340:28d1f895c6fe | 105 | ============================================================= |
mbed_official | 340:28d1f895c6fe | 106 | [..] |
mbed_official | 340:28d1f895c6fe | 107 | (+) To enable the DMA mode for regular group, use the |
mbed_official | 340:28d1f895c6fe | 108 | HAL_ADC_Start_DMA() function. |
mbed_official | 340:28d1f895c6fe | 109 | (+) To enable the generation of DMA requests continuously at the end of |
mbed_official | 340:28d1f895c6fe | 110 | the last DMA transfer, use the HAL_ADC_Init() function. |
mbed_official | 340:28d1f895c6fe | 111 | |
mbed_official | 340:28d1f895c6fe | 112 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 113 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 114 | * @attention |
mbed_official | 340:28d1f895c6fe | 115 | * |
mbed_official | 340:28d1f895c6fe | 116 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 340:28d1f895c6fe | 117 | * |
mbed_official | 340:28d1f895c6fe | 118 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 340:28d1f895c6fe | 119 | * are permitted provided that the following conditions are met: |
mbed_official | 340:28d1f895c6fe | 120 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 121 | * this list of conditions and the following disclaimer. |
mbed_official | 340:28d1f895c6fe | 122 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 123 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 340:28d1f895c6fe | 124 | * and/or other materials provided with the distribution. |
mbed_official | 340:28d1f895c6fe | 125 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 340:28d1f895c6fe | 126 | * may be used to endorse or promote products derived from this software |
mbed_official | 340:28d1f895c6fe | 127 | * without specific prior written permission. |
mbed_official | 340:28d1f895c6fe | 128 | * |
mbed_official | 340:28d1f895c6fe | 129 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 340:28d1f895c6fe | 130 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 340:28d1f895c6fe | 131 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 340:28d1f895c6fe | 132 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 340:28d1f895c6fe | 133 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 340:28d1f895c6fe | 134 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 340:28d1f895c6fe | 135 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 340:28d1f895c6fe | 136 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 340:28d1f895c6fe | 137 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 340:28d1f895c6fe | 138 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 340:28d1f895c6fe | 139 | * |
mbed_official | 340:28d1f895c6fe | 140 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 141 | */ |
mbed_official | 340:28d1f895c6fe | 142 | |
mbed_official | 340:28d1f895c6fe | 143 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 144 | #include "stm32f0xx_hal.h" |
mbed_official | 340:28d1f895c6fe | 145 | |
mbed_official | 340:28d1f895c6fe | 146 | /** @addtogroup STM32F0xx_HAL_Driver |
mbed_official | 340:28d1f895c6fe | 147 | * @{ |
mbed_official | 340:28d1f895c6fe | 148 | */ |
mbed_official | 340:28d1f895c6fe | 149 | |
mbed_official | 340:28d1f895c6fe | 150 | /** @defgroup ADC ADC HAL module driver |
mbed_official | 340:28d1f895c6fe | 151 | * @brief ADC HAL module driver |
mbed_official | 340:28d1f895c6fe | 152 | * @{ |
mbed_official | 340:28d1f895c6fe | 153 | */ |
mbed_official | 340:28d1f895c6fe | 154 | |
mbed_official | 340:28d1f895c6fe | 155 | #ifdef HAL_ADC_MODULE_ENABLED |
mbed_official | 340:28d1f895c6fe | 156 | |
mbed_official | 340:28d1f895c6fe | 157 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 158 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 159 | /** @defgroup ADC_Private_Constants ADC Private Constants |
mbed_official | 340:28d1f895c6fe | 160 | * @{ |
mbed_official | 340:28d1f895c6fe | 161 | */ |
mbed_official | 340:28d1f895c6fe | 162 | |
mbed_official | 340:28d1f895c6fe | 163 | /* Fixed timeout values for ADC calibration, enable settling time, disable */ |
mbed_official | 340:28d1f895c6fe | 164 | /* settling time. */ |
mbed_official | 340:28d1f895c6fe | 165 | /* Values defined to be higher than worst cases: low clock frequency, */ |
mbed_official | 340:28d1f895c6fe | 166 | /* maximum prescaler. */ |
mbed_official | 340:28d1f895c6fe | 167 | /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ |
mbed_official | 340:28d1f895c6fe | 168 | /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */ |
mbed_official | 340:28d1f895c6fe | 169 | /* Unit: ms */ |
mbed_official | 340:28d1f895c6fe | 170 | #define ADC_ENABLE_TIMEOUT ((uint32_t) 2) |
mbed_official | 340:28d1f895c6fe | 171 | #define ADC_DISABLE_TIMEOUT ((uint32_t) 2) |
mbed_official | 340:28d1f895c6fe | 172 | #define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 2) |
mbed_official | 340:28d1f895c6fe | 173 | |
mbed_official | 340:28d1f895c6fe | 174 | /* Delay for temperature sensor stabilization time. */ |
mbed_official | 340:28d1f895c6fe | 175 | /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */ |
mbed_official | 340:28d1f895c6fe | 176 | /* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 48MHz to */ |
mbed_official | 340:28d1f895c6fe | 177 | /* have the minimum number of CPU cycles to fulfill this delay. */ |
mbed_official | 340:28d1f895c6fe | 178 | #define ADC_TEMPSENSOR_DELAY_CPU_CYCLES ((uint32_t) 480) |
mbed_official | 340:28d1f895c6fe | 179 | |
mbed_official | 340:28d1f895c6fe | 180 | /* Delay for ADC stabilization time. */ |
mbed_official | 340:28d1f895c6fe | 181 | /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */ |
mbed_official | 340:28d1f895c6fe | 182 | /* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 48MHz to */ |
mbed_official | 340:28d1f895c6fe | 183 | /* have the minimum number of CPU cycles to fulfill this delay. */ |
mbed_official | 340:28d1f895c6fe | 184 | #define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)48) |
mbed_official | 340:28d1f895c6fe | 185 | /** |
mbed_official | 340:28d1f895c6fe | 186 | * @} |
mbed_official | 340:28d1f895c6fe | 187 | */ |
mbed_official | 340:28d1f895c6fe | 188 | |
mbed_official | 340:28d1f895c6fe | 189 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 190 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 191 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 192 | /** @defgroup ADC_Private_Functions ADC Private Functions |
mbed_official | 340:28d1f895c6fe | 193 | * @{ |
mbed_official | 340:28d1f895c6fe | 194 | */ |
mbed_official | 340:28d1f895c6fe | 195 | static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); |
mbed_official | 340:28d1f895c6fe | 196 | static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); |
mbed_official | 340:28d1f895c6fe | 197 | static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc); |
mbed_official | 340:28d1f895c6fe | 198 | static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 199 | static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 200 | static void ADC_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 340:28d1f895c6fe | 201 | /** |
mbed_official | 340:28d1f895c6fe | 202 | * @} |
mbed_official | 340:28d1f895c6fe | 203 | */ |
mbed_official | 340:28d1f895c6fe | 204 | |
mbed_official | 340:28d1f895c6fe | 205 | /* Exported functions ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 206 | |
mbed_official | 340:28d1f895c6fe | 207 | /** @defgroup ADC_Exported_Functions ADC Exported Functions |
mbed_official | 340:28d1f895c6fe | 208 | * @{ |
mbed_official | 340:28d1f895c6fe | 209 | */ |
mbed_official | 340:28d1f895c6fe | 210 | |
mbed_official | 340:28d1f895c6fe | 211 | /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions |
mbed_official | 340:28d1f895c6fe | 212 | * @brief Initialization and Configuration functions |
mbed_official | 340:28d1f895c6fe | 213 | * |
mbed_official | 340:28d1f895c6fe | 214 | @verbatim |
mbed_official | 340:28d1f895c6fe | 215 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 216 | ##### Initialization and de-initialization functions ##### |
mbed_official | 340:28d1f895c6fe | 217 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 218 | [..] This section provides functions allowing to: |
mbed_official | 340:28d1f895c6fe | 219 | (+) Initialize and configure the ADC. |
mbed_official | 340:28d1f895c6fe | 220 | (+) De-initialize the ADC |
mbed_official | 340:28d1f895c6fe | 221 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 222 | * @{ |
mbed_official | 340:28d1f895c6fe | 223 | */ |
mbed_official | 340:28d1f895c6fe | 224 | |
mbed_official | 340:28d1f895c6fe | 225 | /** |
mbed_official | 340:28d1f895c6fe | 226 | * @brief Initializes the ADC peripheral and regular group according to |
mbed_official | 340:28d1f895c6fe | 227 | * parameters specified in structure "ADC_InitTypeDef". |
mbed_official | 340:28d1f895c6fe | 228 | * @note As prerequisite, ADC clock must be configured at RCC top level |
mbed_official | 340:28d1f895c6fe | 229 | * depending on both possible clock sources: APB clock of HSI clock. |
mbed_official | 340:28d1f895c6fe | 230 | * See commented example code below that can be copied and uncommented |
mbed_official | 340:28d1f895c6fe | 231 | * into HAL_ADC_MspInit(). |
mbed_official | 340:28d1f895c6fe | 232 | * @note Possibility to update parameters on the fly: |
mbed_official | 340:28d1f895c6fe | 233 | * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when |
mbed_official | 340:28d1f895c6fe | 234 | * coming from ADC state reset. Following calls to this function can |
mbed_official | 340:28d1f895c6fe | 235 | * be used to reconfigure some parameters of ADC_InitTypeDef |
mbed_official | 340:28d1f895c6fe | 236 | * structure on the fly, without modifying MSP configuration. If ADC |
mbed_official | 340:28d1f895c6fe | 237 | * MSP has to be modified again, HAL_ADC_DeInit() must be called |
mbed_official | 340:28d1f895c6fe | 238 | * before HAL_ADC_Init(). |
mbed_official | 340:28d1f895c6fe | 239 | * The setting of these parameters is conditioned to ADC state. |
mbed_official | 340:28d1f895c6fe | 240 | * For parameters constraints, see comments of structure |
mbed_official | 340:28d1f895c6fe | 241 | * "ADC_InitTypeDef". |
mbed_official | 340:28d1f895c6fe | 242 | * @note This function configures the ADC within 2 scopes: scope of entire |
mbed_official | 340:28d1f895c6fe | 243 | * ADC and scope of regular group. For parameters details, see comments |
mbed_official | 340:28d1f895c6fe | 244 | * of structure "ADC_InitTypeDef". |
mbed_official | 340:28d1f895c6fe | 245 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 246 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 247 | */ |
mbed_official | 340:28d1f895c6fe | 248 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 249 | { |
mbed_official | 340:28d1f895c6fe | 250 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 251 | uint32_t tmpCFGR1 = 0; |
mbed_official | 340:28d1f895c6fe | 252 | |
mbed_official | 340:28d1f895c6fe | 253 | /* Check ADC handle */ |
mbed_official | 340:28d1f895c6fe | 254 | if(hadc == HAL_NULL) |
mbed_official | 340:28d1f895c6fe | 255 | { |
mbed_official | 340:28d1f895c6fe | 256 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 257 | } |
mbed_official | 340:28d1f895c6fe | 258 | |
mbed_official | 340:28d1f895c6fe | 259 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 260 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 261 | assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); |
mbed_official | 340:28d1f895c6fe | 262 | assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); |
mbed_official | 340:28d1f895c6fe | 263 | assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); |
mbed_official | 340:28d1f895c6fe | 264 | assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); |
mbed_official | 340:28d1f895c6fe | 265 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 340:28d1f895c6fe | 266 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); |
mbed_official | 340:28d1f895c6fe | 267 | assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
mbed_official | 340:28d1f895c6fe | 268 | assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); |
mbed_official | 340:28d1f895c6fe | 269 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
mbed_official | 340:28d1f895c6fe | 270 | assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); |
mbed_official | 340:28d1f895c6fe | 271 | assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); |
mbed_official | 340:28d1f895c6fe | 272 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); |
mbed_official | 340:28d1f895c6fe | 273 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); |
mbed_official | 340:28d1f895c6fe | 274 | |
mbed_official | 340:28d1f895c6fe | 275 | /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */ |
mbed_official | 340:28d1f895c6fe | 276 | /* at RCC top level depending on both possible clock sources: */ |
mbed_official | 340:28d1f895c6fe | 277 | /* APB clock or HSI clock. */ |
mbed_official | 340:28d1f895c6fe | 278 | /* Refer to header of this file for more details on clock enabling procedure*/ |
mbed_official | 340:28d1f895c6fe | 279 | |
mbed_official | 340:28d1f895c6fe | 280 | /* Actions performed only if ADC is coming from state reset: */ |
mbed_official | 340:28d1f895c6fe | 281 | /* - Initialization of ADC MSP */ |
mbed_official | 340:28d1f895c6fe | 282 | /* - ADC voltage regulator enable */ |
mbed_official | 340:28d1f895c6fe | 283 | if (hadc->State == HAL_ADC_STATE_RESET) |
mbed_official | 340:28d1f895c6fe | 284 | { |
mbed_official | 340:28d1f895c6fe | 285 | /* Init the low level hardware */ |
mbed_official | 340:28d1f895c6fe | 286 | HAL_ADC_MspInit(hadc); |
mbed_official | 340:28d1f895c6fe | 287 | |
mbed_official | 340:28d1f895c6fe | 288 | } |
mbed_official | 340:28d1f895c6fe | 289 | |
mbed_official | 340:28d1f895c6fe | 290 | /* Configuration of ADC parameters if previous preliminary actions are */ |
mbed_official | 340:28d1f895c6fe | 291 | /* correctly completed. */ |
mbed_official | 340:28d1f895c6fe | 292 | /* and if there is no conversion on going on regular group (ADC can be */ |
mbed_official | 340:28d1f895c6fe | 293 | /* enabled anyway, in case of call of this function to update a parameter */ |
mbed_official | 340:28d1f895c6fe | 294 | /* on the fly). */ |
mbed_official | 340:28d1f895c6fe | 295 | if ((hadc->State != HAL_ADC_STATE_ERROR) && |
mbed_official | 340:28d1f895c6fe | 296 | (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) |
mbed_official | 340:28d1f895c6fe | 297 | { |
mbed_official | 340:28d1f895c6fe | 298 | /* Initialize the ADC state */ |
mbed_official | 340:28d1f895c6fe | 299 | hadc->State = HAL_ADC_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 300 | |
mbed_official | 340:28d1f895c6fe | 301 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 340:28d1f895c6fe | 302 | /* Parameters that can be updated only when ADC is disabled: */ |
mbed_official | 340:28d1f895c6fe | 303 | /* - ADC clock mode */ |
mbed_official | 340:28d1f895c6fe | 304 | /* - ADC clock prescaler */ |
mbed_official | 340:28d1f895c6fe | 305 | if (__HAL_ADC_IS_ENABLED(hadc) == RESET) |
mbed_official | 340:28d1f895c6fe | 306 | { |
mbed_official | 340:28d1f895c6fe | 307 | /* Some parameters of this register are not reset, since they are set */ |
mbed_official | 340:28d1f895c6fe | 308 | /* by other functions and must be kept in case of usage of this */ |
mbed_official | 340:28d1f895c6fe | 309 | /* function on the fly (update of a parameter of ADC_InitTypeDef */ |
mbed_official | 340:28d1f895c6fe | 310 | /* without needing to reconfigure all other ADC groups/channels */ |
mbed_official | 340:28d1f895c6fe | 311 | /* parameters): */ |
mbed_official | 340:28d1f895c6fe | 312 | /* - internal measurement paths: Vbat, temperature sensor, Vref */ |
mbed_official | 340:28d1f895c6fe | 313 | /* (set into HAL_ADC_ConfigChannel() ) */ |
mbed_official | 340:28d1f895c6fe | 314 | |
mbed_official | 340:28d1f895c6fe | 315 | /* Reset configuration of ADC configuration register CFGR2: */ |
mbed_official | 340:28d1f895c6fe | 316 | /* - ADC clock mode: CKMODE */ |
mbed_official | 340:28d1f895c6fe | 317 | hadc->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); |
mbed_official | 340:28d1f895c6fe | 318 | |
mbed_official | 340:28d1f895c6fe | 319 | /* Configuration of ADC clock mode: clock source AHB or HSI with */ |
mbed_official | 340:28d1f895c6fe | 320 | /* selectable prescaler */ |
mbed_official | 340:28d1f895c6fe | 321 | hadc->Instance->CFGR2 |= hadc->Init.ClockPrescaler; |
mbed_official | 340:28d1f895c6fe | 322 | } |
mbed_official | 340:28d1f895c6fe | 323 | |
mbed_official | 340:28d1f895c6fe | 324 | /* Configuration of ADC: */ |
mbed_official | 340:28d1f895c6fe | 325 | /* - discontinuous mode */ |
mbed_official | 340:28d1f895c6fe | 326 | /* - LowPowerAutoWait mode */ |
mbed_official | 340:28d1f895c6fe | 327 | /* - LowPowerAutoPowerOff mode */ |
mbed_official | 340:28d1f895c6fe | 328 | /* - continuous conversion mode */ |
mbed_official | 340:28d1f895c6fe | 329 | /* - overrun */ |
mbed_official | 340:28d1f895c6fe | 330 | /* - external trigger to start conversion */ |
mbed_official | 340:28d1f895c6fe | 331 | /* - external trigger polarity */ |
mbed_official | 340:28d1f895c6fe | 332 | /* - data alignment */ |
mbed_official | 340:28d1f895c6fe | 333 | /* - resolution */ |
mbed_official | 340:28d1f895c6fe | 334 | /* - scan direction */ |
mbed_official | 340:28d1f895c6fe | 335 | /* - DMA continuous request */ |
mbed_official | 340:28d1f895c6fe | 336 | hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | |
mbed_official | 340:28d1f895c6fe | 337 | ADC_CFGR1_AUTOFF | |
mbed_official | 340:28d1f895c6fe | 338 | ADC_CFGR1_AUTDLY | |
mbed_official | 340:28d1f895c6fe | 339 | ADC_CFGR1_CONT | |
mbed_official | 340:28d1f895c6fe | 340 | ADC_CFGR1_OVRMOD | |
mbed_official | 340:28d1f895c6fe | 341 | ADC_CFGR1_EXTSEL | |
mbed_official | 340:28d1f895c6fe | 342 | ADC_CFGR1_EXTEN | |
mbed_official | 340:28d1f895c6fe | 343 | ADC_CFGR1_ALIGN | |
mbed_official | 340:28d1f895c6fe | 344 | ADC_CFGR1_RES | |
mbed_official | 340:28d1f895c6fe | 345 | ADC_CFGR1_SCANDIR | |
mbed_official | 340:28d1f895c6fe | 346 | ADC_CFGR1_DMACFG ); |
mbed_official | 340:28d1f895c6fe | 347 | |
mbed_official | 340:28d1f895c6fe | 348 | tmpCFGR1 |= (__HAL_ADC_CFGR1_AUTOWAIT(hadc->Init.LowPowerAutoWait) | |
mbed_official | 340:28d1f895c6fe | 349 | __HAL_ADC_CFGR1_AUTOOFF(hadc->Init.LowPowerAutoPowerOff) | |
mbed_official | 340:28d1f895c6fe | 350 | __HAL_ADC_CFGR1_CONTINUOUS(hadc->Init.ContinuousConvMode) | |
mbed_official | 340:28d1f895c6fe | 351 | __HAL_ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | |
mbed_official | 340:28d1f895c6fe | 352 | hadc->Init.DataAlign | |
mbed_official | 340:28d1f895c6fe | 353 | hadc->Init.Resolution | |
mbed_official | 340:28d1f895c6fe | 354 | __HAL_ADC_CFGR1_SCANDIR(hadc->Init.ScanConvMode) | |
mbed_official | 340:28d1f895c6fe | 355 | __HAL_ADC_CFGR1_DMACONTREQ(hadc->Init.DMAContinuousRequests) ); |
mbed_official | 340:28d1f895c6fe | 356 | |
mbed_official | 340:28d1f895c6fe | 357 | /* Enable discontinuous mode only if continuous mode is disabled */ |
mbed_official | 340:28d1f895c6fe | 358 | if ((hadc->Init.DiscontinuousConvMode == ENABLE) && |
mbed_official | 340:28d1f895c6fe | 359 | (hadc->Init.ContinuousConvMode == DISABLE) ) |
mbed_official | 340:28d1f895c6fe | 360 | { |
mbed_official | 340:28d1f895c6fe | 361 | /* Enable discontinuous mode of regular group */ |
mbed_official | 340:28d1f895c6fe | 362 | tmpCFGR1 |= ADC_CFGR1_DISCEN; |
mbed_official | 340:28d1f895c6fe | 363 | } |
mbed_official | 340:28d1f895c6fe | 364 | |
mbed_official | 340:28d1f895c6fe | 365 | /* Enable external trigger if trigger selection is different of software */ |
mbed_official | 340:28d1f895c6fe | 366 | /* start. */ |
mbed_official | 340:28d1f895c6fe | 367 | /* Note: This configuration keeps the hardware feature of parameter */ |
mbed_official | 340:28d1f895c6fe | 368 | /* ExternalTrigConvEdge "trigger edge none" equivalent to */ |
mbed_official | 340:28d1f895c6fe | 369 | /* software start. */ |
mbed_official | 340:28d1f895c6fe | 370 | if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) |
mbed_official | 340:28d1f895c6fe | 371 | { |
mbed_official | 340:28d1f895c6fe | 372 | tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | |
mbed_official | 340:28d1f895c6fe | 373 | hadc->Init.ExternalTrigConvEdge ); |
mbed_official | 340:28d1f895c6fe | 374 | } |
mbed_official | 340:28d1f895c6fe | 375 | |
mbed_official | 340:28d1f895c6fe | 376 | /* Update ADC configuration register with previous settings */ |
mbed_official | 340:28d1f895c6fe | 377 | hadc->Instance->CFGR1 |= tmpCFGR1; |
mbed_official | 340:28d1f895c6fe | 378 | |
mbed_official | 340:28d1f895c6fe | 379 | /* Check back that ADC registers have effectively been configured to */ |
mbed_official | 340:28d1f895c6fe | 380 | /* ensure of no potential problem of ADC core IP clocking. */ |
mbed_official | 340:28d1f895c6fe | 381 | /* Check through register CFGR1 (excluding analog watchdog configuration: */ |
mbed_official | 340:28d1f895c6fe | 382 | /* set into separate dedicated function). */ |
mbed_official | 340:28d1f895c6fe | 383 | if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)) |
mbed_official | 340:28d1f895c6fe | 384 | == tmpCFGR1) |
mbed_official | 340:28d1f895c6fe | 385 | { |
mbed_official | 340:28d1f895c6fe | 386 | /* Set ADC error code to none */ |
mbed_official | 340:28d1f895c6fe | 387 | __HAL_ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 340:28d1f895c6fe | 388 | |
mbed_official | 340:28d1f895c6fe | 389 | /* Initialize the ADC state */ |
mbed_official | 340:28d1f895c6fe | 390 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 391 | } |
mbed_official | 340:28d1f895c6fe | 392 | else |
mbed_official | 340:28d1f895c6fe | 393 | { |
mbed_official | 340:28d1f895c6fe | 394 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 395 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 396 | |
mbed_official | 340:28d1f895c6fe | 397 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 398 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 399 | |
mbed_official | 340:28d1f895c6fe | 400 | tmpHALStatus = HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 401 | } |
mbed_official | 340:28d1f895c6fe | 402 | |
mbed_official | 340:28d1f895c6fe | 403 | } |
mbed_official | 340:28d1f895c6fe | 404 | else |
mbed_official | 340:28d1f895c6fe | 405 | { |
mbed_official | 340:28d1f895c6fe | 406 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 407 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 408 | |
mbed_official | 340:28d1f895c6fe | 409 | tmpHALStatus = HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 410 | } |
mbed_official | 340:28d1f895c6fe | 411 | |
mbed_official | 340:28d1f895c6fe | 412 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 413 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 414 | } |
mbed_official | 340:28d1f895c6fe | 415 | |
mbed_official | 340:28d1f895c6fe | 416 | |
mbed_official | 340:28d1f895c6fe | 417 | /** |
mbed_official | 340:28d1f895c6fe | 418 | * @brief Deinitialize the ADC peripheral registers to their default reset |
mbed_official | 340:28d1f895c6fe | 419 | * values, with deinitialization of the ADC MSP. |
mbed_official | 340:28d1f895c6fe | 420 | * @note For devices with several ADCs: reset of ADC common registers is done |
mbed_official | 340:28d1f895c6fe | 421 | * only if all ADCs sharing the same common group are disabled. |
mbed_official | 340:28d1f895c6fe | 422 | * If this is not the case, reset of these common parameters reset is |
mbed_official | 340:28d1f895c6fe | 423 | * bypassed without error reporting: it can be the intended behaviour in |
mbed_official | 340:28d1f895c6fe | 424 | * case of reset of a single ADC while the other ADCs sharing the same |
mbed_official | 340:28d1f895c6fe | 425 | * common group is still running. |
mbed_official | 340:28d1f895c6fe | 426 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 427 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 428 | */ |
mbed_official | 340:28d1f895c6fe | 429 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 430 | { |
mbed_official | 340:28d1f895c6fe | 431 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 432 | |
mbed_official | 340:28d1f895c6fe | 433 | /* Check ADC handle */ |
mbed_official | 340:28d1f895c6fe | 434 | if(hadc == HAL_NULL) |
mbed_official | 340:28d1f895c6fe | 435 | { |
mbed_official | 340:28d1f895c6fe | 436 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 437 | } |
mbed_official | 340:28d1f895c6fe | 438 | |
mbed_official | 340:28d1f895c6fe | 439 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 440 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 441 | |
mbed_official | 340:28d1f895c6fe | 442 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 443 | hadc->State = HAL_ADC_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 444 | |
mbed_official | 340:28d1f895c6fe | 445 | /* Stop potential conversion on going, on regular group */ |
mbed_official | 340:28d1f895c6fe | 446 | tmpHALStatus = ADC_ConversionStop(hadc); |
mbed_official | 340:28d1f895c6fe | 447 | |
mbed_official | 340:28d1f895c6fe | 448 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 340:28d1f895c6fe | 449 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 450 | { |
mbed_official | 340:28d1f895c6fe | 451 | /* Disable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 452 | tmpHALStatus = ADC_Disable(hadc); |
mbed_official | 340:28d1f895c6fe | 453 | |
mbed_official | 340:28d1f895c6fe | 454 | /* Check if ADC is effectively disabled */ |
mbed_official | 340:28d1f895c6fe | 455 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 456 | { |
mbed_official | 340:28d1f895c6fe | 457 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 458 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 459 | } |
mbed_official | 340:28d1f895c6fe | 460 | } |
mbed_official | 340:28d1f895c6fe | 461 | |
mbed_official | 340:28d1f895c6fe | 462 | |
mbed_official | 340:28d1f895c6fe | 463 | /* Configuration of ADC parameters if previous preliminary actions are */ |
mbed_official | 340:28d1f895c6fe | 464 | /* correctly completed. */ |
mbed_official | 340:28d1f895c6fe | 465 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 466 | { |
mbed_official | 340:28d1f895c6fe | 467 | |
mbed_official | 340:28d1f895c6fe | 468 | /* ========== Reset ADC registers ========== */ |
mbed_official | 340:28d1f895c6fe | 469 | /* Reset register IER */ |
mbed_official | 340:28d1f895c6fe | 470 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | |
mbed_official | 340:28d1f895c6fe | 471 | ADC_IT_EOS | ADC_IT_EOC | |
mbed_official | 340:28d1f895c6fe | 472 | ADC_IT_EOSMP | ADC_IT_RDY ) ); |
mbed_official | 340:28d1f895c6fe | 473 | |
mbed_official | 340:28d1f895c6fe | 474 | /* Reset register ISR */ |
mbed_official | 340:28d1f895c6fe | 475 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR | |
mbed_official | 340:28d1f895c6fe | 476 | ADC_FLAG_EOS | ADC_FLAG_EOC | |
mbed_official | 340:28d1f895c6fe | 477 | ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); |
mbed_official | 340:28d1f895c6fe | 478 | |
mbed_official | 340:28d1f895c6fe | 479 | /* Reset register CR */ |
mbed_official | 340:28d1f895c6fe | 480 | /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */ |
mbed_official | 340:28d1f895c6fe | 481 | /* "read-set": no direct reset applicable. */ |
mbed_official | 340:28d1f895c6fe | 482 | |
mbed_official | 340:28d1f895c6fe | 483 | /* Reset register CFGR1 */ |
mbed_official | 340:28d1f895c6fe | 484 | hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_DISCEN | |
mbed_official | 340:28d1f895c6fe | 485 | ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | |
mbed_official | 340:28d1f895c6fe | 486 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | |
mbed_official | 340:28d1f895c6fe | 487 | ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN ); |
mbed_official | 340:28d1f895c6fe | 488 | |
mbed_official | 340:28d1f895c6fe | 489 | /* Reset register CFGR2 */ |
mbed_official | 340:28d1f895c6fe | 490 | /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */ |
mbed_official | 340:28d1f895c6fe | 491 | /* already done above. */ |
mbed_official | 340:28d1f895c6fe | 492 | hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE; |
mbed_official | 340:28d1f895c6fe | 493 | |
mbed_official | 340:28d1f895c6fe | 494 | /* Reset register SMPR */ |
mbed_official | 340:28d1f895c6fe | 495 | hadc->Instance->SMPR &= ~ADC_SMPR_SMP; |
mbed_official | 340:28d1f895c6fe | 496 | |
mbed_official | 340:28d1f895c6fe | 497 | /* Reset register TR1 */ |
mbed_official | 340:28d1f895c6fe | 498 | hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); |
mbed_official | 340:28d1f895c6fe | 499 | |
mbed_official | 340:28d1f895c6fe | 500 | /* Reset register CHSELR */ |
mbed_official | 340:28d1f895c6fe | 501 | hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 | |
mbed_official | 340:28d1f895c6fe | 502 | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12 | |
mbed_official | 340:28d1f895c6fe | 503 | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8 | |
mbed_official | 340:28d1f895c6fe | 504 | ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4 | |
mbed_official | 340:28d1f895c6fe | 505 | ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0 ); |
mbed_official | 340:28d1f895c6fe | 506 | |
mbed_official | 340:28d1f895c6fe | 507 | /* Reset register DR */ |
mbed_official | 340:28d1f895c6fe | 508 | /* bits in access mode read only, no direct reset applicable*/ |
mbed_official | 340:28d1f895c6fe | 509 | |
mbed_official | 340:28d1f895c6fe | 510 | /* Reset register CCR */ |
mbed_official | 340:28d1f895c6fe | 511 | ADC->CCR &= ~( ADC_CCR_VBATEN | |
mbed_official | 340:28d1f895c6fe | 512 | ADC_CCR_TSEN | |
mbed_official | 340:28d1f895c6fe | 513 | ADC_CCR_VREFEN ); |
mbed_official | 340:28d1f895c6fe | 514 | |
mbed_official | 340:28d1f895c6fe | 515 | /* ========== Hard reset ADC peripheral ========== */ |
mbed_official | 340:28d1f895c6fe | 516 | /* Performs a global reset of the entire ADC peripheral: ADC state is */ |
mbed_official | 340:28d1f895c6fe | 517 | /* forced to a similar state after device power-on. */ |
mbed_official | 340:28d1f895c6fe | 518 | /* If needed, copy-paste and uncomment the following reset code into */ |
mbed_official | 340:28d1f895c6fe | 519 | /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */ |
mbed_official | 340:28d1f895c6fe | 520 | /* */ |
mbed_official | 340:28d1f895c6fe | 521 | /* __ADC1_FORCE_RESET() */ |
mbed_official | 340:28d1f895c6fe | 522 | /* __ADC1_RELEASE_RESET() */ |
mbed_official | 340:28d1f895c6fe | 523 | |
mbed_official | 340:28d1f895c6fe | 524 | /* DeInit the low level hardware */ |
mbed_official | 340:28d1f895c6fe | 525 | HAL_ADC_MspDeInit(hadc); |
mbed_official | 340:28d1f895c6fe | 526 | |
mbed_official | 340:28d1f895c6fe | 527 | /* Set ADC error code to none */ |
mbed_official | 340:28d1f895c6fe | 528 | __HAL_ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 340:28d1f895c6fe | 529 | |
mbed_official | 340:28d1f895c6fe | 530 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 531 | hadc->State = HAL_ADC_STATE_RESET; |
mbed_official | 340:28d1f895c6fe | 532 | } |
mbed_official | 340:28d1f895c6fe | 533 | |
mbed_official | 340:28d1f895c6fe | 534 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 535 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 536 | |
mbed_official | 340:28d1f895c6fe | 537 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 538 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 539 | } |
mbed_official | 340:28d1f895c6fe | 540 | |
mbed_official | 340:28d1f895c6fe | 541 | |
mbed_official | 340:28d1f895c6fe | 542 | /** |
mbed_official | 340:28d1f895c6fe | 543 | * @brief Initializes the ADC MSP. |
mbed_official | 340:28d1f895c6fe | 544 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 545 | * @retval None |
mbed_official | 340:28d1f895c6fe | 546 | */ |
mbed_official | 340:28d1f895c6fe | 547 | __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 548 | { |
mbed_official | 340:28d1f895c6fe | 549 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 340:28d1f895c6fe | 550 | function HAL_ADC_MspInit must be implemented in the user file. |
mbed_official | 340:28d1f895c6fe | 551 | */ |
mbed_official | 340:28d1f895c6fe | 552 | } |
mbed_official | 340:28d1f895c6fe | 553 | |
mbed_official | 340:28d1f895c6fe | 554 | /** |
mbed_official | 340:28d1f895c6fe | 555 | * @brief DeInitializes the ADC MSP. |
mbed_official | 340:28d1f895c6fe | 556 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 557 | * @retval None |
mbed_official | 340:28d1f895c6fe | 558 | */ |
mbed_official | 340:28d1f895c6fe | 559 | __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 560 | { |
mbed_official | 340:28d1f895c6fe | 561 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 340:28d1f895c6fe | 562 | function HAL_ADC_MspDeInit must be implemented in the user file. |
mbed_official | 340:28d1f895c6fe | 563 | */ |
mbed_official | 340:28d1f895c6fe | 564 | } |
mbed_official | 340:28d1f895c6fe | 565 | |
mbed_official | 340:28d1f895c6fe | 566 | /** |
mbed_official | 340:28d1f895c6fe | 567 | * @} |
mbed_official | 340:28d1f895c6fe | 568 | */ |
mbed_official | 340:28d1f895c6fe | 569 | |
mbed_official | 340:28d1f895c6fe | 570 | /** @defgroup ADC_Exported_Functions_Group2 IO operation functions |
mbed_official | 340:28d1f895c6fe | 571 | * @brief IO operation functions |
mbed_official | 340:28d1f895c6fe | 572 | * |
mbed_official | 340:28d1f895c6fe | 573 | @verbatim |
mbed_official | 340:28d1f895c6fe | 574 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 575 | ##### IO operation functions ##### |
mbed_official | 340:28d1f895c6fe | 576 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 577 | [..] This section provides functions allowing to: |
mbed_official | 340:28d1f895c6fe | 578 | (+) Start conversion of regular group. |
mbed_official | 340:28d1f895c6fe | 579 | (+) Stop conversion of regular group. |
mbed_official | 340:28d1f895c6fe | 580 | (+) Poll for conversion complete on regular group. |
mbed_official | 340:28d1f895c6fe | 581 | (+) Poll for conversion event. |
mbed_official | 340:28d1f895c6fe | 582 | (+) Get result of regular channel conversion. |
mbed_official | 340:28d1f895c6fe | 583 | (+) Start conversion of regular group and enable interruptions. |
mbed_official | 340:28d1f895c6fe | 584 | (+) Stop conversion of regular group and disable interruptions. |
mbed_official | 340:28d1f895c6fe | 585 | (+) Handle ADC interrupt request |
mbed_official | 340:28d1f895c6fe | 586 | (+) Start conversion of regular group and enable DMA transfer. |
mbed_official | 340:28d1f895c6fe | 587 | (+) Stop conversion of regular group and disable ADC DMA transfer. |
mbed_official | 340:28d1f895c6fe | 588 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 589 | * @{ |
mbed_official | 340:28d1f895c6fe | 590 | */ |
mbed_official | 340:28d1f895c6fe | 591 | |
mbed_official | 340:28d1f895c6fe | 592 | /** |
mbed_official | 340:28d1f895c6fe | 593 | * @brief Enables ADC, starts conversion of regular group. |
mbed_official | 340:28d1f895c6fe | 594 | * Interruptions enabled in this function: None. |
mbed_official | 340:28d1f895c6fe | 595 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 596 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 597 | */ |
mbed_official | 340:28d1f895c6fe | 598 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 599 | { |
mbed_official | 340:28d1f895c6fe | 600 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 601 | |
mbed_official | 340:28d1f895c6fe | 602 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 603 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 604 | |
mbed_official | 340:28d1f895c6fe | 605 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 606 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 607 | |
mbed_official | 340:28d1f895c6fe | 608 | /* Enable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 609 | /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
mbed_official | 340:28d1f895c6fe | 610 | /* performed automatically by hardware. */ |
mbed_official | 340:28d1f895c6fe | 611 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
mbed_official | 340:28d1f895c6fe | 612 | { |
mbed_official | 340:28d1f895c6fe | 613 | tmpHALStatus = ADC_Enable(hadc); |
mbed_official | 340:28d1f895c6fe | 614 | } |
mbed_official | 340:28d1f895c6fe | 615 | |
mbed_official | 340:28d1f895c6fe | 616 | /* Start conversion if ADC is effectively enabled */ |
mbed_official | 340:28d1f895c6fe | 617 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 618 | { |
mbed_official | 340:28d1f895c6fe | 619 | /* State machine update: Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 620 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
mbed_official | 340:28d1f895c6fe | 621 | |
mbed_official | 340:28d1f895c6fe | 622 | /* Set ADC error code to none */ |
mbed_official | 340:28d1f895c6fe | 623 | __HAL_ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 340:28d1f895c6fe | 624 | |
mbed_official | 340:28d1f895c6fe | 625 | /* Clear regular group conversion flag and overrun flag */ |
mbed_official | 340:28d1f895c6fe | 626 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
mbed_official | 340:28d1f895c6fe | 627 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); |
mbed_official | 340:28d1f895c6fe | 628 | |
mbed_official | 340:28d1f895c6fe | 629 | /* Enable conversion of regular group. */ |
mbed_official | 340:28d1f895c6fe | 630 | /* If software start has been selected, conversion starts immediately. */ |
mbed_official | 340:28d1f895c6fe | 631 | /* If external trigger has been selected, conversion will start at next */ |
mbed_official | 340:28d1f895c6fe | 632 | /* trigger event. */ |
mbed_official | 340:28d1f895c6fe | 633 | hadc->Instance->CR |= ADC_CR_ADSTART; |
mbed_official | 340:28d1f895c6fe | 634 | } |
mbed_official | 340:28d1f895c6fe | 635 | |
mbed_official | 340:28d1f895c6fe | 636 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 637 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 638 | |
mbed_official | 340:28d1f895c6fe | 639 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 640 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 641 | } |
mbed_official | 340:28d1f895c6fe | 642 | |
mbed_official | 340:28d1f895c6fe | 643 | /** |
mbed_official | 340:28d1f895c6fe | 644 | * @brief Stop ADC conversion of regular group, disable ADC peripheral. |
mbed_official | 340:28d1f895c6fe | 645 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 646 | * @retval HAL status. |
mbed_official | 340:28d1f895c6fe | 647 | */ |
mbed_official | 340:28d1f895c6fe | 648 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 649 | { |
mbed_official | 340:28d1f895c6fe | 650 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 651 | |
mbed_official | 340:28d1f895c6fe | 652 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 653 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 654 | |
mbed_official | 340:28d1f895c6fe | 655 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 656 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 657 | |
mbed_official | 340:28d1f895c6fe | 658 | /* 1. Stop potential conversion on going, on regular group */ |
mbed_official | 340:28d1f895c6fe | 659 | tmpHALStatus = ADC_ConversionStop(hadc); |
mbed_official | 340:28d1f895c6fe | 660 | |
mbed_official | 340:28d1f895c6fe | 661 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 340:28d1f895c6fe | 662 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 663 | { |
mbed_official | 340:28d1f895c6fe | 664 | /* 2. Disable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 665 | tmpHALStatus = ADC_Disable(hadc); |
mbed_official | 340:28d1f895c6fe | 666 | |
mbed_official | 340:28d1f895c6fe | 667 | /* Check if ADC is effectively disabled */ |
mbed_official | 340:28d1f895c6fe | 668 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 669 | { |
mbed_official | 340:28d1f895c6fe | 670 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 671 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 672 | } |
mbed_official | 340:28d1f895c6fe | 673 | } |
mbed_official | 340:28d1f895c6fe | 674 | |
mbed_official | 340:28d1f895c6fe | 675 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 676 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 677 | |
mbed_official | 340:28d1f895c6fe | 678 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 679 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 680 | } |
mbed_official | 340:28d1f895c6fe | 681 | |
mbed_official | 340:28d1f895c6fe | 682 | /** |
mbed_official | 340:28d1f895c6fe | 683 | * @brief Wait for regular group conversion to be completed. |
mbed_official | 340:28d1f895c6fe | 684 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 685 | * @param Timeout: Timeout value in millisecond. |
mbed_official | 340:28d1f895c6fe | 686 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 687 | */ |
mbed_official | 340:28d1f895c6fe | 688 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 689 | { |
mbed_official | 340:28d1f895c6fe | 690 | uint32_t tickstart; |
mbed_official | 340:28d1f895c6fe | 691 | uint32_t tmp_Flag_EOC; |
mbed_official | 340:28d1f895c6fe | 692 | |
mbed_official | 340:28d1f895c6fe | 693 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 694 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 695 | |
mbed_official | 340:28d1f895c6fe | 696 | /* If end of conversion selected to end of sequence */ |
mbed_official | 340:28d1f895c6fe | 697 | if (hadc->Init.EOCSelection == EOC_SEQ_CONV) |
mbed_official | 340:28d1f895c6fe | 698 | { |
mbed_official | 340:28d1f895c6fe | 699 | tmp_Flag_EOC = ADC_FLAG_EOS; |
mbed_official | 340:28d1f895c6fe | 700 | } |
mbed_official | 340:28d1f895c6fe | 701 | /* If end of conversion selected to end of each conversion */ |
mbed_official | 340:28d1f895c6fe | 702 | else /* EOC_SINGLE_CONV */ |
mbed_official | 340:28d1f895c6fe | 703 | { |
mbed_official | 340:28d1f895c6fe | 704 | tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); |
mbed_official | 340:28d1f895c6fe | 705 | } |
mbed_official | 340:28d1f895c6fe | 706 | |
mbed_official | 340:28d1f895c6fe | 707 | /* Get timeout */ |
mbed_official | 340:28d1f895c6fe | 708 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 709 | |
mbed_official | 340:28d1f895c6fe | 710 | /* Wait until End of Conversion flag is raised */ |
mbed_official | 340:28d1f895c6fe | 711 | while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) |
mbed_official | 340:28d1f895c6fe | 712 | { |
mbed_official | 340:28d1f895c6fe | 713 | /* Check if timeout is disabled (set to infinite wait) */ |
mbed_official | 340:28d1f895c6fe | 714 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 715 | { |
mbed_official | 340:28d1f895c6fe | 716 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 717 | { |
mbed_official | 340:28d1f895c6fe | 718 | /* Update ADC state machine to timeout */ |
mbed_official | 340:28d1f895c6fe | 719 | hadc->State = HAL_ADC_STATE_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 720 | |
mbed_official | 340:28d1f895c6fe | 721 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 722 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 723 | |
mbed_official | 340:28d1f895c6fe | 724 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 725 | } |
mbed_official | 340:28d1f895c6fe | 726 | } |
mbed_official | 340:28d1f895c6fe | 727 | } |
mbed_official | 340:28d1f895c6fe | 728 | |
mbed_official | 340:28d1f895c6fe | 729 | /* Clear end of conversion flag of regular group if low power feature */ |
mbed_official | 340:28d1f895c6fe | 730 | /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ |
mbed_official | 340:28d1f895c6fe | 731 | /* until data register is read using function HAL_ADC_GetValue(). */ |
mbed_official | 340:28d1f895c6fe | 732 | if (hadc->Init.LowPowerAutoWait == DISABLE) |
mbed_official | 340:28d1f895c6fe | 733 | { |
mbed_official | 340:28d1f895c6fe | 734 | /* Clear regular group conversion flag */ |
mbed_official | 340:28d1f895c6fe | 735 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); |
mbed_official | 340:28d1f895c6fe | 736 | } |
mbed_official | 340:28d1f895c6fe | 737 | |
mbed_official | 340:28d1f895c6fe | 738 | /* Update state machine on conversion status if not in error state */ |
mbed_official | 340:28d1f895c6fe | 739 | if(hadc->State != HAL_ADC_STATE_ERROR) |
mbed_official | 340:28d1f895c6fe | 740 | { |
mbed_official | 340:28d1f895c6fe | 741 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 742 | hadc->State = HAL_ADC_STATE_EOC_REG; |
mbed_official | 340:28d1f895c6fe | 743 | } |
mbed_official | 340:28d1f895c6fe | 744 | |
mbed_official | 340:28d1f895c6fe | 745 | /* Return ADC state */ |
mbed_official | 340:28d1f895c6fe | 746 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 747 | } |
mbed_official | 340:28d1f895c6fe | 748 | |
mbed_official | 340:28d1f895c6fe | 749 | /** |
mbed_official | 340:28d1f895c6fe | 750 | * @brief Poll for conversion event. |
mbed_official | 340:28d1f895c6fe | 751 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 752 | * @param EventType: the ADC event type. |
mbed_official | 340:28d1f895c6fe | 753 | * This parameter can be one of the following values: |
mbed_official | 340:28d1f895c6fe | 754 | * @arg AWD_EVENT: ADC Analog watchdog event |
mbed_official | 340:28d1f895c6fe | 755 | * @arg OVR_EVENT: ADC Overrun event |
mbed_official | 340:28d1f895c6fe | 756 | * @param Timeout: Timeout value in millisecond. |
mbed_official | 340:28d1f895c6fe | 757 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 758 | */ |
mbed_official | 340:28d1f895c6fe | 759 | HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 760 | { |
mbed_official | 340:28d1f895c6fe | 761 | uint32_t tickstart=0; |
mbed_official | 340:28d1f895c6fe | 762 | |
mbed_official | 340:28d1f895c6fe | 763 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 764 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 765 | assert_param(IS_ADC_EVENT_TYPE(EventType)); |
mbed_official | 340:28d1f895c6fe | 766 | |
mbed_official | 340:28d1f895c6fe | 767 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 768 | |
mbed_official | 340:28d1f895c6fe | 769 | /* Check selected event flag */ |
mbed_official | 340:28d1f895c6fe | 770 | while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) |
mbed_official | 340:28d1f895c6fe | 771 | { |
mbed_official | 340:28d1f895c6fe | 772 | /* Check if timeout is disabled (set to infinite wait) */ |
mbed_official | 340:28d1f895c6fe | 773 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 774 | { |
mbed_official | 340:28d1f895c6fe | 775 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 776 | { |
mbed_official | 340:28d1f895c6fe | 777 | /* Update ADC state machine to timeout */ |
mbed_official | 340:28d1f895c6fe | 778 | hadc->State = HAL_ADC_STATE_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 779 | |
mbed_official | 340:28d1f895c6fe | 780 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 781 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 782 | |
mbed_official | 340:28d1f895c6fe | 783 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 784 | } |
mbed_official | 340:28d1f895c6fe | 785 | } |
mbed_official | 340:28d1f895c6fe | 786 | } |
mbed_official | 340:28d1f895c6fe | 787 | |
mbed_official | 340:28d1f895c6fe | 788 | switch(EventType) |
mbed_official | 340:28d1f895c6fe | 789 | { |
mbed_official | 340:28d1f895c6fe | 790 | /* Analog watchdog (level out of window) event */ |
mbed_official | 340:28d1f895c6fe | 791 | case AWD_EVENT: |
mbed_official | 340:28d1f895c6fe | 792 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 793 | hadc->State = HAL_ADC_STATE_AWD; |
mbed_official | 340:28d1f895c6fe | 794 | |
mbed_official | 340:28d1f895c6fe | 795 | /* Clear ADC analog watchdog flag */ |
mbed_official | 340:28d1f895c6fe | 796 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); |
mbed_official | 340:28d1f895c6fe | 797 | break; |
mbed_official | 340:28d1f895c6fe | 798 | |
mbed_official | 340:28d1f895c6fe | 799 | /* Overrun event */ |
mbed_official | 340:28d1f895c6fe | 800 | default: /* Case OVR_EVENT */ |
mbed_official | 340:28d1f895c6fe | 801 | /* If overrun is set to overwrite previous data, overrun event is not */ |
mbed_official | 340:28d1f895c6fe | 802 | /* considered as an error. */ |
mbed_official | 340:28d1f895c6fe | 803 | /* (cf ref manual "Managing conversions without using the DMA and without */ |
mbed_official | 340:28d1f895c6fe | 804 | /* overrun ") */ |
mbed_official | 340:28d1f895c6fe | 805 | if (hadc->Init.Overrun == OVR_DATA_PRESERVED) |
mbed_official | 340:28d1f895c6fe | 806 | { |
mbed_official | 340:28d1f895c6fe | 807 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 808 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 809 | |
mbed_official | 340:28d1f895c6fe | 810 | /* Set ADC error code to overrun */ |
mbed_official | 340:28d1f895c6fe | 811 | hadc->ErrorCode |= HAL_ADC_ERROR_OVR; |
mbed_official | 340:28d1f895c6fe | 812 | } |
mbed_official | 340:28d1f895c6fe | 813 | |
mbed_official | 340:28d1f895c6fe | 814 | /* Clear ADC Overrun flag */ |
mbed_official | 340:28d1f895c6fe | 815 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 340:28d1f895c6fe | 816 | break; |
mbed_official | 340:28d1f895c6fe | 817 | } |
mbed_official | 340:28d1f895c6fe | 818 | |
mbed_official | 340:28d1f895c6fe | 819 | /* Return ADC state */ |
mbed_official | 340:28d1f895c6fe | 820 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 821 | } |
mbed_official | 340:28d1f895c6fe | 822 | |
mbed_official | 340:28d1f895c6fe | 823 | /** |
mbed_official | 340:28d1f895c6fe | 824 | * @brief Enables ADC, starts conversion of regular group with interruption. |
mbed_official | 340:28d1f895c6fe | 825 | * Interruptions enabled in this function: EOC (end of conversion), |
mbed_official | 340:28d1f895c6fe | 826 | * overrun. |
mbed_official | 340:28d1f895c6fe | 827 | * Each of these interruptions has its dedicated callback function. |
mbed_official | 340:28d1f895c6fe | 828 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 829 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 830 | */ |
mbed_official | 340:28d1f895c6fe | 831 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 832 | { |
mbed_official | 340:28d1f895c6fe | 833 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 834 | |
mbed_official | 340:28d1f895c6fe | 835 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 836 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 837 | |
mbed_official | 340:28d1f895c6fe | 838 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 839 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 840 | |
mbed_official | 340:28d1f895c6fe | 841 | /* Enable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 842 | /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
mbed_official | 340:28d1f895c6fe | 843 | /* performed automatically by hardware. */ |
mbed_official | 340:28d1f895c6fe | 844 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
mbed_official | 340:28d1f895c6fe | 845 | { |
mbed_official | 340:28d1f895c6fe | 846 | tmpHALStatus = ADC_Enable(hadc); |
mbed_official | 340:28d1f895c6fe | 847 | } |
mbed_official | 340:28d1f895c6fe | 848 | |
mbed_official | 340:28d1f895c6fe | 849 | /* Start conversion if ADC is effectively enabled */ |
mbed_official | 340:28d1f895c6fe | 850 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 851 | { |
mbed_official | 340:28d1f895c6fe | 852 | /* State machine update: Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 853 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
mbed_official | 340:28d1f895c6fe | 854 | |
mbed_official | 340:28d1f895c6fe | 855 | /* Set ADC error code to none */ |
mbed_official | 340:28d1f895c6fe | 856 | __HAL_ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 340:28d1f895c6fe | 857 | |
mbed_official | 340:28d1f895c6fe | 858 | /* Clear regular group conversion flag and overrun flag */ |
mbed_official | 340:28d1f895c6fe | 859 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
mbed_official | 340:28d1f895c6fe | 860 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); |
mbed_official | 340:28d1f895c6fe | 861 | |
mbed_official | 340:28d1f895c6fe | 862 | /* Enable ADC end of conversion interrupt */ |
mbed_official | 340:28d1f895c6fe | 863 | /* Enable ADC overrun interrupt */ |
mbed_official | 340:28d1f895c6fe | 864 | switch(hadc->Init.EOCSelection) |
mbed_official | 340:28d1f895c6fe | 865 | { |
mbed_official | 340:28d1f895c6fe | 866 | case EOC_SEQ_CONV: |
mbed_official | 340:28d1f895c6fe | 867 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
mbed_official | 340:28d1f895c6fe | 868 | __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); |
mbed_official | 340:28d1f895c6fe | 869 | break; |
mbed_official | 340:28d1f895c6fe | 870 | /* case EOC_SINGLE_CONV */ |
mbed_official | 340:28d1f895c6fe | 871 | default: |
mbed_official | 340:28d1f895c6fe | 872 | __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); |
mbed_official | 340:28d1f895c6fe | 873 | break; |
mbed_official | 340:28d1f895c6fe | 874 | } |
mbed_official | 340:28d1f895c6fe | 875 | |
mbed_official | 340:28d1f895c6fe | 876 | /* Enable conversion of regular group. */ |
mbed_official | 340:28d1f895c6fe | 877 | /* If software start has been selected, conversion starts immediately. */ |
mbed_official | 340:28d1f895c6fe | 878 | /* If external trigger has been selected, conversion will start at next */ |
mbed_official | 340:28d1f895c6fe | 879 | /* trigger event. */ |
mbed_official | 340:28d1f895c6fe | 880 | hadc->Instance->CR |= ADC_CR_ADSTART; |
mbed_official | 340:28d1f895c6fe | 881 | } |
mbed_official | 340:28d1f895c6fe | 882 | |
mbed_official | 340:28d1f895c6fe | 883 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 884 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 885 | |
mbed_official | 340:28d1f895c6fe | 886 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 887 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 888 | } |
mbed_official | 340:28d1f895c6fe | 889 | |
mbed_official | 340:28d1f895c6fe | 890 | |
mbed_official | 340:28d1f895c6fe | 891 | /** |
mbed_official | 340:28d1f895c6fe | 892 | * @brief Stop ADC conversion of regular group, disable interruption of |
mbed_official | 340:28d1f895c6fe | 893 | * end-of-conversion, disable ADC peripheral. |
mbed_official | 340:28d1f895c6fe | 894 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 895 | * @retval HAL status. |
mbed_official | 340:28d1f895c6fe | 896 | */ |
mbed_official | 340:28d1f895c6fe | 897 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 898 | { |
mbed_official | 340:28d1f895c6fe | 899 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 900 | |
mbed_official | 340:28d1f895c6fe | 901 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 902 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 903 | |
mbed_official | 340:28d1f895c6fe | 904 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 905 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 906 | |
mbed_official | 340:28d1f895c6fe | 907 | /* 1. Stop potential conversion on going, on regular group */ |
mbed_official | 340:28d1f895c6fe | 908 | tmpHALStatus = ADC_ConversionStop(hadc); |
mbed_official | 340:28d1f895c6fe | 909 | |
mbed_official | 340:28d1f895c6fe | 910 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 340:28d1f895c6fe | 911 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 912 | { |
mbed_official | 340:28d1f895c6fe | 913 | /* Disable ADC end of conversion interrupt for regular group */ |
mbed_official | 340:28d1f895c6fe | 914 | /* Disable ADC overrun interrupt */ |
mbed_official | 340:28d1f895c6fe | 915 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); |
mbed_official | 340:28d1f895c6fe | 916 | |
mbed_official | 340:28d1f895c6fe | 917 | /* 2. Disable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 918 | tmpHALStatus = ADC_Disable(hadc); |
mbed_official | 340:28d1f895c6fe | 919 | |
mbed_official | 340:28d1f895c6fe | 920 | /* Check if ADC is effectively disabled */ |
mbed_official | 340:28d1f895c6fe | 921 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 922 | { |
mbed_official | 340:28d1f895c6fe | 923 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 924 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 925 | } |
mbed_official | 340:28d1f895c6fe | 926 | } |
mbed_official | 340:28d1f895c6fe | 927 | |
mbed_official | 340:28d1f895c6fe | 928 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 929 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 930 | |
mbed_official | 340:28d1f895c6fe | 931 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 932 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 933 | } |
mbed_official | 340:28d1f895c6fe | 934 | |
mbed_official | 340:28d1f895c6fe | 935 | /** |
mbed_official | 340:28d1f895c6fe | 936 | * @brief Enables ADC, starts conversion of regular group and transfers result |
mbed_official | 340:28d1f895c6fe | 937 | * through DMA. |
mbed_official | 340:28d1f895c6fe | 938 | * Interruptions enabled in this function: |
mbed_official | 340:28d1f895c6fe | 939 | * overrun, DMA half transfer, DMA transfer complete. |
mbed_official | 340:28d1f895c6fe | 940 | * Each of these interruptions has its dedicated callback function. |
mbed_official | 340:28d1f895c6fe | 941 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 942 | * @param pData: The destination Buffer address. |
mbed_official | 340:28d1f895c6fe | 943 | * @param Length: The length of data to be transferred from ADC peripheral to memory. |
mbed_official | 340:28d1f895c6fe | 944 | * @retval None |
mbed_official | 340:28d1f895c6fe | 945 | */ |
mbed_official | 340:28d1f895c6fe | 946 | HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
mbed_official | 340:28d1f895c6fe | 947 | { |
mbed_official | 340:28d1f895c6fe | 948 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 949 | |
mbed_official | 340:28d1f895c6fe | 950 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 951 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 952 | |
mbed_official | 340:28d1f895c6fe | 953 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 954 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 955 | |
mbed_official | 340:28d1f895c6fe | 956 | /* Enable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 957 | /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
mbed_official | 340:28d1f895c6fe | 958 | /* performed automatically by hardware. */ |
mbed_official | 340:28d1f895c6fe | 959 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
mbed_official | 340:28d1f895c6fe | 960 | { |
mbed_official | 340:28d1f895c6fe | 961 | tmpHALStatus = ADC_Enable(hadc); |
mbed_official | 340:28d1f895c6fe | 962 | } |
mbed_official | 340:28d1f895c6fe | 963 | |
mbed_official | 340:28d1f895c6fe | 964 | /* Start conversion if ADC is effectively enabled */ |
mbed_official | 340:28d1f895c6fe | 965 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 966 | { |
mbed_official | 340:28d1f895c6fe | 967 | /* State machine update: Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 968 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
mbed_official | 340:28d1f895c6fe | 969 | |
mbed_official | 340:28d1f895c6fe | 970 | /* Set ADC error code to none */ |
mbed_official | 340:28d1f895c6fe | 971 | __HAL_ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 340:28d1f895c6fe | 972 | |
mbed_official | 340:28d1f895c6fe | 973 | |
mbed_official | 340:28d1f895c6fe | 974 | /* Set the DMA transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 975 | hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; |
mbed_official | 340:28d1f895c6fe | 976 | |
mbed_official | 340:28d1f895c6fe | 977 | /* Set the DMA half transfer complete callback */ |
mbed_official | 340:28d1f895c6fe | 978 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; |
mbed_official | 340:28d1f895c6fe | 979 | |
mbed_official | 340:28d1f895c6fe | 980 | /* Set the DMA error callback */ |
mbed_official | 340:28d1f895c6fe | 981 | hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; |
mbed_official | 340:28d1f895c6fe | 982 | |
mbed_official | 340:28d1f895c6fe | 983 | |
mbed_official | 340:28d1f895c6fe | 984 | /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ |
mbed_official | 340:28d1f895c6fe | 985 | /* start (in case of SW start): */ |
mbed_official | 340:28d1f895c6fe | 986 | |
mbed_official | 340:28d1f895c6fe | 987 | /* Clear regular group conversion flag and overrun flag */ |
mbed_official | 340:28d1f895c6fe | 988 | /* (To ensure of no unknown state from potential previous ADC */ |
mbed_official | 340:28d1f895c6fe | 989 | /* operations) */ |
mbed_official | 340:28d1f895c6fe | 990 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); |
mbed_official | 340:28d1f895c6fe | 991 | |
mbed_official | 340:28d1f895c6fe | 992 | /* Enable ADC overrun interrupt */ |
mbed_official | 340:28d1f895c6fe | 993 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 340:28d1f895c6fe | 994 | |
mbed_official | 340:28d1f895c6fe | 995 | /* Enable ADC DMA mode */ |
mbed_official | 340:28d1f895c6fe | 996 | hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; |
mbed_official | 340:28d1f895c6fe | 997 | |
mbed_official | 340:28d1f895c6fe | 998 | /* Start the DMA channel */ |
mbed_official | 340:28d1f895c6fe | 999 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); |
mbed_official | 340:28d1f895c6fe | 1000 | |
mbed_official | 340:28d1f895c6fe | 1001 | /* Enable conversion of regular group. */ |
mbed_official | 340:28d1f895c6fe | 1002 | /* If software start has been selected, conversion starts immediately. */ |
mbed_official | 340:28d1f895c6fe | 1003 | /* If external trigger has been selected, conversion will start at next */ |
mbed_official | 340:28d1f895c6fe | 1004 | /* trigger event. */ |
mbed_official | 340:28d1f895c6fe | 1005 | hadc->Instance->CR |= ADC_CR_ADSTART; |
mbed_official | 340:28d1f895c6fe | 1006 | } |
mbed_official | 340:28d1f895c6fe | 1007 | |
mbed_official | 340:28d1f895c6fe | 1008 | |
mbed_official | 340:28d1f895c6fe | 1009 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 1010 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1011 | |
mbed_official | 340:28d1f895c6fe | 1012 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 1013 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 1014 | } |
mbed_official | 340:28d1f895c6fe | 1015 | |
mbed_official | 340:28d1f895c6fe | 1016 | /** |
mbed_official | 340:28d1f895c6fe | 1017 | * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable |
mbed_official | 340:28d1f895c6fe | 1018 | * ADC peripheral. |
mbed_official | 340:28d1f895c6fe | 1019 | * Each of these interruptions has its dedicated callback function. |
mbed_official | 340:28d1f895c6fe | 1020 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1021 | * @retval HAL status. |
mbed_official | 340:28d1f895c6fe | 1022 | */ |
mbed_official | 340:28d1f895c6fe | 1023 | HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1024 | { |
mbed_official | 340:28d1f895c6fe | 1025 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1026 | |
mbed_official | 340:28d1f895c6fe | 1027 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1028 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1029 | |
mbed_official | 340:28d1f895c6fe | 1030 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 1031 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1032 | |
mbed_official | 340:28d1f895c6fe | 1033 | /* 1. Stop potential conversion on going, on regular group */ |
mbed_official | 340:28d1f895c6fe | 1034 | tmpHALStatus = ADC_ConversionStop(hadc); |
mbed_official | 340:28d1f895c6fe | 1035 | |
mbed_official | 340:28d1f895c6fe | 1036 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 340:28d1f895c6fe | 1037 | if (tmpHALStatus != HAL_ERROR) |
mbed_official | 340:28d1f895c6fe | 1038 | { |
mbed_official | 340:28d1f895c6fe | 1039 | /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ |
mbed_official | 340:28d1f895c6fe | 1040 | hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; |
mbed_official | 340:28d1f895c6fe | 1041 | |
mbed_official | 340:28d1f895c6fe | 1042 | /* Disable the DMA channel (in case of DMA in circular mode or stop while */ |
mbed_official | 340:28d1f895c6fe | 1043 | /* while DMA transfer is on going) */ |
mbed_official | 340:28d1f895c6fe | 1044 | tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle); |
mbed_official | 340:28d1f895c6fe | 1045 | |
mbed_official | 340:28d1f895c6fe | 1046 | /* Check if DMA channel effectively disabled */ |
mbed_official | 340:28d1f895c6fe | 1047 | if (tmpHALStatus != HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1048 | { |
mbed_official | 340:28d1f895c6fe | 1049 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1050 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1051 | } |
mbed_official | 340:28d1f895c6fe | 1052 | |
mbed_official | 340:28d1f895c6fe | 1053 | /* Disable ADC overrun interrupt */ |
mbed_official | 340:28d1f895c6fe | 1054 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 340:28d1f895c6fe | 1055 | |
mbed_official | 340:28d1f895c6fe | 1056 | /* 2. Disable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 1057 | /* Update "tmpHALStatus" only if DMA channel disabling passed, to keep in */ |
mbed_official | 340:28d1f895c6fe | 1058 | /* memory a potential failing status. */ |
mbed_official | 340:28d1f895c6fe | 1059 | if (tmpHALStatus == HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1060 | { |
mbed_official | 340:28d1f895c6fe | 1061 | tmpHALStatus = ADC_Disable(hadc); |
mbed_official | 340:28d1f895c6fe | 1062 | } |
mbed_official | 340:28d1f895c6fe | 1063 | else |
mbed_official | 340:28d1f895c6fe | 1064 | { |
mbed_official | 340:28d1f895c6fe | 1065 | ADC_Disable(hadc); |
mbed_official | 340:28d1f895c6fe | 1066 | } |
mbed_official | 340:28d1f895c6fe | 1067 | |
mbed_official | 340:28d1f895c6fe | 1068 | /* Check if ADC is effectively disabled */ |
mbed_official | 340:28d1f895c6fe | 1069 | if (tmpHALStatus == HAL_OK) |
mbed_official | 340:28d1f895c6fe | 1070 | { |
mbed_official | 340:28d1f895c6fe | 1071 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 1072 | hadc->State = HAL_ADC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 1073 | } |
mbed_official | 340:28d1f895c6fe | 1074 | |
mbed_official | 340:28d1f895c6fe | 1075 | } |
mbed_official | 340:28d1f895c6fe | 1076 | |
mbed_official | 340:28d1f895c6fe | 1077 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 1078 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1079 | |
mbed_official | 340:28d1f895c6fe | 1080 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 1081 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 1082 | } |
mbed_official | 340:28d1f895c6fe | 1083 | |
mbed_official | 340:28d1f895c6fe | 1084 | /** |
mbed_official | 340:28d1f895c6fe | 1085 | * @brief Get ADC regular group conversion result. |
mbed_official | 340:28d1f895c6fe | 1086 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1087 | * @retval Converted value |
mbed_official | 340:28d1f895c6fe | 1088 | */ |
mbed_official | 340:28d1f895c6fe | 1089 | uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1090 | { |
mbed_official | 340:28d1f895c6fe | 1091 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1092 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1093 | |
mbed_official | 340:28d1f895c6fe | 1094 | /* Note: EOC flag is automatically cleared by hardware when reading */ |
mbed_official | 340:28d1f895c6fe | 1095 | /* register DR. Additionally, clear flag EOS by software. */ |
mbed_official | 340:28d1f895c6fe | 1096 | |
mbed_official | 340:28d1f895c6fe | 1097 | /* Clear regular group conversion flag */ |
mbed_official | 340:28d1f895c6fe | 1098 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); |
mbed_official | 340:28d1f895c6fe | 1099 | |
mbed_official | 340:28d1f895c6fe | 1100 | /* Return ADC converted value */ |
mbed_official | 340:28d1f895c6fe | 1101 | return hadc->Instance->DR; |
mbed_official | 340:28d1f895c6fe | 1102 | } |
mbed_official | 340:28d1f895c6fe | 1103 | |
mbed_official | 340:28d1f895c6fe | 1104 | /** |
mbed_official | 340:28d1f895c6fe | 1105 | * @brief DMA transfer complete callback. |
mbed_official | 340:28d1f895c6fe | 1106 | * @param hdma: pointer to DMA handle. |
mbed_official | 340:28d1f895c6fe | 1107 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1108 | */ |
mbed_official | 340:28d1f895c6fe | 1109 | static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 1110 | { |
mbed_official | 340:28d1f895c6fe | 1111 | /* Retrieve ADC handle corresponding to current DMA handle */ |
mbed_official | 340:28d1f895c6fe | 1112 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 1113 | |
mbed_official | 340:28d1f895c6fe | 1114 | /* Update state machine on conversion status if not in error state */ |
mbed_official | 340:28d1f895c6fe | 1115 | if(hadc->State != HAL_ADC_STATE_ERROR) |
mbed_official | 340:28d1f895c6fe | 1116 | { |
mbed_official | 340:28d1f895c6fe | 1117 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 1118 | hadc->State = HAL_ADC_STATE_EOC_REG; |
mbed_official | 340:28d1f895c6fe | 1119 | } |
mbed_official | 340:28d1f895c6fe | 1120 | |
mbed_official | 340:28d1f895c6fe | 1121 | /* Conversion complete callback */ |
mbed_official | 340:28d1f895c6fe | 1122 | HAL_ADC_ConvCpltCallback(hadc); |
mbed_official | 340:28d1f895c6fe | 1123 | } |
mbed_official | 340:28d1f895c6fe | 1124 | |
mbed_official | 340:28d1f895c6fe | 1125 | /** |
mbed_official | 340:28d1f895c6fe | 1126 | * @brief DMA half transfer complete callback. |
mbed_official | 340:28d1f895c6fe | 1127 | * @param hdma: pointer to DMA handle. |
mbed_official | 340:28d1f895c6fe | 1128 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1129 | */ |
mbed_official | 340:28d1f895c6fe | 1130 | static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 1131 | { |
mbed_official | 340:28d1f895c6fe | 1132 | /* Retrieve ADC handle corresponding to current DMA handle */ |
mbed_official | 340:28d1f895c6fe | 1133 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 1134 | |
mbed_official | 340:28d1f895c6fe | 1135 | /* Half conversion callback */ |
mbed_official | 340:28d1f895c6fe | 1136 | HAL_ADC_ConvHalfCpltCallback(hadc); |
mbed_official | 340:28d1f895c6fe | 1137 | } |
mbed_official | 340:28d1f895c6fe | 1138 | |
mbed_official | 340:28d1f895c6fe | 1139 | /** |
mbed_official | 340:28d1f895c6fe | 1140 | * @brief DMA error callback |
mbed_official | 340:28d1f895c6fe | 1141 | * @param hdma: pointer to DMA handle. |
mbed_official | 340:28d1f895c6fe | 1142 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1143 | */ |
mbed_official | 340:28d1f895c6fe | 1144 | static void ADC_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 340:28d1f895c6fe | 1145 | { |
mbed_official | 340:28d1f895c6fe | 1146 | /* Retrieve ADC handle corresponding to current DMA handle */ |
mbed_official | 340:28d1f895c6fe | 1147 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 340:28d1f895c6fe | 1148 | |
mbed_official | 340:28d1f895c6fe | 1149 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 1150 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1151 | |
mbed_official | 340:28d1f895c6fe | 1152 | /* Set ADC error code to DMA error */ |
mbed_official | 340:28d1f895c6fe | 1153 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA; |
mbed_official | 340:28d1f895c6fe | 1154 | |
mbed_official | 340:28d1f895c6fe | 1155 | /* Error callback */ |
mbed_official | 340:28d1f895c6fe | 1156 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 340:28d1f895c6fe | 1157 | } |
mbed_official | 340:28d1f895c6fe | 1158 | |
mbed_official | 340:28d1f895c6fe | 1159 | /** |
mbed_official | 340:28d1f895c6fe | 1160 | * @brief Handles ADC interrupt request. |
mbed_official | 340:28d1f895c6fe | 1161 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1162 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1163 | */ |
mbed_official | 340:28d1f895c6fe | 1164 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1165 | { |
mbed_official | 340:28d1f895c6fe | 1166 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1167 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1168 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 340:28d1f895c6fe | 1169 | assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); |
mbed_official | 340:28d1f895c6fe | 1170 | |
mbed_official | 340:28d1f895c6fe | 1171 | /* ========== Check End of Conversion flag for regular group ========== */ |
mbed_official | 340:28d1f895c6fe | 1172 | if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || |
mbed_official | 340:28d1f895c6fe | 1173 | (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) |
mbed_official | 340:28d1f895c6fe | 1174 | { |
mbed_official | 340:28d1f895c6fe | 1175 | /* Update state machine on conversion status if not in error state */ |
mbed_official | 340:28d1f895c6fe | 1176 | if(hadc->State != HAL_ADC_STATE_ERROR) |
mbed_official | 340:28d1f895c6fe | 1177 | { |
mbed_official | 340:28d1f895c6fe | 1178 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 1179 | hadc->State = HAL_ADC_STATE_EOC_REG; |
mbed_official | 340:28d1f895c6fe | 1180 | } |
mbed_official | 340:28d1f895c6fe | 1181 | |
mbed_official | 340:28d1f895c6fe | 1182 | /* Disable interruption if no further conversion upcoming by regular */ |
mbed_official | 340:28d1f895c6fe | 1183 | /* external trigger or by continuous mode, */ |
mbed_official | 340:28d1f895c6fe | 1184 | /* and if scan sequence if completed. */ |
mbed_official | 340:28d1f895c6fe | 1185 | if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) && |
mbed_official | 340:28d1f895c6fe | 1186 | (hadc->Init.ContinuousConvMode == DISABLE) ) |
mbed_official | 340:28d1f895c6fe | 1187 | { |
mbed_official | 340:28d1f895c6fe | 1188 | /* If End of Sequence is reached, disable interrupts */ |
mbed_official | 340:28d1f895c6fe | 1189 | if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) |
mbed_official | 340:28d1f895c6fe | 1190 | { |
mbed_official | 340:28d1f895c6fe | 1191 | /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ |
mbed_official | 340:28d1f895c6fe | 1192 | /* ADSTART==0 (no conversion on going) */ |
mbed_official | 340:28d1f895c6fe | 1193 | if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) |
mbed_official | 340:28d1f895c6fe | 1194 | { |
mbed_official | 340:28d1f895c6fe | 1195 | /* Disable ADC end of sequence conversion interrupt */ |
mbed_official | 340:28d1f895c6fe | 1196 | /* Note: Overrun interrupt was enabled with EOC interrupt in */ |
mbed_official | 340:28d1f895c6fe | 1197 | /* HAL_Start_IT(), but is not disabled here because can be used */ |
mbed_official | 340:28d1f895c6fe | 1198 | /* by overrun IRQ process below. */ |
mbed_official | 340:28d1f895c6fe | 1199 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); |
mbed_official | 340:28d1f895c6fe | 1200 | } |
mbed_official | 340:28d1f895c6fe | 1201 | else |
mbed_official | 340:28d1f895c6fe | 1202 | { |
mbed_official | 340:28d1f895c6fe | 1203 | /* Change ADC state to error state */ |
mbed_official | 340:28d1f895c6fe | 1204 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1205 | |
mbed_official | 340:28d1f895c6fe | 1206 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 1207 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 1208 | } |
mbed_official | 340:28d1f895c6fe | 1209 | } |
mbed_official | 340:28d1f895c6fe | 1210 | } |
mbed_official | 340:28d1f895c6fe | 1211 | |
mbed_official | 340:28d1f895c6fe | 1212 | /* Conversion complete callback */ |
mbed_official | 340:28d1f895c6fe | 1213 | /* Note: into callback, to determine if conversion has been triggered */ |
mbed_official | 340:28d1f895c6fe | 1214 | /* from EOC or EOS, possibility to use: */ |
mbed_official | 340:28d1f895c6fe | 1215 | /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ |
mbed_official | 340:28d1f895c6fe | 1216 | HAL_ADC_ConvCpltCallback(hadc); |
mbed_official | 340:28d1f895c6fe | 1217 | |
mbed_official | 340:28d1f895c6fe | 1218 | |
mbed_official | 340:28d1f895c6fe | 1219 | /* Clear regular group conversion flag */ |
mbed_official | 340:28d1f895c6fe | 1220 | /* Note: in case of overrun set to OVR_DATA_PRESERVED, end of conversion */ |
mbed_official | 340:28d1f895c6fe | 1221 | /* flags clear induces the release of the preserved data. */ |
mbed_official | 340:28d1f895c6fe | 1222 | /* Therefore, if the preserved data value is needed, it must be */ |
mbed_official | 340:28d1f895c6fe | 1223 | /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ |
mbed_official | 340:28d1f895c6fe | 1224 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); |
mbed_official | 340:28d1f895c6fe | 1225 | } |
mbed_official | 340:28d1f895c6fe | 1226 | |
mbed_official | 340:28d1f895c6fe | 1227 | /* ========== Check Analog watchdog flags ========== */ |
mbed_official | 340:28d1f895c6fe | 1228 | if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD)) |
mbed_official | 340:28d1f895c6fe | 1229 | { |
mbed_official | 340:28d1f895c6fe | 1230 | /* Change ADC state */ |
mbed_official | 340:28d1f895c6fe | 1231 | hadc->State = HAL_ADC_STATE_AWD; |
mbed_official | 340:28d1f895c6fe | 1232 | |
mbed_official | 340:28d1f895c6fe | 1233 | /* Clear ADC Analog watchdog flag */ |
mbed_official | 340:28d1f895c6fe | 1234 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); |
mbed_official | 340:28d1f895c6fe | 1235 | |
mbed_official | 340:28d1f895c6fe | 1236 | /* Level out of window callback */ |
mbed_official | 340:28d1f895c6fe | 1237 | HAL_ADC_LevelOutOfWindowCallback(hadc); |
mbed_official | 340:28d1f895c6fe | 1238 | } |
mbed_official | 340:28d1f895c6fe | 1239 | |
mbed_official | 340:28d1f895c6fe | 1240 | |
mbed_official | 340:28d1f895c6fe | 1241 | /* ========== Check Overrun flag ========== */ |
mbed_official | 340:28d1f895c6fe | 1242 | if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR)) |
mbed_official | 340:28d1f895c6fe | 1243 | { |
mbed_official | 340:28d1f895c6fe | 1244 | /* If overrun is set to overwrite previous data (default setting), */ |
mbed_official | 340:28d1f895c6fe | 1245 | /* overrun event is not considered as an error. */ |
mbed_official | 340:28d1f895c6fe | 1246 | /* (cf ref manual "Managing conversions without using the DMA and without */ |
mbed_official | 340:28d1f895c6fe | 1247 | /* overrun ") */ |
mbed_official | 340:28d1f895c6fe | 1248 | /* Exception for usage with DMA overrun event always considered as an */ |
mbed_official | 340:28d1f895c6fe | 1249 | /* error. */ |
mbed_official | 340:28d1f895c6fe | 1250 | if ((hadc->Init.Overrun == OVR_DATA_PRESERVED) || |
mbed_official | 340:28d1f895c6fe | 1251 | HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) |
mbed_official | 340:28d1f895c6fe | 1252 | { |
mbed_official | 340:28d1f895c6fe | 1253 | /* Change ADC state to error state */ |
mbed_official | 340:28d1f895c6fe | 1254 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1255 | |
mbed_official | 340:28d1f895c6fe | 1256 | /* Set ADC error code to overrun */ |
mbed_official | 340:28d1f895c6fe | 1257 | hadc->ErrorCode |= HAL_ADC_ERROR_OVR; |
mbed_official | 340:28d1f895c6fe | 1258 | |
mbed_official | 340:28d1f895c6fe | 1259 | /* Error callback */ |
mbed_official | 340:28d1f895c6fe | 1260 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 340:28d1f895c6fe | 1261 | } |
mbed_official | 340:28d1f895c6fe | 1262 | |
mbed_official | 340:28d1f895c6fe | 1263 | /* Clear the Overrun flag */ |
mbed_official | 340:28d1f895c6fe | 1264 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 340:28d1f895c6fe | 1265 | } |
mbed_official | 340:28d1f895c6fe | 1266 | |
mbed_official | 340:28d1f895c6fe | 1267 | } |
mbed_official | 340:28d1f895c6fe | 1268 | |
mbed_official | 340:28d1f895c6fe | 1269 | |
mbed_official | 340:28d1f895c6fe | 1270 | /** |
mbed_official | 340:28d1f895c6fe | 1271 | * @brief Conversion complete callback in non blocking mode |
mbed_official | 340:28d1f895c6fe | 1272 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1273 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1274 | */ |
mbed_official | 340:28d1f895c6fe | 1275 | __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1276 | { |
mbed_official | 340:28d1f895c6fe | 1277 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 340:28d1f895c6fe | 1278 | function HAL_ADC_ConvCpltCallback must be implemented in the user file. |
mbed_official | 340:28d1f895c6fe | 1279 | */ |
mbed_official | 340:28d1f895c6fe | 1280 | } |
mbed_official | 340:28d1f895c6fe | 1281 | |
mbed_official | 340:28d1f895c6fe | 1282 | /** |
mbed_official | 340:28d1f895c6fe | 1283 | * @brief Conversion DMA half-transfer callback in non blocking mode |
mbed_official | 340:28d1f895c6fe | 1284 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1285 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1286 | */ |
mbed_official | 340:28d1f895c6fe | 1287 | __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1288 | { |
mbed_official | 340:28d1f895c6fe | 1289 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 340:28d1f895c6fe | 1290 | function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. |
mbed_official | 340:28d1f895c6fe | 1291 | */ |
mbed_official | 340:28d1f895c6fe | 1292 | } |
mbed_official | 340:28d1f895c6fe | 1293 | |
mbed_official | 340:28d1f895c6fe | 1294 | /** |
mbed_official | 340:28d1f895c6fe | 1295 | * @brief Analog watchdog callback in non blocking mode. |
mbed_official | 340:28d1f895c6fe | 1296 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1297 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1298 | */ |
mbed_official | 340:28d1f895c6fe | 1299 | __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1300 | { |
mbed_official | 340:28d1f895c6fe | 1301 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 340:28d1f895c6fe | 1302 | function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file. |
mbed_official | 340:28d1f895c6fe | 1303 | */ |
mbed_official | 340:28d1f895c6fe | 1304 | } |
mbed_official | 340:28d1f895c6fe | 1305 | |
mbed_official | 340:28d1f895c6fe | 1306 | /** |
mbed_official | 340:28d1f895c6fe | 1307 | * @brief ADC error callback in non blocking mode |
mbed_official | 340:28d1f895c6fe | 1308 | * (ADC conversion with interruption or transfer by DMA) |
mbed_official | 340:28d1f895c6fe | 1309 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1310 | * @retval None |
mbed_official | 340:28d1f895c6fe | 1311 | */ |
mbed_official | 340:28d1f895c6fe | 1312 | __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) |
mbed_official | 340:28d1f895c6fe | 1313 | { |
mbed_official | 340:28d1f895c6fe | 1314 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 340:28d1f895c6fe | 1315 | function HAL_ADC_ErrorCallback must be implemented in the user file. |
mbed_official | 340:28d1f895c6fe | 1316 | */ |
mbed_official | 340:28d1f895c6fe | 1317 | } |
mbed_official | 340:28d1f895c6fe | 1318 | |
mbed_official | 340:28d1f895c6fe | 1319 | |
mbed_official | 340:28d1f895c6fe | 1320 | /** |
mbed_official | 340:28d1f895c6fe | 1321 | * @} |
mbed_official | 340:28d1f895c6fe | 1322 | */ |
mbed_official | 340:28d1f895c6fe | 1323 | |
mbed_official | 340:28d1f895c6fe | 1324 | /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions |
mbed_official | 340:28d1f895c6fe | 1325 | * @brief Peripheral Control functions |
mbed_official | 340:28d1f895c6fe | 1326 | * |
mbed_official | 340:28d1f895c6fe | 1327 | @verbatim |
mbed_official | 340:28d1f895c6fe | 1328 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 1329 | ##### Peripheral Control functions ##### |
mbed_official | 340:28d1f895c6fe | 1330 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 1331 | [..] This section provides functions allowing to: |
mbed_official | 340:28d1f895c6fe | 1332 | (+) Configure channels on regular group |
mbed_official | 340:28d1f895c6fe | 1333 | (+) Configure the analog watchdog |
mbed_official | 340:28d1f895c6fe | 1334 | |
mbed_official | 340:28d1f895c6fe | 1335 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 1336 | * @{ |
mbed_official | 340:28d1f895c6fe | 1337 | */ |
mbed_official | 340:28d1f895c6fe | 1338 | |
mbed_official | 340:28d1f895c6fe | 1339 | /** |
mbed_official | 340:28d1f895c6fe | 1340 | * @brief Configures the the selected channel to be linked to the regular |
mbed_official | 340:28d1f895c6fe | 1341 | * group. |
mbed_official | 340:28d1f895c6fe | 1342 | * @note In case of usage of internal measurement channels: |
mbed_official | 340:28d1f895c6fe | 1343 | * VrefInt/Vbat/TempSensor. |
mbed_official | 340:28d1f895c6fe | 1344 | * Sampling time constraints must be respected (sampling time can be |
mbed_official | 340:28d1f895c6fe | 1345 | * adjusted in function of ADC clock frequency and sampling time |
mbed_official | 340:28d1f895c6fe | 1346 | * setting). |
mbed_official | 340:28d1f895c6fe | 1347 | * Refer to device datasheet for timings values, parameters TS_vrefint, |
mbed_official | 340:28d1f895c6fe | 1348 | * TS_vbat, TS_temp (values rough order: 5us to 17us). |
mbed_official | 340:28d1f895c6fe | 1349 | * These internal paths can be be disabled using function |
mbed_official | 340:28d1f895c6fe | 1350 | * HAL_ADC_DeInit(). |
mbed_official | 340:28d1f895c6fe | 1351 | * @note Possibility to update parameters on the fly: |
mbed_official | 340:28d1f895c6fe | 1352 | * This function initializes channel into regular group, following |
mbed_official | 340:28d1f895c6fe | 1353 | * calls to this function can be used to reconfigure some parameters |
mbed_official | 340:28d1f895c6fe | 1354 | * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting |
mbed_official | 340:28d1f895c6fe | 1355 | * the ADC. |
mbed_official | 340:28d1f895c6fe | 1356 | * The setting of these parameters is conditioned to ADC state. |
mbed_official | 340:28d1f895c6fe | 1357 | * For parameters constraints, see comments of structure |
mbed_official | 340:28d1f895c6fe | 1358 | * "ADC_ChannelConfTypeDef". |
mbed_official | 340:28d1f895c6fe | 1359 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1360 | * @param sConfig: Structure of ADC channel for regular group. |
mbed_official | 340:28d1f895c6fe | 1361 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1362 | */ |
mbed_official | 340:28d1f895c6fe | 1363 | HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) |
mbed_official | 340:28d1f895c6fe | 1364 | { |
mbed_official | 340:28d1f895c6fe | 1365 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1366 | __IO uint32_t wait_loop_index = 0; |
mbed_official | 340:28d1f895c6fe | 1367 | |
mbed_official | 340:28d1f895c6fe | 1368 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1369 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1370 | assert_param(IS_ADC_CHANNEL(sConfig->Channel)); |
mbed_official | 340:28d1f895c6fe | 1371 | assert_param(IS_ADC_RANK(sConfig->Rank)); |
mbed_official | 340:28d1f895c6fe | 1372 | assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); |
mbed_official | 340:28d1f895c6fe | 1373 | |
mbed_official | 340:28d1f895c6fe | 1374 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 1375 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1376 | |
mbed_official | 340:28d1f895c6fe | 1377 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 340:28d1f895c6fe | 1378 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
mbed_official | 340:28d1f895c6fe | 1379 | /* conversion on going on regular group: */ |
mbed_official | 340:28d1f895c6fe | 1380 | /* - Channel number */ |
mbed_official | 340:28d1f895c6fe | 1381 | /* - Channel sampling time */ |
mbed_official | 340:28d1f895c6fe | 1382 | /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */ |
mbed_official | 340:28d1f895c6fe | 1383 | if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) |
mbed_official | 340:28d1f895c6fe | 1384 | { |
mbed_official | 340:28d1f895c6fe | 1385 | /* Configure channel: depending on rank setting, add it or remove it from */ |
mbed_official | 340:28d1f895c6fe | 1386 | /* ADC conversion sequencer. */ |
mbed_official | 340:28d1f895c6fe | 1387 | if (sConfig->Rank != ADC_RANK_NONE) |
mbed_official | 340:28d1f895c6fe | 1388 | { |
mbed_official | 340:28d1f895c6fe | 1389 | /* Regular sequence configuration */ |
mbed_official | 340:28d1f895c6fe | 1390 | /* Set the channel selection register from the selected channel */ |
mbed_official | 340:28d1f895c6fe | 1391 | hadc->Instance->CHSELR |= __HAL_ADC_CHSELR_CHANNEL(sConfig->Channel); |
mbed_official | 340:28d1f895c6fe | 1392 | |
mbed_official | 340:28d1f895c6fe | 1393 | /* Channel sampling time configuration */ |
mbed_official | 340:28d1f895c6fe | 1394 | /* Modify sampling time if needed (not needed in case of reoccurrence */ |
mbed_official | 340:28d1f895c6fe | 1395 | /* for several channels programmed consecutively into the sequencer) */ |
mbed_official | 340:28d1f895c6fe | 1396 | if (sConfig->SamplingTime != __HAL_ADC_GET_SAMPLINGTIME(hadc)) |
mbed_official | 340:28d1f895c6fe | 1397 | { |
mbed_official | 340:28d1f895c6fe | 1398 | /* Channel sampling time configuration */ |
mbed_official | 340:28d1f895c6fe | 1399 | /* Clear the old sample time */ |
mbed_official | 340:28d1f895c6fe | 1400 | hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); |
mbed_official | 340:28d1f895c6fe | 1401 | |
mbed_official | 340:28d1f895c6fe | 1402 | /* Set the new sample time */ |
mbed_official | 340:28d1f895c6fe | 1403 | hadc->Instance->SMPR |= (sConfig->SamplingTime); |
mbed_official | 340:28d1f895c6fe | 1404 | } |
mbed_official | 340:28d1f895c6fe | 1405 | |
mbed_official | 340:28d1f895c6fe | 1406 | /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */ |
mbed_official | 340:28d1f895c6fe | 1407 | /* internal measurement paths enable: If internal channel selected, */ |
mbed_official | 340:28d1f895c6fe | 1408 | /* enable dedicated internal buffers and path. */ |
mbed_official | 340:28d1f895c6fe | 1409 | /* Note: these internal measurement paths can be disabled using */ |
mbed_official | 340:28d1f895c6fe | 1410 | /* HAL_ADC_DeInit() or removing the channel from sequencer with */ |
mbed_official | 340:28d1f895c6fe | 1411 | /* channel configuration parameter "Rank". */ |
mbed_official | 340:28d1f895c6fe | 1412 | |
mbed_official | 340:28d1f895c6fe | 1413 | /* If Channel_16 is selected, enable Temp. sensor measurement path. */ |
mbed_official | 340:28d1f895c6fe | 1414 | if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) |
mbed_official | 340:28d1f895c6fe | 1415 | { |
mbed_official | 340:28d1f895c6fe | 1416 | ADC->CCR |= ADC_CCR_TSEN; |
mbed_official | 340:28d1f895c6fe | 1417 | |
mbed_official | 340:28d1f895c6fe | 1418 | /* Delay for temperature sensor stabilization time */ |
mbed_official | 340:28d1f895c6fe | 1419 | while(wait_loop_index < ADC_TEMPSENSOR_DELAY_CPU_CYCLES) |
mbed_official | 340:28d1f895c6fe | 1420 | { |
mbed_official | 340:28d1f895c6fe | 1421 | wait_loop_index++; |
mbed_official | 340:28d1f895c6fe | 1422 | } |
mbed_official | 340:28d1f895c6fe | 1423 | } |
mbed_official | 340:28d1f895c6fe | 1424 | /* If Channel_17 is selected, enable VBAT measurement path. */ |
mbed_official | 340:28d1f895c6fe | 1425 | else if (sConfig->Channel == ADC_CHANNEL_VBAT) |
mbed_official | 340:28d1f895c6fe | 1426 | { |
mbed_official | 340:28d1f895c6fe | 1427 | ADC->CCR |= ADC_CCR_VBATEN; |
mbed_official | 340:28d1f895c6fe | 1428 | } |
mbed_official | 340:28d1f895c6fe | 1429 | /* If Channel_18 is selected, enable VREFINT measurement path. */ |
mbed_official | 340:28d1f895c6fe | 1430 | else if (sConfig->Channel == ADC_CHANNEL_VREFINT) |
mbed_official | 340:28d1f895c6fe | 1431 | { |
mbed_official | 340:28d1f895c6fe | 1432 | ADC->CCR |= ADC_CCR_VREFEN; |
mbed_official | 340:28d1f895c6fe | 1433 | } |
mbed_official | 340:28d1f895c6fe | 1434 | |
mbed_official | 340:28d1f895c6fe | 1435 | } |
mbed_official | 340:28d1f895c6fe | 1436 | else |
mbed_official | 340:28d1f895c6fe | 1437 | { |
mbed_official | 340:28d1f895c6fe | 1438 | /* Regular sequence configuration */ |
mbed_official | 340:28d1f895c6fe | 1439 | /* Reset the channel selection register from the selected channel */ |
mbed_official | 340:28d1f895c6fe | 1440 | hadc->Instance->CHSELR &= ~__HAL_ADC_CHSELR_CHANNEL(sConfig->Channel); |
mbed_official | 340:28d1f895c6fe | 1441 | |
mbed_official | 340:28d1f895c6fe | 1442 | /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */ |
mbed_official | 340:28d1f895c6fe | 1443 | /* internal measurement paths disable: If internal channel selected, */ |
mbed_official | 340:28d1f895c6fe | 1444 | /* disable dedicated internal buffers and path. */ |
mbed_official | 340:28d1f895c6fe | 1445 | |
mbed_official | 340:28d1f895c6fe | 1446 | /* If Channel_16 is selected, disable Temp. sensor measurement path. */ |
mbed_official | 340:28d1f895c6fe | 1447 | if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) |
mbed_official | 340:28d1f895c6fe | 1448 | { |
mbed_official | 340:28d1f895c6fe | 1449 | ADC->CCR &= ~ADC_CCR_TSEN; |
mbed_official | 340:28d1f895c6fe | 1450 | } |
mbed_official | 340:28d1f895c6fe | 1451 | /* If Channel_17 is selected, disable VBAT measurement path. */ |
mbed_official | 340:28d1f895c6fe | 1452 | else if (sConfig->Channel == ADC_CHANNEL_VBAT) |
mbed_official | 340:28d1f895c6fe | 1453 | { |
mbed_official | 340:28d1f895c6fe | 1454 | ADC->CCR &= ~ADC_CCR_VBATEN; |
mbed_official | 340:28d1f895c6fe | 1455 | } |
mbed_official | 340:28d1f895c6fe | 1456 | /* If Channel_18 is selected, disable VREFINT measurement path. */ |
mbed_official | 340:28d1f895c6fe | 1457 | else if (sConfig->Channel == ADC_CHANNEL_VREFINT) |
mbed_official | 340:28d1f895c6fe | 1458 | { |
mbed_official | 340:28d1f895c6fe | 1459 | ADC->CCR &= ~ADC_CCR_VREFEN; |
mbed_official | 340:28d1f895c6fe | 1460 | } |
mbed_official | 340:28d1f895c6fe | 1461 | } |
mbed_official | 340:28d1f895c6fe | 1462 | |
mbed_official | 340:28d1f895c6fe | 1463 | } |
mbed_official | 340:28d1f895c6fe | 1464 | |
mbed_official | 340:28d1f895c6fe | 1465 | |
mbed_official | 340:28d1f895c6fe | 1466 | /* If a conversion is on going on regular group, no update on regular */ |
mbed_official | 340:28d1f895c6fe | 1467 | /* channel could be done on neither of the channel configuration structure */ |
mbed_official | 340:28d1f895c6fe | 1468 | /* parameters. */ |
mbed_official | 340:28d1f895c6fe | 1469 | else |
mbed_official | 340:28d1f895c6fe | 1470 | { |
mbed_official | 340:28d1f895c6fe | 1471 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1472 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1473 | |
mbed_official | 340:28d1f895c6fe | 1474 | tmpHALStatus = HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1475 | } |
mbed_official | 340:28d1f895c6fe | 1476 | |
mbed_official | 340:28d1f895c6fe | 1477 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 1478 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1479 | |
mbed_official | 340:28d1f895c6fe | 1480 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 1481 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 1482 | } |
mbed_official | 340:28d1f895c6fe | 1483 | |
mbed_official | 340:28d1f895c6fe | 1484 | |
mbed_official | 340:28d1f895c6fe | 1485 | /** |
mbed_official | 340:28d1f895c6fe | 1486 | * @brief Configures the analog watchdog. |
mbed_official | 340:28d1f895c6fe | 1487 | * @note Possibility to update parameters on the fly: |
mbed_official | 340:28d1f895c6fe | 1488 | * This function initializes the selected analog watchdog, following |
mbed_official | 340:28d1f895c6fe | 1489 | * calls to this function can be used to reconfigure some parameters |
mbed_official | 340:28d1f895c6fe | 1490 | * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting |
mbed_official | 340:28d1f895c6fe | 1491 | * the ADC. |
mbed_official | 340:28d1f895c6fe | 1492 | * The setting of these parameters is conditioned to ADC state. |
mbed_official | 340:28d1f895c6fe | 1493 | * For parameters constraints, see comments of structure |
mbed_official | 340:28d1f895c6fe | 1494 | * "ADC_AnalogWDGConfTypeDef". |
mbed_official | 340:28d1f895c6fe | 1495 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1496 | * @param AnalogWDGConfig: Structure of ADC analog watchdog configuration |
mbed_official | 340:28d1f895c6fe | 1497 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1498 | */ |
mbed_official | 340:28d1f895c6fe | 1499 | HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) |
mbed_official | 340:28d1f895c6fe | 1500 | { |
mbed_official | 340:28d1f895c6fe | 1501 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1502 | |
mbed_official | 340:28d1f895c6fe | 1503 | uint32_t tmpAWDHighThresholdShifted; |
mbed_official | 340:28d1f895c6fe | 1504 | uint32_t tmpAWDLowThresholdShifted; |
mbed_official | 340:28d1f895c6fe | 1505 | |
mbed_official | 340:28d1f895c6fe | 1506 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1507 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1508 | assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); |
mbed_official | 340:28d1f895c6fe | 1509 | assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); |
mbed_official | 340:28d1f895c6fe | 1510 | |
mbed_official | 340:28d1f895c6fe | 1511 | /* Verify if threshold is within the selected ADC resolution */ |
mbed_official | 340:28d1f895c6fe | 1512 | assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); |
mbed_official | 340:28d1f895c6fe | 1513 | assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); |
mbed_official | 340:28d1f895c6fe | 1514 | |
mbed_official | 340:28d1f895c6fe | 1515 | /* Process locked */ |
mbed_official | 340:28d1f895c6fe | 1516 | __HAL_LOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1517 | |
mbed_official | 340:28d1f895c6fe | 1518 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 340:28d1f895c6fe | 1519 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
mbed_official | 340:28d1f895c6fe | 1520 | /* conversion on going on regular group: */ |
mbed_official | 340:28d1f895c6fe | 1521 | /* - Analog watchdog channels */ |
mbed_official | 340:28d1f895c6fe | 1522 | /* - Analog watchdog thresholds */ |
mbed_official | 340:28d1f895c6fe | 1523 | if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) |
mbed_official | 340:28d1f895c6fe | 1524 | { |
mbed_official | 340:28d1f895c6fe | 1525 | /* Configuration of analog watchdog: */ |
mbed_official | 340:28d1f895c6fe | 1526 | /* - Set the analog watchdog enable mode: one or overall group of */ |
mbed_official | 340:28d1f895c6fe | 1527 | /* channels. */ |
mbed_official | 340:28d1f895c6fe | 1528 | /* - Set the Analog watchdog channel (is not used if watchdog */ |
mbed_official | 340:28d1f895c6fe | 1529 | /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ |
mbed_official | 340:28d1f895c6fe | 1530 | hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | |
mbed_official | 340:28d1f895c6fe | 1531 | ADC_CFGR1_AWDEN | |
mbed_official | 340:28d1f895c6fe | 1532 | ADC_CFGR1_AWDCH ); |
mbed_official | 340:28d1f895c6fe | 1533 | |
mbed_official | 340:28d1f895c6fe | 1534 | hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | |
mbed_official | 340:28d1f895c6fe | 1535 | __HAL_ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); |
mbed_official | 340:28d1f895c6fe | 1536 | |
mbed_official | 340:28d1f895c6fe | 1537 | /* Shift the offset in function of the selected ADC resolution: Thresholds*/ |
mbed_official | 340:28d1f895c6fe | 1538 | /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ |
mbed_official | 340:28d1f895c6fe | 1539 | tmpAWDHighThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); |
mbed_official | 340:28d1f895c6fe | 1540 | tmpAWDLowThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); |
mbed_official | 340:28d1f895c6fe | 1541 | |
mbed_official | 340:28d1f895c6fe | 1542 | /* Set the high and low thresholds */ |
mbed_official | 340:28d1f895c6fe | 1543 | hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); |
mbed_official | 340:28d1f895c6fe | 1544 | hadc->Instance->TR |= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | |
mbed_official | 340:28d1f895c6fe | 1545 | tmpAWDLowThresholdShifted ); |
mbed_official | 340:28d1f895c6fe | 1546 | |
mbed_official | 340:28d1f895c6fe | 1547 | /* Clear the ADC Analog watchdog flag (in case of let enabled by */ |
mbed_official | 340:28d1f895c6fe | 1548 | /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ |
mbed_official | 340:28d1f895c6fe | 1549 | /* or HAL_ADC_PollForEvent(). */ |
mbed_official | 340:28d1f895c6fe | 1550 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD); |
mbed_official | 340:28d1f895c6fe | 1551 | |
mbed_official | 340:28d1f895c6fe | 1552 | /* Configure ADC Analog watchdog interrupt */ |
mbed_official | 340:28d1f895c6fe | 1553 | if(AnalogWDGConfig->ITMode == ENABLE) |
mbed_official | 340:28d1f895c6fe | 1554 | { |
mbed_official | 340:28d1f895c6fe | 1555 | /* Enable the ADC Analog watchdog interrupt */ |
mbed_official | 340:28d1f895c6fe | 1556 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); |
mbed_official | 340:28d1f895c6fe | 1557 | } |
mbed_official | 340:28d1f895c6fe | 1558 | else |
mbed_official | 340:28d1f895c6fe | 1559 | { |
mbed_official | 340:28d1f895c6fe | 1560 | /* Disable the ADC Analog watchdog interrupt */ |
mbed_official | 340:28d1f895c6fe | 1561 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); |
mbed_official | 340:28d1f895c6fe | 1562 | } |
mbed_official | 340:28d1f895c6fe | 1563 | |
mbed_official | 340:28d1f895c6fe | 1564 | } |
mbed_official | 340:28d1f895c6fe | 1565 | /* If a conversion is on going on regular group, no update could be done */ |
mbed_official | 340:28d1f895c6fe | 1566 | /* on neither of the AWD configuration structure parameters. */ |
mbed_official | 340:28d1f895c6fe | 1567 | else |
mbed_official | 340:28d1f895c6fe | 1568 | { |
mbed_official | 340:28d1f895c6fe | 1569 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1570 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1571 | |
mbed_official | 340:28d1f895c6fe | 1572 | tmpHALStatus = HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1573 | } |
mbed_official | 340:28d1f895c6fe | 1574 | |
mbed_official | 340:28d1f895c6fe | 1575 | |
mbed_official | 340:28d1f895c6fe | 1576 | /* Process unlocked */ |
mbed_official | 340:28d1f895c6fe | 1577 | __HAL_UNLOCK(hadc); |
mbed_official | 340:28d1f895c6fe | 1578 | |
mbed_official | 340:28d1f895c6fe | 1579 | /* Return function status */ |
mbed_official | 340:28d1f895c6fe | 1580 | return tmpHALStatus; |
mbed_official | 340:28d1f895c6fe | 1581 | } |
mbed_official | 340:28d1f895c6fe | 1582 | |
mbed_official | 340:28d1f895c6fe | 1583 | |
mbed_official | 340:28d1f895c6fe | 1584 | /** |
mbed_official | 340:28d1f895c6fe | 1585 | * @} |
mbed_official | 340:28d1f895c6fe | 1586 | */ |
mbed_official | 340:28d1f895c6fe | 1587 | |
mbed_official | 340:28d1f895c6fe | 1588 | |
mbed_official | 340:28d1f895c6fe | 1589 | /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions |
mbed_official | 340:28d1f895c6fe | 1590 | * @brief Peripheral State functions |
mbed_official | 340:28d1f895c6fe | 1591 | * |
mbed_official | 340:28d1f895c6fe | 1592 | @verbatim |
mbed_official | 340:28d1f895c6fe | 1593 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 1594 | ##### Peripheral State and Errors functions ##### |
mbed_official | 340:28d1f895c6fe | 1595 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 1596 | [..] |
mbed_official | 340:28d1f895c6fe | 1597 | This subsection provides functions to get in run-time the status of the |
mbed_official | 340:28d1f895c6fe | 1598 | peripheral. |
mbed_official | 340:28d1f895c6fe | 1599 | (+) Check the ADC state |
mbed_official | 340:28d1f895c6fe | 1600 | (+) Check the ADC error code |
mbed_official | 340:28d1f895c6fe | 1601 | |
mbed_official | 340:28d1f895c6fe | 1602 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 1603 | * @{ |
mbed_official | 340:28d1f895c6fe | 1604 | */ |
mbed_official | 340:28d1f895c6fe | 1605 | |
mbed_official | 340:28d1f895c6fe | 1606 | /** |
mbed_official | 340:28d1f895c6fe | 1607 | * @brief return the ADC state |
mbed_official | 340:28d1f895c6fe | 1608 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1609 | * @retval HAL state |
mbed_official | 340:28d1f895c6fe | 1610 | */ |
mbed_official | 340:28d1f895c6fe | 1611 | HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1612 | { |
mbed_official | 340:28d1f895c6fe | 1613 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1614 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1615 | |
mbed_official | 340:28d1f895c6fe | 1616 | /* Return ADC state */ |
mbed_official | 340:28d1f895c6fe | 1617 | return hadc->State; |
mbed_official | 340:28d1f895c6fe | 1618 | } |
mbed_official | 340:28d1f895c6fe | 1619 | |
mbed_official | 340:28d1f895c6fe | 1620 | /** |
mbed_official | 340:28d1f895c6fe | 1621 | * @brief Return the ADC error code |
mbed_official | 340:28d1f895c6fe | 1622 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1623 | * @retval ADC Error Code |
mbed_official | 340:28d1f895c6fe | 1624 | */ |
mbed_official | 340:28d1f895c6fe | 1625 | uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) |
mbed_official | 340:28d1f895c6fe | 1626 | { |
mbed_official | 340:28d1f895c6fe | 1627 | return hadc->ErrorCode; |
mbed_official | 340:28d1f895c6fe | 1628 | } |
mbed_official | 340:28d1f895c6fe | 1629 | |
mbed_official | 340:28d1f895c6fe | 1630 | /** |
mbed_official | 340:28d1f895c6fe | 1631 | * @} |
mbed_official | 340:28d1f895c6fe | 1632 | */ |
mbed_official | 340:28d1f895c6fe | 1633 | |
mbed_official | 340:28d1f895c6fe | 1634 | /** |
mbed_official | 340:28d1f895c6fe | 1635 | * @} |
mbed_official | 340:28d1f895c6fe | 1636 | */ |
mbed_official | 340:28d1f895c6fe | 1637 | |
mbed_official | 340:28d1f895c6fe | 1638 | /** @defgroup ADC_Private_Functions ADC Private Functions |
mbed_official | 340:28d1f895c6fe | 1639 | * @{ |
mbed_official | 340:28d1f895c6fe | 1640 | */ |
mbed_official | 340:28d1f895c6fe | 1641 | |
mbed_official | 340:28d1f895c6fe | 1642 | /** |
mbed_official | 340:28d1f895c6fe | 1643 | * @brief Enable the selected ADC. |
mbed_official | 340:28d1f895c6fe | 1644 | * @note Prerequisite condition to use this function: ADC must be disabled |
mbed_official | 340:28d1f895c6fe | 1645 | * and voltage regulator must be enabled (done into HAL_ADC_Init()). |
mbed_official | 340:28d1f895c6fe | 1646 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1647 | * @retval HAL status. |
mbed_official | 340:28d1f895c6fe | 1648 | */ |
mbed_official | 340:28d1f895c6fe | 1649 | static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1650 | { |
mbed_official | 340:28d1f895c6fe | 1651 | uint32_t tickstart = 0; |
mbed_official | 340:28d1f895c6fe | 1652 | __IO uint32_t wait_loop_index = 0; |
mbed_official | 340:28d1f895c6fe | 1653 | |
mbed_official | 340:28d1f895c6fe | 1654 | /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ |
mbed_official | 340:28d1f895c6fe | 1655 | /* enabling phase not yet completed: flag ADC ready not yet set). */ |
mbed_official | 340:28d1f895c6fe | 1656 | /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ |
mbed_official | 340:28d1f895c6fe | 1657 | /* causes: ADC clock not running, ...). */ |
mbed_official | 340:28d1f895c6fe | 1658 | if (__HAL_ADC_IS_ENABLED(hadc) == RESET) |
mbed_official | 340:28d1f895c6fe | 1659 | { |
mbed_official | 340:28d1f895c6fe | 1660 | /* Check if conditions to enable the ADC are fulfilled */ |
mbed_official | 340:28d1f895c6fe | 1661 | if (__HAL_ADC_ENABLING_CONDITIONS(hadc) == RESET) |
mbed_official | 340:28d1f895c6fe | 1662 | { |
mbed_official | 340:28d1f895c6fe | 1663 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1664 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1665 | |
mbed_official | 340:28d1f895c6fe | 1666 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 1667 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 1668 | |
mbed_official | 340:28d1f895c6fe | 1669 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1670 | } |
mbed_official | 340:28d1f895c6fe | 1671 | |
mbed_official | 340:28d1f895c6fe | 1672 | /* Enable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 1673 | __HAL_ADC_ENABLE(hadc); |
mbed_official | 340:28d1f895c6fe | 1674 | |
mbed_official | 340:28d1f895c6fe | 1675 | /* Delay for ADC stabilization time. */ |
mbed_official | 340:28d1f895c6fe | 1676 | /* Delay fixed to worst case: maximum CPU frequency */ |
mbed_official | 340:28d1f895c6fe | 1677 | while(wait_loop_index < ADC_STAB_DELAY_CPU_CYCLES) |
mbed_official | 340:28d1f895c6fe | 1678 | { |
mbed_official | 340:28d1f895c6fe | 1679 | wait_loop_index++; |
mbed_official | 340:28d1f895c6fe | 1680 | } |
mbed_official | 340:28d1f895c6fe | 1681 | |
mbed_official | 340:28d1f895c6fe | 1682 | /* Get timeout */ |
mbed_official | 340:28d1f895c6fe | 1683 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 1684 | |
mbed_official | 340:28d1f895c6fe | 1685 | /* Wait for ADC effectively enabled */ |
mbed_official | 340:28d1f895c6fe | 1686 | while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) |
mbed_official | 340:28d1f895c6fe | 1687 | { |
mbed_official | 340:28d1f895c6fe | 1688 | if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) |
mbed_official | 340:28d1f895c6fe | 1689 | { |
mbed_official | 340:28d1f895c6fe | 1690 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1691 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1692 | |
mbed_official | 340:28d1f895c6fe | 1693 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 1694 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 1695 | |
mbed_official | 340:28d1f895c6fe | 1696 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1697 | } |
mbed_official | 340:28d1f895c6fe | 1698 | } |
mbed_official | 340:28d1f895c6fe | 1699 | |
mbed_official | 340:28d1f895c6fe | 1700 | } |
mbed_official | 340:28d1f895c6fe | 1701 | |
mbed_official | 340:28d1f895c6fe | 1702 | /* Return HAL status */ |
mbed_official | 340:28d1f895c6fe | 1703 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1704 | } |
mbed_official | 340:28d1f895c6fe | 1705 | |
mbed_official | 340:28d1f895c6fe | 1706 | /** |
mbed_official | 340:28d1f895c6fe | 1707 | * @brief Disable the selected ADC. |
mbed_official | 340:28d1f895c6fe | 1708 | * @note Prerequisite condition to use this function: ADC conversions must be |
mbed_official | 340:28d1f895c6fe | 1709 | * stopped. |
mbed_official | 340:28d1f895c6fe | 1710 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1711 | * @retval HAL status. |
mbed_official | 340:28d1f895c6fe | 1712 | */ |
mbed_official | 340:28d1f895c6fe | 1713 | static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1714 | { |
mbed_official | 340:28d1f895c6fe | 1715 | uint32_t tickstart = 0; |
mbed_official | 340:28d1f895c6fe | 1716 | |
mbed_official | 340:28d1f895c6fe | 1717 | /* Verification if ADC is not already disabled: */ |
mbed_official | 340:28d1f895c6fe | 1718 | /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ |
mbed_official | 340:28d1f895c6fe | 1719 | /* disabled. */ |
mbed_official | 340:28d1f895c6fe | 1720 | if (__HAL_ADC_IS_ENABLED(hadc) != RESET ) |
mbed_official | 340:28d1f895c6fe | 1721 | { |
mbed_official | 340:28d1f895c6fe | 1722 | /* Check if conditions to disable the ADC are fulfilled */ |
mbed_official | 340:28d1f895c6fe | 1723 | if (__HAL_ADC_DISABLING_CONDITIONS(hadc) != RESET) |
mbed_official | 340:28d1f895c6fe | 1724 | { |
mbed_official | 340:28d1f895c6fe | 1725 | /* Disable the ADC peripheral */ |
mbed_official | 340:28d1f895c6fe | 1726 | __HAL_ADC_DISABLE(hadc); |
mbed_official | 340:28d1f895c6fe | 1727 | } |
mbed_official | 340:28d1f895c6fe | 1728 | else |
mbed_official | 340:28d1f895c6fe | 1729 | { |
mbed_official | 340:28d1f895c6fe | 1730 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1731 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1732 | |
mbed_official | 340:28d1f895c6fe | 1733 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 1734 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 1735 | |
mbed_official | 340:28d1f895c6fe | 1736 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1737 | } |
mbed_official | 340:28d1f895c6fe | 1738 | |
mbed_official | 340:28d1f895c6fe | 1739 | /* Wait for ADC effectively disabled */ |
mbed_official | 340:28d1f895c6fe | 1740 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 1741 | |
mbed_official | 340:28d1f895c6fe | 1742 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) |
mbed_official | 340:28d1f895c6fe | 1743 | { |
mbed_official | 340:28d1f895c6fe | 1744 | if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) |
mbed_official | 340:28d1f895c6fe | 1745 | { |
mbed_official | 340:28d1f895c6fe | 1746 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1747 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1748 | |
mbed_official | 340:28d1f895c6fe | 1749 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 1750 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 1751 | |
mbed_official | 340:28d1f895c6fe | 1752 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1753 | } |
mbed_official | 340:28d1f895c6fe | 1754 | } |
mbed_official | 340:28d1f895c6fe | 1755 | } |
mbed_official | 340:28d1f895c6fe | 1756 | |
mbed_official | 340:28d1f895c6fe | 1757 | /* Return HAL status */ |
mbed_official | 340:28d1f895c6fe | 1758 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1759 | } |
mbed_official | 340:28d1f895c6fe | 1760 | |
mbed_official | 340:28d1f895c6fe | 1761 | |
mbed_official | 340:28d1f895c6fe | 1762 | /** |
mbed_official | 340:28d1f895c6fe | 1763 | * @brief Stop ADC conversion. |
mbed_official | 340:28d1f895c6fe | 1764 | * @note Prerequisite condition to use this function: ADC conversions must be |
mbed_official | 340:28d1f895c6fe | 1765 | * stopped to disable the ADC. |
mbed_official | 340:28d1f895c6fe | 1766 | * @param hadc: ADC handle |
mbed_official | 340:28d1f895c6fe | 1767 | * @retval HAL status. |
mbed_official | 340:28d1f895c6fe | 1768 | */ |
mbed_official | 340:28d1f895c6fe | 1769 | static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) |
mbed_official | 340:28d1f895c6fe | 1770 | { |
mbed_official | 340:28d1f895c6fe | 1771 | uint32_t tickstart = 0; |
mbed_official | 340:28d1f895c6fe | 1772 | |
mbed_official | 340:28d1f895c6fe | 1773 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 1774 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 340:28d1f895c6fe | 1775 | |
mbed_official | 340:28d1f895c6fe | 1776 | /* Verification if ADC is not already stopped on regular group to bypass */ |
mbed_official | 340:28d1f895c6fe | 1777 | /* this function if not needed. */ |
mbed_official | 340:28d1f895c6fe | 1778 | if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) |
mbed_official | 340:28d1f895c6fe | 1779 | { |
mbed_official | 340:28d1f895c6fe | 1780 | |
mbed_official | 340:28d1f895c6fe | 1781 | /* Stop potential conversion on going on regular group */ |
mbed_official | 340:28d1f895c6fe | 1782 | /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ |
mbed_official | 340:28d1f895c6fe | 1783 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && |
mbed_official | 340:28d1f895c6fe | 1784 | HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) |
mbed_official | 340:28d1f895c6fe | 1785 | { |
mbed_official | 340:28d1f895c6fe | 1786 | /* Stop conversions on regular group */ |
mbed_official | 340:28d1f895c6fe | 1787 | hadc->Instance->CR |= ADC_CR_ADSTP; |
mbed_official | 340:28d1f895c6fe | 1788 | } |
mbed_official | 340:28d1f895c6fe | 1789 | |
mbed_official | 340:28d1f895c6fe | 1790 | /* Wait for conversion effectively stopped */ |
mbed_official | 340:28d1f895c6fe | 1791 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 1792 | |
mbed_official | 340:28d1f895c6fe | 1793 | while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) |
mbed_official | 340:28d1f895c6fe | 1794 | { |
mbed_official | 340:28d1f895c6fe | 1795 | if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) |
mbed_official | 340:28d1f895c6fe | 1796 | { |
mbed_official | 340:28d1f895c6fe | 1797 | /* Update ADC state machine to error */ |
mbed_official | 340:28d1f895c6fe | 1798 | hadc->State = HAL_ADC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 1799 | |
mbed_official | 340:28d1f895c6fe | 1800 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 340:28d1f895c6fe | 1801 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
mbed_official | 340:28d1f895c6fe | 1802 | |
mbed_official | 340:28d1f895c6fe | 1803 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 1804 | } |
mbed_official | 340:28d1f895c6fe | 1805 | } |
mbed_official | 340:28d1f895c6fe | 1806 | |
mbed_official | 340:28d1f895c6fe | 1807 | } |
mbed_official | 340:28d1f895c6fe | 1808 | |
mbed_official | 340:28d1f895c6fe | 1809 | /* Return HAL status */ |
mbed_official | 340:28d1f895c6fe | 1810 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1811 | } |
mbed_official | 340:28d1f895c6fe | 1812 | |
mbed_official | 340:28d1f895c6fe | 1813 | /** |
mbed_official | 340:28d1f895c6fe | 1814 | * @} |
mbed_official | 340:28d1f895c6fe | 1815 | */ |
mbed_official | 340:28d1f895c6fe | 1816 | |
mbed_official | 340:28d1f895c6fe | 1817 | #endif /* HAL_ADC_MODULE_ENABLED */ |
mbed_official | 340:28d1f895c6fe | 1818 | /** |
mbed_official | 340:28d1f895c6fe | 1819 | * @} |
mbed_official | 340:28d1f895c6fe | 1820 | */ |
mbed_official | 340:28d1f895c6fe | 1821 | |
mbed_official | 340:28d1f895c6fe | 1822 | /** |
mbed_official | 340:28d1f895c6fe | 1823 | * @} |
mbed_official | 340:28d1f895c6fe | 1824 | */ |
mbed_official | 340:28d1f895c6fe | 1825 | |
mbed_official | 340:28d1f895c6fe | 1826 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |