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Revision 0:09f6f55b32fa, committed 2021-04-02
- Comitter:
- mohamedwajdi
- Date:
- Fri Apr 02 10:15:16 2021 +0000
- Commit message:
- TP3 RBT 2GII Ex1
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Modbus.lib Fri Apr 02 10:15:16 2021 +0000 @@ -0,0 +1,1 @@ +https://os.mbed.com/users/mohamedwajdi/code/Modbus/#1ff8c07b8c2e
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/main.cpp Fri Apr 02 10:15:16 2021 +0000 @@ -0,0 +1,242 @@ +#include "mbed.h" +#include "mb.h" + +#define BITS_OUT_START 0x1001 //Bits de sorties (fonctions 1 et 5) +#define BITS_OUT_NBITS 16 +#define BITS_OUT_BYTES BITS_OUT_NBITS/8 //16/8 = 2 octets + +#define BITS_IN_START 0x2001 //Bits d'entées (fonction 2) +#define BITS_IN_NBITS 16 +#define BITS_IN_BYTES BITS_IN_NBITS/8 //16/8 = 2 octets + +#define REG_OUT_START 0x3001 //Registres de sorties (fonctions 3 et 6) +#define REG_OUT_NREGS 4 + +#define REG_IN_START 0x4001 //Registres d'entées (fonction 4) +#define REG_IN_NREGS 4 + +#define SLAVE_ID 0x07 + +static USHORT BitsOutStart = BITS_OUT_START; // (fonctions 1 et 5) +static UCHAR BitsOut[BITS_OUT_BYTES] = {0xA5,0x5A}; +static USHORT BitsInStart = BITS_IN_START; // (fonction 2) +static UCHAR BitsIn[BITS_IN_BYTES] = {0x3C,0xC3}; +static USHORT RegOutStart = REG_OUT_START; // (fonctions 3 et 6) +static USHORT RegOut[REG_OUT_NREGS] = {0x0123,0x4567,0x89AB,0xCDEF}; +static USHORT RegInStart = REG_IN_START; // (fonction 4) +static USHORT RegIn[REG_IN_NREGS] = {0x1122,0x3344,0x5566,0x7788}; + +int main() { + eMBInit( MB_RTU, SLAVE_ID, 0, 9600, MB_PAR_NONE ); + eMBEnable(); + + while(1) { + eMBPoll(); + } +} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +// Procedure résevée pour les bits de sorties (Foction 1 et 5) +// pucRegBuffer => coils buffer usAddress => coils address +// usNCoils => coils number eMode => read or write +eMBErrorCode +eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode ) +{ + eMBErrorCode eStatus = MB_ENOERR; + int iIntRegIndex; + int iIntBufNum; + int iIntBitNum; + int iExtRegIndex=0; + int iExtBufNum; + int iExtBitNum; + UCHAR ucTemp; + if( ( usAddress >= BITS_OUT_START ) + && ( usAddress + usNCoils <= BITS_OUT_START + BITS_OUT_NBITS ) ) + { + iIntRegIndex = ( int )( usAddress - BitsOutStart ); + + while( usNCoils > 0 ) + { + iIntBufNum=iIntRegIndex/8; + iIntBitNum=iIntRegIndex%8; + iExtBufNum=iExtRegIndex/8; + iExtBitNum=iExtRegIndex%8; + + switch ( eMode ) + { + case MB_REG_READ: + // Read coils + if(iExtBitNum==0){ + pucRegBuffer[iExtBufNum]=0; + } + ucTemp=(BitsOut[iIntBufNum]>>iIntBitNum) & 1; + pucRegBuffer[iExtBufNum]|=ucTemp<<iExtBitNum; + break; + + case MB_REG_WRITE: + // Write coils + ucTemp=BitsOut[iIntBufNum]&(~(1<<iIntBitNum)); + ucTemp|=((pucRegBuffer[iExtBufNum]>>iExtBitNum) & 1)<<iIntBitNum; + BitsOut[iIntBufNum]=ucTemp; + break; + } + iIntRegIndex++; + iExtRegIndex++; + usNCoils--; + + } + } + else + { + eStatus = MB_ENOREG; + } + return eStatus; +} + +// Procedure résevée pour les bits d'entrées (Foction 2) +// pucRegBuffer => discrete buffer usAddress => discrete address +// usNDiscrete => discrete number +eMBErrorCode +eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete ) +{ + eMBErrorCode eStatus = MB_ENOERR; + int iIntRegIndex; + int iIntBufNum; + int iIntBitNum; + int iExtRegIndex=0; + int iExtBufNum; + int iExtBitNum; + UCHAR ucTemp; + if( ( usAddress >= BITS_IN_START ) + && ( usAddress + usNDiscrete <= BITS_IN_START + BITS_IN_NBITS ) ) + { + iIntRegIndex = ( int )( usAddress - BitsInStart ); + + while( usNDiscrete > 0 ) + { + iIntBufNum=iIntRegIndex/8; + iIntBitNum=iIntRegIndex%8; + iExtBufNum=iExtRegIndex/8; + iExtBitNum=iExtRegIndex%8; + + // Read discrete inputs + if(iExtBitNum==0){ + pucRegBuffer[iExtBufNum]=0; + } + ucTemp=(BitsIn[iIntBufNum]>>iIntBitNum) & 1; + pucRegBuffer[iExtBufNum]|=ucTemp<<iExtBitNum; + + iIntRegIndex++; + iExtRegIndex++; + usNDiscrete--; + } + } + else + { + eStatus = MB_ENOREG; + } + return eStatus; +} + +// Procedure résevée pour les registres de sorties (Foction 3 et 6) +// pucRegBuffer => holding register buffer usAddress holding => register address +// usNRegs holding register number eMode => read or write +eMBErrorCode +eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode ) +{ + eMBErrorCode eStatus = MB_ENOERR; + int iRegIndex; + + if( ( usAddress >= REG_OUT_START ) && + ( usAddress + usNRegs <= REG_OUT_START + REG_OUT_NREGS ) ) + { + iRegIndex = ( int )( usAddress - RegOutStart ); + switch ( eMode ) + { + //*** Pass current register values to the protocol stack. *** + case MB_REG_READ: + while( usNRegs > 0 ) + { + *pucRegBuffer++ = ( UCHAR ) ( RegOut[iRegIndex] >> 8 ); + *pucRegBuffer++ = ( UCHAR ) ( RegOut[iRegIndex] & 0xFF ); + iRegIndex++; + usNRegs--; + } + break; + + //***Update current register values with new values from the protocol stack.*** + case MB_REG_WRITE: + while( usNRegs > 0 ) + { + RegOut[iRegIndex] = *pucRegBuffer++ << 8; + RegOut[iRegIndex] |= *pucRegBuffer++; + iRegIndex++; + usNRegs--; + } + } + } + else + { + eStatus = MB_ENOREG; + } + return eStatus; +} +// Procedure résevée pour les registres de sorties (Foction 4) +// pucRegBuffer => input register buffer usAddress => input register address +// usNRegs input register number +eMBErrorCode +eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs ) +{ + eMBErrorCode eStatus = MB_ENOERR; + int iRegIndex; + + if( ( usAddress >= REG_IN_START ) + && ( usAddress + usNRegs <= REG_IN_START + REG_IN_NREGS ) ) + { + iRegIndex = ( int )( usAddress - RegInStart ); + while( usNRegs > 0 ) + { + *pucRegBuffer++ = ( unsigned char )( RegIn[iRegIndex] >> 8 ); + *pucRegBuffer++ = ( unsigned char )( RegIn[iRegIndex] & 0xFF ); + iRegIndex++; + usNRegs--; + } + } + else + { + eStatus = MB_ENOREG; + } + return eStatus; +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed.bld Fri Apr 02 10:15:16 2021 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed/builds/64910690c574 \ No newline at end of file