modtronix H / mbed_nz32sc151

mbed library for NZ32-SC151

common/SPI.cpp@1:71204b8406f2, 2015-07-24 (annotated)

Committer:
modtronix
Date:
Fri Jul 24 21:01:44 2015 +1000
Revision:
1:71204b8406f2
Current mbed v103 (594)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
modtronix 1:71204b8406f2 1 /* mbed Microcontroller Library
modtronix 1:71204b8406f2 2 * Copyright (c) 2006-2013 ARM Limited
modtronix 1:71204b8406f2 3 *
modtronix 1:71204b8406f2 4 * Licensed under the Apache License, Version 2.0 (the "License");
modtronix 1:71204b8406f2 5 * you may not use this file except in compliance with the License.
modtronix 1:71204b8406f2 6 * You may obtain a copy of the License at
modtronix 1:71204b8406f2 7 *
modtronix 1:71204b8406f2 8 * http://www.apache.org/licenses/LICENSE-2.0
modtronix 1:71204b8406f2 9 *
modtronix 1:71204b8406f2 10 * Unless required by applicable law or agreed to in writing, software
modtronix 1:71204b8406f2 11 * distributed under the License is distributed on an "AS IS" BASIS,
modtronix 1:71204b8406f2 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
modtronix 1:71204b8406f2 13 * See the License for the specific language governing permissions and
modtronix 1:71204b8406f2 14 * limitations under the License.
modtronix 1:71204b8406f2 15 */
modtronix 1:71204b8406f2 16 #include "SPI.h"
modtronix 1:71204b8406f2 17
modtronix 1:71204b8406f2 18 #if DEVICE_SPI
modtronix 1:71204b8406f2 19
modtronix 1:71204b8406f2 20 namespace mbed {
modtronix 1:71204b8406f2 21
modtronix 1:71204b8406f2 22 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
modtronix 1:71204b8406f2 23 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
modtronix 1:71204b8406f2 24 #endif
modtronix 1:71204b8406f2 25
modtronix 1:71204b8406f2 26 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
modtronix 1:71204b8406f2 27 _spi(),
modtronix 1:71204b8406f2 28 #if DEVICE_SPI_ASYNCH
modtronix 1:71204b8406f2 29 _irq(this),
modtronix 1:71204b8406f2 30 _usage(DMA_USAGE_NEVER),
modtronix 1:71204b8406f2 31 #endif
modtronix 1:71204b8406f2 32 _bits(8),
modtronix 1:71204b8406f2 33 _mode(0),
modtronix 1:71204b8406f2 34 _hz(1000000) {
modtronix 1:71204b8406f2 35 spi_init(&_spi, mosi, miso, sclk, ssel);
modtronix 1:71204b8406f2 36 spi_format(&_spi, _bits, _mode, 0);
modtronix 1:71204b8406f2 37 spi_frequency(&_spi, _hz);
modtronix 1:71204b8406f2 38 }
modtronix 1:71204b8406f2 39
modtronix 1:71204b8406f2 40 void SPI::format(int bits, int mode) {
modtronix 1:71204b8406f2 41 _bits = bits;
modtronix 1:71204b8406f2 42 _mode = mode;
modtronix 1:71204b8406f2 43 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
modtronix 1:71204b8406f2 44 aquire();
modtronix 1:71204b8406f2 45 }
modtronix 1:71204b8406f2 46
modtronix 1:71204b8406f2 47 void SPI::frequency(int hz) {
modtronix 1:71204b8406f2 48 _hz = hz;
modtronix 1:71204b8406f2 49 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
modtronix 1:71204b8406f2 50 aquire();
modtronix 1:71204b8406f2 51 }
modtronix 1:71204b8406f2 52
modtronix 1:71204b8406f2 53 SPI* SPI::_owner = NULL;
modtronix 1:71204b8406f2 54
modtronix 1:71204b8406f2 55 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
modtronix 1:71204b8406f2 56 void SPI::aquire() {
modtronix 1:71204b8406f2 57 if (_owner != this) {
modtronix 1:71204b8406f2 58 spi_format(&_spi, _bits, _mode, 0);
modtronix 1:71204b8406f2 59 spi_frequency(&_spi, _hz);
modtronix 1:71204b8406f2 60 _owner = this;
modtronix 1:71204b8406f2 61 }
modtronix 1:71204b8406f2 62 }
modtronix 1:71204b8406f2 63
modtronix 1:71204b8406f2 64 int SPI::write(int value) {
modtronix 1:71204b8406f2 65 aquire();
modtronix 1:71204b8406f2 66 return spi_master_write(&_spi, value);
modtronix 1:71204b8406f2 67 }
modtronix 1:71204b8406f2 68
modtronix 1:71204b8406f2 69 #if DEVICE_SPI_ASYNCH
modtronix 1:71204b8406f2 70
modtronix 1:71204b8406f2 71 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
modtronix 1:71204b8406f2 72 {
modtronix 1:71204b8406f2 73 if (spi_active(&_spi)) {
modtronix 1:71204b8406f2 74 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
modtronix 1:71204b8406f2 75 }
modtronix 1:71204b8406f2 76 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
modtronix 1:71204b8406f2 77 return 0;
modtronix 1:71204b8406f2 78 }
modtronix 1:71204b8406f2 79
modtronix 1:71204b8406f2 80 void SPI::abort_transfer()
modtronix 1:71204b8406f2 81 {
modtronix 1:71204b8406f2 82 spi_abort_asynch(&_spi);
modtronix 1:71204b8406f2 83 #if TRANSACTION_QUEUE_SIZE_SPI
modtronix 1:71204b8406f2 84 dequeue_transaction();
modtronix 1:71204b8406f2 85 #endif
modtronix 1:71204b8406f2 86 }
modtronix 1:71204b8406f2 87
modtronix 1:71204b8406f2 88
modtronix 1:71204b8406f2 89 void SPI::clear_transfer_buffer()
modtronix 1:71204b8406f2 90 {
modtronix 1:71204b8406f2 91 #if TRANSACTION_QUEUE_SIZE_SPI
modtronix 1:71204b8406f2 92 _transaction_buffer.reset();
modtronix 1:71204b8406f2 93 #endif
modtronix 1:71204b8406f2 94 }
modtronix 1:71204b8406f2 95
modtronix 1:71204b8406f2 96 void SPI::abort_all_transfers()
modtronix 1:71204b8406f2 97 {
modtronix 1:71204b8406f2 98 clear_transfer_buffer();
modtronix 1:71204b8406f2 99 abort_transfer();
modtronix 1:71204b8406f2 100 }
modtronix 1:71204b8406f2 101
modtronix 1:71204b8406f2 102 int SPI::set_dma_usage(DMAUsage usage)
modtronix 1:71204b8406f2 103 {
modtronix 1:71204b8406f2 104 if (spi_active(&_spi)) {
modtronix 1:71204b8406f2 105 return -1;
modtronix 1:71204b8406f2 106 }
modtronix 1:71204b8406f2 107 _usage = usage;
modtronix 1:71204b8406f2 108 return 0;
modtronix 1:71204b8406f2 109 }
modtronix 1:71204b8406f2 110
modtronix 1:71204b8406f2 111 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
modtronix 1:71204b8406f2 112 {
modtronix 1:71204b8406f2 113 #if TRANSACTION_QUEUE_SIZE_SPI
modtronix 1:71204b8406f2 114 transaction_t t;
modtronix 1:71204b8406f2 115
modtronix 1:71204b8406f2 116 t.tx_buffer = const_cast<void *>(tx_buffer);
modtronix 1:71204b8406f2 117 t.tx_length = tx_length;
modtronix 1:71204b8406f2 118 t.rx_buffer = rx_buffer;
modtronix 1:71204b8406f2 119 t.rx_length = rx_length;
modtronix 1:71204b8406f2 120 t.event = event;
modtronix 1:71204b8406f2 121 t.callback = callback;
modtronix 1:71204b8406f2 122 t.width = bit_width;
modtronix 1:71204b8406f2 123 Transaction<SPI> transaction(this, t);
modtronix 1:71204b8406f2 124 if (_transaction_buffer.full()) {
modtronix 1:71204b8406f2 125 return -1; // the buffer is full
modtronix 1:71204b8406f2 126 } else {
modtronix 1:71204b8406f2 127 _transaction_buffer.push(transaction);
modtronix 1:71204b8406f2 128 return 0;
modtronix 1:71204b8406f2 129 }
modtronix 1:71204b8406f2 130 #else
modtronix 1:71204b8406f2 131 return -1;
modtronix 1:71204b8406f2 132 #endif
modtronix 1:71204b8406f2 133 }
modtronix 1:71204b8406f2 134
modtronix 1:71204b8406f2 135 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
modtronix 1:71204b8406f2 136 {
modtronix 1:71204b8406f2 137 aquire();
modtronix 1:71204b8406f2 138 _callback = callback;
modtronix 1:71204b8406f2 139 _irq.callback(&SPI::irq_handler_asynch);
modtronix 1:71204b8406f2 140 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
modtronix 1:71204b8406f2 141 }
modtronix 1:71204b8406f2 142
modtronix 1:71204b8406f2 143 #if TRANSACTION_QUEUE_SIZE_SPI
modtronix 1:71204b8406f2 144
modtronix 1:71204b8406f2 145 void SPI::start_transaction(transaction_t *data)
modtronix 1:71204b8406f2 146 {
modtronix 1:71204b8406f2 147 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
modtronix 1:71204b8406f2 148 }
modtronix 1:71204b8406f2 149
modtronix 1:71204b8406f2 150 void SPI::dequeue_transaction()
modtronix 1:71204b8406f2 151 {
modtronix 1:71204b8406f2 152 Transaction<SPI> t;
modtronix 1:71204b8406f2 153 if (_transaction_buffer.pop(t)) {
modtronix 1:71204b8406f2 154 SPI* obj = t.get_object();
modtronix 1:71204b8406f2 155 transaction_t* data = t.get_transaction();
modtronix 1:71204b8406f2 156 obj->start_transaction(data);
modtronix 1:71204b8406f2 157 }
modtronix 1:71204b8406f2 158 }
modtronix 1:71204b8406f2 159
modtronix 1:71204b8406f2 160 #endif
modtronix 1:71204b8406f2 161
modtronix 1:71204b8406f2 162 void SPI::irq_handler_asynch(void)
modtronix 1:71204b8406f2 163 {
modtronix 1:71204b8406f2 164 int event = spi_irq_handler_asynch(&_spi);
modtronix 1:71204b8406f2 165 if (_callback && (event & SPI_EVENT_ALL)) {
modtronix 1:71204b8406f2 166 _callback.call(event & SPI_EVENT_ALL);
modtronix 1:71204b8406f2 167 }
modtronix 1:71204b8406f2 168 #if TRANSACTION_QUEUE_SIZE_SPI
modtronix 1:71204b8406f2 169 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
modtronix 1:71204b8406f2 170 // SPI peripheral is free (event happend), dequeue transaction
modtronix 1:71204b8406f2 171 dequeue_transaction();
modtronix 1:71204b8406f2 172 }
modtronix 1:71204b8406f2 173 #endif
modtronix 1:71204b8406f2 174 }
modtronix 1:71204b8406f2 175
modtronix 1:71204b8406f2 176 #endif
modtronix 1:71204b8406f2 177
modtronix 1:71204b8406f2 178 } // namespace mbed
modtronix 1:71204b8406f2 179
modtronix 1:71204b8406f2 180 #endif