modtronix H / mbed_nz32sc151

mbed library for NZ32-SC151

targets/cmsis/core_cmInstr.h@17:639ed60ce759, 2016-08-19 (annotated)

Committer:
modtronix-com
Date:
Fri Aug 19 15:46:42 2016 +1000
Revision:
17:639ed60ce759
Parent:
10:6444e6c798ce 
Added tag v1.1 for changeset 076cbe3e55be

Who changed what in which revision?

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modtronix 1:71204b8406f2 1 /**************************************************************************//**
modtronix 1:71204b8406f2 2 * @file core_cmInstr.h
modtronix 1:71204b8406f2 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
modtronix 10:6444e6c798ce 4 * @version V4.00
modtronix 10:6444e6c798ce 5 * @date 28. August 2014
modtronix 1:71204b8406f2 6 *
modtronix 1:71204b8406f2 7 * @note
modtronix 1:71204b8406f2 8 *
modtronix 1:71204b8406f2 9 ******************************************************************************/
modtronix 10:6444e6c798ce 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
modtronix 1:71204b8406f2 11
modtronix 1:71204b8406f2 12 All rights reserved.
modtronix 1:71204b8406f2 13 Redistribution and use in source and binary forms, with or without
modtronix 1:71204b8406f2 14 modification, are permitted provided that the following conditions are met:
modtronix 1:71204b8406f2 15 - Redistributions of source code must retain the above copyright
modtronix 1:71204b8406f2 16 notice, this list of conditions and the following disclaimer.
modtronix 1:71204b8406f2 17 - Redistributions in binary form must reproduce the above copyright
modtronix 1:71204b8406f2 18 notice, this list of conditions and the following disclaimer in the
modtronix 1:71204b8406f2 19 documentation and/or other materials provided with the distribution.
modtronix 1:71204b8406f2 20 - Neither the name of ARM nor the names of its contributors may be used
modtronix 1:71204b8406f2 21 to endorse or promote products derived from this software without
modtronix 1:71204b8406f2 22 specific prior written permission.
modtronix 1:71204b8406f2 23 *
modtronix 1:71204b8406f2 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
modtronix 1:71204b8406f2 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
modtronix 1:71204b8406f2 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
modtronix 1:71204b8406f2 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
modtronix 1:71204b8406f2 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
modtronix 1:71204b8406f2 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
modtronix 1:71204b8406f2 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
modtronix 1:71204b8406f2 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
modtronix 1:71204b8406f2 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
modtronix 1:71204b8406f2 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
modtronix 1:71204b8406f2 34 POSSIBILITY OF SUCH DAMAGE.
modtronix 1:71204b8406f2 35 ---------------------------------------------------------------------------*/
modtronix 1:71204b8406f2 36
modtronix 1:71204b8406f2 37
modtronix 1:71204b8406f2 38 #ifndef __CORE_CMINSTR_H
modtronix 1:71204b8406f2 39 #define __CORE_CMINSTR_H
modtronix 1:71204b8406f2 40
modtronix 1:71204b8406f2 41
modtronix 1:71204b8406f2 42 /* ########################## Core Instruction Access ######################### */
modtronix 1:71204b8406f2 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
modtronix 1:71204b8406f2 44 Access to dedicated instructions
modtronix 1:71204b8406f2 45 @{
modtronix 1:71204b8406f2 46 */
modtronix 1:71204b8406f2 47
modtronix 1:71204b8406f2 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
modtronix 1:71204b8406f2 49 /* ARM armcc specific functions */
modtronix 1:71204b8406f2 50
modtronix 1:71204b8406f2 51 #if (__ARMCC_VERSION < 400677)
modtronix 1:71204b8406f2 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
modtronix 1:71204b8406f2 53 #endif
modtronix 1:71204b8406f2 54
modtronix 1:71204b8406f2 55
modtronix 1:71204b8406f2 56 /** \brief No Operation
modtronix 1:71204b8406f2 57
modtronix 1:71204b8406f2 58 No Operation does nothing. This instruction can be used for code alignment purposes.
modtronix 1:71204b8406f2 59 */
modtronix 1:71204b8406f2 60 #define __NOP __nop
modtronix 1:71204b8406f2 61
modtronix 1:71204b8406f2 62
modtronix 1:71204b8406f2 63 /** \brief Wait For Interrupt
modtronix 1:71204b8406f2 64
modtronix 1:71204b8406f2 65 Wait For Interrupt is a hint instruction that suspends execution
modtronix 1:71204b8406f2 66 until one of a number of events occurs.
modtronix 1:71204b8406f2 67 */
modtronix 1:71204b8406f2 68 #define __WFI __wfi
modtronix 1:71204b8406f2 69
modtronix 1:71204b8406f2 70
modtronix 1:71204b8406f2 71 /** \brief Wait For Event
modtronix 1:71204b8406f2 72
modtronix 1:71204b8406f2 73 Wait For Event is a hint instruction that permits the processor to enter
modtronix 1:71204b8406f2 74 a low-power state until one of a number of events occurs.
modtronix 1:71204b8406f2 75 */
modtronix 1:71204b8406f2 76 #define __WFE __wfe
modtronix 1:71204b8406f2 77
modtronix 1:71204b8406f2 78
modtronix 1:71204b8406f2 79 /** \brief Send Event
modtronix 1:71204b8406f2 80
modtronix 1:71204b8406f2 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
modtronix 1:71204b8406f2 82 */
modtronix 1:71204b8406f2 83 #define __SEV __sev
modtronix 1:71204b8406f2 84
modtronix 1:71204b8406f2 85
modtronix 1:71204b8406f2 86 /** \brief Instruction Synchronization Barrier
modtronix 1:71204b8406f2 87
modtronix 1:71204b8406f2 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
modtronix 1:71204b8406f2 89 so that all instructions following the ISB are fetched from cache or
modtronix 1:71204b8406f2 90 memory, after the instruction has been completed.
modtronix 1:71204b8406f2 91 */
modtronix 1:71204b8406f2 92 #define __ISB() __isb(0xF)
modtronix 1:71204b8406f2 93
modtronix 1:71204b8406f2 94
modtronix 1:71204b8406f2 95 /** \brief Data Synchronization Barrier
modtronix 1:71204b8406f2 96
modtronix 1:71204b8406f2 97 This function acts as a special kind of Data Memory Barrier.
modtronix 1:71204b8406f2 98 It completes when all explicit memory accesses before this instruction complete.
modtronix 1:71204b8406f2 99 */
modtronix 1:71204b8406f2 100 #define __DSB() __dsb(0xF)
modtronix 1:71204b8406f2 101
modtronix 1:71204b8406f2 102
modtronix 1:71204b8406f2 103 /** \brief Data Memory Barrier
modtronix 1:71204b8406f2 104
modtronix 1:71204b8406f2 105 This function ensures the apparent order of the explicit memory operations before
modtronix 1:71204b8406f2 106 and after the instruction, without ensuring their completion.
modtronix 1:71204b8406f2 107 */
modtronix 1:71204b8406f2 108 #define __DMB() __dmb(0xF)
modtronix 1:71204b8406f2 109
modtronix 1:71204b8406f2 110
modtronix 1:71204b8406f2 111 /** \brief Reverse byte order (32 bit)
modtronix 1:71204b8406f2 112
modtronix 1:71204b8406f2 113 This function reverses the byte order in integer value.
modtronix 1:71204b8406f2 114
modtronix 1:71204b8406f2 115 \param [in] value Value to reverse
modtronix 1:71204b8406f2 116 \return Reversed value
modtronix 1:71204b8406f2 117 */
modtronix 1:71204b8406f2 118 #define __REV __rev
modtronix 1:71204b8406f2 119
modtronix 1:71204b8406f2 120
modtronix 1:71204b8406f2 121 /** \brief Reverse byte order (16 bit)
modtronix 1:71204b8406f2 122
modtronix 1:71204b8406f2 123 This function reverses the byte order in two unsigned short values.
modtronix 1:71204b8406f2 124
modtronix 1:71204b8406f2 125 \param [in] value Value to reverse
modtronix 1:71204b8406f2 126 \return Reversed value
modtronix 1:71204b8406f2 127 */
modtronix 1:71204b8406f2 128 #ifndef __NO_EMBEDDED_ASM
modtronix 1:71204b8406f2 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
modtronix 1:71204b8406f2 130 {
modtronix 1:71204b8406f2 131 rev16 r0, r0
modtronix 1:71204b8406f2 132 bx lr
modtronix 1:71204b8406f2 133 }
modtronix 1:71204b8406f2 134 #endif
modtronix 1:71204b8406f2 135
modtronix 1:71204b8406f2 136 /** \brief Reverse byte order in signed short value
modtronix 1:71204b8406f2 137
modtronix 1:71204b8406f2 138 This function reverses the byte order in a signed short value with sign extension to integer.
modtronix 1:71204b8406f2 139
modtronix 1:71204b8406f2 140 \param [in] value Value to reverse
modtronix 1:71204b8406f2 141 \return Reversed value
modtronix 1:71204b8406f2 142 */
modtronix 1:71204b8406f2 143 #ifndef __NO_EMBEDDED_ASM
modtronix 1:71204b8406f2 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
modtronix 1:71204b8406f2 145 {
modtronix 1:71204b8406f2 146 revsh r0, r0
modtronix 1:71204b8406f2 147 bx lr
modtronix 1:71204b8406f2 148 }
modtronix 1:71204b8406f2 149 #endif
modtronix 1:71204b8406f2 150
modtronix 1:71204b8406f2 151
modtronix 1:71204b8406f2 152 /** \brief Rotate Right in unsigned value (32 bit)
modtronix 1:71204b8406f2 153
modtronix 1:71204b8406f2 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
modtronix 1:71204b8406f2 155
modtronix 1:71204b8406f2 156 \param [in] value Value to rotate
modtronix 1:71204b8406f2 157 \param [in] value Number of Bits to rotate
modtronix 1:71204b8406f2 158 \return Rotated value
modtronix 1:71204b8406f2 159 */
modtronix 1:71204b8406f2 160 #define __ROR __ror
modtronix 1:71204b8406f2 161
modtronix 1:71204b8406f2 162
modtronix 1:71204b8406f2 163 /** \brief Breakpoint
modtronix 1:71204b8406f2 164
modtronix 1:71204b8406f2 165 This function causes the processor to enter Debug state.
modtronix 1:71204b8406f2 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
modtronix 1:71204b8406f2 167
modtronix 1:71204b8406f2 168 \param [in] value is ignored by the processor.
modtronix 1:71204b8406f2 169 If required, a debugger can use it to store additional information about the breakpoint.
modtronix 1:71204b8406f2 170 */
modtronix 1:71204b8406f2 171 #define __BKPT(value) __breakpoint(value)
modtronix 1:71204b8406f2 172
modtronix 1:71204b8406f2 173
modtronix 10:6444e6c798ce 174 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
modtronix 1:71204b8406f2 175
modtronix 1:71204b8406f2 176 /** \brief Reverse bit order of value
modtronix 1:71204b8406f2 177
modtronix 1:71204b8406f2 178 This function reverses the bit order of the given value.
modtronix 1:71204b8406f2 179
modtronix 1:71204b8406f2 180 \param [in] value Value to reverse
modtronix 1:71204b8406f2 181 \return Reversed value
modtronix 1:71204b8406f2 182 */
modtronix 1:71204b8406f2 183 #define __RBIT __rbit
modtronix 1:71204b8406f2 184
modtronix 1:71204b8406f2 185
modtronix 1:71204b8406f2 186 /** \brief LDR Exclusive (8 bit)
modtronix 1:71204b8406f2 187
modtronix 10:6444e6c798ce 188 This function executes a exclusive LDR instruction for 8 bit value.
modtronix 1:71204b8406f2 189
modtronix 1:71204b8406f2 190 \param [in] ptr Pointer to data
modtronix 1:71204b8406f2 191 \return value of type uint8_t at (*ptr)
modtronix 1:71204b8406f2 192 */
modtronix 1:71204b8406f2 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
modtronix 1:71204b8406f2 194
modtronix 1:71204b8406f2 195
modtronix 1:71204b8406f2 196 /** \brief LDR Exclusive (16 bit)
modtronix 1:71204b8406f2 197
modtronix 10:6444e6c798ce 198 This function executes a exclusive LDR instruction for 16 bit values.
modtronix 1:71204b8406f2 199
modtronix 1:71204b8406f2 200 \param [in] ptr Pointer to data
modtronix 1:71204b8406f2 201 \return value of type uint16_t at (*ptr)
modtronix 1:71204b8406f2 202 */
modtronix 1:71204b8406f2 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
modtronix 1:71204b8406f2 204
modtronix 1:71204b8406f2 205
modtronix 1:71204b8406f2 206 /** \brief LDR Exclusive (32 bit)
modtronix 1:71204b8406f2 207
modtronix 10:6444e6c798ce 208 This function executes a exclusive LDR instruction for 32 bit values.
modtronix 1:71204b8406f2 209
modtronix 1:71204b8406f2 210 \param [in] ptr Pointer to data
modtronix 1:71204b8406f2 211 \return value of type uint32_t at (*ptr)
modtronix 1:71204b8406f2 212 */
modtronix 1:71204b8406f2 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
modtronix 1:71204b8406f2 214
modtronix 1:71204b8406f2 215
modtronix 1:71204b8406f2 216 /** \brief STR Exclusive (8 bit)
modtronix 1:71204b8406f2 217
modtronix 10:6444e6c798ce 218 This function executes a exclusive STR instruction for 8 bit values.
modtronix 1:71204b8406f2 219
modtronix 1:71204b8406f2 220 \param [in] value Value to store
modtronix 1:71204b8406f2 221 \param [in] ptr Pointer to location
modtronix 1:71204b8406f2 222 \return 0 Function succeeded
modtronix 1:71204b8406f2 223 \return 1 Function failed
modtronix 1:71204b8406f2 224 */
modtronix 1:71204b8406f2 225 #define __STREXB(value, ptr) __strex(value, ptr)
modtronix 1:71204b8406f2 226
modtronix 1:71204b8406f2 227
modtronix 1:71204b8406f2 228 /** \brief STR Exclusive (16 bit)
modtronix 1:71204b8406f2 229
modtronix 10:6444e6c798ce 230 This function executes a exclusive STR instruction for 16 bit values.
modtronix 1:71204b8406f2 231
modtronix 1:71204b8406f2 232 \param [in] value Value to store
modtronix 1:71204b8406f2 233 \param [in] ptr Pointer to location
modtronix 1:71204b8406f2 234 \return 0 Function succeeded
modtronix 1:71204b8406f2 235 \return 1 Function failed
modtronix 1:71204b8406f2 236 */
modtronix 1:71204b8406f2 237 #define __STREXH(value, ptr) __strex(value, ptr)
modtronix 1:71204b8406f2 238
modtronix 1:71204b8406f2 239
modtronix 1:71204b8406f2 240 /** \brief STR Exclusive (32 bit)
modtronix 1:71204b8406f2 241
modtronix 10:6444e6c798ce 242 This function executes a exclusive STR instruction for 32 bit values.
modtronix 1:71204b8406f2 243
modtronix 1:71204b8406f2 244 \param [in] value Value to store
modtronix 1:71204b8406f2 245 \param [in] ptr Pointer to location
modtronix 1:71204b8406f2 246 \return 0 Function succeeded
modtronix 1:71204b8406f2 247 \return 1 Function failed
modtronix 1:71204b8406f2 248 */
modtronix 1:71204b8406f2 249 #define __STREXW(value, ptr) __strex(value, ptr)
modtronix 1:71204b8406f2 250
modtronix 1:71204b8406f2 251
modtronix 1:71204b8406f2 252 /** \brief Remove the exclusive lock
modtronix 1:71204b8406f2 253
modtronix 1:71204b8406f2 254 This function removes the exclusive lock which is created by LDREX.
modtronix 1:71204b8406f2 255
modtronix 1:71204b8406f2 256 */
modtronix 1:71204b8406f2 257 #define __CLREX __clrex
modtronix 1:71204b8406f2 258
modtronix 1:71204b8406f2 259
modtronix 1:71204b8406f2 260 /** \brief Signed Saturate
modtronix 1:71204b8406f2 261
modtronix 1:71204b8406f2 262 This function saturates a signed value.
modtronix 1:71204b8406f2 263
modtronix 1:71204b8406f2 264 \param [in] value Value to be saturated
modtronix 1:71204b8406f2 265 \param [in] sat Bit position to saturate to (1..32)
modtronix 1:71204b8406f2 266 \return Saturated value
modtronix 1:71204b8406f2 267 */
modtronix 1:71204b8406f2 268 #define __SSAT __ssat
modtronix 1:71204b8406f2 269
modtronix 1:71204b8406f2 270
modtronix 1:71204b8406f2 271 /** \brief Unsigned Saturate
modtronix 1:71204b8406f2 272
modtronix 1:71204b8406f2 273 This function saturates an unsigned value.
modtronix 1:71204b8406f2 274
modtronix 1:71204b8406f2 275 \param [in] value Value to be saturated
modtronix 1:71204b8406f2 276 \param [in] sat Bit position to saturate to (0..31)
modtronix 1:71204b8406f2 277 \return Saturated value
modtronix 1:71204b8406f2 278 */
modtronix 1:71204b8406f2 279 #define __USAT __usat
modtronix 1:71204b8406f2 280
modtronix 1:71204b8406f2 281
modtronix 1:71204b8406f2 282 /** \brief Count leading zeros
modtronix 1:71204b8406f2 283
modtronix 1:71204b8406f2 284 This function counts the number of leading zeros of a data value.
modtronix 1:71204b8406f2 285
modtronix 1:71204b8406f2 286 \param [in] value Value to count the leading zeros
modtronix 1:71204b8406f2 287 \return number of leading zeros in value
modtronix 1:71204b8406f2 288 */
modtronix 1:71204b8406f2 289 #define __CLZ __clz
modtronix 1:71204b8406f2 290
modtronix 10:6444e6c798ce 291
modtronix 10:6444e6c798ce 292 /** \brief Rotate Right with Extend (32 bit)
modtronix 10:6444e6c798ce 293
modtronix 10:6444e6c798ce 294 This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.
modtronix 10:6444e6c798ce 295
modtronix 10:6444e6c798ce 296 \param [in] value Value to rotate
modtronix 10:6444e6c798ce 297 \return Rotated value
modtronix 10:6444e6c798ce 298 */
modtronix 10:6444e6c798ce 299 #ifndef __NO_EMBEDDED_ASM
modtronix 10:6444e6c798ce 300 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
modtronix 10:6444e6c798ce 301 {
modtronix 10:6444e6c798ce 302 rrx r0, r0
modtronix 10:6444e6c798ce 303 bx lr
modtronix 10:6444e6c798ce 304 }
modtronix 10:6444e6c798ce 305 #endif
modtronix 10:6444e6c798ce 306
modtronix 1:71204b8406f2 307
modtronix 10:6444e6c798ce 308 /** \brief LDRT Unprivileged (8 bit)
modtronix 10:6444e6c798ce 309
modtronix 10:6444e6c798ce 310 This function executes a Unprivileged LDRT instruction for 8 bit value.
modtronix 10:6444e6c798ce 311
modtronix 10:6444e6c798ce 312 \param [in] ptr Pointer to data
modtronix 10:6444e6c798ce 313 \return value of type uint8_t at (*ptr)
modtronix 10:6444e6c798ce 314 */
modtronix 10:6444e6c798ce 315 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
modtronix 10:6444e6c798ce 316
modtronix 10:6444e6c798ce 317
modtronix 10:6444e6c798ce 318 /** \brief LDRT Unprivileged (16 bit)
modtronix 10:6444e6c798ce 319
modtronix 10:6444e6c798ce 320 This function executes a Unprivileged LDRT instruction for 16 bit values.
modtronix 10:6444e6c798ce 321
modtronix 10:6444e6c798ce 322 \param [in] ptr Pointer to data
modtronix 10:6444e6c798ce 323 \return value of type uint16_t at (*ptr)
modtronix 10:6444e6c798ce 324 */
modtronix 10:6444e6c798ce 325 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
modtronix 1:71204b8406f2 326
modtronix 1:71204b8406f2 327
modtronix 10:6444e6c798ce 328 /** \brief LDRT Unprivileged (32 bit)
modtronix 10:6444e6c798ce 329
modtronix 10:6444e6c798ce 330 This function executes a Unprivileged LDRT instruction for 32 bit values.
modtronix 10:6444e6c798ce 331
modtronix 10:6444e6c798ce 332 \param [in] ptr Pointer to data
modtronix 10:6444e6c798ce 333 \return value of type uint32_t at (*ptr)
modtronix 10:6444e6c798ce 334 */
modtronix 10:6444e6c798ce 335 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
modtronix 1:71204b8406f2 336
modtronix 10:6444e6c798ce 337
modtronix 10:6444e6c798ce 338 /** \brief STRT Unprivileged (8 bit)
modtronix 10:6444e6c798ce 339
modtronix 10:6444e6c798ce 340 This function executes a Unprivileged STRT instruction for 8 bit values.
modtronix 10:6444e6c798ce 341
modtronix 10:6444e6c798ce 342 \param [in] value Value to store
modtronix 10:6444e6c798ce 343 \param [in] ptr Pointer to location
modtronix 10:6444e6c798ce 344 */
modtronix 10:6444e6c798ce 345 #define __STRBT(value, ptr) __strt(value, ptr)
modtronix 1:71204b8406f2 346
modtronix 1:71204b8406f2 347
modtronix 10:6444e6c798ce 348 /** \brief STRT Unprivileged (16 bit)
modtronix 10:6444e6c798ce 349
modtronix 10:6444e6c798ce 350 This function executes a Unprivileged STRT instruction for 16 bit values.
modtronix 10:6444e6c798ce 351
modtronix 10:6444e6c798ce 352 \param [in] value Value to store
modtronix 10:6444e6c798ce 353 \param [in] ptr Pointer to location
modtronix 10:6444e6c798ce 354 */
modtronix 10:6444e6c798ce 355 #define __STRHT(value, ptr) __strt(value, ptr)
modtronix 10:6444e6c798ce 356
modtronix 1:71204b8406f2 357
modtronix 10:6444e6c798ce 358 /** \brief STRT Unprivileged (32 bit)
modtronix 10:6444e6c798ce 359
modtronix 10:6444e6c798ce 360 This function executes a Unprivileged STRT instruction for 32 bit values.
modtronix 10:6444e6c798ce 361
modtronix 10:6444e6c798ce 362 \param [in] value Value to store
modtronix 10:6444e6c798ce 363 \param [in] ptr Pointer to location
modtronix 10:6444e6c798ce 364 */
modtronix 10:6444e6c798ce 365 #define __STRT(value, ptr) __strt(value, ptr)
modtronix 10:6444e6c798ce 366
modtronix 10:6444e6c798ce 367 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
modtronix 1:71204b8406f2 368
modtronix 1:71204b8406f2 369
modtronix 1:71204b8406f2 370 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
modtronix 1:71204b8406f2 371 /* GNU gcc specific functions */
modtronix 1:71204b8406f2 372
modtronix 1:71204b8406f2 373 /* Define macros for porting to both thumb1 and thumb2.
modtronix 1:71204b8406f2 374 * For thumb1, use low register (r0-r7), specified by constrant "l"
modtronix 1:71204b8406f2 375 * Otherwise, use general registers, specified by constrant "r" */
modtronix 1:71204b8406f2 376 #if defined (__thumb__) && !defined (__thumb2__)
modtronix 1:71204b8406f2 377 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
modtronix 1:71204b8406f2 378 #define __CMSIS_GCC_USE_REG(r) "l" (r)
modtronix 1:71204b8406f2 379 #else
modtronix 1:71204b8406f2 380 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
modtronix 1:71204b8406f2 381 #define __CMSIS_GCC_USE_REG(r) "r" (r)
modtronix 1:71204b8406f2 382 #endif
modtronix 1:71204b8406f2 383
modtronix 1:71204b8406f2 384 /** \brief No Operation
modtronix 1:71204b8406f2 385
modtronix 1:71204b8406f2 386 No Operation does nothing. This instruction can be used for code alignment purposes.
modtronix 1:71204b8406f2 387 */
modtronix 1:71204b8406f2 388 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
modtronix 1:71204b8406f2 389 {
modtronix 1:71204b8406f2 390 __ASM volatile ("nop");
modtronix 1:71204b8406f2 391 }
modtronix 1:71204b8406f2 392
modtronix 1:71204b8406f2 393
modtronix 1:71204b8406f2 394 /** \brief Wait For Interrupt
modtronix 1:71204b8406f2 395
modtronix 1:71204b8406f2 396 Wait For Interrupt is a hint instruction that suspends execution
modtronix 1:71204b8406f2 397 until one of a number of events occurs.
modtronix 1:71204b8406f2 398 */
modtronix 1:71204b8406f2 399 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
modtronix 1:71204b8406f2 400 {
modtronix 1:71204b8406f2 401 __ASM volatile ("wfi");
modtronix 1:71204b8406f2 402 }
modtronix 1:71204b8406f2 403
modtronix 1:71204b8406f2 404
modtronix 1:71204b8406f2 405 /** \brief Wait For Event
modtronix 1:71204b8406f2 406
modtronix 1:71204b8406f2 407 Wait For Event is a hint instruction that permits the processor to enter
modtronix 1:71204b8406f2 408 a low-power state until one of a number of events occurs.
modtronix 1:71204b8406f2 409 */
modtronix 1:71204b8406f2 410 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
modtronix 1:71204b8406f2 411 {
modtronix 1:71204b8406f2 412 __ASM volatile ("wfe");
modtronix 1:71204b8406f2 413 }
modtronix 1:71204b8406f2 414
modtronix 1:71204b8406f2 415
modtronix 1:71204b8406f2 416 /** \brief Send Event
modtronix 1:71204b8406f2 417
modtronix 1:71204b8406f2 418 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
modtronix 1:71204b8406f2 419 */
modtronix 1:71204b8406f2 420 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
modtronix 1:71204b8406f2 421 {
modtronix 1:71204b8406f2 422 __ASM volatile ("sev");
modtronix 1:71204b8406f2 423 }
modtronix 1:71204b8406f2 424
modtronix 1:71204b8406f2 425
modtronix 1:71204b8406f2 426 /** \brief Instruction Synchronization Barrier
modtronix 1:71204b8406f2 427
modtronix 1:71204b8406f2 428 Instruction Synchronization Barrier flushes the pipeline in the processor,
modtronix 1:71204b8406f2 429 so that all instructions following the ISB are fetched from cache or
modtronix 1:71204b8406f2 430 memory, after the instruction has been completed.
modtronix 1:71204b8406f2 431 */
modtronix 1:71204b8406f2 432 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
modtronix 1:71204b8406f2 433 {
modtronix 1:71204b8406f2 434 __ASM volatile ("isb");
modtronix 1:71204b8406f2 435 }
modtronix 1:71204b8406f2 436
modtronix 1:71204b8406f2 437
modtronix 1:71204b8406f2 438 /** \brief Data Synchronization Barrier
modtronix 1:71204b8406f2 439
modtronix 1:71204b8406f2 440 This function acts as a special kind of Data Memory Barrier.
modtronix 1:71204b8406f2 441 It completes when all explicit memory accesses before this instruction complete.
modtronix 1:71204b8406f2 442 */
modtronix 1:71204b8406f2 443 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
modtronix 1:71204b8406f2 444 {
modtronix 1:71204b8406f2 445 __ASM volatile ("dsb");
modtronix 1:71204b8406f2 446 }
modtronix 1:71204b8406f2 447
modtronix 1:71204b8406f2 448
modtronix 1:71204b8406f2 449 /** \brief Data Memory Barrier
modtronix 1:71204b8406f2 450
modtronix 1:71204b8406f2 451 This function ensures the apparent order of the explicit memory operations before
modtronix 1:71204b8406f2 452 and after the instruction, without ensuring their completion.
modtronix 1:71204b8406f2 453 */
modtronix 1:71204b8406f2 454 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
modtronix 1:71204b8406f2 455 {
modtronix 1:71204b8406f2 456 __ASM volatile ("dmb");
modtronix 1:71204b8406f2 457 }
modtronix 1:71204b8406f2 458
modtronix 1:71204b8406f2 459
modtronix 1:71204b8406f2 460 /** \brief Reverse byte order (32 bit)
modtronix 1:71204b8406f2 461
modtronix 1:71204b8406f2 462 This function reverses the byte order in integer value.
modtronix 1:71204b8406f2 463
modtronix 1:71204b8406f2 464 \param [in] value Value to reverse
modtronix 1:71204b8406f2 465 \return Reversed value
modtronix 1:71204b8406f2 466 */
modtronix 1:71204b8406f2 467 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
modtronix 1:71204b8406f2 468 {
modtronix 1:71204b8406f2 469 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
modtronix 1:71204b8406f2 470 return __builtin_bswap32(value);
modtronix 1:71204b8406f2 471 #else
modtronix 1:71204b8406f2 472 uint32_t result;
modtronix 1:71204b8406f2 473
modtronix 1:71204b8406f2 474 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
modtronix 1:71204b8406f2 475 return(result);
modtronix 1:71204b8406f2 476 #endif
modtronix 1:71204b8406f2 477 }
modtronix 1:71204b8406f2 478
modtronix 1:71204b8406f2 479
modtronix 1:71204b8406f2 480 /** \brief Reverse byte order (16 bit)
modtronix 1:71204b8406f2 481
modtronix 1:71204b8406f2 482 This function reverses the byte order in two unsigned short values.
modtronix 1:71204b8406f2 483
modtronix 1:71204b8406f2 484 \param [in] value Value to reverse
modtronix 1:71204b8406f2 485 \return Reversed value
modtronix 1:71204b8406f2 486 */
modtronix 1:71204b8406f2 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
modtronix 1:71204b8406f2 488 {
modtronix 1:71204b8406f2 489 uint32_t result;
modtronix 1:71204b8406f2 490
modtronix 1:71204b8406f2 491 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
modtronix 1:71204b8406f2 492 return(result);
modtronix 1:71204b8406f2 493 }
modtronix 1:71204b8406f2 494
modtronix 1:71204b8406f2 495
modtronix 1:71204b8406f2 496 /** \brief Reverse byte order in signed short value
modtronix 1:71204b8406f2 497
modtronix 1:71204b8406f2 498 This function reverses the byte order in a signed short value with sign extension to integer.
modtronix 1:71204b8406f2 499
modtronix 1:71204b8406f2 500 \param [in] value Value to reverse
modtronix 1:71204b8406f2 501 \return Reversed value
modtronix 1:71204b8406f2 502 */
modtronix 1:71204b8406f2 503 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
modtronix 1:71204b8406f2 504 {
modtronix 1:71204b8406f2 505 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
modtronix 1:71204b8406f2 506 return (short)__builtin_bswap16(value);
modtronix 1:71204b8406f2 507 #else
modtronix 1:71204b8406f2 508 uint32_t result;
modtronix 1:71204b8406f2 509
modtronix 1:71204b8406f2 510 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
modtronix 1:71204b8406f2 511 return(result);
modtronix 1:71204b8406f2 512 #endif
modtronix 1:71204b8406f2 513 }
modtronix 1:71204b8406f2 514
modtronix 1:71204b8406f2 515
modtronix 1:71204b8406f2 516 /** \brief Rotate Right in unsigned value (32 bit)
modtronix 1:71204b8406f2 517
modtronix 1:71204b8406f2 518 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
modtronix 1:71204b8406f2 519
modtronix 1:71204b8406f2 520 \param [in] value Value to rotate
modtronix 1:71204b8406f2 521 \param [in] value Number of Bits to rotate
modtronix 1:71204b8406f2 522 \return Rotated value
modtronix 1:71204b8406f2 523 */
modtronix 1:71204b8406f2 524 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
modtronix 1:71204b8406f2 525 {
modtronix 1:71204b8406f2 526 return (op1 >> op2) | (op1 << (32 - op2));
modtronix 1:71204b8406f2 527 }
modtronix 1:71204b8406f2 528
modtronix 1:71204b8406f2 529
modtronix 1:71204b8406f2 530 /** \brief Breakpoint
modtronix 1:71204b8406f2 531
modtronix 1:71204b8406f2 532 This function causes the processor to enter Debug state.
modtronix 1:71204b8406f2 533 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
modtronix 1:71204b8406f2 534
modtronix 1:71204b8406f2 535 \param [in] value is ignored by the processor.
modtronix 1:71204b8406f2 536 If required, a debugger can use it to store additional information about the breakpoint.
modtronix 1:71204b8406f2 537 */
modtronix 1:71204b8406f2 538 #define __BKPT(value) __ASM volatile ("bkpt "#value)
modtronix 1:71204b8406f2 539
modtronix 1:71204b8406f2 540
modtronix 10:6444e6c798ce 541 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
modtronix 1:71204b8406f2 542
modtronix 1:71204b8406f2 543 /** \brief Reverse bit order of value
modtronix 1:71204b8406f2 544
modtronix 1:71204b8406f2 545 This function reverses the bit order of the given value.
modtronix 1:71204b8406f2 546
modtronix 1:71204b8406f2 547 \param [in] value Value to reverse
modtronix 1:71204b8406f2 548 \return Reversed value
modtronix 1:71204b8406f2 549 */
modtronix 1:71204b8406f2 550 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
modtronix 1:71204b8406f2 551 {
modtronix 1:71204b8406f2 552 uint32_t result;
modtronix 1:71204b8406f2 553
modtronix 1:71204b8406f2 554 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
modtronix 1:71204b8406f2 555 return(result);
modtronix 1:71204b8406f2 556 }
modtronix 1:71204b8406f2 557
modtronix 1:71204b8406f2 558
modtronix 1:71204b8406f2 559 /** \brief LDR Exclusive (8 bit)
modtronix 1:71204b8406f2 560
modtronix 10:6444e6c798ce 561 This function executes a exclusive LDR instruction for 8 bit value.
modtronix 1:71204b8406f2 562
modtronix 1:71204b8406f2 563 \param [in] ptr Pointer to data
modtronix 1:71204b8406f2 564 \return value of type uint8_t at (*ptr)
modtronix 1:71204b8406f2 565 */
modtronix 1:71204b8406f2 566 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
modtronix 1:71204b8406f2 567 {
modtronix 1:71204b8406f2 568 uint32_t result;
modtronix 1:71204b8406f2 569
modtronix 1:71204b8406f2 570 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
modtronix 1:71204b8406f2 571 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
modtronix 1:71204b8406f2 572 #else
modtronix 1:71204b8406f2 573 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
modtronix 1:71204b8406f2 574 accepted by assembler. So has to use following less efficient pattern.
modtronix 1:71204b8406f2 575 */
modtronix 1:71204b8406f2 576 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
modtronix 1:71204b8406f2 577 #endif
modtronix 10:6444e6c798ce 578 return ((uint8_t) result); /* Add explicit type cast here */
modtronix 1:71204b8406f2 579 }
modtronix 1:71204b8406f2 580
modtronix 1:71204b8406f2 581
modtronix 1:71204b8406f2 582 /** \brief LDR Exclusive (16 bit)
modtronix 1:71204b8406f2 583
modtronix 10:6444e6c798ce 584 This function executes a exclusive LDR instruction for 16 bit values.
modtronix 1:71204b8406f2 585
modtronix 1:71204b8406f2 586 \param [in] ptr Pointer to data
modtronix 1:71204b8406f2 587 \return value of type uint16_t at (*ptr)
modtronix 1:71204b8406f2 588 */
modtronix 1:71204b8406f2 589 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
modtronix 1:71204b8406f2 590 {
modtronix 1:71204b8406f2 591 uint32_t result;
modtronix 1:71204b8406f2 592
modtronix 1:71204b8406f2 593 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
modtronix 1:71204b8406f2 594 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
modtronix 1:71204b8406f2 595 #else
modtronix 1:71204b8406f2 596 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
modtronix 1:71204b8406f2 597 accepted by assembler. So has to use following less efficient pattern.
modtronix 1:71204b8406f2 598 */
modtronix 1:71204b8406f2 599 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
modtronix 1:71204b8406f2 600 #endif
modtronix 10:6444e6c798ce 601 return ((uint16_t) result); /* Add explicit type cast here */
modtronix 1:71204b8406f2 602 }
modtronix 1:71204b8406f2 603
modtronix 1:71204b8406f2 604
modtronix 1:71204b8406f2 605 /** \brief LDR Exclusive (32 bit)
modtronix 1:71204b8406f2 606
modtronix 10:6444e6c798ce 607 This function executes a exclusive LDR instruction for 32 bit values.
modtronix 1:71204b8406f2 608
modtronix 1:71204b8406f2 609 \param [in] ptr Pointer to data
modtronix 1:71204b8406f2 610 \return value of type uint32_t at (*ptr)
modtronix 1:71204b8406f2 611 */
modtronix 1:71204b8406f2 612 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
modtronix 1:71204b8406f2 613 {
modtronix 1:71204b8406f2 614 uint32_t result;
modtronix 1:71204b8406f2 615
modtronix 1:71204b8406f2 616 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
modtronix 1:71204b8406f2 617 return(result);
modtronix 1:71204b8406f2 618 }
modtronix 1:71204b8406f2 619
modtronix 1:71204b8406f2 620
modtronix 1:71204b8406f2 621 /** \brief STR Exclusive (8 bit)
modtronix 1:71204b8406f2 622
modtronix 10:6444e6c798ce 623 This function executes a exclusive STR instruction for 8 bit values.
modtronix 1:71204b8406f2 624
modtronix 1:71204b8406f2 625 \param [in] value Value to store
modtronix 1:71204b8406f2 626 \param [in] ptr Pointer to location
modtronix 1:71204b8406f2 627 \return 0 Function succeeded
modtronix 1:71204b8406f2 628 \return 1 Function failed
modtronix 1:71204b8406f2 629 */
modtronix 1:71204b8406f2 630 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
modtronix 1:71204b8406f2 631 {
modtronix 1:71204b8406f2 632 uint32_t result;
modtronix 1:71204b8406f2 633
modtronix 10:6444e6c798ce 634 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
modtronix 1:71204b8406f2 635 return(result);
modtronix 1:71204b8406f2 636 }
modtronix 1:71204b8406f2 637
modtronix 1:71204b8406f2 638
modtronix 1:71204b8406f2 639 /** \brief STR Exclusive (16 bit)
modtronix 1:71204b8406f2 640
modtronix 10:6444e6c798ce 641 This function executes a exclusive STR instruction for 16 bit values.
modtronix 1:71204b8406f2 642
modtronix 1:71204b8406f2 643 \param [in] value Value to store
modtronix 1:71204b8406f2 644 \param [in] ptr Pointer to location
modtronix 1:71204b8406f2 645 \return 0 Function succeeded
modtronix 1:71204b8406f2 646 \return 1 Function failed
modtronix 1:71204b8406f2 647 */
modtronix 1:71204b8406f2 648 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
modtronix 1:71204b8406f2 649 {
modtronix 1:71204b8406f2 650 uint32_t result;
modtronix 1:71204b8406f2 651
modtronix 10:6444e6c798ce 652 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
modtronix 1:71204b8406f2 653 return(result);
modtronix 1:71204b8406f2 654 }
modtronix 1:71204b8406f2 655
modtronix 1:71204b8406f2 656
modtronix 1:71204b8406f2 657 /** \brief STR Exclusive (32 bit)
modtronix 1:71204b8406f2 658
modtronix 10:6444e6c798ce 659 This function executes a exclusive STR instruction for 32 bit values.
modtronix 1:71204b8406f2 660
modtronix 1:71204b8406f2 661 \param [in] value Value to store
modtronix 1:71204b8406f2 662 \param [in] ptr Pointer to location
modtronix 1:71204b8406f2 663 \return 0 Function succeeded
modtronix 1:71204b8406f2 664 \return 1 Function failed
modtronix 1:71204b8406f2 665 */
modtronix 1:71204b8406f2 666 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
modtronix 1:71204b8406f2 667 {
modtronix 1:71204b8406f2 668 uint32_t result;
modtronix 1:71204b8406f2 669
modtronix 1:71204b8406f2 670 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
modtronix 1:71204b8406f2 671 return(result);
modtronix 1:71204b8406f2 672 }
modtronix 1:71204b8406f2 673
modtronix 1:71204b8406f2 674
modtronix 1:71204b8406f2 675 /** \brief Remove the exclusive lock
modtronix 1:71204b8406f2 676
modtronix 1:71204b8406f2 677 This function removes the exclusive lock which is created by LDREX.
modtronix 1:71204b8406f2 678
modtronix 1:71204b8406f2 679 */
modtronix 1:71204b8406f2 680 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
modtronix 1:71204b8406f2 681 {
modtronix 1:71204b8406f2 682 __ASM volatile ("clrex" ::: "memory");
modtronix 1:71204b8406f2 683 }
modtronix 1:71204b8406f2 684
modtronix 1:71204b8406f2 685
modtronix 1:71204b8406f2 686 /** \brief Signed Saturate
modtronix 1:71204b8406f2 687
modtronix 1:71204b8406f2 688 This function saturates a signed value.
modtronix 1:71204b8406f2 689
modtronix 1:71204b8406f2 690 \param [in] value Value to be saturated
modtronix 1:71204b8406f2 691 \param [in] sat Bit position to saturate to (1..32)
modtronix 1:71204b8406f2 692 \return Saturated value
modtronix 1:71204b8406f2 693 */
modtronix 1:71204b8406f2 694 #define __SSAT(ARG1,ARG2) \
modtronix 1:71204b8406f2 695 ({ \
modtronix 1:71204b8406f2 696 uint32_t __RES, __ARG1 = (ARG1); \
modtronix 1:71204b8406f2 697 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
modtronix 1:71204b8406f2 698 __RES; \
modtronix 1:71204b8406f2 699 })
modtronix 1:71204b8406f2 700
modtronix 1:71204b8406f2 701
modtronix 1:71204b8406f2 702 /** \brief Unsigned Saturate
modtronix 1:71204b8406f2 703
modtronix 1:71204b8406f2 704 This function saturates an unsigned value.
modtronix 1:71204b8406f2 705
modtronix 1:71204b8406f2 706 \param [in] value Value to be saturated
modtronix 1:71204b8406f2 707 \param [in] sat Bit position to saturate to (0..31)
modtronix 1:71204b8406f2 708 \return Saturated value
modtronix 1:71204b8406f2 709 */
modtronix 1:71204b8406f2 710 #define __USAT(ARG1,ARG2) \
modtronix 1:71204b8406f2 711 ({ \
modtronix 1:71204b8406f2 712 uint32_t __RES, __ARG1 = (ARG1); \
modtronix 1:71204b8406f2 713 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
modtronix 1:71204b8406f2 714 __RES; \
modtronix 1:71204b8406f2 715 })
modtronix 1:71204b8406f2 716
modtronix 1:71204b8406f2 717
modtronix 1:71204b8406f2 718 /** \brief Count leading zeros
modtronix 1:71204b8406f2 719
modtronix 1:71204b8406f2 720 This function counts the number of leading zeros of a data value.
modtronix 1:71204b8406f2 721
modtronix 1:71204b8406f2 722 \param [in] value Value to count the leading zeros
modtronix 1:71204b8406f2 723 \return number of leading zeros in value
modtronix 1:71204b8406f2 724 */
modtronix 1:71204b8406f2 725 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
modtronix 1:71204b8406f2 726 {
modtronix 10:6444e6c798ce 727 uint32_t result;
modtronix 1:71204b8406f2 728
modtronix 1:71204b8406f2 729 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
modtronix 10:6444e6c798ce 730 return ((uint8_t) result); /* Add explicit type cast here */
modtronix 10:6444e6c798ce 731 }
modtronix 10:6444e6c798ce 732
modtronix 10:6444e6c798ce 733
modtronix 10:6444e6c798ce 734 /** \brief Rotate Right with Extend (32 bit)
modtronix 10:6444e6c798ce 735
modtronix 10:6444e6c798ce 736 This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.
modtronix 10:6444e6c798ce 737
modtronix 10:6444e6c798ce 738 \param [in] value Value to rotate
modtronix 10:6444e6c798ce 739 \return Rotated value
modtronix 10:6444e6c798ce 740 */
modtronix 10:6444e6c798ce 741 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RRX(uint32_t value)
modtronix 10:6444e6c798ce 742 {
modtronix 10:6444e6c798ce 743 uint32_t result;
modtronix 10:6444e6c798ce 744
modtronix 10:6444e6c798ce 745 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
modtronix 1:71204b8406f2 746 return(result);
modtronix 1:71204b8406f2 747 }
modtronix 1:71204b8406f2 748
modtronix 10:6444e6c798ce 749
modtronix 10:6444e6c798ce 750 /** \brief LDRT Unprivileged (8 bit)
modtronix 10:6444e6c798ce 751
modtronix 10:6444e6c798ce 752 This function executes a Unprivileged LDRT instruction for 8 bit value.
modtronix 10:6444e6c798ce 753
modtronix 10:6444e6c798ce 754 \param [in] ptr Pointer to data
modtronix 10:6444e6c798ce 755 \return value of type uint8_t at (*ptr)
modtronix 10:6444e6c798ce 756 */
modtronix 10:6444e6c798ce 757 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
modtronix 10:6444e6c798ce 758 {
modtronix 10:6444e6c798ce 759 uint32_t result;
modtronix 10:6444e6c798ce 760
modtronix 10:6444e6c798ce 761 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
modtronix 10:6444e6c798ce 762 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
modtronix 10:6444e6c798ce 763 #else
modtronix 10:6444e6c798ce 764 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
modtronix 10:6444e6c798ce 765 accepted by assembler. So has to use following less efficient pattern.
modtronix 10:6444e6c798ce 766 */
modtronix 10:6444e6c798ce 767 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
modtronix 10:6444e6c798ce 768 #endif
modtronix 10:6444e6c798ce 769 return ((uint8_t) result); /* Add explicit type cast here */
modtronix 10:6444e6c798ce 770 }
modtronix 10:6444e6c798ce 771
modtronix 10:6444e6c798ce 772
modtronix 10:6444e6c798ce 773 /** \brief LDRT Unprivileged (16 bit)
modtronix 10:6444e6c798ce 774
modtronix 10:6444e6c798ce 775 This function executes a Unprivileged LDRT instruction for 16 bit values.
modtronix 10:6444e6c798ce 776
modtronix 10:6444e6c798ce 777 \param [in] ptr Pointer to data
modtronix 10:6444e6c798ce 778 \return value of type uint16_t at (*ptr)
modtronix 10:6444e6c798ce 779 */
modtronix 10:6444e6c798ce 780 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
modtronix 10:6444e6c798ce 781 {
modtronix 10:6444e6c798ce 782 uint32_t result;
modtronix 10:6444e6c798ce 783
modtronix 10:6444e6c798ce 784 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
modtronix 10:6444e6c798ce 785 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
modtronix 10:6444e6c798ce 786 #else
modtronix 10:6444e6c798ce 787 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
modtronix 10:6444e6c798ce 788 accepted by assembler. So has to use following less efficient pattern.
modtronix 10:6444e6c798ce 789 */
modtronix 10:6444e6c798ce 790 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
modtronix 10:6444e6c798ce 791 #endif
modtronix 10:6444e6c798ce 792 return ((uint16_t) result); /* Add explicit type cast here */
modtronix 10:6444e6c798ce 793 }
modtronix 1:71204b8406f2 794
modtronix 1:71204b8406f2 795
modtronix 10:6444e6c798ce 796 /** \brief LDRT Unprivileged (32 bit)
modtronix 10:6444e6c798ce 797
modtronix 10:6444e6c798ce 798 This function executes a Unprivileged LDRT instruction for 32 bit values.
modtronix 10:6444e6c798ce 799
modtronix 10:6444e6c798ce 800 \param [in] ptr Pointer to data
modtronix 10:6444e6c798ce 801 \return value of type uint32_t at (*ptr)
modtronix 10:6444e6c798ce 802 */
modtronix 10:6444e6c798ce 803 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
modtronix 10:6444e6c798ce 804 {
modtronix 10:6444e6c798ce 805 uint32_t result;
modtronix 10:6444e6c798ce 806
modtronix 10:6444e6c798ce 807 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
modtronix 10:6444e6c798ce 808 return(result);
modtronix 10:6444e6c798ce 809 }
modtronix 10:6444e6c798ce 810
modtronix 10:6444e6c798ce 811
modtronix 10:6444e6c798ce 812 /** \brief STRT Unprivileged (8 bit)
modtronix 10:6444e6c798ce 813
modtronix 10:6444e6c798ce 814 This function executes a Unprivileged STRT instruction for 8 bit values.
modtronix 10:6444e6c798ce 815
modtronix 10:6444e6c798ce 816 \param [in] value Value to store
modtronix 10:6444e6c798ce 817 \param [in] ptr Pointer to location
modtronix 10:6444e6c798ce 818 */
modtronix 10:6444e6c798ce 819 __attribute__( ( always_inline ) ) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
modtronix 10:6444e6c798ce 820 {
modtronix 10:6444e6c798ce 821 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
modtronix 10:6444e6c798ce 822 }
modtronix 10:6444e6c798ce 823
modtronix 10:6444e6c798ce 824
modtronix 10:6444e6c798ce 825 /** \brief STRT Unprivileged (16 bit)
modtronix 10:6444e6c798ce 826
modtronix 10:6444e6c798ce 827 This function executes a Unprivileged STRT instruction for 16 bit values.
modtronix 10:6444e6c798ce 828
modtronix 10:6444e6c798ce 829 \param [in] value Value to store
modtronix 10:6444e6c798ce 830 \param [in] ptr Pointer to location
modtronix 10:6444e6c798ce 831 */
modtronix 10:6444e6c798ce 832 __attribute__( ( always_inline ) ) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
modtronix 10:6444e6c798ce 833 {
modtronix 10:6444e6c798ce 834 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
modtronix 10:6444e6c798ce 835 }
modtronix 10:6444e6c798ce 836
modtronix 10:6444e6c798ce 837
modtronix 10:6444e6c798ce 838 /** \brief STRT Unprivileged (32 bit)
modtronix 10:6444e6c798ce 839
modtronix 10:6444e6c798ce 840 This function executes a Unprivileged STRT instruction for 32 bit values.
modtronix 10:6444e6c798ce 841
modtronix 10:6444e6c798ce 842 \param [in] value Value to store
modtronix 10:6444e6c798ce 843 \param [in] ptr Pointer to location
modtronix 10:6444e6c798ce 844 */
modtronix 10:6444e6c798ce 845 __attribute__( ( always_inline ) ) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
modtronix 10:6444e6c798ce 846 {
modtronix 10:6444e6c798ce 847 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
modtronix 10:6444e6c798ce 848 }
modtronix 10:6444e6c798ce 849
modtronix 10:6444e6c798ce 850 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
modtronix 10:6444e6c798ce 851
modtronix 10:6444e6c798ce 852
modtronix 10:6444e6c798ce 853 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
modtronix 10:6444e6c798ce 854 /* IAR iccarm specific functions */
modtronix 10:6444e6c798ce 855 #include <cmsis_iar.h>
modtronix 10:6444e6c798ce 856
modtronix 10:6444e6c798ce 857
modtronix 10:6444e6c798ce 858 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
modtronix 10:6444e6c798ce 859 /* TI CCS specific functions */
modtronix 10:6444e6c798ce 860 #include <cmsis_ccs.h>
modtronix 1:71204b8406f2 861
modtronix 1:71204b8406f2 862
modtronix 1:71204b8406f2 863 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
modtronix 1:71204b8406f2 864 /* TASKING carm specific functions */
modtronix 1:71204b8406f2 865 /*
modtronix 1:71204b8406f2 866 * The CMSIS functions have been implemented as intrinsics in the compiler.
modtronix 1:71204b8406f2 867 * Please use "carm -?i" to get an up to date list of all intrinsics,
modtronix 1:71204b8406f2 868 * Including the CMSIS ones.
modtronix 1:71204b8406f2 869 */
modtronix 1:71204b8406f2 870
modtronix 10:6444e6c798ce 871
modtronix 10:6444e6c798ce 872 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
modtronix 10:6444e6c798ce 873 /* Cosmic specific functions */
modtronix 10:6444e6c798ce 874 #include <cmsis_csm.h>
modtronix 10:6444e6c798ce 875
modtronix 1:71204b8406f2 876 #endif
modtronix 1:71204b8406f2 877
modtronix 1:71204b8406f2 878 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
modtronix 1:71204b8406f2 879
modtronix 1:71204b8406f2 880 #endif /* __CORE_CMINSTR_H */