Terminal for sending and receiving data via Semtech SX1276 chip. It uses the FRDM-KL25Z board, with a Modtronix inAir9 SX1276 board, and Modtronix SHD3I shield. The inAir9 module is mounted in iMod port 3 of the SHD3I module. The SHD3I shield is mounted on the FRDM-KL25Z board.
Dependencies: SX127x_modtronix mbed
Fork of chat_sx127x by
main.cpp@1:1cd0afbed23c, 2014-04-30 (annotated)
- Committer:
- dudmuck
- Date:
- Wed Apr 30 22:51:34 2014 +0000
- Revision:
- 1:1cd0afbed23c
- Parent:
- 0:be215de91a68
- Child:
- 2:c6b23a43a9d9
updated main.cpp to use updated SX127x
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
dudmuck | 1:1cd0afbed23c | 1 | #include "sx127x_lora.h" |
dudmuck | 1:1cd0afbed23c | 2 | #include "sx127x_fsk.h" |
dudmuck | 0:be215de91a68 | 3 | |
dudmuck | 0:be215de91a68 | 4 | /* |
dudmuck | 0:be215de91a68 | 5 | * http://mbed.org/handbook/mbed-FRDM-KL25Z |
dudmuck | 0:be215de91a68 | 6 | */ |
dudmuck | 0:be215de91a68 | 7 | |
dudmuck | 0:be215de91a68 | 8 | DigitalOut green(LED_GREEN); |
dudmuck | 0:be215de91a68 | 9 | |
dudmuck | 0:be215de91a68 | 10 | Serial pc(USBTX, USBRX); |
dudmuck | 0:be215de91a68 | 11 | |
dudmuck | 0:be215de91a68 | 12 | uint8_t tx_cnt; |
dudmuck | 0:be215de91a68 | 13 | char pcbuf[64]; |
dudmuck | 0:be215de91a68 | 14 | |
dudmuck | 0:be215de91a68 | 15 | typedef enum { |
dudmuck | 0:be215de91a68 | 16 | APP_NONE = 0, |
dudmuck | 0:be215de91a68 | 17 | APP_CHAT |
dudmuck | 0:be215de91a68 | 18 | } app_e; |
dudmuck | 0:be215de91a68 | 19 | |
dudmuck | 0:be215de91a68 | 20 | app_e app = APP_NONE; |
dudmuck | 0:be215de91a68 | 21 | |
dudmuck | 0:be215de91a68 | 22 | |
dudmuck | 0:be215de91a68 | 23 | const uint32_t frfs[] = { |
dudmuck | 0:be215de91a68 | 24 | MHZ_TO_FRF(903.0), |
dudmuck | 0:be215de91a68 | 25 | MHZ_TO_FRF(904.0), |
dudmuck | 0:be215de91a68 | 26 | MHZ_TO_FRF(905.0), |
dudmuck | 0:be215de91a68 | 27 | MHZ_TO_FRF(906.0), |
dudmuck | 0:be215de91a68 | 28 | MHZ_TO_FRF(907.0), |
dudmuck | 0:be215de91a68 | 29 | MHZ_TO_FRF(908.0), |
dudmuck | 0:be215de91a68 | 30 | MHZ_TO_FRF(909.0), |
dudmuck | 0:be215de91a68 | 31 | MHZ_TO_FRF(910.0), |
dudmuck | 0:be215de91a68 | 32 | MHZ_TO_FRF(911.0), |
dudmuck | 0:be215de91a68 | 33 | MHZ_TO_FRF(912.0), |
dudmuck | 0:be215de91a68 | 34 | MHZ_TO_FRF(913.0), |
dudmuck | 0:be215de91a68 | 35 | MHZ_TO_FRF(914.0), |
dudmuck | 0:be215de91a68 | 36 | MHZ_TO_FRF(915.0) |
dudmuck | 0:be215de91a68 | 37 | }; |
dudmuck | 0:be215de91a68 | 38 | |
dudmuck | 1:1cd0afbed23c | 39 | #define FSK_LARGE_PKT_THRESHOLD 0x3f |
dudmuck | 1:1cd0afbed23c | 40 | |
dudmuck | 0:be215de91a68 | 41 | /******************************************************************************/ |
dudmuck | 0:be215de91a68 | 42 | |
dudmuck | 1:1cd0afbed23c | 43 | // pin: 3 8 1 7 10 12 5 20 18 |
dudmuck | 0:be215de91a68 | 44 | // mosi, miso, sclk, cs, rst, dio0, dio1, fctx, fcps |
dudmuck | 0:be215de91a68 | 45 | SX127x radio(PTD2, PTD3, PTD1, PTD0, PTD5, PTA13, PTD4, PTC9, PTC8); |
dudmuck | 1:1cd0afbed23c | 46 | SX127x_fsk fsk(radio); |
dudmuck | 1:1cd0afbed23c | 47 | SX127x_lora lora(radio); |
dudmuck | 0:be215de91a68 | 48 | |
dudmuck | 0:be215de91a68 | 49 | void printLoraIrqs_(bool clear) |
dudmuck | 0:be215de91a68 | 50 | { |
dudmuck | 0:be215de91a68 | 51 | //in radio class -- RegIrqFlags_t RegIrqFlags; |
dudmuck | 0:be215de91a68 | 52 | |
dudmuck | 0:be215de91a68 | 53 | //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS); |
dudmuck | 0:be215de91a68 | 54 | printf("\r\nIrqFlags:"); |
dudmuck | 1:1cd0afbed23c | 55 | if (lora.RegIrqFlags.bits.CadDetected) |
dudmuck | 0:be215de91a68 | 56 | printf("CadDetected "); |
dudmuck | 1:1cd0afbed23c | 57 | if (lora.RegIrqFlags.bits.FhssChangeChannel) { |
dudmuck | 0:be215de91a68 | 58 | //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL); |
dudmuck | 1:1cd0afbed23c | 59 | printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel); |
dudmuck | 0:be215de91a68 | 60 | } |
dudmuck | 1:1cd0afbed23c | 61 | if (lora.RegIrqFlags.bits.CadDone) |
dudmuck | 0:be215de91a68 | 62 | printf("CadDone "); |
dudmuck | 1:1cd0afbed23c | 63 | if (lora.RegIrqFlags.bits.TxDone) |
dudmuck | 0:be215de91a68 | 64 | printf("TxDone "); |
dudmuck | 1:1cd0afbed23c | 65 | if (lora.RegIrqFlags.bits.ValidHeader) |
dudmuck | 0:be215de91a68 | 66 | printf("[42mValidHeader[0m "); |
dudmuck | 1:1cd0afbed23c | 67 | if (lora.RegIrqFlags.bits.PayloadCrcError) |
dudmuck | 0:be215de91a68 | 68 | printf("[41mPayloadCrcError[0m "); |
dudmuck | 1:1cd0afbed23c | 69 | if (lora.RegIrqFlags.bits.RxDone) |
dudmuck | 0:be215de91a68 | 70 | printf("[42mRxDone[0m "); |
dudmuck | 1:1cd0afbed23c | 71 | if (lora.RegIrqFlags.bits.RxTimeout) |
dudmuck | 0:be215de91a68 | 72 | printf("RxTimeout "); |
dudmuck | 0:be215de91a68 | 73 | |
dudmuck | 0:be215de91a68 | 74 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 75 | |
dudmuck | 0:be215de91a68 | 76 | if (clear) |
dudmuck | 1:1cd0afbed23c | 77 | radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet); |
dudmuck | 0:be215de91a68 | 78 | |
dudmuck | 0:be215de91a68 | 79 | } |
dudmuck | 0:be215de91a68 | 80 | |
dudmuck | 1:1cd0afbed23c | 81 | void lora_printCodingRate(bool from_rx) |
dudmuck | 0:be215de91a68 | 82 | { |
dudmuck | 1:1cd0afbed23c | 83 | uint8_t d = lora.getCodingRate(from_rx); |
dudmuck | 0:be215de91a68 | 84 | printf("CodingRate:"); |
dudmuck | 0:be215de91a68 | 85 | switch (d) { |
dudmuck | 0:be215de91a68 | 86 | case 1: printf("4/5 "); break; |
dudmuck | 0:be215de91a68 | 87 | case 2: printf("4/6 "); break; |
dudmuck | 0:be215de91a68 | 88 | case 3: printf("4/7 "); break; |
dudmuck | 0:be215de91a68 | 89 | case 4: printf("4/8 "); break; |
dudmuck | 0:be215de91a68 | 90 | default: |
dudmuck | 0:be215de91a68 | 91 | printf("%d ", d); |
dudmuck | 0:be215de91a68 | 92 | break; |
dudmuck | 0:be215de91a68 | 93 | } |
dudmuck | 0:be215de91a68 | 94 | } |
dudmuck | 0:be215de91a68 | 95 | |
dudmuck | 1:1cd0afbed23c | 96 | void lora_printHeaderMode() |
dudmuck | 0:be215de91a68 | 97 | { |
dudmuck | 1:1cd0afbed23c | 98 | if (lora.getHeaderMode()) |
dudmuck | 0:be215de91a68 | 99 | printf("implicit "); |
dudmuck | 0:be215de91a68 | 100 | else |
dudmuck | 0:be215de91a68 | 101 | printf("explicit "); |
dudmuck | 0:be215de91a68 | 102 | } |
dudmuck | 0:be215de91a68 | 103 | |
dudmuck | 1:1cd0afbed23c | 104 | void lora_printBw() |
dudmuck | 0:be215de91a68 | 105 | { |
dudmuck | 1:1cd0afbed23c | 106 | uint8_t bw = lora.getBw(); |
dudmuck | 0:be215de91a68 | 107 | |
dudmuck | 0:be215de91a68 | 108 | printf("Bw:"); |
dudmuck | 0:be215de91a68 | 109 | if (radio.type == SX1276) { |
dudmuck | 1:1cd0afbed23c | 110 | switch (lora.RegModemConfig.sx1276bits.Bw) { |
dudmuck | 0:be215de91a68 | 111 | case 0: printf("7.8KHz "); break; |
dudmuck | 0:be215de91a68 | 112 | case 1: printf("10.4KHz "); break; |
dudmuck | 0:be215de91a68 | 113 | case 2: printf("15.6KHz "); break; |
dudmuck | 0:be215de91a68 | 114 | case 3: printf("20.8KHz "); break; |
dudmuck | 0:be215de91a68 | 115 | case 4: printf("31.25KHz "); break; |
dudmuck | 0:be215de91a68 | 116 | case 5: printf("41.7KHz "); break; |
dudmuck | 0:be215de91a68 | 117 | case 6: printf("62.5KHz "); break; |
dudmuck | 0:be215de91a68 | 118 | case 7: printf("125KHz "); break; |
dudmuck | 0:be215de91a68 | 119 | case 8: printf("250KHz "); break; |
dudmuck | 0:be215de91a68 | 120 | case 9: printf("500KHz "); break; |
dudmuck | 1:1cd0afbed23c | 121 | default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break; |
dudmuck | 0:be215de91a68 | 122 | } |
dudmuck | 0:be215de91a68 | 123 | } else if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 124 | switch (lora.RegModemConfig.sx1272bits.Bw) { |
dudmuck | 0:be215de91a68 | 125 | case 0: printf("125KHz "); break; |
dudmuck | 0:be215de91a68 | 126 | case 1: printf("250KHz "); break; |
dudmuck | 0:be215de91a68 | 127 | case 2: printf("500KHz "); break; |
dudmuck | 0:be215de91a68 | 128 | case 3: printf("11b "); break; |
dudmuck | 0:be215de91a68 | 129 | } |
dudmuck | 0:be215de91a68 | 130 | } |
dudmuck | 0:be215de91a68 | 131 | } |
dudmuck | 0:be215de91a68 | 132 | |
dudmuck | 1:1cd0afbed23c | 133 | void lora_printAllBw() |
dudmuck | 0:be215de91a68 | 134 | { |
dudmuck | 0:be215de91a68 | 135 | int i, s; |
dudmuck | 0:be215de91a68 | 136 | |
dudmuck | 0:be215de91a68 | 137 | if (radio.type == SX1276) { |
dudmuck | 1:1cd0afbed23c | 138 | s = lora.RegModemConfig.sx1276bits.Bw; |
dudmuck | 0:be215de91a68 | 139 | for (i = 0; i < 10; i++ ) { |
dudmuck | 1:1cd0afbed23c | 140 | lora.RegModemConfig.sx1276bits.Bw = i; |
dudmuck | 0:be215de91a68 | 141 | printf("%d ", i); |
dudmuck | 1:1cd0afbed23c | 142 | lora_printBw(); |
dudmuck | 0:be215de91a68 | 143 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 144 | } |
dudmuck | 1:1cd0afbed23c | 145 | lora.RegModemConfig.sx1276bits.Bw = s; |
dudmuck | 0:be215de91a68 | 146 | } else if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 147 | s = lora.RegModemConfig.sx1272bits.Bw; |
dudmuck | 0:be215de91a68 | 148 | for (i = 0; i < 3; i++ ) { |
dudmuck | 1:1cd0afbed23c | 149 | lora.RegModemConfig.sx1272bits.Bw = i; |
dudmuck | 0:be215de91a68 | 150 | printf("%d ", i); |
dudmuck | 1:1cd0afbed23c | 151 | lora_printBw(); |
dudmuck | 0:be215de91a68 | 152 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 153 | } |
dudmuck | 1:1cd0afbed23c | 154 | lora.RegModemConfig.sx1272bits.Bw = s; |
dudmuck | 0:be215de91a68 | 155 | } |
dudmuck | 0:be215de91a68 | 156 | } |
dudmuck | 0:be215de91a68 | 157 | |
dudmuck | 1:1cd0afbed23c | 158 | void lora_printSf() |
dudmuck | 0:be215de91a68 | 159 | { |
dudmuck | 0:be215de91a68 | 160 | // spreading factor same between sx127[26] |
dudmuck | 1:1cd0afbed23c | 161 | printf("sf:%d ", lora.getSf()); |
dudmuck | 0:be215de91a68 | 162 | } |
dudmuck | 0:be215de91a68 | 163 | |
dudmuck | 1:1cd0afbed23c | 164 | void lora_printRxPayloadCrcOn() |
dudmuck | 0:be215de91a68 | 165 | { |
dudmuck | 1:1cd0afbed23c | 166 | bool on = lora.getRxPayloadCrcOn(); |
dudmuck | 0:be215de91a68 | 167 | //printf("RxPayloadCrcOn:%s ", on ? "on" : "off"); |
dudmuck | 0:be215de91a68 | 168 | if (on) |
dudmuck | 0:be215de91a68 | 169 | printf("RxPayloadCrcOn:1 = Tx CRC Enabled\r\n"); |
dudmuck | 0:be215de91a68 | 170 | else |
dudmuck | 0:be215de91a68 | 171 | printf("RxPayloadCrcOn:1 = no Tx CRC\r\n"); |
dudmuck | 0:be215de91a68 | 172 | } |
dudmuck | 0:be215de91a68 | 173 | |
dudmuck | 1:1cd0afbed23c | 174 | void lora_printTxContinuousMode() |
dudmuck | 0:be215de91a68 | 175 | { |
dudmuck | 1:1cd0afbed23c | 176 | printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276 |
dudmuck | 0:be215de91a68 | 177 | } |
dudmuck | 0:be215de91a68 | 178 | |
dudmuck | 1:1cd0afbed23c | 179 | void lora_printAgcAutoOn() |
dudmuck | 0:be215de91a68 | 180 | { |
dudmuck | 1:1cd0afbed23c | 181 | printf("AgcAutoOn:%d", lora.getAgcAutoOn()); |
dudmuck | 0:be215de91a68 | 182 | } |
dudmuck | 0:be215de91a68 | 183 | |
dudmuck | 1:1cd0afbed23c | 184 | void lora_print_dio() |
dudmuck | 0:be215de91a68 | 185 | { |
dudmuck | 1:1cd0afbed23c | 186 | radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2); |
dudmuck | 0:be215de91a68 | 187 | printf("DIO5:"); |
dudmuck | 0:be215de91a68 | 188 | switch (radio.RegDioMapping2.bits.Dio5Mapping) { |
dudmuck | 0:be215de91a68 | 189 | case 0: printf("ModeReady"); break; |
dudmuck | 0:be215de91a68 | 190 | case 1: printf("ClkOut"); break; |
dudmuck | 0:be215de91a68 | 191 | case 2: printf("ClkOut"); break; |
dudmuck | 0:be215de91a68 | 192 | } |
dudmuck | 0:be215de91a68 | 193 | printf(" DIO4:"); |
dudmuck | 0:be215de91a68 | 194 | switch (radio.RegDioMapping2.bits.Dio4Mapping) { |
dudmuck | 0:be215de91a68 | 195 | case 0: printf("CadDetected"); break; |
dudmuck | 0:be215de91a68 | 196 | case 1: printf("PllLock"); break; |
dudmuck | 0:be215de91a68 | 197 | case 2: printf("PllLock"); break; |
dudmuck | 0:be215de91a68 | 198 | } |
dudmuck | 0:be215de91a68 | 199 | radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1); |
dudmuck | 0:be215de91a68 | 200 | printf(" DIO3:"); |
dudmuck | 0:be215de91a68 | 201 | switch (radio.RegDioMapping1.bits.Dio3Mapping) { |
dudmuck | 0:be215de91a68 | 202 | case 0: printf("CadDone"); break; |
dudmuck | 0:be215de91a68 | 203 | case 1: printf("ValidHeader"); break; |
dudmuck | 0:be215de91a68 | 204 | case 2: printf("PayloadCrcError"); break; |
dudmuck | 0:be215de91a68 | 205 | } |
dudmuck | 0:be215de91a68 | 206 | printf(" DIO2:"); |
dudmuck | 0:be215de91a68 | 207 | switch (radio.RegDioMapping1.bits.Dio2Mapping) { |
dudmuck | 0:be215de91a68 | 208 | case 0: |
dudmuck | 0:be215de91a68 | 209 | case 1: |
dudmuck | 0:be215de91a68 | 210 | case 2: |
dudmuck | 0:be215de91a68 | 211 | printf("FhssChangeChannel"); |
dudmuck | 0:be215de91a68 | 212 | break; |
dudmuck | 0:be215de91a68 | 213 | } |
dudmuck | 0:be215de91a68 | 214 | printf(" DIO1:"); |
dudmuck | 0:be215de91a68 | 215 | switch (radio.RegDioMapping1.bits.Dio1Mapping) { |
dudmuck | 0:be215de91a68 | 216 | case 0: printf("RxTimeout"); break; |
dudmuck | 0:be215de91a68 | 217 | case 1: printf("FhssChangeChannel"); break; |
dudmuck | 0:be215de91a68 | 218 | case 2: printf("CadDetected"); break; |
dudmuck | 0:be215de91a68 | 219 | } |
dudmuck | 0:be215de91a68 | 220 | printf(" DIO0:"); |
dudmuck | 0:be215de91a68 | 221 | switch (radio.RegDioMapping1.bits.Dio0Mapping) { |
dudmuck | 0:be215de91a68 | 222 | case 0: printf("RxDone"); break; |
dudmuck | 0:be215de91a68 | 223 | case 1: printf("TxDone"); break; |
dudmuck | 0:be215de91a68 | 224 | case 2: printf("CadDone"); break; |
dudmuck | 0:be215de91a68 | 225 | } |
dudmuck | 0:be215de91a68 | 226 | |
dudmuck | 0:be215de91a68 | 227 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 228 | } |
dudmuck | 0:be215de91a68 | 229 | |
dudmuck | 1:1cd0afbed23c | 230 | void fsk_print_dio() |
dudmuck | 1:1cd0afbed23c | 231 | { |
dudmuck | 1:1cd0afbed23c | 232 | radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2); |
dudmuck | 1:1cd0afbed23c | 233 | |
dudmuck | 1:1cd0afbed23c | 234 | switch (radio.RegDioMapping2.bits.Dio5Mapping) { |
dudmuck | 1:1cd0afbed23c | 235 | case 0: printf("ClkOut"); break; |
dudmuck | 1:1cd0afbed23c | 236 | case 1: printf("PllLock"); break; |
dudmuck | 1:1cd0afbed23c | 237 | case 2: |
dudmuck | 1:1cd0afbed23c | 238 | if (fsk.RegPktConfig2.bits.DataModePacket) |
dudmuck | 1:1cd0afbed23c | 239 | printf("data"); |
dudmuck | 1:1cd0afbed23c | 240 | else { |
dudmuck | 1:1cd0afbed23c | 241 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 242 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 243 | else |
dudmuck | 1:1cd0afbed23c | 244 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 245 | } |
dudmuck | 1:1cd0afbed23c | 246 | break; |
dudmuck | 1:1cd0afbed23c | 247 | case 3: printf("ModeReady"); break; |
dudmuck | 1:1cd0afbed23c | 248 | } |
dudmuck | 1:1cd0afbed23c | 249 | |
dudmuck | 1:1cd0afbed23c | 250 | switch (radio.RegDioMapping2.bits.Dio4Mapping) { |
dudmuck | 1:1cd0afbed23c | 251 | case 0: printf("temp/eol"); break; |
dudmuck | 1:1cd0afbed23c | 252 | case 1: printf("PllLock"); break; |
dudmuck | 1:1cd0afbed23c | 253 | case 2: printf("TimeOut"); break; |
dudmuck | 1:1cd0afbed23c | 254 | case 3: |
dudmuck | 1:1cd0afbed23c | 255 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 256 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 257 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 258 | else |
dudmuck | 1:1cd0afbed23c | 259 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 260 | } else |
dudmuck | 1:1cd0afbed23c | 261 | printf("ModeReady"); |
dudmuck | 1:1cd0afbed23c | 262 | break; |
dudmuck | 1:1cd0afbed23c | 263 | } |
dudmuck | 1:1cd0afbed23c | 264 | |
dudmuck | 1:1cd0afbed23c | 265 | radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1); |
dudmuck | 1:1cd0afbed23c | 266 | |
dudmuck | 1:1cd0afbed23c | 267 | switch (radio.RegDioMapping1.bits.Dio3Mapping) { |
dudmuck | 1:1cd0afbed23c | 268 | case 0: printf("Timeout"); break; |
dudmuck | 1:1cd0afbed23c | 269 | case 1: |
dudmuck | 1:1cd0afbed23c | 270 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 271 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 272 | else |
dudmuck | 1:1cd0afbed23c | 273 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 274 | break; |
dudmuck | 1:1cd0afbed23c | 275 | case 2: printf("?automode_status?"); break; |
dudmuck | 1:1cd0afbed23c | 276 | case 3: printf("TempChange/LowBat"); break; |
dudmuck | 1:1cd0afbed23c | 277 | } |
dudmuck | 1:1cd0afbed23c | 278 | |
dudmuck | 1:1cd0afbed23c | 279 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 280 | switch (radio.RegDioMapping1.bits.Dio2Mapping) { |
dudmuck | 1:1cd0afbed23c | 281 | case 0: printf("FifoFull"); break; |
dudmuck | 1:1cd0afbed23c | 282 | case 1: printf("RxReady"); break; |
dudmuck | 1:1cd0afbed23c | 283 | case 2: printf("FifoFull/rx-timeout"); break; |
dudmuck | 1:1cd0afbed23c | 284 | case 3: printf("FifoFull/rx-syncadrs"); break; |
dudmuck | 1:1cd0afbed23c | 285 | } |
dudmuck | 1:1cd0afbed23c | 286 | } else { |
dudmuck | 1:1cd0afbed23c | 287 | printf("Data"); |
dudmuck | 1:1cd0afbed23c | 288 | } |
dudmuck | 1:1cd0afbed23c | 289 | |
dudmuck | 1:1cd0afbed23c | 290 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 291 | switch (radio.RegDioMapping1.bits.Dio1Mapping) { |
dudmuck | 1:1cd0afbed23c | 292 | case 0: printf("FifoThresh"); break; |
dudmuck | 1:1cd0afbed23c | 293 | case 1: printf("FifoEmpty"); break; |
dudmuck | 1:1cd0afbed23c | 294 | case 2: printf("FifoFull"); break; |
dudmuck | 1:1cd0afbed23c | 295 | case 3: printf("[41m-3-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 296 | } |
dudmuck | 1:1cd0afbed23c | 297 | } else { |
dudmuck | 1:1cd0afbed23c | 298 | switch (radio.RegDioMapping1.bits.Dio1Mapping) { |
dudmuck | 1:1cd0afbed23c | 299 | case 0: printf("Dclk"); break; |
dudmuck | 1:1cd0afbed23c | 300 | case 1: |
dudmuck | 1:1cd0afbed23c | 301 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 302 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 303 | else |
dudmuck | 1:1cd0afbed23c | 304 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 305 | break; |
dudmuck | 1:1cd0afbed23c | 306 | case 2: printf("[41m-2-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 307 | case 3: printf("[41m-3-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 308 | } |
dudmuck | 1:1cd0afbed23c | 309 | } |
dudmuck | 1:1cd0afbed23c | 310 | |
dudmuck | 1:1cd0afbed23c | 311 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 312 | switch (radio.RegDioMapping1.bits.Dio0Mapping) { |
dudmuck | 1:1cd0afbed23c | 313 | case 0: printf("PayloadReady/PacketSent"); break; |
dudmuck | 1:1cd0afbed23c | 314 | case 1: printf("CrcOk"); break; |
dudmuck | 1:1cd0afbed23c | 315 | case 2: printf("[41m-2-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 316 | case 3: printf("TempChange/LowBat"); break; |
dudmuck | 1:1cd0afbed23c | 317 | } |
dudmuck | 1:1cd0afbed23c | 318 | } else { |
dudmuck | 1:1cd0afbed23c | 319 | switch (radio.RegDioMapping1.bits.Dio0Mapping) { |
dudmuck | 1:1cd0afbed23c | 320 | case 0: printf("SyncAdrs/TxReady"); break; |
dudmuck | 1:1cd0afbed23c | 321 | case 1: |
dudmuck | 1:1cd0afbed23c | 322 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 323 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 324 | else |
dudmuck | 1:1cd0afbed23c | 325 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 326 | break; |
dudmuck | 1:1cd0afbed23c | 327 | case 2: printf("RxReady"); break; |
dudmuck | 1:1cd0afbed23c | 328 | case 3: printf("[41m-3-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 329 | } |
dudmuck | 1:1cd0afbed23c | 330 | } |
dudmuck | 1:1cd0afbed23c | 331 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 332 | } |
dudmuck | 1:1cd0afbed23c | 333 | |
dudmuck | 0:be215de91a68 | 334 | void lora_print_status() |
dudmuck | 0:be215de91a68 | 335 | { |
dudmuck | 0:be215de91a68 | 336 | uint8_t d; |
dudmuck | 0:be215de91a68 | 337 | |
dudmuck | 0:be215de91a68 | 338 | if (radio.type == SX1276) |
dudmuck | 0:be215de91a68 | 339 | printf("\r\nSX1276 "); |
dudmuck | 0:be215de91a68 | 340 | else if (radio.type == SX1272) |
dudmuck | 0:be215de91a68 | 341 | printf("\r\nSX1272 "); |
dudmuck | 0:be215de91a68 | 342 | |
dudmuck | 0:be215de91a68 | 343 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 0:be215de91a68 | 344 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 345 | printf("FSK\r\n"); |
dudmuck | 0:be215de91a68 | 346 | return; |
dudmuck | 0:be215de91a68 | 347 | } |
dudmuck | 0:be215de91a68 | 348 | |
dudmuck | 1:1cd0afbed23c | 349 | lora_print_dio(); |
dudmuck | 0:be215de91a68 | 350 | printf("LoRa "); |
dudmuck | 0:be215de91a68 | 351 | |
dudmuck | 0:be215de91a68 | 352 | // printing LoRa registers at 0x0d -> 0x3f |
dudmuck | 0:be215de91a68 | 353 | |
dudmuck | 1:1cd0afbed23c | 354 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 355 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2); |
dudmuck | 0:be215de91a68 | 356 | |
dudmuck | 1:1cd0afbed23c | 357 | lora_printCodingRate(false); // false: transmitted coding rate |
dudmuck | 1:1cd0afbed23c | 358 | lora_printHeaderMode(); |
dudmuck | 1:1cd0afbed23c | 359 | lora_printBw(); |
dudmuck | 1:1cd0afbed23c | 360 | lora_printSf(); |
dudmuck | 1:1cd0afbed23c | 361 | lora_printRxPayloadCrcOn(); |
dudmuck | 0:be215de91a68 | 362 | // RegModemStat |
dudmuck | 0:be215de91a68 | 363 | printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT)); |
dudmuck | 0:be215de91a68 | 364 | |
dudmuck | 0:be215de91a68 | 365 | // fifo ptrs: |
dudmuck | 1:1cd0afbed23c | 366 | lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH); |
dudmuck | 1:1cd0afbed23c | 367 | lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH); |
dudmuck | 0:be215de91a68 | 368 | printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x", |
dudmuck | 0:be215de91a68 | 369 | radio.read_reg(REG_LR_FIFOADDRPTR), |
dudmuck | 0:be215de91a68 | 370 | radio.read_reg(REG_LR_FIFOTXBASEADDR), |
dudmuck | 0:be215de91a68 | 371 | radio.read_reg(REG_LR_FIFORXBASEADDR), |
dudmuck | 1:1cd0afbed23c | 372 | lora.RegPayloadLength, |
dudmuck | 1:1cd0afbed23c | 373 | lora.RegRxMaxPayloadLength |
dudmuck | 0:be215de91a68 | 374 | ); |
dudmuck | 0:be215de91a68 | 375 | |
dudmuck | 1:1cd0afbed23c | 376 | lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS); |
dudmuck | 0:be215de91a68 | 377 | printLoraIrqs_(false); |
dudmuck | 0:be215de91a68 | 378 | |
dudmuck | 1:1cd0afbed23c | 379 | lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD); |
dudmuck | 1:1cd0afbed23c | 380 | if (lora.RegHopPeriod != 0) { |
dudmuck | 1:1cd0afbed23c | 381 | printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod); |
dudmuck | 0:be215de91a68 | 382 | } |
dudmuck | 0:be215de91a68 | 383 | |
dudmuck | 0:be215de91a68 | 384 | printf("SymbTimeout:0x%03x ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff); |
dudmuck | 0:be215de91a68 | 385 | |
dudmuck | 1:1cd0afbed23c | 386 | lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB); |
dudmuck | 1:1cd0afbed23c | 387 | printf("PreambleLength:0x%03x ", lora.RegPreamble); |
dudmuck | 0:be215de91a68 | 388 | |
dudmuck | 0:be215de91a68 | 389 | |
dudmuck | 0:be215de91a68 | 390 | if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) { |
dudmuck | 0:be215de91a68 | 391 | d = radio.read_reg(REG_LR_RSSIVALUE); |
dudmuck | 0:be215de91a68 | 392 | printf("rssi:%ddBm ", d-120); |
dudmuck | 0:be215de91a68 | 393 | } |
dudmuck | 0:be215de91a68 | 394 | |
dudmuck | 1:1cd0afbed23c | 395 | lora_printTxContinuousMode(); |
dudmuck | 0:be215de91a68 | 396 | |
dudmuck | 0:be215de91a68 | 397 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 398 | lora_printAgcAutoOn(); |
dudmuck | 0:be215de91a68 | 399 | if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 400 | printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize); |
dudmuck | 0:be215de91a68 | 401 | } |
dudmuck | 0:be215de91a68 | 402 | |
dudmuck | 0:be215de91a68 | 403 | printf("\r\nHeaderCount:%d PacketCount:%d, ", |
dudmuck | 0:be215de91a68 | 404 | radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB)); |
dudmuck | 0:be215de91a68 | 405 | |
dudmuck | 0:be215de91a68 | 406 | printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD)); |
dudmuck | 1:1cd0afbed23c | 407 | lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31); |
dudmuck | 1:1cd0afbed23c | 408 | printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb); |
dudmuck | 0:be215de91a68 | 409 | |
dudmuck | 0:be215de91a68 | 410 | if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 411 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 412 | printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize); |
dudmuck | 0:be215de91a68 | 413 | } else if (radio.type == SX1276) { |
dudmuck | 1:1cd0afbed23c | 414 | lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3); |
dudmuck | 1:1cd0afbed23c | 415 | printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize); |
dudmuck | 0:be215de91a68 | 416 | } |
dudmuck | 0:be215de91a68 | 417 | |
dudmuck | 0:be215de91a68 | 418 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 419 | //printf("A %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 0:be215de91a68 | 420 | } |
dudmuck | 0:be215de91a68 | 421 | |
dudmuck | 1:1cd0afbed23c | 422 | uint32_t fsk_get_bitrate(void) |
dudmuck | 1:1cd0afbed23c | 423 | { |
dudmuck | 1:1cd0afbed23c | 424 | uint16_t br = radio.read_u16(REG_FSK_BITRATEMSB); |
dudmuck | 1:1cd0afbed23c | 425 | |
dudmuck | 1:1cd0afbed23c | 426 | if (br == 0) |
dudmuck | 1:1cd0afbed23c | 427 | return 0; |
dudmuck | 1:1cd0afbed23c | 428 | else |
dudmuck | 1:1cd0afbed23c | 429 | return XTAL_FREQ / br; |
dudmuck | 1:1cd0afbed23c | 430 | } |
dudmuck | 1:1cd0afbed23c | 431 | |
dudmuck | 1:1cd0afbed23c | 432 | uint32_t fsk_get_tx_fdev_hz(void) |
dudmuck | 1:1cd0afbed23c | 433 | { |
dudmuck | 1:1cd0afbed23c | 434 | uint16_t fdev = radio.read_u16(REG_FSK_FDEVMSB); |
dudmuck | 1:1cd0afbed23c | 435 | return fdev * FREQ_STEP_HZ; |
dudmuck | 1:1cd0afbed23c | 436 | } |
dudmuck | 1:1cd0afbed23c | 437 | |
dudmuck | 1:1cd0afbed23c | 438 | uint16_t |
dudmuck | 1:1cd0afbed23c | 439 | fsk_get_PayloadLength(void) |
dudmuck | 1:1cd0afbed23c | 440 | { |
dudmuck | 1:1cd0afbed23c | 441 | fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2); |
dudmuck | 1:1cd0afbed23c | 442 | |
dudmuck | 1:1cd0afbed23c | 443 | return fsk.RegPktConfig2.bits.PayloadLength; |
dudmuck | 1:1cd0afbed23c | 444 | } |
dudmuck | 1:1cd0afbed23c | 445 | |
dudmuck | 1:1cd0afbed23c | 446 | void fsk_printAddressFiltering() |
dudmuck | 1:1cd0afbed23c | 447 | { |
dudmuck | 1:1cd0afbed23c | 448 | uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs; |
dudmuck | 1:1cd0afbed23c | 449 | |
dudmuck | 1:1cd0afbed23c | 450 | printf(" AddressFiltering:"); |
dudmuck | 1:1cd0afbed23c | 451 | switch (fsk.RegPktConfig1.bits.AddressFiltering) { |
dudmuck | 1:1cd0afbed23c | 452 | case 0: printf("off"); break; |
dudmuck | 1:1cd0afbed23c | 453 | case 1: // NodeAddress |
dudmuck | 1:1cd0afbed23c | 454 | FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS); |
dudmuck | 1:1cd0afbed23c | 455 | printf("NodeAdrs:%02x\n", FSKRegNodeAdrs); |
dudmuck | 1:1cd0afbed23c | 456 | break; |
dudmuck | 1:1cd0afbed23c | 457 | case 2: // NodeAddress & BroadcastAddress |
dudmuck | 1:1cd0afbed23c | 458 | FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS); |
dudmuck | 1:1cd0afbed23c | 459 | printf("NodeAdrs:%02x ", FSKRegNodeAdrs); |
dudmuck | 1:1cd0afbed23c | 460 | FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS); |
dudmuck | 1:1cd0afbed23c | 461 | printf("BroadcastAdrs:%02x\n", FSKRegBroadcastAdrs ); |
dudmuck | 1:1cd0afbed23c | 462 | break; |
dudmuck | 1:1cd0afbed23c | 463 | default: |
dudmuck | 1:1cd0afbed23c | 464 | printf("%d", fsk.RegPktConfig1.bits.AddressFiltering); |
dudmuck | 1:1cd0afbed23c | 465 | break; |
dudmuck | 1:1cd0afbed23c | 466 | } |
dudmuck | 1:1cd0afbed23c | 467 | } |
dudmuck | 1:1cd0afbed23c | 468 | |
dudmuck | 1:1cd0afbed23c | 469 | void fsk_print_IrqFlags2() |
dudmuck | 1:1cd0afbed23c | 470 | { |
dudmuck | 1:1cd0afbed23c | 471 | FSKRegIrqFlags2_t FSKRegIrqFlags2; |
dudmuck | 1:1cd0afbed23c | 472 | |
dudmuck | 1:1cd0afbed23c | 473 | printf("IrqFlags2: "); |
dudmuck | 1:1cd0afbed23c | 474 | FSKRegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2); |
dudmuck | 1:1cd0afbed23c | 475 | if (FSKRegIrqFlags2.bits.FifoFull) |
dudmuck | 1:1cd0afbed23c | 476 | printf("FifoFull "); |
dudmuck | 1:1cd0afbed23c | 477 | if (FSKRegIrqFlags2.bits.FifoEmpty) |
dudmuck | 1:1cd0afbed23c | 478 | printf("FifoEmpty "); |
dudmuck | 1:1cd0afbed23c | 479 | if (FSKRegIrqFlags2.bits.FifoLevel) |
dudmuck | 1:1cd0afbed23c | 480 | printf("FifoLevel "); |
dudmuck | 1:1cd0afbed23c | 481 | if (FSKRegIrqFlags2.bits.FifoOverrun) |
dudmuck | 1:1cd0afbed23c | 482 | printf("FifoOverrun "); |
dudmuck | 1:1cd0afbed23c | 483 | if (FSKRegIrqFlags2.bits.PacketSent) |
dudmuck | 1:1cd0afbed23c | 484 | printf("PacketSent "); |
dudmuck | 1:1cd0afbed23c | 485 | if (FSKRegIrqFlags2.bits.PayloadReady) |
dudmuck | 1:1cd0afbed23c | 486 | printf("PayloadReady "); |
dudmuck | 1:1cd0afbed23c | 487 | if (FSKRegIrqFlags2.bits.CrcOk) |
dudmuck | 1:1cd0afbed23c | 488 | printf("CrcOk "); |
dudmuck | 1:1cd0afbed23c | 489 | if (FSKRegIrqFlags2.bits.LowBat) |
dudmuck | 1:1cd0afbed23c | 490 | printf("LowBat "); |
dudmuck | 1:1cd0afbed23c | 491 | printf("\n"); |
dudmuck | 1:1cd0afbed23c | 492 | } |
dudmuck | 1:1cd0afbed23c | 493 | |
dudmuck | 1:1cd0afbed23c | 494 | void |
dudmuck | 1:1cd0afbed23c | 495 | fsk_print_status() |
dudmuck | 1:1cd0afbed23c | 496 | { |
dudmuck | 1:1cd0afbed23c | 497 | //uint16_t s; |
dudmuck | 1:1cd0afbed23c | 498 | FSKRegIrqFlags1_t FSKRegIrqFlags1; |
dudmuck | 1:1cd0afbed23c | 499 | |
dudmuck | 1:1cd0afbed23c | 500 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 501 | printf("LoRa\r\n"); |
dudmuck | 1:1cd0afbed23c | 502 | return; |
dudmuck | 1:1cd0afbed23c | 503 | } |
dudmuck | 1:1cd0afbed23c | 504 | |
dudmuck | 1:1cd0afbed23c | 505 | if (radio.RegOpMode.bits.ModulationType == 0) { |
dudmuck | 1:1cd0afbed23c | 506 | printf("FSK "); |
dudmuck | 1:1cd0afbed23c | 507 | switch (radio.RegOpMode.bits.ModulationShaping) { |
dudmuck | 1:1cd0afbed23c | 508 | case 1: printf("BT1.0 "); break; |
dudmuck | 1:1cd0afbed23c | 509 | case 2: printf("BT0.5 "); break; |
dudmuck | 1:1cd0afbed23c | 510 | case 3: printf("BT0.3 "); break; |
dudmuck | 1:1cd0afbed23c | 511 | } |
dudmuck | 1:1cd0afbed23c | 512 | } else if (radio.RegOpMode.bits.ModulationType == 1) { |
dudmuck | 1:1cd0afbed23c | 513 | printf("OOK "); |
dudmuck | 1:1cd0afbed23c | 514 | } |
dudmuck | 1:1cd0afbed23c | 515 | |
dudmuck | 1:1cd0afbed23c | 516 | printf("%dbps fdev:%dHz\r\n", fsk_get_bitrate(), fsk_get_tx_fdev_hz()); |
dudmuck | 1:1cd0afbed23c | 517 | |
dudmuck | 1:1cd0afbed23c | 518 | fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2); |
dudmuck | 1:1cd0afbed23c | 519 | |
dudmuck | 1:1cd0afbed23c | 520 | fsk_print_dio(); |
dudmuck | 1:1cd0afbed23c | 521 | |
dudmuck | 1:1cd0afbed23c | 522 | printf("rxbw:%dHz ", fsk.get_rx_bw_hz(REG_FSK_RXBW)); |
dudmuck | 1:1cd0afbed23c | 523 | printf("afcbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)); |
dudmuck | 1:1cd0afbed23c | 524 | |
dudmuck | 1:1cd0afbed23c | 525 | fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG); |
dudmuck | 1:1cd0afbed23c | 526 | printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1)); |
dudmuck | 1:1cd0afbed23c | 527 | |
dudmuck | 1:1cd0afbed23c | 528 | |
dudmuck | 1:1cd0afbed23c | 529 | fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG); |
dudmuck | 1:1cd0afbed23c | 530 | |
dudmuck | 1:1cd0afbed23c | 531 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 532 | uint16_t len; |
dudmuck | 1:1cd0afbed23c | 533 | /* packet mode */ |
dudmuck | 1:1cd0afbed23c | 534 | len = fsk_get_PayloadLength(); |
dudmuck | 1:1cd0afbed23c | 535 | printf("packet RegPayloadLength:0x%03x ", len); |
dudmuck | 1:1cd0afbed23c | 536 | |
dudmuck | 1:1cd0afbed23c | 537 | if (fsk.RegPktConfig2.bits.BeaconOn) |
dudmuck | 1:1cd0afbed23c | 538 | printf("BeaconOn "); |
dudmuck | 1:1cd0afbed23c | 539 | |
dudmuck | 1:1cd0afbed23c | 540 | fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH); |
dudmuck | 1:1cd0afbed23c | 541 | printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold); |
dudmuck | 1:1cd0afbed23c | 542 | if (fsk.RegFifoThreshold.bits.TxStartCondition) |
dudmuck | 1:1cd0afbed23c | 543 | printf("!FifoEmpty"); |
dudmuck | 1:1cd0afbed23c | 544 | else |
dudmuck | 1:1cd0afbed23c | 545 | printf("FifoLevel"); |
dudmuck | 1:1cd0afbed23c | 546 | |
dudmuck | 1:1cd0afbed23c | 547 | printf("\r\nAutoRestartRxMode:"); |
dudmuck | 1:1cd0afbed23c | 548 | switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) { |
dudmuck | 1:1cd0afbed23c | 549 | case 0: printf("off "); break; |
dudmuck | 1:1cd0afbed23c | 550 | case 1: printf("no-pll-wait "); break; |
dudmuck | 1:1cd0afbed23c | 551 | case 2: printf("pll-wait "); break; |
dudmuck | 1:1cd0afbed23c | 552 | case 3: printf("3 "); break; |
dudmuck | 1:1cd0afbed23c | 553 | } |
dudmuck | 1:1cd0afbed23c | 554 | //...todo |
dudmuck | 1:1cd0afbed23c | 555 | |
dudmuck | 1:1cd0afbed23c | 556 | printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB)); |
dudmuck | 1:1cd0afbed23c | 557 | |
dudmuck | 1:1cd0afbed23c | 558 | fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK); |
dudmuck | 1:1cd0afbed23c | 559 | if (fsk.RegOokPeak.bits.barker_en) |
dudmuck | 1:1cd0afbed23c | 560 | printf("barker "); |
dudmuck | 1:1cd0afbed23c | 561 | if (!fsk.RegOokPeak.bits.BitSyncOn) |
dudmuck | 1:1cd0afbed23c | 562 | printf("BitSyncOff "); |
dudmuck | 1:1cd0afbed23c | 563 | //...todo |
dudmuck | 1:1cd0afbed23c | 564 | |
dudmuck | 1:1cd0afbed23c | 565 | fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1); |
dudmuck | 1:1cd0afbed23c | 566 | if (fsk.RegPktConfig1.bits.PacketFormatVariable) |
dudmuck | 1:1cd0afbed23c | 567 | printf("variable"); |
dudmuck | 1:1cd0afbed23c | 568 | else |
dudmuck | 1:1cd0afbed23c | 569 | printf("fixed"); |
dudmuck | 1:1cd0afbed23c | 570 | printf("-length\r\ncrc"); |
dudmuck | 1:1cd0afbed23c | 571 | if (fsk.RegPktConfig1.bits.CrcOn) { |
dudmuck | 1:1cd0afbed23c | 572 | printf("On"); |
dudmuck | 1:1cd0afbed23c | 573 | } else |
dudmuck | 1:1cd0afbed23c | 574 | printf("Off"); |
dudmuck | 1:1cd0afbed23c | 575 | printf(" crctype:"); |
dudmuck | 1:1cd0afbed23c | 576 | if (fsk.RegPktConfig1.bits.CrCWhiteningType) |
dudmuck | 1:1cd0afbed23c | 577 | printf("IBM"); |
dudmuck | 1:1cd0afbed23c | 578 | else |
dudmuck | 1:1cd0afbed23c | 579 | printf("CCITT"); |
dudmuck | 1:1cd0afbed23c | 580 | printf(" dcFree:"); |
dudmuck | 1:1cd0afbed23c | 581 | switch (fsk.RegPktConfig1.bits.DcFree) { |
dudmuck | 1:1cd0afbed23c | 582 | case 0: printf("none "); break; |
dudmuck | 1:1cd0afbed23c | 583 | case 1: printf("Manchester "); break; |
dudmuck | 1:1cd0afbed23c | 584 | case 2: printf("Whitening "); break; |
dudmuck | 1:1cd0afbed23c | 585 | case 3: printf("[41mreserved[0m "); break; |
dudmuck | 1:1cd0afbed23c | 586 | } |
dudmuck | 1:1cd0afbed23c | 587 | fsk_printAddressFiltering(); |
dudmuck | 1:1cd0afbed23c | 588 | |
dudmuck | 1:1cd0afbed23c | 589 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 590 | fsk_print_IrqFlags2(); |
dudmuck | 1:1cd0afbed23c | 591 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 592 | } else { |
dudmuck | 1:1cd0afbed23c | 593 | /* continuous mode */ |
dudmuck | 1:1cd0afbed23c | 594 | printf("[7mcontinuous[27m "); |
dudmuck | 1:1cd0afbed23c | 595 | } |
dudmuck | 1:1cd0afbed23c | 596 | |
dudmuck | 1:1cd0afbed23c | 597 | fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT); |
dudmuck | 1:1cd0afbed23c | 598 | printf("PreambleDetect:"); |
dudmuck | 1:1cd0afbed23c | 599 | if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) { |
dudmuck | 1:1cd0afbed23c | 600 | printf("size=%d,tol=%d ", |
dudmuck | 1:1cd0afbed23c | 601 | fsk.RegPreambleDetect.bits.PreambleDetectorSize, |
dudmuck | 1:1cd0afbed23c | 602 | fsk.RegPreambleDetect.bits.PreambleDetectorTol); |
dudmuck | 1:1cd0afbed23c | 603 | } else |
dudmuck | 1:1cd0afbed23c | 604 | printf("Off "); |
dudmuck | 1:1cd0afbed23c | 605 | |
dudmuck | 1:1cd0afbed23c | 606 | printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize); |
dudmuck | 1:1cd0afbed23c | 607 | printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1)); |
dudmuck | 1:1cd0afbed23c | 608 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2)); |
dudmuck | 1:1cd0afbed23c | 609 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3)); |
dudmuck | 1:1cd0afbed23c | 610 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4)); |
dudmuck | 1:1cd0afbed23c | 611 | printf("\r\n"); // end sync config |
dudmuck | 1:1cd0afbed23c | 612 | |
dudmuck | 1:1cd0afbed23c | 613 | fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI); |
dudmuck | 1:1cd0afbed23c | 614 | printf("afcAutoClear:"); |
dudmuck | 1:1cd0afbed23c | 615 | if (fsk.RegAfcFei.bits.AfcAutoClearOn) |
dudmuck | 1:1cd0afbed23c | 616 | printf("On"); |
dudmuck | 1:1cd0afbed23c | 617 | else |
dudmuck | 1:1cd0afbed23c | 618 | printf("OFF"); |
dudmuck | 1:1cd0afbed23c | 619 | printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB))); |
dudmuck | 1:1cd0afbed23c | 620 | |
dudmuck | 1:1cd0afbed23c | 621 | printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB))); |
dudmuck | 1:1cd0afbed23c | 622 | |
dudmuck | 1:1cd0afbed23c | 623 | fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG); |
dudmuck | 1:1cd0afbed23c | 624 | printf("RxTrigger:"); |
dudmuck | 1:1cd0afbed23c | 625 | switch (fsk.RegRxConfig.bits.RxTrigger) { |
dudmuck | 1:1cd0afbed23c | 626 | case 0: printf("none "); break; |
dudmuck | 1:1cd0afbed23c | 627 | case 1: printf("rssi "); break; |
dudmuck | 1:1cd0afbed23c | 628 | case 6: printf("preamble "); break; |
dudmuck | 1:1cd0afbed23c | 629 | case 7: printf("both "); break; |
dudmuck | 1:1cd0afbed23c | 630 | default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break; |
dudmuck | 1:1cd0afbed23c | 631 | } |
dudmuck | 1:1cd0afbed23c | 632 | printf("AfcAuto:"); |
dudmuck | 1:1cd0afbed23c | 633 | if (fsk.RegRxConfig.bits.AfcAutoOn) |
dudmuck | 1:1cd0afbed23c | 634 | printf("On "); |
dudmuck | 1:1cd0afbed23c | 635 | else |
dudmuck | 1:1cd0afbed23c | 636 | printf("OFF "); |
dudmuck | 1:1cd0afbed23c | 637 | if (!fsk.RegRxConfig.bits.AgcAutoOn) { |
dudmuck | 1:1cd0afbed23c | 638 | radio.RegLna.octet = radio.read_reg(REG_LNA); |
dudmuck | 1:1cd0afbed23c | 639 | printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain); |
dudmuck | 1:1cd0afbed23c | 640 | } |
dudmuck | 1:1cd0afbed23c | 641 | |
dudmuck | 1:1cd0afbed23c | 642 | fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL); |
dudmuck | 1:1cd0afbed23c | 643 | if (fsk.RegTimerResol.bits.hlm_started) |
dudmuck | 1:1cd0afbed23c | 644 | printf("[35mhlm_started[0m "); |
dudmuck | 1:1cd0afbed23c | 645 | else |
dudmuck | 1:1cd0afbed23c | 646 | printf("hlm_stopped "); |
dudmuck | 1:1cd0afbed23c | 647 | |
dudmuck | 1:1cd0afbed23c | 648 | fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH); |
dudmuck | 1:1cd0afbed23c | 649 | printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH); |
dudmuck | 1:1cd0afbed23c | 650 | |
dudmuck | 1:1cd0afbed23c | 651 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 1:1cd0afbed23c | 652 | if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || |
dudmuck | 1:1cd0afbed23c | 653 | radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX) |
dudmuck | 1:1cd0afbed23c | 654 | { |
dudmuck | 1:1cd0afbed23c | 655 | printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0); |
dudmuck | 1:1cd0afbed23c | 656 | } |
dudmuck | 1:1cd0afbed23c | 657 | |
dudmuck | 1:1cd0afbed23c | 658 | fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1); |
dudmuck | 1:1cd0afbed23c | 659 | printf("\r\nsequencer: "); |
dudmuck | 1:1cd0afbed23c | 660 | printf("FromStart:"); |
dudmuck | 1:1cd0afbed23c | 661 | switch (fsk.RegSeqConfig1.bits.FromStart) { |
dudmuck | 1:1cd0afbed23c | 662 | case 0: |
dudmuck | 1:1cd0afbed23c | 663 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 664 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 665 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 666 | else |
dudmuck | 1:1cd0afbed23c | 667 | printf("sequencerOff"); |
dudmuck | 1:1cd0afbed23c | 668 | break; |
dudmuck | 1:1cd0afbed23c | 669 | case 1: printf("rx"); break; |
dudmuck | 1:1cd0afbed23c | 670 | case 2: printf("tx"); break; |
dudmuck | 1:1cd0afbed23c | 671 | case 3: printf("tx on fifolevel"); break; |
dudmuck | 1:1cd0afbed23c | 672 | } |
dudmuck | 1:1cd0afbed23c | 673 | printf(" lowPowerSelection:"); |
dudmuck | 1:1cd0afbed23c | 674 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 675 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 676 | else |
dudmuck | 1:1cd0afbed23c | 677 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 678 | if (fsk.RegSeqConfig1.bits.FromStart != 0 && |
dudmuck | 1:1cd0afbed23c | 679 | fsk.RegSeqConfig1.bits.LowPowerSelection != 0) |
dudmuck | 1:1cd0afbed23c | 680 | { // if sequencer enabled: |
dudmuck | 1:1cd0afbed23c | 681 | printf("\r\nsequencer: IdleMode:"); |
dudmuck | 1:1cd0afbed23c | 682 | if (fsk.RegSeqConfig1.bits.IdleMode) |
dudmuck | 1:1cd0afbed23c | 683 | printf("Sleep"); |
dudmuck | 1:1cd0afbed23c | 684 | else |
dudmuck | 1:1cd0afbed23c | 685 | printf("standby"); |
dudmuck | 1:1cd0afbed23c | 686 | printf("\r\nsequencer: FromIdle to:"); |
dudmuck | 1:1cd0afbed23c | 687 | if (fsk.RegSeqConfig1.bits.FromIdle) |
dudmuck | 1:1cd0afbed23c | 688 | printf("rx"); |
dudmuck | 1:1cd0afbed23c | 689 | else |
dudmuck | 1:1cd0afbed23c | 690 | printf("tx"); |
dudmuck | 1:1cd0afbed23c | 691 | printf("\r\nsequencer: FromTransmit to:"); |
dudmuck | 1:1cd0afbed23c | 692 | if (fsk.RegSeqConfig1.bits.FromTransmit) |
dudmuck | 1:1cd0afbed23c | 693 | printf("rx-on-PacketSent"); |
dudmuck | 1:1cd0afbed23c | 694 | else { |
dudmuck | 1:1cd0afbed23c | 695 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 696 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 697 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 698 | else |
dudmuck | 1:1cd0afbed23c | 699 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 700 | printf("-on-PacketSent"); |
dudmuck | 1:1cd0afbed23c | 701 | } |
dudmuck | 1:1cd0afbed23c | 702 | fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2); |
dudmuck | 1:1cd0afbed23c | 703 | printf("\r\nsequencer: FromReceive:"); |
dudmuck | 1:1cd0afbed23c | 704 | switch (fsk.RegSeqConfig2.bits.FromReceive) { |
dudmuck | 1:1cd0afbed23c | 705 | case 1: printf("PacketRecevied on PayloadReady"); break; |
dudmuck | 1:1cd0afbed23c | 706 | case 2: |
dudmuck | 1:1cd0afbed23c | 707 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 708 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 709 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 710 | else |
dudmuck | 1:1cd0afbed23c | 711 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 712 | printf("-on-payloadReady"); |
dudmuck | 1:1cd0afbed23c | 713 | break; |
dudmuck | 1:1cd0afbed23c | 714 | case 3: printf("PacketRecevied-on-CrcOk"); break; |
dudmuck | 1:1cd0afbed23c | 715 | case 4: printf("SequencerOff-on-Rssi"); break; |
dudmuck | 1:1cd0afbed23c | 716 | case 5: printf("SequencerOff-on-SyncAddress"); break; |
dudmuck | 1:1cd0afbed23c | 717 | case 6: printf("SequencerOff-PreambleDetect"); break; |
dudmuck | 1:1cd0afbed23c | 718 | default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break; |
dudmuck | 1:1cd0afbed23c | 719 | } |
dudmuck | 1:1cd0afbed23c | 720 | printf("\r\nsequencer: FromRxTimeout:"); |
dudmuck | 1:1cd0afbed23c | 721 | switch (fsk.RegSeqConfig2.bits.FromRxTimeout) { |
dudmuck | 1:1cd0afbed23c | 722 | case 0: printf("rx"); break; |
dudmuck | 1:1cd0afbed23c | 723 | case 1: printf("tx"); break; |
dudmuck | 1:1cd0afbed23c | 724 | case 2: |
dudmuck | 1:1cd0afbed23c | 725 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 726 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 727 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 728 | else |
dudmuck | 1:1cd0afbed23c | 729 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 730 | break; |
dudmuck | 1:1cd0afbed23c | 731 | case 3: printf("SequencerOff"); break; |
dudmuck | 1:1cd0afbed23c | 732 | } |
dudmuck | 1:1cd0afbed23c | 733 | printf("\r\nsequencer: FromPacketReceived to:"); |
dudmuck | 1:1cd0afbed23c | 734 | switch (fsk.RegSeqConfig2.bits.FromPacketReceived) { |
dudmuck | 1:1cd0afbed23c | 735 | case 0: printf("SequencerOff"); break; |
dudmuck | 1:1cd0afbed23c | 736 | case 1: printf("tx on FifoEmpty"); break; |
dudmuck | 1:1cd0afbed23c | 737 | case 2: |
dudmuck | 1:1cd0afbed23c | 738 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 739 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 740 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 741 | else |
dudmuck | 1:1cd0afbed23c | 742 | printf("sequencerOff"); |
dudmuck | 1:1cd0afbed23c | 743 | break; |
dudmuck | 1:1cd0afbed23c | 744 | case 3: printf("rx via fs"); break; |
dudmuck | 1:1cd0afbed23c | 745 | case 4: printf("rx"); break; |
dudmuck | 1:1cd0afbed23c | 746 | } |
dudmuck | 1:1cd0afbed23c | 747 | |
dudmuck | 1:1cd0afbed23c | 748 | fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL); |
dudmuck | 1:1cd0afbed23c | 749 | printf("\r\nsequencer: timer1:"); |
dudmuck | 1:1cd0afbed23c | 750 | switch (fsk.RegTimerResol.bits.timer1_resol) { |
dudmuck | 1:1cd0afbed23c | 751 | case 0: printf("off"); break; |
dudmuck | 1:1cd0afbed23c | 752 | case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break; |
dudmuck | 1:1cd0afbed23c | 753 | case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break; |
dudmuck | 1:1cd0afbed23c | 754 | case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break; |
dudmuck | 1:1cd0afbed23c | 755 | } |
dudmuck | 1:1cd0afbed23c | 756 | |
dudmuck | 1:1cd0afbed23c | 757 | printf(" timer2:"); |
dudmuck | 1:1cd0afbed23c | 758 | switch (fsk.RegTimerResol.bits.timer2_resol) { |
dudmuck | 1:1cd0afbed23c | 759 | case 0: printf("off"); break; |
dudmuck | 1:1cd0afbed23c | 760 | case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break; |
dudmuck | 1:1cd0afbed23c | 761 | case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break; |
dudmuck | 1:1cd0afbed23c | 762 | case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break; |
dudmuck | 1:1cd0afbed23c | 763 | } |
dudmuck | 1:1cd0afbed23c | 764 | } // ..if sequencer enabled |
dudmuck | 1:1cd0afbed23c | 765 | |
dudmuck | 1:1cd0afbed23c | 766 | printf("\r\nIrqFlags1:"); |
dudmuck | 1:1cd0afbed23c | 767 | FSKRegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1); |
dudmuck | 1:1cd0afbed23c | 768 | if (FSKRegIrqFlags1.bits.ModeReady) |
dudmuck | 1:1cd0afbed23c | 769 | printf("ModeReady "); |
dudmuck | 1:1cd0afbed23c | 770 | if (FSKRegIrqFlags1.bits.RxReady) |
dudmuck | 1:1cd0afbed23c | 771 | printf("RxReady "); |
dudmuck | 1:1cd0afbed23c | 772 | if (FSKRegIrqFlags1.bits.TxReady) |
dudmuck | 1:1cd0afbed23c | 773 | printf("TxReady "); |
dudmuck | 1:1cd0afbed23c | 774 | if (FSKRegIrqFlags1.bits.PllLock) |
dudmuck | 1:1cd0afbed23c | 775 | printf("PllLock "); |
dudmuck | 1:1cd0afbed23c | 776 | if (FSKRegIrqFlags1.bits.Rssi) |
dudmuck | 1:1cd0afbed23c | 777 | printf("Rssi "); |
dudmuck | 1:1cd0afbed23c | 778 | if (FSKRegIrqFlags1.bits.Timeout) |
dudmuck | 1:1cd0afbed23c | 779 | printf("Timeout "); |
dudmuck | 1:1cd0afbed23c | 780 | if (FSKRegIrqFlags1.bits.PreambleDetect) |
dudmuck | 1:1cd0afbed23c | 781 | printf("PreambleDetect "); |
dudmuck | 1:1cd0afbed23c | 782 | if (FSKRegIrqFlags1.bits.SyncAddressMatch) |
dudmuck | 1:1cd0afbed23c | 783 | printf("SyncAddressMatch "); |
dudmuck | 1:1cd0afbed23c | 784 | |
dudmuck | 1:1cd0afbed23c | 785 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 786 | |
dudmuck | 1:1cd0afbed23c | 787 | /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format: |
dudmuck | 1:1cd0afbed23c | 788 | s = fsk_get_PayloadLength(); |
dudmuck | 1:1cd0afbed23c | 789 | if (s > FSK_LARGE_PKT_THRESHOLD) |
dudmuck | 1:1cd0afbed23c | 790 | flags.fifo_flow_ctl = 1; |
dudmuck | 1:1cd0afbed23c | 791 | else |
dudmuck | 1:1cd0afbed23c | 792 | flags.fifo_flow_ctl = 0; |
dudmuck | 1:1cd0afbed23c | 793 | }*/ |
dudmuck | 1:1cd0afbed23c | 794 | |
dudmuck | 1:1cd0afbed23c | 795 | fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL); |
dudmuck | 1:1cd0afbed23c | 796 | if (fsk.RegImageCal.bits.TempMonitorOff) { |
dudmuck | 1:1cd0afbed23c | 797 | printf("[42mTempMonitorOff[\r0m\n"); |
dudmuck | 1:1cd0afbed23c | 798 | } else { |
dudmuck | 1:1cd0afbed23c | 799 | printf("TempThreshold:"); |
dudmuck | 1:1cd0afbed23c | 800 | switch (fsk.RegImageCal.bits.TempThreshold) { |
dudmuck | 1:1cd0afbed23c | 801 | case 0: printf("5C"); break; |
dudmuck | 1:1cd0afbed23c | 802 | case 1: printf("10C"); break; |
dudmuck | 1:1cd0afbed23c | 803 | case 2: printf("15C"); break; |
dudmuck | 1:1cd0afbed23c | 804 | case 3: printf("20C"); break; |
dudmuck | 1:1cd0afbed23c | 805 | } |
dudmuck | 1:1cd0afbed23c | 806 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 807 | } |
dudmuck | 1:1cd0afbed23c | 808 | if (fsk.RegImageCal.bits.ImageCalRunning) |
dudmuck | 1:1cd0afbed23c | 809 | printf("[33mImageCalRunning[\r0m\n"); |
dudmuck | 1:1cd0afbed23c | 810 | |
dudmuck | 1:1cd0afbed23c | 811 | /* printf("flags.fifo_flow_ctl:%d pktidx:%d rx_pktlen:%d", flags.fifo_flow_ctl, pktidx, rx_pktlen); |
dudmuck | 1:1cd0afbed23c | 812 | printf("\n"); |
dudmuck | 1:1cd0afbed23c | 813 | |
dudmuck | 1:1cd0afbed23c | 814 | //printf("DIO0_PIN:%d\n", digitalRead(DIO0_PIN)); |
dudmuck | 1:1cd0afbed23c | 815 | printf("pkt_buf_len=%d remaining=%d\n", pk*/ |
dudmuck | 1:1cd0afbed23c | 816 | } |
dudmuck | 1:1cd0afbed23c | 817 | |
dudmuck | 0:be215de91a68 | 818 | void printOpMode() |
dudmuck | 0:be215de91a68 | 819 | { |
dudmuck | 0:be215de91a68 | 820 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 0:be215de91a68 | 821 | switch (radio.RegOpMode.bits.Mode) { |
dudmuck | 0:be215de91a68 | 822 | case RF_OPMODE_SLEEP: printf("[7msleep[0m"); break; |
dudmuck | 0:be215de91a68 | 823 | case RF_OPMODE_STANDBY: printf("[7mstby[0m"); break; |
dudmuck | 0:be215de91a68 | 824 | case RF_OPMODE_SYNTHESIZER_TX: printf("[33mfstx[0m"); break; |
dudmuck | 0:be215de91a68 | 825 | case RF_OPMODE_TRANSMITTER: printf("[31mtx[0m"); break; |
dudmuck | 0:be215de91a68 | 826 | case RF_OPMODE_SYNTHESIZER_RX: printf("[33mfsrx[0m"); break; |
dudmuck | 0:be215de91a68 | 827 | case RF_OPMODE_RECEIVER: printf("[32mrx[0m"); break; |
dudmuck | 0:be215de91a68 | 828 | case 6: |
dudmuck | 0:be215de91a68 | 829 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 0:be215de91a68 | 830 | printf("[42mrxs[0m"); |
dudmuck | 0:be215de91a68 | 831 | else |
dudmuck | 0:be215de91a68 | 832 | printf("-6-"); |
dudmuck | 0:be215de91a68 | 833 | break; // todo: different lora/fsk |
dudmuck | 0:be215de91a68 | 834 | case 7: |
dudmuck | 0:be215de91a68 | 835 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 0:be215de91a68 | 836 | printf("[45mcad[0m"); |
dudmuck | 0:be215de91a68 | 837 | else |
dudmuck | 0:be215de91a68 | 838 | printf("-7-"); |
dudmuck | 0:be215de91a68 | 839 | break; // todo: different lora/fsk |
dudmuck | 0:be215de91a68 | 840 | } |
dudmuck | 0:be215de91a68 | 841 | } |
dudmuck | 0:be215de91a68 | 842 | |
dudmuck | 0:be215de91a68 | 843 | void |
dudmuck | 0:be215de91a68 | 844 | printPa() |
dudmuck | 0:be215de91a68 | 845 | { |
dudmuck | 0:be215de91a68 | 846 | radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG); |
dudmuck | 0:be215de91a68 | 847 | if (radio.RegPaConfig.bits.PaSelect) { |
dudmuck | 0:be215de91a68 | 848 | float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower); |
dudmuck | 0:be215de91a68 | 849 | printf(" PABOOST OutputPower=%.1fdBm", output_dBm); |
dudmuck | 0:be215de91a68 | 850 | } else { |
dudmuck | 0:be215de91a68 | 851 | float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8; |
dudmuck | 0:be215de91a68 | 852 | float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower); |
dudmuck | 0:be215de91a68 | 853 | printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm); |
dudmuck | 0:be215de91a68 | 854 | } |
dudmuck | 0:be215de91a68 | 855 | } |
dudmuck | 0:be215de91a68 | 856 | |
dudmuck | 0:be215de91a68 | 857 | void /* things always present, whether lora or fsk */ |
dudmuck | 0:be215de91a68 | 858 | common_print_status() |
dudmuck | 0:be215de91a68 | 859 | { |
dudmuck | 0:be215de91a68 | 860 | printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz()); |
dudmuck | 0:be215de91a68 | 861 | printOpMode(); |
dudmuck | 0:be215de91a68 | 862 | |
dudmuck | 0:be215de91a68 | 863 | printPa(); |
dudmuck | 0:be215de91a68 | 864 | |
dudmuck | 0:be215de91a68 | 865 | radio.RegOcp.octet = radio.read_reg(REG_OCP); |
dudmuck | 0:be215de91a68 | 866 | if (radio.RegOcp.bits.OcpOn) { |
dudmuck | 0:be215de91a68 | 867 | int imax = 0; |
dudmuck | 0:be215de91a68 | 868 | if (radio.RegOcp.bits.OcpTrim < 16) |
dudmuck | 0:be215de91a68 | 869 | imax = 45 + (5 * radio.RegOcp.bits.OcpTrim); |
dudmuck | 0:be215de91a68 | 870 | else if (radio.RegOcp.bits.OcpTrim < 28) |
dudmuck | 0:be215de91a68 | 871 | imax = -30 + (10 * radio.RegOcp.bits.OcpTrim); |
dudmuck | 0:be215de91a68 | 872 | else |
dudmuck | 0:be215de91a68 | 873 | imax = 240; |
dudmuck | 0:be215de91a68 | 874 | printf(" OcpOn %dmA ", imax); |
dudmuck | 0:be215de91a68 | 875 | } else |
dudmuck | 0:be215de91a68 | 876 | printf(" OcpOFF "); |
dudmuck | 0:be215de91a68 | 877 | |
dudmuck | 0:be215de91a68 | 878 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 879 | |
dudmuck | 0:be215de91a68 | 880 | } |
dudmuck | 0:be215de91a68 | 881 | |
dudmuck | 0:be215de91a68 | 882 | void print_rx_buf(int len) |
dudmuck | 0:be215de91a68 | 883 | { |
dudmuck | 0:be215de91a68 | 884 | int i; |
dudmuck | 0:be215de91a68 | 885 | |
dudmuck | 0:be215de91a68 | 886 | printf("000:"); |
dudmuck | 0:be215de91a68 | 887 | for (i = 0; i < len; i++) { |
dudmuck | 0:be215de91a68 | 888 | //printf("(%d)%02x ", i % 16, rx_buf[i]); |
dudmuck | 0:be215de91a68 | 889 | printf("%02x ", radio.rx_buf[i]); |
dudmuck | 0:be215de91a68 | 890 | if (i % 16 == 15 && i != len-1) |
dudmuck | 0:be215de91a68 | 891 | printf("\r\n%03d:", i+1); |
dudmuck | 0:be215de91a68 | 892 | |
dudmuck | 0:be215de91a68 | 893 | } |
dudmuck | 0:be215de91a68 | 894 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 895 | } |
dudmuck | 0:be215de91a68 | 896 | |
dudmuck | 0:be215de91a68 | 897 | void |
dudmuck | 0:be215de91a68 | 898 | service_radio() |
dudmuck | 0:be215de91a68 | 899 | { |
dudmuck | 1:1cd0afbed23c | 900 | service_action_e act; |
dudmuck | 1:1cd0afbed23c | 901 | |
dudmuck | 1:1cd0afbed23c | 902 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 903 | act = lora.service(); |
dudmuck | 0:be215de91a68 | 904 | |
dudmuck | 1:1cd0afbed23c | 905 | switch (act) { |
dudmuck | 1:1cd0afbed23c | 906 | case SERVICE_READ_FIFO: |
dudmuck | 1:1cd0afbed23c | 907 | float dbm; |
dudmuck | 1:1cd0afbed23c | 908 | if (app == APP_NONE) { |
dudmuck | 1:1cd0afbed23c | 909 | printLoraIrqs_(false); |
dudmuck | 1:1cd0afbed23c | 910 | if (lora.RegHopPeriod > 0) { |
dudmuck | 1:1cd0afbed23c | 911 | lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL); |
dudmuck | 1:1cd0afbed23c | 912 | printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel); |
dudmuck | 1:1cd0afbed23c | 913 | } |
dudmuck | 1:1cd0afbed23c | 914 | lora_printCodingRate(true); // true: of received packet |
dudmuck | 1:1cd0afbed23c | 915 | dbm = lora.get_pkt_rssi(); |
dudmuck | 1:1cd0afbed23c | 916 | printf(" crc%s %.1fdB %.1fdBm\r\n", |
dudmuck | 1:1cd0afbed23c | 917 | lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF", |
dudmuck | 1:1cd0afbed23c | 918 | lora.RegPktSnrValue / 4.0, |
dudmuck | 1:1cd0afbed23c | 919 | dbm |
dudmuck | 1:1cd0afbed23c | 920 | ); |
dudmuck | 1:1cd0afbed23c | 921 | print_rx_buf(lora.RegRxNbBytes); |
dudmuck | 1:1cd0afbed23c | 922 | } else if (app == APP_CHAT) { |
dudmuck | 1:1cd0afbed23c | 923 | if (lora.RegHopChannel.bits.RxPayloadCrcOn) { |
dudmuck | 1:1cd0afbed23c | 924 | if (lora.RegIrqFlags.bits.PayloadCrcError) |
dudmuck | 1:1cd0afbed23c | 925 | printf("crcError\r\n"); |
dudmuck | 1:1cd0afbed23c | 926 | else { |
dudmuck | 1:1cd0afbed23c | 927 | int n = lora.RegRxNbBytes; |
dudmuck | 1:1cd0afbed23c | 928 | radio.rx_buf[n++] = '\r'; |
dudmuck | 1:1cd0afbed23c | 929 | radio.rx_buf[n++] = '\n'; |
dudmuck | 1:1cd0afbed23c | 930 | radio.rx_buf[n] = 0; // null terminate |
dudmuck | 1:1cd0afbed23c | 931 | printf((char *)radio.rx_buf); |
dudmuck | 1:1cd0afbed23c | 932 | } |
dudmuck | 1:1cd0afbed23c | 933 | } else |
dudmuck | 1:1cd0afbed23c | 934 | printf("crcOff\r\n"); |
dudmuck | 1:1cd0afbed23c | 935 | |
dudmuck | 1:1cd0afbed23c | 936 | // clear Irq flags |
dudmuck | 1:1cd0afbed23c | 937 | radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet); |
dudmuck | 1:1cd0afbed23c | 938 | // should still be in receive mode |
dudmuck | 0:be215de91a68 | 939 | } |
dudmuck | 1:1cd0afbed23c | 940 | break; |
dudmuck | 1:1cd0afbed23c | 941 | case SERVICE_TX_DONE: |
dudmuck | 1:1cd0afbed23c | 942 | if (app == APP_CHAT) { |
dudmuck | 1:1cd0afbed23c | 943 | lora.start_rx(); |
dudmuck | 1:1cd0afbed23c | 944 | } |
dudmuck | 1:1cd0afbed23c | 945 | break; |
dudmuck | 1:1cd0afbed23c | 946 | case SERVICE_ERROR: |
dudmuck | 1:1cd0afbed23c | 947 | printf("error\r\n"); |
dudmuck | 1:1cd0afbed23c | 948 | break; |
dudmuck | 1:1cd0afbed23c | 949 | } // ...switch (act) |
dudmuck | 1:1cd0afbed23c | 950 | } else { |
dudmuck | 1:1cd0afbed23c | 951 | /* FSK: */ |
dudmuck | 1:1cd0afbed23c | 952 | act = fsk.service(); |
dudmuck | 1:1cd0afbed23c | 953 | |
dudmuck | 1:1cd0afbed23c | 954 | switch (act) { |
dudmuck | 1:1cd0afbed23c | 955 | case SERVICE_READ_FIFO: |
dudmuck | 1:1cd0afbed23c | 956 | break; |
dudmuck | 1:1cd0afbed23c | 957 | } // ...switch (act) |
dudmuck | 1:1cd0afbed23c | 958 | } |
dudmuck | 0:be215de91a68 | 959 | } |
dudmuck | 0:be215de91a68 | 960 | |
dudmuck | 0:be215de91a68 | 961 | void user_init(void) |
dudmuck | 0:be215de91a68 | 962 | { |
dudmuck | 0:be215de91a68 | 963 | // set desired spreadingfactor, bandwidth, MHz, etc. |
dudmuck | 0:be215de91a68 | 964 | } |
dudmuck | 0:be215de91a68 | 965 | |
dudmuck | 0:be215de91a68 | 966 | int get_kbd_str(char* buf, int size) |
dudmuck | 0:be215de91a68 | 967 | { |
dudmuck | 0:be215de91a68 | 968 | char c; |
dudmuck | 0:be215de91a68 | 969 | int i; |
dudmuck | 0:be215de91a68 | 970 | static int prev_len; |
dudmuck | 0:be215de91a68 | 971 | |
dudmuck | 0:be215de91a68 | 972 | for (i = 0;;) { |
dudmuck | 0:be215de91a68 | 973 | if (pc.readable()) { |
dudmuck | 0:be215de91a68 | 974 | c = pc.getc(); |
dudmuck | 0:be215de91a68 | 975 | if (c == 8 && i > 0) { |
dudmuck | 0:be215de91a68 | 976 | pc.putc(8); |
dudmuck | 0:be215de91a68 | 977 | pc.putc(' '); |
dudmuck | 0:be215de91a68 | 978 | pc.putc(8); |
dudmuck | 0:be215de91a68 | 979 | i--; |
dudmuck | 0:be215de91a68 | 980 | } else if (c == '\r') { |
dudmuck | 0:be215de91a68 | 981 | if (i == 0) { |
dudmuck | 0:be215de91a68 | 982 | return prev_len; // repeat previous |
dudmuck | 0:be215de91a68 | 983 | } else { |
dudmuck | 0:be215de91a68 | 984 | buf[i] = 0; // null terminate |
dudmuck | 0:be215de91a68 | 985 | prev_len = i; |
dudmuck | 0:be215de91a68 | 986 | return i; |
dudmuck | 0:be215de91a68 | 987 | } |
dudmuck | 0:be215de91a68 | 988 | } else if (c == 3) { |
dudmuck | 0:be215de91a68 | 989 | // ctrl-C abort |
dudmuck | 0:be215de91a68 | 990 | return -1; |
dudmuck | 0:be215de91a68 | 991 | } else if (i < size) { |
dudmuck | 0:be215de91a68 | 992 | buf[i++] = c; |
dudmuck | 0:be215de91a68 | 993 | pc.putc(c); |
dudmuck | 0:be215de91a68 | 994 | } |
dudmuck | 0:be215de91a68 | 995 | } else |
dudmuck | 0:be215de91a68 | 996 | service_radio(); |
dudmuck | 0:be215de91a68 | 997 | } // ...for() |
dudmuck | 0:be215de91a68 | 998 | } |
dudmuck | 0:be215de91a68 | 999 | |
dudmuck | 0:be215de91a68 | 1000 | void |
dudmuck | 0:be215de91a68 | 1001 | console_chat() |
dudmuck | 0:be215de91a68 | 1002 | { |
dudmuck | 0:be215de91a68 | 1003 | int i, len = get_kbd_str(pcbuf, sizeof(pcbuf)); |
dudmuck | 0:be215de91a68 | 1004 | if (len < 0) { |
dudmuck | 0:be215de91a68 | 1005 | printf("chat abort\r\n"); |
dudmuck | 0:be215de91a68 | 1006 | app = APP_NONE; |
dudmuck | 0:be215de91a68 | 1007 | return; |
dudmuck | 0:be215de91a68 | 1008 | } else { |
dudmuck | 0:be215de91a68 | 1009 | for (i = 0; i < len; i++) |
dudmuck | 0:be215de91a68 | 1010 | radio.tx_buf[i] = pcbuf[i]; |
dudmuck | 1:1cd0afbed23c | 1011 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1012 | lora.RegPayloadLength = len; |
dudmuck | 1:1cd0afbed23c | 1013 | radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength); |
dudmuck | 1:1cd0afbed23c | 1014 | lora.start_tx(len); |
dudmuck | 1:1cd0afbed23c | 1015 | } else |
dudmuck | 1:1cd0afbed23c | 1016 | printf("todo fsk tx\r\n"); |
dudmuck | 0:be215de91a68 | 1017 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1018 | } |
dudmuck | 0:be215de91a68 | 1019 | } |
dudmuck | 0:be215de91a68 | 1020 | |
dudmuck | 0:be215de91a68 | 1021 | void |
dudmuck | 0:be215de91a68 | 1022 | console() |
dudmuck | 0:be215de91a68 | 1023 | { |
dudmuck | 0:be215de91a68 | 1024 | int len, i; |
dudmuck | 0:be215de91a68 | 1025 | uint8_t a, d; |
dudmuck | 1:1cd0afbed23c | 1026 | static uint16_t fsk_tx_length; |
dudmuck | 0:be215de91a68 | 1027 | |
dudmuck | 0:be215de91a68 | 1028 | len = get_kbd_str(pcbuf, sizeof(pcbuf)); |
dudmuck | 0:be215de91a68 | 1029 | if (len < 0) { |
dudmuck | 0:be215de91a68 | 1030 | printf("abort\r\n"); |
dudmuck | 0:be215de91a68 | 1031 | return; |
dudmuck | 0:be215de91a68 | 1032 | } |
dudmuck | 0:be215de91a68 | 1033 | |
dudmuck | 0:be215de91a68 | 1034 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1035 | if (len == 1) { |
dudmuck | 0:be215de91a68 | 1036 | switch (pcbuf[0]) { |
dudmuck | 0:be215de91a68 | 1037 | case 'i': |
dudmuck | 0:be215de91a68 | 1038 | radio.init(); |
dudmuck | 0:be215de91a68 | 1039 | user_init(); |
dudmuck | 0:be215de91a68 | 1040 | break; |
dudmuck | 0:be215de91a68 | 1041 | case 'h': |
dudmuck | 0:be215de91a68 | 1042 | printf("hw_reset()\r\n"); |
dudmuck | 0:be215de91a68 | 1043 | radio.hw_reset(); |
dudmuck | 0:be215de91a68 | 1044 | break; |
dudmuck | 0:be215de91a68 | 1045 | case 'R': |
dudmuck | 0:be215de91a68 | 1046 | // read all registers |
dudmuck | 0:be215de91a68 | 1047 | for (a = 1; a < 0x71; a++) { |
dudmuck | 0:be215de91a68 | 1048 | d = radio.read_reg(a); |
dudmuck | 0:be215de91a68 | 1049 | //update_shadow_regs(selected_radio, a, d); |
dudmuck | 0:be215de91a68 | 1050 | printf("%02x: %02x\r\n", a, d); |
dudmuck | 0:be215de91a68 | 1051 | } |
dudmuck | 0:be215de91a68 | 1052 | break; |
dudmuck | 0:be215de91a68 | 1053 | case 'T': |
dudmuck | 1:1cd0afbed23c | 1054 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1055 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2); |
dudmuck | 1:1cd0afbed23c | 1056 | //printf("a %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1057 | lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1; // same for sx1272 and sx1276 |
dudmuck | 1:1cd0afbed23c | 1058 | //printf("b %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1059 | radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1060 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1061 | //printf("c %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1062 | lora_printTxContinuousMode(); |
dudmuck | 1:1cd0afbed23c | 1063 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1064 | } |
dudmuck | 0:be215de91a68 | 1065 | break; |
dudmuck | 0:be215de91a68 | 1066 | case 'C': |
dudmuck | 1:1cd0afbed23c | 1067 | lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn()); |
dudmuck | 1:1cd0afbed23c | 1068 | lora_printRxPayloadCrcOn(); |
dudmuck | 0:be215de91a68 | 1069 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1070 | break; |
dudmuck | 0:be215de91a68 | 1071 | case 'B': |
dudmuck | 0:be215de91a68 | 1072 | radio.RegPaConfig.bits.PaSelect ^= 1; |
dudmuck | 0:be215de91a68 | 1073 | radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet); |
dudmuck | 0:be215de91a68 | 1074 | printPa(); |
dudmuck | 0:be215de91a68 | 1075 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1076 | break; |
dudmuck | 1:1cd0afbed23c | 1077 | case 'L': |
dudmuck | 1:1cd0afbed23c | 1078 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1079 | fsk.enable(); |
dudmuck | 1:1cd0afbed23c | 1080 | else |
dudmuck | 1:1cd0afbed23c | 1081 | lora.enable(); |
dudmuck | 1:1cd0afbed23c | 1082 | |
dudmuck | 1:1cd0afbed23c | 1083 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 1:1cd0afbed23c | 1084 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1085 | printf("LoRa\r\n"); |
dudmuck | 1:1cd0afbed23c | 1086 | else |
dudmuck | 1:1cd0afbed23c | 1087 | printf("FSK\r\n"); |
dudmuck | 1:1cd0afbed23c | 1088 | break; |
dudmuck | 0:be215de91a68 | 1089 | case '?': |
dudmuck | 1:1cd0afbed23c | 1090 | printf("L toggle LongRangeMode/FSK\r\n"); |
dudmuck | 0:be215de91a68 | 1091 | printf("i radio_init\r\n"); |
dudmuck | 0:be215de91a68 | 1092 | printf("h hw_reset\r\n"); |
dudmuck | 1:1cd0afbed23c | 1093 | printf("tx[%%d] transmit\r\n"); |
dudmuck | 1:1cd0afbed23c | 1094 | printf("rx receive\r\n"); |
dudmuck | 0:be215de91a68 | 1095 | printf("C toggle crcOn\r\n"); |
dudmuck | 0:be215de91a68 | 1096 | printf("op[%%d] get/set output power\r\n"); |
dudmuck | 1:1cd0afbed23c | 1097 | printf("d[0-5] change DIO pin assignment\r\n"); |
dudmuck | 1:1cd0afbed23c | 1098 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1099 | printf("pl[%%d] LORA get/set RegPayloadLength\r\n"); |
dudmuck | 1:1cd0afbed23c | 1100 | printf("cr[1234] LORA set coding rate \r\n"); |
dudmuck | 1:1cd0afbed23c | 1101 | printf("bw[%%d] LORA get/set bandwidth\r\n"); |
dudmuck | 1:1cd0afbed23c | 1102 | printf("sf[%%d] LORA get/set spreading factor\r\n"); |
dudmuck | 1:1cd0afbed23c | 1103 | printf("T LORA toggle TxContinuousMode\r\n"); |
dudmuck | 1:1cd0afbed23c | 1104 | printf("hp[%%d] LORA get/set hop period\r\n"); |
dudmuck | 1:1cd0afbed23c | 1105 | printf("hm LORA toggle explicit/explicit header mode\r\n"); |
dudmuck | 1:1cd0afbed23c | 1106 | } else { |
dudmuck | 1:1cd0afbed23c | 1107 | printf("bw[%%d] FSK get-set rxbw\n"); |
dudmuck | 1:1cd0afbed23c | 1108 | } |
dudmuck | 0:be215de91a68 | 1109 | break; |
dudmuck | 0:be215de91a68 | 1110 | case '.': |
dudmuck | 1:1cd0afbed23c | 1111 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1112 | lora_print_status(); |
dudmuck | 1:1cd0afbed23c | 1113 | else |
dudmuck | 1:1cd0afbed23c | 1114 | fsk_print_status(); |
dudmuck | 0:be215de91a68 | 1115 | common_print_status(); |
dudmuck | 0:be215de91a68 | 1116 | break; |
dudmuck | 0:be215de91a68 | 1117 | } // ...switch (pcbuf[0]) |
dudmuck | 0:be215de91a68 | 1118 | } else { |
dudmuck | 0:be215de91a68 | 1119 | if (pcbuf[0] == 't' && pcbuf[1] == 'x') { // TX |
dudmuck | 1:1cd0afbed23c | 1120 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1121 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1122 | sscanf(pcbuf+3, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1123 | lora.RegPayloadLength = i; |
dudmuck | 1:1cd0afbed23c | 1124 | } |
dudmuck | 1:1cd0afbed23c | 1125 | tx_cnt++; |
dudmuck | 1:1cd0afbed23c | 1126 | for (i = 0; i < lora.RegPayloadLength; i++) |
dudmuck | 1:1cd0afbed23c | 1127 | radio.tx_buf[i] = tx_cnt; |
dudmuck | 1:1cd0afbed23c | 1128 | lora.start_tx(lora.RegPayloadLength); |
dudmuck | 1:1cd0afbed23c | 1129 | } else { |
dudmuck | 1:1cd0afbed23c | 1130 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1131 | sscanf(pcbuf+3, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1132 | fsk_tx_length = i; |
dudmuck | 1:1cd0afbed23c | 1133 | } |
dudmuck | 1:1cd0afbed23c | 1134 | tx_cnt++; |
dudmuck | 1:1cd0afbed23c | 1135 | for (i = 0; i < fsk_tx_length; i++) |
dudmuck | 1:1cd0afbed23c | 1136 | radio.tx_buf[i] = tx_cnt; |
dudmuck | 1:1cd0afbed23c | 1137 | fsk.start_tx(fsk_tx_length); |
dudmuck | 0:be215de91a68 | 1138 | } |
dudmuck | 1:1cd0afbed23c | 1139 | } else if (pcbuf[0] == 'h' && pcbuf[1] == 'p' && radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 1140 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1141 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1142 | lora.RegHopPeriod = i; |
dudmuck | 1:1cd0afbed23c | 1143 | radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod); |
dudmuck | 0:be215de91a68 | 1144 | if (radio.RegDioMapping1.bits.Dio1Mapping != 1) { |
dudmuck | 0:be215de91a68 | 1145 | radio.RegDioMapping1.bits.Dio1Mapping = 1; |
dudmuck | 0:be215de91a68 | 1146 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1147 | } |
dudmuck | 0:be215de91a68 | 1148 | } |
dudmuck | 1:1cd0afbed23c | 1149 | lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD); |
dudmuck | 1:1cd0afbed23c | 1150 | printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod); |
dudmuck | 0:be215de91a68 | 1151 | } else if (pcbuf[0] == 'r' && pcbuf[1] == 'x') { // RX |
dudmuck | 1:1cd0afbed23c | 1152 | lora.start_rx(); |
dudmuck | 0:be215de91a68 | 1153 | } else if (pcbuf[0] == 'r' && pcbuf[1] == ' ') { // read single register |
dudmuck | 0:be215de91a68 | 1154 | sscanf(pcbuf+2, "%x", &i); |
dudmuck | 0:be215de91a68 | 1155 | printf("%02x: %02x\r\n", i, radio.read_reg(i)); |
dudmuck | 0:be215de91a68 | 1156 | } else if (pcbuf[0] == 'w' && pcbuf[1] == ' ') { // write single register |
dudmuck | 0:be215de91a68 | 1157 | sscanf(pcbuf+2, "%x %x", &i, &len); |
dudmuck | 0:be215de91a68 | 1158 | radio.write_reg(i, len); |
dudmuck | 0:be215de91a68 | 1159 | printf("%02x: %02x\r\n", i, radio.read_reg(i)); |
dudmuck | 0:be215de91a68 | 1160 | } else if (pcbuf[0] == 'o' && pcbuf[1] == 'p') { |
dudmuck | 0:be215de91a68 | 1161 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1162 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 0:be215de91a68 | 1163 | radio.RegPaConfig.bits.OutputPower = i; |
dudmuck | 0:be215de91a68 | 1164 | radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet); |
dudmuck | 0:be215de91a68 | 1165 | } |
dudmuck | 0:be215de91a68 | 1166 | radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG); |
dudmuck | 0:be215de91a68 | 1167 | printf("OutputPower:%d\r\n", radio.RegPaConfig.bits.OutputPower); |
dudmuck | 1:1cd0afbed23c | 1168 | } else if (pcbuf[0] == 'c' && pcbuf[1] == 'r' && radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 1169 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') |
dudmuck | 1:1cd0afbed23c | 1170 | lora.setCodingRate(pcbuf[2] - '0'); |
dudmuck | 1:1cd0afbed23c | 1171 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1172 | lora_printCodingRate(false); // false: transmitted |
dudmuck | 0:be215de91a68 | 1173 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1174 | } else if (pcbuf[0] == 'h' && pcbuf[1] == 'm' && radio.RegOpMode.bits.LongRangeMode) { // toggle implicit/explicit |
dudmuck | 1:1cd0afbed23c | 1175 | lora.setHeaderMode(!lora.getHeaderMode()); |
dudmuck | 1:1cd0afbed23c | 1176 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1177 | lora_printHeaderMode(); |
dudmuck | 0:be215de91a68 | 1178 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1179 | } else if (pcbuf[0] == 'b' && pcbuf[1] == 'w') { |
dudmuck | 1:1cd0afbed23c | 1180 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1181 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1182 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 1:1cd0afbed23c | 1183 | sscanf(&pcbuf[2], "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1184 | lora.setBw(i); |
dudmuck | 1:1cd0afbed23c | 1185 | } else |
dudmuck | 1:1cd0afbed23c | 1186 | lora_printAllBw(); |
dudmuck | 1:1cd0afbed23c | 1187 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1188 | printf("current "); |
dudmuck | 1:1cd0afbed23c | 1189 | lora_printBw(); |
dudmuck | 1:1cd0afbed23c | 1190 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1191 | } else { // FSK: |
dudmuck | 1:1cd0afbed23c | 1192 | if (pcbuf[2] == 'a') { |
dudmuck | 1:1cd0afbed23c | 1193 | if (pcbuf[3] >= '0' && pcbuf[3] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1194 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 1:1cd0afbed23c | 1195 | sscanf(&pcbuf[3], "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1196 | fsk.set_rx_dcc_bw_hz(i, 1); |
dudmuck | 1:1cd0afbed23c | 1197 | } |
dudmuck | 1:1cd0afbed23c | 1198 | printf("afcbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)); |
dudmuck | 1:1cd0afbed23c | 1199 | } else { |
dudmuck | 1:1cd0afbed23c | 1200 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1201 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 1:1cd0afbed23c | 1202 | sscanf(&pcbuf[2], "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1203 | fsk.set_rx_dcc_bw_hz(i, 0); |
dudmuck | 1:1cd0afbed23c | 1204 | } |
dudmuck | 1:1cd0afbed23c | 1205 | printf("rxbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)); |
dudmuck | 1:1cd0afbed23c | 1206 | } |
dudmuck | 1:1cd0afbed23c | 1207 | } |
dudmuck | 0:be215de91a68 | 1208 | } else if (pcbuf[0] == 'v' && pcbuf[1] == 'h') { |
dudmuck | 1:1cd0afbed23c | 1209 | lora.poll_vh ^= 1; |
dudmuck | 1:1cd0afbed23c | 1210 | printf("poll_vh:%d\r\n", lora.poll_vh); |
dudmuck | 1:1cd0afbed23c | 1211 | } else if (pcbuf[0] == 's' && pcbuf[1] == 'f' && radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 1212 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1213 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1214 | lora.setSf(i); |
dudmuck | 1:1cd0afbed23c | 1215 | if (i == 6 && !lora.getHeaderMode()) { |
dudmuck | 0:be215de91a68 | 1216 | printf("SF6: to implicit header mode\r\n"); |
dudmuck | 1:1cd0afbed23c | 1217 | lora.setHeaderMode(true); |
dudmuck | 0:be215de91a68 | 1218 | } |
dudmuck | 0:be215de91a68 | 1219 | } |
dudmuck | 1:1cd0afbed23c | 1220 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2); |
dudmuck | 1:1cd0afbed23c | 1221 | lora_printSf(); |
dudmuck | 0:be215de91a68 | 1222 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1223 | } else if (pcbuf[0] == 'f' && pcbuf[1] == 'r' && pcbuf[2] == 'f') { |
dudmuck | 0:be215de91a68 | 1224 | if (pcbuf[3] >= '0' && pcbuf[3] <= '9') { |
dudmuck | 0:be215de91a68 | 1225 | float MHz; |
dudmuck | 0:be215de91a68 | 1226 | sscanf(pcbuf+3, "%f", &MHz); |
dudmuck | 0:be215de91a68 | 1227 | //printf("MHz:%f\r\n", MHz); |
dudmuck | 0:be215de91a68 | 1228 | radio.set_frf_MHz(MHz); |
dudmuck | 0:be215de91a68 | 1229 | } else |
dudmuck | 0:be215de91a68 | 1230 | printf("%fMHz\r\n", radio.get_frf_MHz()); |
dudmuck | 1:1cd0afbed23c | 1231 | } else if (pcbuf[0] == 'p' && pcbuf[1] == 'l' && radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 1232 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1233 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1234 | lora.RegPayloadLength = i; |
dudmuck | 1:1cd0afbed23c | 1235 | radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength); |
dudmuck | 0:be215de91a68 | 1236 | } |
dudmuck | 1:1cd0afbed23c | 1237 | lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH); |
dudmuck | 1:1cd0afbed23c | 1238 | printf("PayloadLength:%d\r\n", lora.RegPayloadLength); |
dudmuck | 0:be215de91a68 | 1239 | } else if (pcbuf[0] == 'd' && pcbuf[1] >= '0' && pcbuf[1] <= '5') { |
dudmuck | 0:be215de91a68 | 1240 | switch (pcbuf[1]) { |
dudmuck | 0:be215de91a68 | 1241 | case '0': |
dudmuck | 0:be215de91a68 | 1242 | radio.RegDioMapping1.bits.Dio0Mapping++; |
dudmuck | 0:be215de91a68 | 1243 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1244 | break; |
dudmuck | 0:be215de91a68 | 1245 | case '1': |
dudmuck | 0:be215de91a68 | 1246 | radio.RegDioMapping1.bits.Dio1Mapping++; |
dudmuck | 0:be215de91a68 | 1247 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1248 | break; |
dudmuck | 0:be215de91a68 | 1249 | case '2': |
dudmuck | 0:be215de91a68 | 1250 | radio.RegDioMapping1.bits.Dio2Mapping++; |
dudmuck | 0:be215de91a68 | 1251 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1252 | break; |
dudmuck | 0:be215de91a68 | 1253 | case '3': |
dudmuck | 0:be215de91a68 | 1254 | radio.RegDioMapping1.bits.Dio3Mapping++; |
dudmuck | 0:be215de91a68 | 1255 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1256 | break; |
dudmuck | 0:be215de91a68 | 1257 | case '4': |
dudmuck | 0:be215de91a68 | 1258 | radio.RegDioMapping2.bits.Dio4Mapping++; |
dudmuck | 0:be215de91a68 | 1259 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping2.octet); |
dudmuck | 0:be215de91a68 | 1260 | break; |
dudmuck | 0:be215de91a68 | 1261 | case '5': |
dudmuck | 0:be215de91a68 | 1262 | radio.RegDioMapping2.bits.Dio5Mapping++; |
dudmuck | 0:be215de91a68 | 1263 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping2.octet); |
dudmuck | 0:be215de91a68 | 1264 | break; |
dudmuck | 0:be215de91a68 | 1265 | } // ...switch (pcbuf[1]) |
dudmuck | 1:1cd0afbed23c | 1266 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1267 | lora_print_dio(); |
dudmuck | 1:1cd0afbed23c | 1268 | else |
dudmuck | 1:1cd0afbed23c | 1269 | fsk_print_dio(); |
dudmuck | 0:be215de91a68 | 1270 | } else if (pcbuf[0] == 's' && pcbuf[1] == 't' && pcbuf[2] == 'b') { |
dudmuck | 0:be215de91a68 | 1271 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 0:be215de91a68 | 1272 | } else if (pcbuf[0] == 's' && pcbuf[1] == 'l' && pcbuf[2] == 'e') { |
dudmuck | 0:be215de91a68 | 1273 | radio.set_opmode(RF_OPMODE_SLEEP); |
dudmuck | 0:be215de91a68 | 1274 | } else if (pcbuf[0] == 'c' && pcbuf[1] == 'h' && pcbuf[2] == 'a') { |
dudmuck | 0:be215de91a68 | 1275 | app = APP_CHAT; |
dudmuck | 1:1cd0afbed23c | 1276 | lora.start_rx(); |
dudmuck | 0:be215de91a68 | 1277 | printf("chat start\r\n"); |
dudmuck | 0:be215de91a68 | 1278 | } |
dudmuck | 0:be215de91a68 | 1279 | } |
dudmuck | 0:be215de91a68 | 1280 | printf("> "); |
dudmuck | 0:be215de91a68 | 1281 | fflush(stdout); |
dudmuck | 0:be215de91a68 | 1282 | |
dudmuck | 0:be215de91a68 | 1283 | } |
dudmuck | 0:be215de91a68 | 1284 | |
dudmuck | 0:be215de91a68 | 1285 | int main() |
dudmuck | 0:be215de91a68 | 1286 | { |
dudmuck | 0:be215de91a68 | 1287 | |
dudmuck | 0:be215de91a68 | 1288 | pc.baud(57600); |
dudmuck | 0:be215de91a68 | 1289 | user_init(); |
dudmuck | 0:be215de91a68 | 1290 | |
dudmuck | 0:be215de91a68 | 1291 | radio.frfs = frfs; |
dudmuck | 0:be215de91a68 | 1292 | |
dudmuck | 0:be215de91a68 | 1293 | while(1) { |
dudmuck | 0:be215de91a68 | 1294 | switch (app) { |
dudmuck | 0:be215de91a68 | 1295 | case APP_NONE: |
dudmuck | 0:be215de91a68 | 1296 | console(); |
dudmuck | 0:be215de91a68 | 1297 | break; |
dudmuck | 0:be215de91a68 | 1298 | case APP_CHAT: |
dudmuck | 0:be215de91a68 | 1299 | console_chat(); |
dudmuck | 0:be215de91a68 | 1300 | break; |
dudmuck | 0:be215de91a68 | 1301 | } // ...switch (app) |
dudmuck | 0:be215de91a68 | 1302 | } // ...while(1) |
dudmuck | 0:be215de91a68 | 1303 | } |
dudmuck | 0:be215de91a68 | 1304 |