Michael Kersh / Mbed 2 deprecated ECE4180EthernetTest

Ethernet test for ECE 4180 and others to find your IP address and do a simple HTTP GET request over port 80.

Dependencies:   mbed Socket lwip-eth lwip-sys lwip

mbed-rtos/rtx/HAL_CM.c@0:e7ca326e76ee, 2013-04-04 (annotated)

Committer:
mkersh3
Date:
Thu Apr 04 05:26:09 2013 +0000
Revision:
0:e7ca326e76ee
Ethernet Test for ECE4180 and others to find their IP Address and do a simple HTTP GET request over port 80.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mkersh3 0:e7ca326e76ee 1 /*----------------------------------------------------------------------------
mkersh3 0:e7ca326e76ee 2 * RL-ARM - RTX
mkersh3 0:e7ca326e76ee 3 *----------------------------------------------------------------------------
mkersh3 0:e7ca326e76ee 4 * Name: HAL_CM.C
mkersh3 0:e7ca326e76ee 5 * Purpose: Hardware Abstraction Layer for Cortex-M
mkersh3 0:e7ca326e76ee 6 * Rev.: V4.50
mkersh3 0:e7ca326e76ee 7 *----------------------------------------------------------------------------
mkersh3 0:e7ca326e76ee 8 *
mkersh3 0:e7ca326e76ee 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
mkersh3 0:e7ca326e76ee 10 * All rights reserved.
mkersh3 0:e7ca326e76ee 11 * Redistribution and use in source and binary forms, with or without
mkersh3 0:e7ca326e76ee 12 * modification, are permitted provided that the following conditions are met:
mkersh3 0:e7ca326e76ee 13 * - Redistributions of source code must retain the above copyright
mkersh3 0:e7ca326e76ee 14 * notice, this list of conditions and the following disclaimer.
mkersh3 0:e7ca326e76ee 15 * - Redistributions in binary form must reproduce the above copyright
mkersh3 0:e7ca326e76ee 16 * notice, this list of conditions and the following disclaimer in the
mkersh3 0:e7ca326e76ee 17 * documentation and/or other materials provided with the distribution.
mkersh3 0:e7ca326e76ee 18 * - Neither the name of ARM nor the names of its contributors may be used
mkersh3 0:e7ca326e76ee 19 * to endorse or promote products derived from this software without
mkersh3 0:e7ca326e76ee 20 * specific prior written permission.
mkersh3 0:e7ca326e76ee 21 *
mkersh3 0:e7ca326e76ee 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mkersh3 0:e7ca326e76ee 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mkersh3 0:e7ca326e76ee 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mkersh3 0:e7ca326e76ee 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mkersh3 0:e7ca326e76ee 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mkersh3 0:e7ca326e76ee 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mkersh3 0:e7ca326e76ee 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mkersh3 0:e7ca326e76ee 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mkersh3 0:e7ca326e76ee 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mkersh3 0:e7ca326e76ee 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mkersh3 0:e7ca326e76ee 32 * POSSIBILITY OF SUCH DAMAGE.
mkersh3 0:e7ca326e76ee 33 *---------------------------------------------------------------------------*/
mkersh3 0:e7ca326e76ee 34
mkersh3 0:e7ca326e76ee 35 #include "rt_TypeDef.h"
mkersh3 0:e7ca326e76ee 36 #include "RTX_Config.h"
mkersh3 0:e7ca326e76ee 37 #include "rt_HAL_CM.h"
mkersh3 0:e7ca326e76ee 38
mkersh3 0:e7ca326e76ee 39
mkersh3 0:e7ca326e76ee 40 /*----------------------------------------------------------------------------
mkersh3 0:e7ca326e76ee 41 * Global Variables
mkersh3 0:e7ca326e76ee 42 *---------------------------------------------------------------------------*/
mkersh3 0:e7ca326e76ee 43
mkersh3 0:e7ca326e76ee 44 #ifdef DBG_MSG
mkersh3 0:e7ca326e76ee 45 BIT dbg_msg;
mkersh3 0:e7ca326e76ee 46 #endif
mkersh3 0:e7ca326e76ee 47
mkersh3 0:e7ca326e76ee 48 /*----------------------------------------------------------------------------
mkersh3 0:e7ca326e76ee 49 * Functions
mkersh3 0:e7ca326e76ee 50 *---------------------------------------------------------------------------*/
mkersh3 0:e7ca326e76ee 51
mkersh3 0:e7ca326e76ee 52
mkersh3 0:e7ca326e76ee 53 /*--------------------------- rt_init_stack ---------------------------------*/
mkersh3 0:e7ca326e76ee 54
mkersh3 0:e7ca326e76ee 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
mkersh3 0:e7ca326e76ee 56 /* Prepare TCB and saved context for a first time start of a task. */
mkersh3 0:e7ca326e76ee 57 U32 *stk,i,size;
mkersh3 0:e7ca326e76ee 58
mkersh3 0:e7ca326e76ee 59 /* Prepare a complete interrupt frame for first task start */
mkersh3 0:e7ca326e76ee 60 size = p_TCB->priv_stack >> 2;
mkersh3 0:e7ca326e76ee 61
mkersh3 0:e7ca326e76ee 62 /* Write to the top of stack. */
mkersh3 0:e7ca326e76ee 63 stk = &p_TCB->stack[size];
mkersh3 0:e7ca326e76ee 64
mkersh3 0:e7ca326e76ee 65 /* Auto correct to 8-byte ARM stack alignment. */
mkersh3 0:e7ca326e76ee 66 if ((U32)stk & 0x04) {
mkersh3 0:e7ca326e76ee 67 stk--;
mkersh3 0:e7ca326e76ee 68 }
mkersh3 0:e7ca326e76ee 69
mkersh3 0:e7ca326e76ee 70 stk -= 16;
mkersh3 0:e7ca326e76ee 71
mkersh3 0:e7ca326e76ee 72 /* Default xPSR and initial PC */
mkersh3 0:e7ca326e76ee 73 stk[15] = INITIAL_xPSR;
mkersh3 0:e7ca326e76ee 74 stk[14] = (U32)task_body;
mkersh3 0:e7ca326e76ee 75
mkersh3 0:e7ca326e76ee 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
mkersh3 0:e7ca326e76ee 77 for (i = 0; i < 14; i++) {
mkersh3 0:e7ca326e76ee 78 stk[i] = 0;
mkersh3 0:e7ca326e76ee 79 }
mkersh3 0:e7ca326e76ee 80
mkersh3 0:e7ca326e76ee 81 /* Assign a void pointer to R0. */
mkersh3 0:e7ca326e76ee 82 stk[8] = (U32)p_TCB->msg;
mkersh3 0:e7ca326e76ee 83
mkersh3 0:e7ca326e76ee 84 /* Initial Task stack pointer. */
mkersh3 0:e7ca326e76ee 85 p_TCB->tsk_stack = (U32)stk;
mkersh3 0:e7ca326e76ee 86
mkersh3 0:e7ca326e76ee 87 /* Task entry point. */
mkersh3 0:e7ca326e76ee 88 p_TCB->ptask = task_body;
mkersh3 0:e7ca326e76ee 89
mkersh3 0:e7ca326e76ee 90 /* Set a magic word for checking of stack overflow.
mkersh3 0:e7ca326e76ee 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
mkersh3 0:e7ca326e76ee 92 heap, therefore the last word of the stack is a moving target.
mkersh3 0:e7ca326e76ee 93 We want to do stack/heap collision detection instead.
mkersh3 0:e7ca326e76ee 94 */
mkersh3 0:e7ca326e76ee 95 if (p_TCB->task_id != 0x01)
mkersh3 0:e7ca326e76ee 96 p_TCB->stack[0] = MAGIC_WORD;
mkersh3 0:e7ca326e76ee 97 }
mkersh3 0:e7ca326e76ee 98
mkersh3 0:e7ca326e76ee 99
mkersh3 0:e7ca326e76ee 100 /*--------------------------- rt_ret_val ----------------------------------*/
mkersh3 0:e7ca326e76ee 101
mkersh3 0:e7ca326e76ee 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
mkersh3 0:e7ca326e76ee 103 /* Get pointer to task return value registers (R0..R3) in Stack */
mkersh3 0:e7ca326e76ee 104 #if (__TARGET_FPU_VFP)
mkersh3 0:e7ca326e76ee 105 if (p_TCB->stack_frame) {
mkersh3 0:e7ca326e76ee 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
mkersh3 0:e7ca326e76ee 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
mkersh3 0:e7ca326e76ee 108 } else {
mkersh3 0:e7ca326e76ee 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
mkersh3 0:e7ca326e76ee 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
mkersh3 0:e7ca326e76ee 111 }
mkersh3 0:e7ca326e76ee 112 #else
mkersh3 0:e7ca326e76ee 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
mkersh3 0:e7ca326e76ee 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
mkersh3 0:e7ca326e76ee 115 #endif
mkersh3 0:e7ca326e76ee 116 }
mkersh3 0:e7ca326e76ee 117
mkersh3 0:e7ca326e76ee 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
mkersh3 0:e7ca326e76ee 119 U32 *ret;
mkersh3 0:e7ca326e76ee 120
mkersh3 0:e7ca326e76ee 121 ret = rt_ret_regs(p_TCB);
mkersh3 0:e7ca326e76ee 122 ret[0] = v0;
mkersh3 0:e7ca326e76ee 123 }
mkersh3 0:e7ca326e76ee 124
mkersh3 0:e7ca326e76ee 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
mkersh3 0:e7ca326e76ee 126 U32 *ret;
mkersh3 0:e7ca326e76ee 127
mkersh3 0:e7ca326e76ee 128 ret = rt_ret_regs(p_TCB);
mkersh3 0:e7ca326e76ee 129 ret[0] = v0;
mkersh3 0:e7ca326e76ee 130 ret[1] = v1;
mkersh3 0:e7ca326e76ee 131 }
mkersh3 0:e7ca326e76ee 132
mkersh3 0:e7ca326e76ee 133
mkersh3 0:e7ca326e76ee 134 /*--------------------------- dbg_init --------------------------------------*/
mkersh3 0:e7ca326e76ee 135
mkersh3 0:e7ca326e76ee 136 #ifdef DBG_MSG
mkersh3 0:e7ca326e76ee 137 void dbg_init (void) {
mkersh3 0:e7ca326e76ee 138 if ((DEMCR & DEMCR_TRCENA) &&
mkersh3 0:e7ca326e76ee 139 (ITM_CONTROL & ITM_ITMENA) &&
mkersh3 0:e7ca326e76ee 140 (ITM_ENABLE & (1UL << 31))) {
mkersh3 0:e7ca326e76ee 141 dbg_msg = __TRUE;
mkersh3 0:e7ca326e76ee 142 }
mkersh3 0:e7ca326e76ee 143 }
mkersh3 0:e7ca326e76ee 144 #endif
mkersh3 0:e7ca326e76ee 145
mkersh3 0:e7ca326e76ee 146 /*--------------------------- dbg_task_notify -------------------------------*/
mkersh3 0:e7ca326e76ee 147
mkersh3 0:e7ca326e76ee 148 #ifdef DBG_MSG
mkersh3 0:e7ca326e76ee 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
mkersh3 0:e7ca326e76ee 150 while (ITM_PORT31_U32 == 0);
mkersh3 0:e7ca326e76ee 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
mkersh3 0:e7ca326e76ee 152 while (ITM_PORT31_U32 == 0);
mkersh3 0:e7ca326e76ee 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
mkersh3 0:e7ca326e76ee 154 }
mkersh3 0:e7ca326e76ee 155 #endif
mkersh3 0:e7ca326e76ee 156
mkersh3 0:e7ca326e76ee 157 /*--------------------------- dbg_task_switch -------------------------------*/
mkersh3 0:e7ca326e76ee 158
mkersh3 0:e7ca326e76ee 159 #ifdef DBG_MSG
mkersh3 0:e7ca326e76ee 160 void dbg_task_switch (U32 task_id) {
mkersh3 0:e7ca326e76ee 161 while (ITM_PORT31_U32 == 0);
mkersh3 0:e7ca326e76ee 162 ITM_PORT31_U8 = task_id;
mkersh3 0:e7ca326e76ee 163 }
mkersh3 0:e7ca326e76ee 164 #endif
mkersh3 0:e7ca326e76ee 165
mkersh3 0:e7ca326e76ee 166
mkersh3 0:e7ca326e76ee 167 /*----------------------------------------------------------------------------
mkersh3 0:e7ca326e76ee 168 * end of file
mkersh3 0:e7ca326e76ee 169 *---------------------------------------------------------------------------*/
mkersh3 0:e7ca326e76ee 170