An I/O controller for virtual pinball machines: accelerometer nudge sensing, analog plunger input, button input encoding, LedWiz compatible output controls, and more.

Dependencies:   mbed FastIO FastPWM USBDevice

Fork of Pinscape_Controller by Mike R

/media/uploads/mjr/pinscape_no_background_small_L7Miwr6.jpg

This is Version 2 of the Pinscape Controller, an I/O controller for virtual pinball machines. (You can find the old version 1 software here.) Pinscape is software for the KL25Z that turns the board into a full-featured I/O controller for virtual pinball, with support for accelerometer-based nudging, a real plunger, button inputs, and feedback device control.

In case you haven't heard of the concept before, a "virtual pinball machine" is basically a video pinball simulator that's built into a real pinball machine body. A TV monitor goes in place of the pinball playfield, and a second TV goes in the backbox to serve as the "backglass" display. A third smaller monitor can serve as the "DMD" (the Dot Matrix Display used for scoring on newer machines), or you can even install a real pinball plasma DMD. A computer is hidden inside the cabinet, running pinball emulation software that displays a life-sized playfield on the main TV. The cabinet has all of the usual buttons, too, so it not only looks like the real thing, but plays like it too. That's a picture of my own machine to the right. On the outside, it's built exactly like a real arcade pinball machine, with the same overall dimensions and all of the standard pinball cabinet hardware.

A few small companies build and sell complete, finished virtual pinball machines, but I think it's more fun as a DIY project. If you have some basic wood-working skills and know your way around PCs, you can build one from scratch. The computer part is just an ordinary Windows PC, and all of the pinball emulation can be built out of free, open-source software. In that spirit, the Pinscape Controller is an open-source software/hardware project that offers a no-compromises, all-in-one control center for all of the unique input/output needs of a virtual pinball cabinet. If you've been thinking about building one of these, but you're not sure how to connect a plunger, flipper buttons, lights, nudge sensor, and whatever else you can think of, this project might be just what you're looking for.

You can find much more information about DIY Pin Cab building in general in the Virtual Cabinet Forum on vpforums.org. Also visit my Pinscape Resources page for more about this project and other virtual pinball projects I'm working on.

Downloads

  • Pinscape Release Builds: This page has download links for all of the Pinscape software. To get started, install and run the Pinscape Config Tool on your Windows computer. It will lead you through the steps for installing the Pinscape firmware on the KL25Z.
  • Config Tool Source Code. The complete C# source code for the config tool. You don't need this to run the tool, but it's available if you want to customize anything or see how it works inside.

Documentation

The new Version 2 Build Guide is now complete! This new version aims to be a complete guide to building a virtual pinball machine, including not only the Pinscape elements but all of the basics, from sourcing parts to building all of the hardware.

You can also refer to the original Hardware Build Guide (PDF), but that's out of date now, since it refers to the old version 1 software, which was rather different (especially when it comes to configuration).

System Requirements

The new config tool requires a fairly up-to-date Microsoft .NET installation. If you use Windows Update to keep your system current, you should be fine. A modern version of Internet Explorer (IE) is required, even if you don't use it as your main browser, because the config tool uses some system components that Microsoft packages into the IE install set. I test with IE11, so that's known to work. IE8 doesn't work. IE9 and 10 are unknown at this point.

The Windows requirements are only for the config tool. The firmware doesn't care about anything on the Windows side, so if you can make do without the config tool, you can use almost any Windows setup.

Main Features

Plunger: The Pinscape Controller started out as a "mechanical plunger" controller: a device for attaching a real pinball plunger to the video game software so that you could launch the ball the natural way. This is still, of course, a central feature of the project. The software supports several types of sensors: a high-resolution optical sensor (which works by essentially taking pictures of the plunger as it moves); a slide potentionmeter (which determines the position via the changing electrical resistance in the pot); a quadrature sensor (which counts bars printed on a special guide rail that it moves along); and an IR distance sensor (which determines the position by sending pulses of light at the plunger and measuring the round-trip travel time). The Build Guide explains how to set up each type of sensor.

Nudging: The KL25Z (the little microcontroller that the software runs on) has a built-in accelerometer. The Pinscape software uses it to sense when you nudge the cabinet, and feeds the acceleration data to the pinball software on the PC. This turns physical nudges into virtual English on the ball. The accelerometer is quite sensitive and accurate, so we can measure the difference between little bumps and hard shoves, and everything in between. The result is natural and immersive.

Buttons: You can wire real pinball buttons to the KL25Z, and the software will translate the buttons into PC input. You have the option to map each button to a keyboard key or joystick button. You can wire up your flipper buttons, Magna Save buttons, Start button, coin slots, operator buttons, and whatever else you need.

Feedback devices: You can also attach "feedback devices" to the KL25Z. Feedback devices are things that create tactile, sound, and lighting effects in sync with the game action. The most popular PC pinball emulators know how to address a wide variety of these devices, and know how to match them to on-screen action in each virtual table. You just need an I/O controller that translates commands from the PC into electrical signals that turn the devices on and off. The Pinscape Controller can do that for you.

Expansion Boards

There are two main ways to run the Pinscape Controller: standalone, or using the "expansion boards".

In the basic standalone setup, you just need the KL25Z, plus whatever buttons, sensors, and feedback devices you want to attach to it. This mode lets you take advantage of everything the software can do, but for some features, you'll have to build some ad hoc external circuitry to interface external devices with the KL25Z. The Build Guide has detailed plans for exactly what you need to build.

The other option is the Pinscape Expansion Boards. The expansion boards are a companion project, which is also totally free and open-source, that provides Printed Circuit Board (PCB) layouts that are designed specifically to work with the Pinscape software. The PCB designs are in the widely used EAGLE format, which many PCB manufacturers can turn directly into physical boards for you. The expansion boards organize all of the external connections more neatly than on the standalone KL25Z, and they add all of the interface circuitry needed for all of the advanced software functions. The big thing they bring to the table is lots of high-power outputs. The boards provide a modular system that lets you add boards to add more outputs. If you opt for the basic core setup, you'll have enough outputs for all of the toys in a really well-equipped cabinet. If your ambitions go beyond merely well-equipped and run to the ridiculously extravagant, just add an extra board or two. The modular design also means that you can add to the system over time.

Expansion Board project page

Update notes

If you have a Pinscape V1 setup already installed, you should be able to switch to the new version pretty seamlessly. There are just a couple of things to be aware of.

First, the "configuration" procedure is completely different in the new version. Way better and way easier, but it's not what you're used to from V1. In V1, you had to edit the project source code and compile your own custom version of the program. No more! With V2, you simply install the standard, pre-compiled .bin file, and select options using the Pinscape Config Tool on Windows.

Second, if you're using the TSL1410R optical sensor for your plunger, there's a chance you'll need to boost your light source's brightness a little bit. The "shutter speed" is faster in this version, which means that it doesn't spend as much time collecting light per frame as before. The software actually does "auto exposure" adaptation on every frame, so the increased shutter speed really shouldn't bother it, but it does require a certain minimum level of contrast, which requires a certain minimal level of lighting. Check the plunger viewer in the setup tool if you have any problems; if the image looks totally dark, try increasing the light level to see if that helps.

New Features

V2 has numerous new features. Here are some of the highlights...

Dynamic configuration: as explained above, configuration is now handled through the Config Tool on Windows. It's no longer necessary to edit the source code or compile your own modified binary.

Improved plunger sensing: the software now reads the TSL1410R optical sensor about 15x faster than it did before. This allows reading the sensor at full resolution (400dpi), about 400 times per second. The faster frame rate makes a big difference in how accurately we can read the plunger position during the fast motion of a release, which allows for more precise position sensing and faster response. The differences aren't dramatic, since the sensing was already pretty good even with the slower V1 scan rate, but you might notice a little better precision in tricky skill shots.

Keyboard keys: button inputs can now be mapped to keyboard keys. The joystick button option is still available as well, of course. Keyboard keys have the advantage of being closer to universal for PC pinball software: some pinball software can be set up to take joystick input, but nearly all PC pinball emulators can take keyboard input, and nearly all of them use the same key mappings.

Local shift button: one physical button can be designed as the local shift button. This works like a Shift button on a keyboard, but with cabinet buttons. It allows each physical button on the cabinet to have two PC keys assigned, one normal and one shifted. Hold down the local shift button, then press another key, and the other key's shifted key mapping is sent to the PC. The shift button can have a regular key mapping of its own as well, so it can do double duty. The shift feature lets you access more functions without cluttering your cabinet with extra buttons. It's especially nice for less frequently used functions like adjusting the volume or activating night mode.

Night mode: the output controller has a new "night mode" option, which lets you turn off all of your noisy devices with a single button, switch, or PC command. You can designate individual ports as noisy or not. Night mode only disables the noisemakers, so you still get the benefit of your flashers, button lights, and other quiet devices. This lets you play late into the night without disturbing your housemates or neighbors.

Gamma correction: you can designate individual output ports for gamma correction. This adjusts the intensity level of an output to make it match the way the human eye perceives brightness, so that fades and color mixes look more natural in lighting devices. You can apply this to individual ports, so that it only affects ports that actually have lights of some kind attached.

IR Remote Control: the controller software can transmit and/or receive IR remote control commands if you attach appropriate parts (an IR LED to send, an IR sensor chip to receive). This can be used to turn on your TV(s) when the system powers on, if they don't turn on automatically, and for any other functions you can think of requiring IR send/receive capabilities. You can assign IR commands to cabinet buttons, so that pressing a button on your cabinet sends a remote control command from the attached IR LED, and you can have the controller generate virtual key presses on your PC in response to received IR commands. If you have the IR sensor attached, the system can use it to learn commands from your existing remotes.

Yet more USB fixes: I've been gradually finding and fixing USB bugs in the mbed library for months now. This version has all of the fixes of the last couple of releases, of course, plus some new ones. It also has a new "last resort" feature, since there always seems to be "just one more" USB bug. The last resort is that you can tell the device to automatically reboot itself if it loses the USB connection and can't restore it within a given time limit.

More Downloads

  • Custom VP builds: I created modified versions of Visual Pinball 9.9 and Physmod5 that you might want to use in combination with this controller. The modified versions have special handling for plunger calibration specific to the Pinscape Controller, as well as some enhancements to the nudge physics. If you're not using the plunger, you might still want it for the nudge improvements. The modified version also works with any other input controller, so you can get the enhanced nudging effects even if you're using a different plunger/nudge kit. The big change in the modified versions is a "filter" for accelerometer input that's designed to make the response to cabinet nudges more realistic. It also makes the response more subdued than in the standard VP, so it's not to everyone's taste. The downloads include both the updated executables and the source code changes, in case you want to merge the changes into your own custom version(s).

    Note! These features are now standard in the official VP releases, so you don't need my custom builds if you're using 9.9.1 or later and/or VP 10. I don't think there's any reason to use my versions instead of the latest official ones, and in fact I'd encourage you to use the official releases since they're more up to date, but I'm leaving my builds available just in case. In the official versions, look for the checkbox "Enable Nudge Filter" in the Keys preferences dialog. My custom versions don't include that checkbox; they just enable the filter unconditionally.
  • Output circuit shopping list: This is a saved shopping cart at mouser.com with the parts needed to build one copy of the high-power output circuit for the LedWiz emulator feature, for use with the standalone KL25Z (that is, without the expansion boards). The quantities in the cart are for one output channel, so if you want N outputs, simply multiply the quantities by the N, with one exception: you only need one ULN2803 transistor array chip for each eight output circuits. If you're using the expansion boards, you won't need any of this, since the boards provide their own high-power outputs.
  • Cary Owens' optical sensor housing: A 3D-printable design for a housing/mounting bracket for the optical plunger sensor, designed by Cary Owens. This makes it easy to mount the sensor.
  • Lemming77's potentiometer mounting bracket and shooter rod connecter: Sketchup designs for 3D-printable parts for mounting a slide potentiometer as the plunger sensor. These were designed for a particular slide potentiometer that used to be available from an Aliexpress.com seller but is no longer listed. You can probably use this design as a starting point for other similar devices; just check the dimensions before committing the design to plastic.

Copyright and License

The Pinscape firmware is copyright 2014, 2021 by Michael J Roberts. It's released under an MIT open-source license. See License.

Warning to VirtuaPin Kit Owners

This software isn't designed as a replacement for the VirtuaPin plunger kit's firmware. If you bought the VirtuaPin kit, I recommend that you don't install this software. The VirtuaPin kit uses the same KL25Z microcontroller that Pinscape uses, but the rest of its hardware is different and incompatible. In particular, the Pinscape firmware doesn't include support for the IR proximity sensor used in the VirtuaPin plunger kit, so you won't be able to use your plunger device with the Pinscape firmware. In addition, the VirtuaPin setup uses a different set of GPIO pins for the button inputs from the Pinscape defaults, so if you do install the Pinscape firmware, you'll have to go into the Config Tool and reassign all of the buttons to match the VirtuaPin wiring.

Committer:
mjr
Date:
Wed May 04 03:59:44 2016 +0000
Revision:
55:4db125cd11a0
Parent:
54:fd77a6b2f76c
Child:
64:ef7ca92dff36
More KL25Z USB client cleanup

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mjr 26:cb71c4af2912 1 // Pinscape Controller TLC5940 interface
mjr 26:cb71c4af2912 2 //
mjr 26:cb71c4af2912 3 // Based on Spencer Davis's mbed TLC5940 library. Adapted for the
mjr 55:4db125cd11a0 4 // KL25Z and simplified (removes dot correction and status input
mjr 55:4db125cd11a0 5 // support).
mjr 26:cb71c4af2912 6
mjr 26:cb71c4af2912 7
mjr 26:cb71c4af2912 8 #ifndef TLC5940_H
mjr 26:cb71c4af2912 9 #define TLC5940_H
mjr 26:cb71c4af2912 10
mjr 54:fd77a6b2f76c 11 #include "FastPWM.h"
mjr 54:fd77a6b2f76c 12
mjr 55:4db125cd11a0 13 // --------------------------------------------------------------------------
mjr 38:091e511ce8a0 14 // Data Transmission Mode.
mjr 38:091e511ce8a0 15 //
mjr 38:091e511ce8a0 16 // NOTE! This section contains a possible workaround to try if you're
mjr 38:091e511ce8a0 17 // having data signal stability problems with your TLC5940 chips. If
mjr 40:cc0d9814522b 18 // things are working properly, you can ignore this part.
mjr 33:d832bcab089e 19 //
mjr 38:091e511ce8a0 20 // The software has two options for sending data updates to the chips:
mjr 38:091e511ce8a0 21 //
mjr 40:cc0d9814522b 22 // Mode 0: Send data *during* the grayscale cycle. This is the default,
mjr 40:cc0d9814522b 23 // and it's the standard method the chips are designed for. In this mode,
mjr 40:cc0d9814522b 24 // we start sending an update just after then blanking interval that starts
mjr 40:cc0d9814522b 25 // a new grayscale cycle. The timing is arranged so that the update is
mjr 40:cc0d9814522b 26 // completed well before the end of the grayscale cycle. At the next
mjr 40:cc0d9814522b 27 // blanking interval, we latch the new data, so the new brightness levels
mjr 40:cc0d9814522b 28 // will be shown starting on the next cycle.
mjr 55:4db125cd11a0 29 //
mjr 38:091e511ce8a0 30 // Mode 1: Send data *between* grayscale cycles. In this mode, we send
mjr 38:091e511ce8a0 31 // each complete update during a blanking period, then latch the update
mjr 38:091e511ce8a0 32 // and start the next grayscale cycle. This isn't the way the chips were
mjr 38:091e511ce8a0 33 // intended to be used, but it works. The disadvantage is that it requires
mjr 40:cc0d9814522b 34 // the blanking interval to be extended long enough for the full data
mjr 40:cc0d9814522b 35 // update (192 bits * the number of chips in the chain). Since the
mjr 40:cc0d9814522b 36 // outputs are turned off throughout the blanking period, this reduces
mjr 38:091e511ce8a0 37 // the overall brightness/intensity of the outputs by reducing the duty
mjr 38:091e511ce8a0 38 // cycle. The TLC5940 chips can't achieve 100% duty cycle to begin with,
mjr 40:cc0d9814522b 39 // since they require a brief minimum time in the blanking interval
mjr 38:091e511ce8a0 40 // between grayscale cycles; however, the minimum is so short that the
mjr 38:091e511ce8a0 41 // duty cycle is close to 100%. With the full data transmission stuffed
mjr 38:091e511ce8a0 42 // into the blanking interval, we reduce the duty cycle further below
mjr 38:091e511ce8a0 43 // 100%. With four chips in the chain, a 28 MHz data clock, and a
mjr 38:091e511ce8a0 44 // 500 kHz grayscale clock, the reduction is about 0.3%.
mjr 33:d832bcab089e 45 //
mjr 40:cc0d9814522b 46 // Mode 0 is the method documented in the manufacturer's data sheet.
mjr 40:cc0d9814522b 47 // It works well empirically with the Pinscape expansion boards.
mjr 40:cc0d9814522b 48 //
mjr 38:091e511ce8a0 49 // So what's the point of Mode 1? In early testing, with a breadboard
mjr 38:091e511ce8a0 50 // setup, I saw some problems with data signal stability, which manifested
mjr 38:091e511ce8a0 51 // as sporadic flickering in the outputs. Switching to Mode 1 improved
mjr 38:091e511ce8a0 52 // the signal stability considerably. I'm therefore leaving this code
mjr 38:091e511ce8a0 53 // available as an option in case anyone runs into similar signal problems
mjr 38:091e511ce8a0 54 // and wants to try the alternative mode as a workaround.
mjr 38:091e511ce8a0 55 //
mjr 38:091e511ce8a0 56 #define DATA_UPDATE_INSIDE_BLANKING 0
mjr 33:d832bcab089e 57
mjr 26:cb71c4af2912 58 #include "mbed.h"
mjr 55:4db125cd11a0 59
mjr 55:4db125cd11a0 60
mjr 55:4db125cd11a0 61 // --------------------------------------------------------------------------
mjr 55:4db125cd11a0 62 // Some notes on the data transmission design
mjr 55:4db125cd11a0 63 //
mjr 55:4db125cd11a0 64 // I spent a while working on using DMA to send the data, thinking that
mjr 55:4db125cd11a0 65 // this would reduce the CPU load. But I couldn't get this working
mjr 55:4db125cd11a0 66 // reliably; there was some kind of timing interaction or race condition
mjr 55:4db125cd11a0 67 // that caused crashes when initiating the DMA transfer from within the
mjr 55:4db125cd11a0 68 // blanking interrupt. I spent quite a while trying to debug it and
mjr 55:4db125cd11a0 69 // couldn't figure out what was going on. There are some complications
mjr 55:4db125cd11a0 70 // involved in using DMA with SPI that are documented in the KL25Z
mjr 55:4db125cd11a0 71 // reference manual, and I was following those carefully, but I suspect
mjr 55:4db125cd11a0 72 // that the problem was somehow related to that, because it seemed to
mjr 55:4db125cd11a0 73 // be sporadic and timing-related, and I couldn't find any software race
mjr 55:4db125cd11a0 74 // conditions or concurrency issues that could explain it.
mjr 55:4db125cd11a0 75 //
mjr 55:4db125cd11a0 76 // I finally decided that I wasn't going to crack that and started looking
mjr 55:4db125cd11a0 77 // for alternatives, so out of curiosity, I measured the time needed for a
mjr 55:4db125cd11a0 78 // synchronous (CPU-driven) SPI send, to see how it would fit into various
mjr 55:4db125cd11a0 79 // places in the code. This turned out to be faster than I expected: with
mjr 55:4db125cd11a0 80 // SPI at 28MHz, the measured time for a synchronous send is about 72us for
mjr 55:4db125cd11a0 81 // 4 chips worth of GS data (192 bits), which I expect to be the typical
mjr 55:4db125cd11a0 82 // Expansion Board setup. For an 8-chip setup, which will probably be
mjr 55:4db125cd11a0 83 // about the maximum workable setup, the time would be 144us. We only have
mjr 55:4db125cd11a0 84 // to send the data once per grayscale cycle, and each cycle is 11.7ms with
mjr 55:4db125cd11a0 85 // the grayscale clock at 350kHz (4096 steps per cycle divided by 350,000
mjr 55:4db125cd11a0 86 // steps per second = 11.7ms per cycle), so this is only 1% overhead. The
mjr 55:4db125cd11a0 87 // main loop spends most of its time polling anyway, so we have plenty of
mjr 55:4db125cd11a0 88 // cycles to reallocate from idle polling to the sending the data.
mjr 55:4db125cd11a0 89 //
mjr 55:4db125cd11a0 90 // The easiest place to do the send is in the blanking interval ISR, but
mjr 55:4db125cd11a0 91 // I wanted to keep this out of the ISR. It's only ~100us, but even so,
mjr 55:4db125cd11a0 92 // it's critical to minimize time in ISRs so that we don't miss other
mjr 55:4db125cd11a0 93 // interrupts. So instead, I set it up so that the ISR coordinates with
mjr 55:4db125cd11a0 94 // the main loop via a flag:
mjr 55:4db125cd11a0 95 //
mjr 55:4db125cd11a0 96 // - In the blanking interrupt, set a flag ("cts" = clear to send),
mjr 55:4db125cd11a0 97 // and arm a timeout that fires 2/3 through the next blanking cycle
mjr 55:4db125cd11a0 98 //
mjr 55:4db125cd11a0 99 // - In the main loop, poll "cts" each time through the loop. When
mjr 55:4db125cd11a0 100 // cts is true, send the data synchronously and clear the flag.
mjr 55:4db125cd11a0 101 // Do nothing when cts is false.
mjr 55:4db125cd11a0 102 //
mjr 55:4db125cd11a0 103 // The main loop runs on about a 1.5ms cycle, and 2/3 of the grayscale
mjr 55:4db125cd11a0 104 // cycle is 8ms, so the main loop will poll cts on average 5 times per
mjr 55:4db125cd11a0 105 // 8ms window. That makes it all but certain that we'll do a send in
mjr 55:4db125cd11a0 106 // a timely fashion on every grayscale cycle.
mjr 55:4db125cd11a0 107 //
mjr 55:4db125cd11a0 108 // The point of the 2/3 window is to guarantee that the data send is
mjr 55:4db125cd11a0 109 // finished before the grayscale cycle ends. The TLC5940 chips require
mjr 55:4db125cd11a0 110 // this; data transmission has to be entirely between blanking intervals.
mjr 55:4db125cd11a0 111 // The main loop and interrupt handler are operating asynchronously
mjr 55:4db125cd11a0 112 // relative to one another, so the exact phase alignment will vary
mjr 55:4db125cd11a0 113 // randomly. If we start a transmission within the 2/3 window, we're
mjr 55:4db125cd11a0 114 // guaranteed to have at least 3.5ms (1/3 of the cycle) left before
mjr 55:4db125cd11a0 115 // the next blanking interval. The transmission only takes ~100us,
mjr 55:4db125cd11a0 116 // so we're leaving tons of margin for error in the timing - we have
mjr 55:4db125cd11a0 117 // 34x longer than we need.
mjr 55:4db125cd11a0 118 //
mjr 55:4db125cd11a0 119 // The main loop can easily absorb the extra ~100us of overhead without
mjr 55:4db125cd11a0 120 // even noticing. The loop spends most of its time polling devices, so
mjr 55:4db125cd11a0 121 // it's really mostly idle time to start with. So we're effectively
mjr 55:4db125cd11a0 122 // reallocating some idle time to useful work. The chunk of time is
mjr 55:4db125cd11a0 123 // only about 6% of one loop iteration, so we're not even significantly
mjr 55:4db125cd11a0 124 // extending the occasional iterations that actually do this work.
mjr 55:4db125cd11a0 125 // (If we had a 2ms chunk of monolithic work to do, that could start
mjr 55:4db125cd11a0 126 // to add undesirable latency to other polling tasks. 100us won't.)
mjr 55:4db125cd11a0 127 //
mjr 55:4db125cd11a0 128 // We could conceivably reduce this overhead slightly by adding DMA,
mjr 55:4db125cd11a0 129 // but I'm not sure it would actually do much good. Setting up the DMA
mjr 55:4db125cd11a0 130 // transfer would probably take at least 20us in CPU time just to set
mjr 55:4db125cd11a0 131 // up all of the registers. And SPI is so fast that the DMA transfer
mjr 55:4db125cd11a0 132 // would saturate the CPU memory bus for the 30us or so of the transfer.
mjr 55:4db125cd11a0 133 // (I have my suspicions that this bus saturation effect might be part
mjr 55:4db125cd11a0 134 // of the problem I was having getting DMA working in the first place.)
mjr 55:4db125cd11a0 135 // So we'd go from 100us of overhead per cycle to at maybe 50us per
mjr 55:4db125cd11a0 136 // cycle. We'd also have to introduce some concurrency controls to the
mjr 55:4db125cd11a0 137 // output "set" operation that we don't need with the current scheme
mjr 55:4db125cd11a0 138 // (because it's synchronous). So overall I think the current
mjr 55:4db125cd11a0 139 // synchronous approach is almost as good in terms of performance as
mjr 55:4db125cd11a0 140 // an asynchronous DMA setup would be, and it's a heck of a lot simpler
mjr 55:4db125cd11a0 141 // and seems very reliable.
mjr 55:4db125cd11a0 142 //
mjr 55:4db125cd11a0 143 // --------------------------------------------------------------------------
mjr 26:cb71c4af2912 144
mjr 54:fd77a6b2f76c 145
mjr 26:cb71c4af2912 146 /**
mjr 26:cb71c4af2912 147 * SPI speed used by the mbed to communicate with the TLC5940
mjr 26:cb71c4af2912 148 * The TLC5940 supports up to 30Mhz. It's best to keep this as
mjr 33:d832bcab089e 149 * high as possible, since a higher SPI speed yields a faster
mjr 33:d832bcab089e 150 * grayscale data update. However, I've seen some slight
mjr 33:d832bcab089e 151 * instability in the signal in my breadboard setup using the
mjr 33:d832bcab089e 152 * full 30MHz, so I've reduced this slightly, which seems to
mjr 33:d832bcab089e 153 * yield a solid signal. The limit will vary according to how
mjr 33:d832bcab089e 154 * clean the signal path is to the chips; you can probably crank
mjr 33:d832bcab089e 155 * this up to full speed if you have a well-designed PCB, good
mjr 33:d832bcab089e 156 * decoupling capacitors near the 5940 VCC/GND pins, and short
mjr 33:d832bcab089e 157 * wires between the KL25Z and the PCB. A short, clean path to
mjr 33:d832bcab089e 158 * KL25Z ground seems especially important.
mjr 26:cb71c4af2912 159 *
mjr 26:cb71c4af2912 160 * The SPI clock must be fast enough that the data transmission
mjr 26:cb71c4af2912 161 * time for a full update is comfortably less than the blanking
mjr 26:cb71c4af2912 162 * cycle time. The grayscale refresh requires 192 bits per TLC5940
mjr 26:cb71c4af2912 163 * in the daisy chain, and each bit takes one SPI clock to send.
mjr 26:cb71c4af2912 164 * Our reference setup in the Pinscape controller allows for up to
mjr 26:cb71c4af2912 165 * 4 TLC5940s, so a full refresh cycle on a fully populated system
mjr 26:cb71c4af2912 166 * would be 768 SPI clocks. The blanking cycle is 4096 GSCLK cycles.
mjr 26:cb71c4af2912 167 *
mjr 26:cb71c4af2912 168 * t(blank) = 4096 * 1/GSCLK_SPEED
mjr 26:cb71c4af2912 169 * t(refresh) = 768 * 1/SPI_SPEED
mjr 26:cb71c4af2912 170 * Therefore: SPI_SPEED must be > 768/4096 * GSCLK_SPEED
mjr 26:cb71c4af2912 171 *
mjr 26:cb71c4af2912 172 * Since the SPI speed can be so high, and since we want to keep
mjr 26:cb71c4af2912 173 * the GSCLK speed relatively low, the constraint above simply
mjr 26:cb71c4af2912 174 * isn't a factor. E.g., at SPI=30MHz and GSCLK=500kHz,
mjr 26:cb71c4af2912 175 * t(blank) is 8192us and t(refresh) is 25us.
mjr 26:cb71c4af2912 176 */
mjr 38:091e511ce8a0 177 #define SPI_SPEED 28000000
mjr 26:cb71c4af2912 178
mjr 26:cb71c4af2912 179 /**
mjr 26:cb71c4af2912 180 * The rate at which the GSCLK pin is pulsed. This also controls
mjr 26:cb71c4af2912 181 * how often the reset function is called. The reset function call
mjr 38:091e511ce8a0 182 * interval is (1/GSCLK_SPEED) * 4096. The maximum reliable rate is
mjr 26:cb71c4af2912 183 * around 32Mhz. It's best to keep this rate as low as possible:
mjr 26:cb71c4af2912 184 * the higher the rate, the higher the refresh() call frequency,
mjr 40:cc0d9814522b 185 * so the higher the CPU load. Higher frequencies also make it more
mjr 40:cc0d9814522b 186 * challenging to wire the chips for clean signal transmission, so
mjr 40:cc0d9814522b 187 * minimizing the clock speed will help with signal stability.
mjr 26:cb71c4af2912 188 *
mjr 40:cc0d9814522b 189 * The lower bound depends on the application. For driving lights,
mjr 40:cc0d9814522b 190 * the limiting factor is flicker: the lower the rate, the more
mjr 40:cc0d9814522b 191 * noticeable the flicker. Incandescents tend to look flicker-free
mjr 40:cc0d9814522b 192 * at about 50 Hz (205 kHz grayscale clock). LEDs need slightly
mjr 40:cc0d9814522b 193 * faster rates.
mjr 26:cb71c4af2912 194 */
mjr 40:cc0d9814522b 195 #define GSCLK_SPEED 350000
mjr 26:cb71c4af2912 196
mjr 26:cb71c4af2912 197 class TLC5940
mjr 26:cb71c4af2912 198 {
mjr 26:cb71c4af2912 199 public:
mjr 26:cb71c4af2912 200 /**
mjr 26:cb71c4af2912 201 * Set up the TLC5940
mjr 54:fd77a6b2f76c 202 *
mjr 26:cb71c4af2912 203 * @param SCLK - The SCK pin of the SPI bus
mjr 26:cb71c4af2912 204 * @param MOSI - The MOSI pin of the SPI bus
mjr 26:cb71c4af2912 205 * @param GSCLK - The GSCLK pin of the TLC5940(s)
mjr 26:cb71c4af2912 206 * @param BLANK - The BLANK pin of the TLC5940(s)
mjr 26:cb71c4af2912 207 * @param XLAT - The XLAT pin of the TLC5940(s)
mjr 26:cb71c4af2912 208 * @param nchips - The number of TLC5940s (if you are daisy chaining)
mjr 26:cb71c4af2912 209 */
mjr 26:cb71c4af2912 210 TLC5940(PinName SCLK, PinName MOSI, PinName GSCLK, PinName BLANK, PinName XLAT, int nchips)
mjr 55:4db125cd11a0 211 : spi(MOSI, NC, SCLK),
mjr 26:cb71c4af2912 212 gsclk(GSCLK),
mjr 26:cb71c4af2912 213 blank(BLANK),
mjr 26:cb71c4af2912 214 xlat(XLAT),
mjr 33:d832bcab089e 215 nchips(nchips)
mjr 26:cb71c4af2912 216 {
mjr 40:cc0d9814522b 217 // start up initially disabled
mjr 40:cc0d9814522b 218 enabled = false;
mjr 40:cc0d9814522b 219
mjr 33:d832bcab089e 220 // set XLAT to initially off
mjr 30:6e9902f06f48 221 xlat = 0;
mjr 33:d832bcab089e 222
mjr 33:d832bcab089e 223 // Assert BLANK while starting up, to keep the outputs turned off until
mjr 33:d832bcab089e 224 // everything is stable. This helps prevent spurious flashes during startup.
mjr 33:d832bcab089e 225 // (That's not particularly important for lights, but it matters more for
mjr 33:d832bcab089e 226 // tactile devices. It's a bit alarming to fire a replay knocker on every
mjr 33:d832bcab089e 227 // power-on, for example.)
mjr 30:6e9902f06f48 228 blank = 1;
mjr 30:6e9902f06f48 229
mjr 26:cb71c4af2912 230 // Configure SPI format and speed. Note that KL25Z ONLY supports 8-bit
mjr 26:cb71c4af2912 231 // mode. The TLC5940 nominally requires 12-bit data blocks for the
mjr 26:cb71c4af2912 232 // grayscale levels, but SPI is ultimately just a bit-level serial format,
mjr 26:cb71c4af2912 233 // so we can reformat the 12-bit blocks into 8-bit bytes to fit the
mjr 26:cb71c4af2912 234 // KL25Z's limits. This should work equally well on other microcontrollers
mjr 38:091e511ce8a0 235 // that are more flexible. The TLC5940 requires polarity/phase format 0.
mjr 26:cb71c4af2912 236 spi.format(8, 0);
mjr 26:cb71c4af2912 237 spi.frequency(SPI_SPEED);
mjr 33:d832bcab089e 238
mjr 33:d832bcab089e 239 // Send out a full data set to the chips, to clear out any random
mjr 33:d832bcab089e 240 // startup data from the registers. Include some extra bits - there
mjr 33:d832bcab089e 241 // are some cases (such as after sending dot correct commands) where
mjr 33:d832bcab089e 242 // an extra bit per chip is required, and the initial state is
mjr 54:fd77a6b2f76c 243 // unpredictable, so send extra bits to make sure we cover all bases.
mjr 54:fd77a6b2f76c 244 // This does no harm; extra bits just fall off the end of the daisy
mjr 54:fd77a6b2f76c 245 // chain, and since we want all registers initially set to 0, we can
mjr 33:d832bcab089e 246 // send arbitrarily many extra 0's.
mjr 33:d832bcab089e 247 for (int i = 0 ; i < nchips*25 ; ++i)
mjr 54:fd77a6b2f76c 248 spi.write(0x00);
mjr 33:d832bcab089e 249
mjr 33:d832bcab089e 250 // do an initial XLAT to latch all of these "0" values into the
mjr 33:d832bcab089e 251 // grayscale registers
mjr 33:d832bcab089e 252 xlat = 1;
mjr 33:d832bcab089e 253 xlat = 0;
mjr 29:582472d0bc57 254
mjr 55:4db125cd11a0 255 // Allocate our SPI buffer. The transfer on each cycle is 192 bits per
mjr 55:4db125cd11a0 256 // chip = 24 bytes per chip.
mjr 55:4db125cd11a0 257 spilen = nchips*24;
mjr 55:4db125cd11a0 258 spibuf = new uint8_t[spilen];
mjr 55:4db125cd11a0 259 memset(spibuf, 0x00, spilen);
mjr 30:6e9902f06f48 260
mjr 30:6e9902f06f48 261 // Configure the GSCLK output's frequency
mjr 26:cb71c4af2912 262 gsclk.period(1.0/GSCLK_SPEED);
mjr 33:d832bcab089e 263
mjr 55:4db125cd11a0 264 // we're not yet ready to send new data to the chips
mjr 55:4db125cd11a0 265 cts = false;
mjr 55:4db125cd11a0 266
mjr 55:4db125cd11a0 267 // we don't need an XLAT signal until we send data
mjr 33:d832bcab089e 268 needXlat = false;
mjr 40:cc0d9814522b 269 }
mjr 40:cc0d9814522b 270
mjr 40:cc0d9814522b 271 // Global enable/disble. When disabled, we assert the blanking signal
mjr 40:cc0d9814522b 272 // continuously to keep all outputs turned off. This can be used during
mjr 40:cc0d9814522b 273 // startup and sleep mode to prevent spurious output signals from
mjr 40:cc0d9814522b 274 // uninitialized grayscale registers. The chips have random values in
mjr 40:cc0d9814522b 275 // their internal registers when power is first applied, so we have to
mjr 40:cc0d9814522b 276 // explicitly send the initial zero levels after power cycling the chips.
mjr 40:cc0d9814522b 277 // The chips might not have power even when the KL25Z is running, because
mjr 40:cc0d9814522b 278 // they might be powered from a separate power supply from the KL25Z
mjr 40:cc0d9814522b 279 // (the Pinscape Expansion Boards work this way). Global blanking helps
mjr 40:cc0d9814522b 280 // us start up more cleanly by suppressing all outputs until we can be
mjr 40:cc0d9814522b 281 // reasonably sure that the various chip registers are initialized.
mjr 40:cc0d9814522b 282 void enable(bool f)
mjr 40:cc0d9814522b 283 {
mjr 40:cc0d9814522b 284 // note the new setting
mjr 40:cc0d9814522b 285 enabled = f;
mjr 40:cc0d9814522b 286
mjr 55:4db125cd11a0 287 // If disabled, apply blanking immediately. If enabled, do nothing
mjr 55:4db125cd11a0 288 // extra; we'll drop the blanking signal at the end of the next
mjr 55:4db125cd11a0 289 // blanking interval as normal.
mjr 40:cc0d9814522b 290 if (!f)
mjr 40:cc0d9814522b 291 {
mjr 55:4db125cd11a0 292 // disable interrupts, since the blanking interrupt writes gsclk too
mjr 55:4db125cd11a0 293 __disable_irq();
mjr 55:4db125cd11a0 294
mjr 55:4db125cd11a0 295 // turn off the GS clock and assert BLANK to turn off all outputs
mjr 40:cc0d9814522b 296 gsclk.write(0);
mjr 40:cc0d9814522b 297 blank = 1;
mjr 55:4db125cd11a0 298
mjr 55:4db125cd11a0 299 // done messing with shared data
mjr 55:4db125cd11a0 300 __enable_irq();
mjr 40:cc0d9814522b 301 }
mjr 40:cc0d9814522b 302
mjr 40:cc0d9814522b 303 }
mjr 29:582472d0bc57 304
mjr 30:6e9902f06f48 305 // Start the clock running
mjr 29:582472d0bc57 306 void start()
mjr 29:582472d0bc57 307 {
mjr 26:cb71c4af2912 308 // Set up the first call to the reset function, which asserts BLANK to
mjr 26:cb71c4af2912 309 // end the PWM cycle and handles new grayscale data output and latching.
mjr 26:cb71c4af2912 310 // The original version of this library uses a timer to call reset
mjr 26:cb71c4af2912 311 // periodically, but that approach is somewhat problematic because the
mjr 26:cb71c4af2912 312 // reset function itself takes a small amount of time to run, so the
mjr 26:cb71c4af2912 313 // *actual* cycle is slightly longer than what we get from counting
mjr 26:cb71c4af2912 314 // GS clocks. Running reset on a timer therefore causes the calls to
mjr 26:cb71c4af2912 315 // slip out of phase with the actual full cycles, which causes
mjr 26:cb71c4af2912 316 // premature blanking that shows up as visible flicker. To get the
mjr 54:fd77a6b2f76c 317 // reset cycle to line up more precisely with a full PWM cycle, it
mjr 54:fd77a6b2f76c 318 // works better to set up a new timer at the end of each cycle. That
mjr 54:fd77a6b2f76c 319 // organically accounts for the time spent in the interrupt handler.
mjr 54:fd77a6b2f76c 320 // This doesn't result in perfectly uniform timing, since interrupt
mjr 54:fd77a6b2f76c 321 // latency varies slightly on each interrupt, but it does guarantee
mjr 54:fd77a6b2f76c 322 // that the blanking will never be premature - all variation will go
mjr 54:fd77a6b2f76c 323 // into the tail end of the cycle after the 4096 GS clocks. That
mjr 54:fd77a6b2f76c 324 // might cause some brightness variation, but it won't cause flicker,
mjr 54:fd77a6b2f76c 325 // and in practice any brightness variation from this seems to be too
mjr 54:fd77a6b2f76c 326 // small to be visible.
mjr 54:fd77a6b2f76c 327 armReset();
mjr 26:cb71c4af2912 328 }
mjr 26:cb71c4af2912 329
mjr 39:b3815a1c3802 330 /*
mjr 39:b3815a1c3802 331 * Set an output
mjr 26:cb71c4af2912 332 */
mjr 26:cb71c4af2912 333 void set(int idx, unsigned short data)
mjr 26:cb71c4af2912 334 {
mjr 39:b3815a1c3802 335 // validate the index
mjr 39:b3815a1c3802 336 if (idx >= 0 && idx < nchips*16)
mjr 39:b3815a1c3802 337 {
mjr 55:4db125cd11a0 338 #if DATA_UPDATE_INSIDE_BLANKING
mjr 55:4db125cd11a0 339 // If we send data within the blanking interval, turn off interrupts while
mjr 55:4db125cd11a0 340 // modifying the buffer, since the send happens in the interrupt handler.
mjr 54:fd77a6b2f76c 341 __disable_irq();
mjr 55:4db125cd11a0 342 #endif
mjr 40:cc0d9814522b 343
mjr 55:4db125cd11a0 344 // Figure the SPI buffer location of the output we're changing. The SPI
mjr 54:fd77a6b2f76c 345 // buffer has the packed bit format that we send across the wire, with 12
mjr 54:fd77a6b2f76c 346 // bits per output, arranged from last output to first output (N = number
mjr 54:fd77a6b2f76c 347 // of outputs = nchips*16):
mjr 39:b3815a1c3802 348 //
mjr 39:b3815a1c3802 349 // byte 0 = high 8 bits of output N-1
mjr 39:b3815a1c3802 350 // 1 = low 4 bits of output N-1 | high 4 bits of output N-2
mjr 39:b3815a1c3802 351 // 2 = low 8 bits of N-2
mjr 39:b3815a1c3802 352 // 3 = high 8 bits of N-3
mjr 39:b3815a1c3802 353 // 4 = low 4 bits of N-3 | high 4 bits of N-2
mjr 39:b3815a1c3802 354 // 5 = low 8bits of N-4
mjr 39:b3815a1c3802 355 // ...
mjr 39:b3815a1c3802 356 // 24*nchips-3 = high 8 bits of output 1
mjr 39:b3815a1c3802 357 // 24*nchips-2 = low 4 bits of output 1 | high 4 bits of output 0
mjr 39:b3815a1c3802 358 // 24*nchips-1 = low 8 bits of output 0
mjr 39:b3815a1c3802 359 //
mjr 39:b3815a1c3802 360 // So this update will affect two bytes. If the output number if even, we're
mjr 39:b3815a1c3802 361 // in the high 4 + low 8 pair; if odd, we're in the high 8 + low 4 pair.
mjr 39:b3815a1c3802 362 int di = nchips*24 - 3 - (3*(idx/2));
mjr 39:b3815a1c3802 363 if (idx & 1)
mjr 39:b3815a1c3802 364 {
mjr 39:b3815a1c3802 365 // ODD = high 8 | low 4
mjr 55:4db125cd11a0 366 spibuf[di] = uint8_t((data >> 4) & 0xff);
mjr 55:4db125cd11a0 367 spibuf[di+1] &= 0x0F;
mjr 55:4db125cd11a0 368 spibuf[di+1] |= uint8_t((data << 4) & 0xf0);
mjr 39:b3815a1c3802 369 }
mjr 39:b3815a1c3802 370 else
mjr 39:b3815a1c3802 371 {
mjr 39:b3815a1c3802 372 // EVEN = high 4 | low 8
mjr 55:4db125cd11a0 373 spibuf[di+1] &= 0xF0;
mjr 55:4db125cd11a0 374 spibuf[di+1] |= uint8_t((data >> 8) & 0x0f);
mjr 55:4db125cd11a0 375 spibuf[di+2] = uint8_t(data & 0xff);
mjr 39:b3815a1c3802 376 }
mjr 55:4db125cd11a0 377
mjr 55:4db125cd11a0 378 #if DATA_UPDATE_INSIDE_BLANKING
mjr 55:4db125cd11a0 379 // re-enable interrupts
mjr 55:4db125cd11a0 380 __enable_irq();
mjr 55:4db125cd11a0 381 #endif
mjr 39:b3815a1c3802 382 }
mjr 26:cb71c4af2912 383 }
mjr 40:cc0d9814522b 384
mjr 55:4db125cd11a0 385 // Update the outputs. In our current implementation, this doesn't do
mjr 55:4db125cd11a0 386 // anything, since we send the current state to the chips on every grayscale
mjr 55:4db125cd11a0 387 // cycle, whether or not there are updates. We provide the interface for
mjr 55:4db125cd11a0 388 // consistency with other peripheral device interfaces in the main loop,
mjr 55:4db125cd11a0 389 // and in case we make any future implementation changes that require some
mjr 55:4db125cd11a0 390 // action to carry out an explicit update.
mjr 40:cc0d9814522b 391 void update(bool force = false)
mjr 40:cc0d9814522b 392 {
mjr 55:4db125cd11a0 393 }
mjr 55:4db125cd11a0 394
mjr 55:4db125cd11a0 395 // Send updates if ready. Our top-level program's main loop calls this on
mjr 55:4db125cd11a0 396 // every iteration. This lets us send grayscale updates to the chips in
mjr 55:4db125cd11a0 397 // regular application context (rather than in interrupt context), to keep
mjr 55:4db125cd11a0 398 // the time in the ISR as short as possible. We return immediately if
mjr 55:4db125cd11a0 399 // we're not within the update window or we've already sent updates for
mjr 55:4db125cd11a0 400 // the current cycle.
mjr 55:4db125cd11a0 401 void send()
mjr 55:4db125cd11a0 402 {
mjr 55:4db125cd11a0 403 // if we're in the transmission window, send the data
mjr 55:4db125cd11a0 404 if (cts)
mjr 55:4db125cd11a0 405 {
mjr 55:4db125cd11a0 406 // Write the data to the SPI port. Note that we go directly
mjr 55:4db125cd11a0 407 // to the hardware registers rather than using the mbed SPI
mjr 55:4db125cd11a0 408 // class, because this makes the operation about 50% faster.
mjr 55:4db125cd11a0 409 // The mbed class checks for input on every byte in case the
mjr 55:4db125cd11a0 410 // SPI connection is bidirectional, but for this application
mjr 55:4db125cd11a0 411 // it's strictly one-way, so we can skip checking for input
mjr 55:4db125cd11a0 412 // and just blast bits to the output register as fast as
mjr 55:4db125cd11a0 413 // it'll take them. Before writing the output register
mjr 55:4db125cd11a0 414 // ("D"), we have to check the status register ("S") and see
mjr 55:4db125cd11a0 415 // that the Transmit Empty Flag (SPTEF) is set. The
mjr 55:4db125cd11a0 416 // procedure is: spin until SPTEF s set in "S", write the
mjr 55:4db125cd11a0 417 // next byte to "D", loop until out of bytes.
mjr 55:4db125cd11a0 418 uint8_t *p = spibuf;
mjr 55:4db125cd11a0 419 for (int i = spilen ; i > 0 ; --i) {
mjr 55:4db125cd11a0 420 while (!(SPI0->S & SPI_S_SPTEF_MASK)) ;
mjr 55:4db125cd11a0 421 SPI0->D = *p++;
mjr 55:4db125cd11a0 422 }
mjr 55:4db125cd11a0 423
mjr 55:4db125cd11a0 424 // we've sent new data, so we need an XLAT signal to latch it
mjr 55:4db125cd11a0 425 needXlat = true;
mjr 55:4db125cd11a0 426
mjr 55:4db125cd11a0 427 // done - we don't need to send again until the next GS cycle
mjr 55:4db125cd11a0 428 cts = false;
mjr 55:4db125cd11a0 429 }
mjr 40:cc0d9814522b 430 }
mjr 26:cb71c4af2912 431
mjr 26:cb71c4af2912 432 private:
mjr 55:4db125cd11a0 433 // SPI port. This is master mode, output only, so we only assign the MOSI
mjr 55:4db125cd11a0 434 // and SCK pins.
mjr 55:4db125cd11a0 435 SPI spi;
mjr 30:6e9902f06f48 436
mjr 55:4db125cd11a0 437 // SPI transfer buffer. This contains the live grayscale data, formatted
mjr 55:4db125cd11a0 438 // for direct transmission to the TLC5940 chips via SPI.
mjr 55:4db125cd11a0 439 uint8_t *volatile spibuf;
mjr 40:cc0d9814522b 440
mjr 55:4db125cd11a0 441 // Length of the SPI buffer in bytes. The native data format of the chips
mjr 55:4db125cd11a0 442 // is 12 bits per output = 1.5 bytes. There are 16 outputs per chip, which
mjr 55:4db125cd11a0 443 // comes to 192 bits == 24 bytes per chip.
mjr 55:4db125cd11a0 444 uint16_t spilen;
mjr 40:cc0d9814522b 445
mjr 40:cc0d9814522b 446 // Dirty: true means that the non-live buffer has new pending data. False means
mjr 40:cc0d9814522b 447 // that the non-live buffer is empty.
mjr 54:fd77a6b2f76c 448 volatile bool dirty;
mjr 54:fd77a6b2f76c 449
mjr 40:cc0d9814522b 450 // Enabled: this enables or disables all outputs. When this is true, we assert the
mjr 40:cc0d9814522b 451 // BLANK signal continuously.
mjr 40:cc0d9814522b 452 bool enabled;
mjr 30:6e9902f06f48 453
mjr 26:cb71c4af2912 454 // use a PWM out for the grayscale clock - this provides a stable
mjr 26:cb71c4af2912 455 // square wave signal without consuming CPU
mjr 54:fd77a6b2f76c 456 FastPWM gsclk;
mjr 26:cb71c4af2912 457
mjr 26:cb71c4af2912 458 // Digital out pins used for the TLC5940
mjr 26:cb71c4af2912 459 DigitalOut blank;
mjr 26:cb71c4af2912 460 DigitalOut xlat;
mjr 26:cb71c4af2912 461
mjr 26:cb71c4af2912 462 // number of daisy-chained TLC5940s we're controlling
mjr 26:cb71c4af2912 463 int nchips;
mjr 26:cb71c4af2912 464
mjr 26:cb71c4af2912 465 // Timeout to end each PWM cycle. This is a one-shot timer that we reset
mjr 26:cb71c4af2912 466 // on each cycle.
mjr 38:091e511ce8a0 467 Timeout resetTimer;
mjr 26:cb71c4af2912 468
mjr 55:4db125cd11a0 469 // Timeout to end the data window for the PWM cycle.
mjr 55:4db125cd11a0 470 Timeout windowTimer;
mjr 55:4db125cd11a0 471
mjr 55:4db125cd11a0 472 // "Clear To Send" flag:
mjr 55:4db125cd11a0 473 volatile bool cts;
mjr 55:4db125cd11a0 474
mjr 33:d832bcab089e 475 // Do we need an XLAT signal on the next blanking interval?
mjr 33:d832bcab089e 476 volatile bool needXlat;
mjr 55:4db125cd11a0 477
mjr 40:cc0d9814522b 478 // Reset the grayscale cycle and send the next data update
mjr 26:cb71c4af2912 479 void reset()
mjr 26:cb71c4af2912 480 {
mjr 30:6e9902f06f48 481 // start the blanking cycle
mjr 30:6e9902f06f48 482 startBlank();
mjr 33:d832bcab089e 483
mjr 55:4db125cd11a0 484 // we're now clear to send the new GS data
mjr 55:4db125cd11a0 485 cts = true;
mjr 55:4db125cd11a0 486
mjr 55:4db125cd11a0 487 #if DATA_UPDATE_INSIDE_BLANKING
mjr 55:4db125cd11a0 488 // We're configured to send the new GS data inline during each
mjr 55:4db125cd11a0 489 // blanking cycle. Send it now.
mjr 55:4db125cd11a0 490 send();
mjr 55:4db125cd11a0 491 #else
mjr 55:4db125cd11a0 492 // We're configured to send GS data during the GS cycle. This means
mjr 55:4db125cd11a0 493 // we can defer the GS data transmission to any point within the next
mjr 55:4db125cd11a0 494 // GS cycle, which will last about 12ms (assuming a 350kHz GS clock).
mjr 55:4db125cd11a0 495 // That's a ton of time given that our GS transmission only takes about
mjr 55:4db125cd11a0 496 // 100us. With such a leisurely time window to work with, we can move
mjr 55:4db125cd11a0 497 // the transmission out of the ISR context and into regular application
mjr 55:4db125cd11a0 498 // context, which is good because it greatly reduces the time we spend
mjr 55:4db125cd11a0 499 // in this ISR, which is good in turn because more ISR time means more
mjr 55:4db125cd11a0 500 // latency for other interrupts and more chances to miss interrupts
mjr 55:4db125cd11a0 501 // entirely.
mjr 33:d832bcab089e 502 //
mjr 55:4db125cd11a0 503 // The mechanism for deferring the transmission to application context
mjr 55:4db125cd11a0 504 // is simple. The main program loop periodically polls the "cts" flag
mjr 55:4db125cd11a0 505 // and transmits the data if it finds "cts" set. To conform to the
mjr 55:4db125cd11a0 506 // hardware spec for the TLC5940 chips, the data transmission has to
mjr 55:4db125cd11a0 507 // finish before the next blanking interval. This means our time
mjr 55:4db125cd11a0 508 // window to do the transmission is the 12ms of the grayscale cycle
mjr 55:4db125cd11a0 509 // minus the ~100us to do the transmission. So basically 12ms.
mjr 55:4db125cd11a0 510 // Timing is never exact on the KL25Z, though, so we should build in
mjr 55:4db125cd11a0 511 // a little margin for error. To be conservative, we'll say that the
mjr 55:4db125cd11a0 512 // update must begin within the first 2/3 of the grayscale cycle time.
mjr 55:4db125cd11a0 513 // That's an 8ms window, and leaves a 4ms margin of error. It's
mjr 55:4db125cd11a0 514 // almost inconceivable that any of the timing factors would be
mjr 55:4db125cd11a0 515 // outside of those bounds.
mjr 55:4db125cd11a0 516 //
mjr 55:4db125cd11a0 517 // To coordinate this 2/3-of-a-cycle window with the main loop, set
mjr 55:4db125cd11a0 518 // up a timeout to clear the "cts" flag 2/3 into the cycle time. If
mjr 55:4db125cd11a0 519 // for some reason the main loop doesn't do the transmission before
mjr 55:4db125cd11a0 520 // this timer fires, it'll see the "cts" flag turned off and won't
mjr 55:4db125cd11a0 521 // attempt the transmission on this round. (That should essentially
mjr 55:4db125cd11a0 522 // never happen, but it wouldn't be a problem if it happened even with
mjr 55:4db125cd11a0 523 // some regularity, because we'd just transmit the data on the next
mjr 55:4db125cd11a0 524 // cycle. Human users won't notice such a delay.)
mjr 55:4db125cd11a0 525 windowTimer.attach(this, &TLC5940::closeSendWindow,
mjr 55:4db125cd11a0 526 (1.0/GSCLK_SPEED)*4096.0*2.0/3.0);
mjr 48:058ace2aed1d 527 #endif
mjr 48:058ace2aed1d 528
mjr 55:4db125cd11a0 529 // end the blanking interval
mjr 55:4db125cd11a0 530 endBlank();
mjr 54:fd77a6b2f76c 531
mjr 55:4db125cd11a0 532 // re-arm the reset handler for the next blanking interval
mjr 54:fd77a6b2f76c 533 armReset();
mjr 54:fd77a6b2f76c 534 }
mjr 55:4db125cd11a0 535
mjr 55:4db125cd11a0 536 // End the data-send window. This is a timeout routine that fires halfway
mjr 55:4db125cd11a0 537 // through each grayscale cycle. The TLC5940 chips allow new data to be
mjr 55:4db125cd11a0 538 // sent at any time during the grayscale pulse cycle, but the transmission
mjr 55:4db125cd11a0 539 // has to fit into this window. We do these transmissions from the main loop,
mjr 55:4db125cd11a0 540 // so that they happen in application context rather than interrupt context,
mjr 55:4db125cd11a0 541 // but this means that we have to synchronize the main loop activity to the
mjr 55:4db125cd11a0 542 // grayscale timer cycle. To make sure the transmission is done before the
mjr 55:4db125cd11a0 543 // next grayscale cycle ends, we only allow the transmission to start for
mjr 55:4db125cd11a0 544 // the first 2/3 of the cycle. This gives us plenty of time to send the
mjr 55:4db125cd11a0 545 // data and plenty of padding to make sure we don't go too late. Consider
mjr 55:4db125cd11a0 546 // the relative time periods: we run the grayscale clock at 350kHz, and each
mjr 55:4db125cd11a0 547 // grayscale cycle has 4096 steps, so each cycle takes 11.7ms. For the
mjr 55:4db125cd11a0 548 // typical Expansion Board setup with 4 TLC5940 chips, we have 768 bits
mjr 55:4db125cd11a0 549 // to send via SPI at 28 MHz, which nominally takes 27us. The actual
mjr 55:4db125cd11a0 550 // measured time to send 768 bits via send() is 72us, so there's CPU overhead
mjr 55:4db125cd11a0 551 // of about 2.6x. The biggest workable Expnasion Board setup would probably
mjr 55:4db125cd11a0 552 // be around 8 TLC chips, so we'd have twice the bits and twice the
mjr 55:4db125cd11a0 553 // transmission time of our 4-chip scenario, so the send time would be
mjr 55:4db125cd11a0 554 // about 150us. 2/3 of the grayscale cycle gives us an 8ms window to
mjr 55:4db125cd11a0 555 // perform a 150us operation. The main loop runs about every 1.5ms, so
mjr 55:4db125cd11a0 556 // we're all but certain to poll CTS more than once during each 8ms window.
mjr 55:4db125cd11a0 557 // Even if we start at the very end of the window, we still have about 3.5ms
mjr 55:4db125cd11a0 558 // to finish a <150us operation, so we're all but certain to finish in time.
mjr 55:4db125cd11a0 559 void closeSendWindow()
mjr 55:4db125cd11a0 560 {
mjr 55:4db125cd11a0 561 cts = false;
mjr 55:4db125cd11a0 562 }
mjr 55:4db125cd11a0 563
mjr 54:fd77a6b2f76c 564 // arm the reset handler - this fires at the end of each GS cycle
mjr 54:fd77a6b2f76c 565 void armReset()
mjr 54:fd77a6b2f76c 566 {
mjr 54:fd77a6b2f76c 567 resetTimer.attach(this, &TLC5940::reset, (1.0/GSCLK_SPEED)*4096.0);
mjr 30:6e9902f06f48 568 }
mjr 30:6e9902f06f48 569
mjr 30:6e9902f06f48 570 void startBlank()
mjr 30:6e9902f06f48 571 {
mjr 30:6e9902f06f48 572 // turn off the grayscale clock, and assert BLANK to end the grayscale cycle
mjr 30:6e9902f06f48 573 gsclk.write(0);
mjr 54:fd77a6b2f76c 574 blank = (enabled ? 1 : 0); // for the slight delay (20ns) required after GSCLK goes low
mjr 30:6e9902f06f48 575 blank = 1;
mjr 30:6e9902f06f48 576 }
mjr 26:cb71c4af2912 577
mjr 33:d832bcab089e 578 void endBlank()
mjr 30:6e9902f06f48 579 {
mjr 33:d832bcab089e 580 // if we've sent new grayscale data since the last blanking
mjr 33:d832bcab089e 581 // interval, latch it by asserting XLAT
mjr 33:d832bcab089e 582 if (needXlat)
mjr 30:6e9902f06f48 583 {
mjr 26:cb71c4af2912 584 // latch the new data while we're still blanked
mjr 26:cb71c4af2912 585 xlat = 1;
mjr 26:cb71c4af2912 586 xlat = 0;
mjr 33:d832bcab089e 587 needXlat = false;
mjr 26:cb71c4af2912 588 }
mjr 26:cb71c4af2912 589
mjr 40:cc0d9814522b 590 // End the blanking interval and restart the grayscale clock. Note
mjr 40:cc0d9814522b 591 // that we keep the blanking on if the chips are globally disabled.
mjr 54:fd77a6b2f76c 592 if (enabled)
mjr 54:fd77a6b2f76c 593 {
mjr 54:fd77a6b2f76c 594 blank = 0;
mjr 54:fd77a6b2f76c 595 gsclk.write(.5);
mjr 54:fd77a6b2f76c 596 }
mjr 26:cb71c4af2912 597 }
mjr 26:cb71c4af2912 598 };
mjr 26:cb71c4af2912 599
mjr 26:cb71c4af2912 600 #endif