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stm32_bluenrg_ble_dma_lp.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32_bluenrg_ble_dma_lp.h 00004 * @author CL 00005 * @version V1.0.0 00006 * @date 04-July-2014 00007 * @brief 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32_BLUENRG_BLE_DMA_LP_H 00040 #define __STM32_BLUENRG_BLE_DMA_LP_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #ifdef USE_STM32F4XX_NUCLEO 00048 #include "stm32f4xx_hal.h" 00049 #include "stm32f4xx_nucleo.h" 00050 #include "stm32f4xx_nucleo_bluenrg_dma_lp.h" 00051 #include "stm32f4xx_hal_bluenrg_gpio.h" 00052 #include "stm32f4xx_hal_bluenrg_spi.h" 00053 #include "stm32f4xx_hal_bluenrg_dma.h" 00054 #endif /* USE_STM32F4XX_NUCLEO */ 00055 00056 #ifdef USE_STM32L0XX_NUCLEO 00057 #include "stm32l0xx_hal.h" 00058 #include "stm32l0xx_nucleo.h" 00059 #include "stm32l0xx_nucleo_bluenrg_dma_lp.h" 00060 #include "stm32l0xx_hal_bluenrg_gpio.h" 00061 #include "stm32l0xx_hal_bluenrg_spi.h" 00062 #include "stm32l0xx_hal_bluenrg_dma.h" 00063 #endif /* USE_STM32L0XX_NUCLEO */ 00064 00065 #include "stm32xx_lpm.h" 00066 #include "stm32xx_timerserver.h" 00067 00068 /** @addtogroup BSP 00069 * @{ 00070 */ 00071 00072 /** @addtogroup X-NUCLEO-IDB04A1 00073 * @{ 00074 */ 00075 00076 /** @addtogroup STM32_BLUENRG_BLE_DMA_LP 00077 * @{ 00078 */ 00079 00080 /** @defgroup STM32_BLUENRG_BLE_DMA_LP_Exported_Constants 00081 * @{ 00082 */ 00083 00084 #define SPI_END_RECEIVE_FIX 1 /**< Need some delay after receiving an event to prevent dummy read */ 00085 00086 /** 00087 * All timeout below are given in term of Ticks of the TimerServer. 00088 * The tick of the timerserver depends on the LPO clock used as input and the 00089 * prescaler of the wakeup timer. 00090 * In order to get the most efficient implementation, the wakeuptimer prescaler should divide 00091 * the input clock by 2 00092 * 00093 * The values below are based on the LSI clock @37Kz. 00094 * For this, the tick is 54us 00095 */ 00096 #define SPI_FIX_TIMEOUT 2 /**< 150 us - Note: 2 ticks result into more than 2*54us due to some inaccuracies and latencies */ 00097 #define SPI_TX_TIMEOUT 3 /**< Value to be tuned to prevent trying to send a command to BlueNRG if it is not yet woken up */ 00098 #define SPI_END_RECEIVE_FIX_TIMEOUT 2 00099 #define BLUENRG_HOLD_TIME_IN_RESET 1 00100 #define BLUENRG_HOLD_TIME_AFTER_RESET 93 /**< 5ms */ 00101 00102 /** 00103 * When the SPI does not have any FIFO (STM32L0, etc...), this parameter should be set to 1 00104 * When the SPI does have a FIFO, this parameter shall be set to the size of the FIFO in bytes (STM32L4 = 4) 00105 */ 00106 #define SPI_FIFO_RX_DEPTH 1 00107 00108 /** 00109 * @} 00110 */ 00111 00112 /** @defgroup STM32_BLUENRG_BLE_DMA_LP_Exported_Functions 00113 * @{ 00114 */ 00115 // FIXME: add prototypes for BlueNRG here 00116 void BNRG_SPI_Close(void); 00117 void BNRG_SPI_Init(void); 00118 void BlueNRG_RST(void); 00119 void BlueNRG_SPI_Write(uint8_t* header_data, 00120 uint8_t* payload_data, 00121 uint8_t header_size, 00122 uint8_t payload_size); 00123 void BlueNRG_SPI_Request_Events(uint8_t *buffer, uint8_t buff_size); 00124 void BlueNRG_DMA_RxCallback(void); 00125 void BlueNRG_DMA_TxCallback(void); 00126 void BlueNRG_SPI_IRQ_Callback(void); 00127 void BNRG_MSP_SPI_Init(SPI_HandleTypeDef * hspi); 00128 00129 /** 00130 * @} 00131 */ 00132 00133 /** 00134 * @} 00135 */ 00136 00137 /** 00138 * @} 00139 */ 00140 00141 /** 00142 * @} 00143 */ 00144 00145 #ifdef __cplusplus 00146 } 00147 #endif 00148 00149 #endif /* __STM32_BLUENRG_BLE_DMA_LP_H */ 00150 00151 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00152
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