minicube.net . / mbed-src-LPC1114FN28

Fork of mbed-src file paths change. LPC1114FN28 use only.

Fork of mbed-src by mbed official

Information

この情報は2013/10/28時点での解決方法です。
現在はmbed-src、標準ライブラリで問題なくコンパイルが可能です。

・使う物
LPC1114FN28
mbed SDK

LPC1114FN28でmbed-SDKのLibraryを使うとCompile出来ない。（2013/10/28） /media/uploads/minicube/mbed_lpc1114_sdk.png

パスが通ってないだけのようなのでファイルを以下に移動する。

mbed-src\targets\cmsis\TARGET_NXP\TARGET_LPC11XX_11CXX\
mbed-src\targets\cmsis\TARGET_NXP\TARGET_LPC11XX_11CXX\TARGET_LPC11XX\

にあるファイルをすべて

mbed-src\targets\cmsis\TARGET_NXP\

へ移動

mbed-src\targets\cmsis\TARGET_NXP\TARGET_LPC11XX_11CXX\にある

TOOLCHAIN_ARM_MICRO

をフォルダごと

mbed-src\targets\cmsis\TARGET_NXP\

へ移動

mbed-src\targets\hal\TARGET_NXP\TARGET_LPC11XX_11CXX\
mbed-src\targets\hal\TARGET_NXP\TARGET_LPC11XX_11CXX\TARGET_LPC11XX\

にあるファイルをすべて

mbed-src\targets\hal\TARGET_NXP\

へ移動

移動後は以下のような構成になると思います。
※不要なファイルは削除してあります。

/media/uploads/minicube/mbed_lpc1114_sdk_tree.png


ファイルの移動が面倒なので以下に本家からフォークしたライブラリを置いておきます。

Import librarymbed-src-LPC1114FN28

Fork of mbed-src file paths change. LPC1114FN28 use only.

Last commit 27 Oct 2013 by minicube.net .


エラーが出力される場合

"TOOLCHAIN_ARM_MICRO"が無いとエラーになる。

Error: Undefined symbol _initial_sp (referred from entry2.o).
Error: Undefined symbol _heap_base (referred from malloc.o).
Error: Undefined symbol _heap_limit (referred from malloc.o).

LPC1114FN28はMicrolibを使ってCompileされるため上記のエラーになるようです。

targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_IAR/startup_LPC17xx.s@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/NXP/LPC1768/cmsis/IAR/startup_LPC17xx.s@10:3bc89ef62ce7 
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 ;/*****************************************************************************
emilmont 10:3bc89ef62ce7 2 ; * @file: startup_LPC17xx.s
emilmont 10:3bc89ef62ce7 3 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
emilmont 10:3bc89ef62ce7 4 ; * for the NXP LPC17xx Device Series
emilmont 10:3bc89ef62ce7 5 ; * @version: V1.03
emilmont 10:3bc89ef62ce7 6 ; * @date: 09. February 2010
emilmont 10:3bc89ef62ce7 7 ; *----------------------------------------------------------------------------
emilmont 10:3bc89ef62ce7 8 ; *
emilmont 10:3bc89ef62ce7 9 ; * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 10:3bc89ef62ce7 10 ; *
emilmont 10:3bc89ef62ce7 11 ; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
emilmont 10:3bc89ef62ce7 12 ; * processor based microcontrollers. This file can be freely distributed
emilmont 10:3bc89ef62ce7 13 ; * within development tools that are supporting such ARM based processors.
emilmont 10:3bc89ef62ce7 14 ; *
emilmont 10:3bc89ef62ce7 15 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
emilmont 10:3bc89ef62ce7 16 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
emilmont 10:3bc89ef62ce7 17 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
emilmont 10:3bc89ef62ce7 18 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
emilmont 10:3bc89ef62ce7 19 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
emilmont 10:3bc89ef62ce7 20 ; *
emilmont 10:3bc89ef62ce7 21 ; ******************************************************************************/
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 ;
emilmont 10:3bc89ef62ce7 25 ; The modules in this file are included in the libraries, and may be replaced
emilmont 10:3bc89ef62ce7 26 ; by any user-defined modules that define the PUBLIC symbol _program_start or
emilmont 10:3bc89ef62ce7 27 ; a user defined start symbol.
emilmont 10:3bc89ef62ce7 28 ; To override the cstartup defined in the library, simply add your modified
emilmont 10:3bc89ef62ce7 29 ; version to the workbench project.
emilmont 10:3bc89ef62ce7 30 ;
emilmont 10:3bc89ef62ce7 31 ; The vector table is normally located at address 0.
emilmont 10:3bc89ef62ce7 32 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
emilmont 10:3bc89ef62ce7 33 ; The name "__vector_table" has special meaning for C-SPY:
emilmont 10:3bc89ef62ce7 34 ; it is where the SP start value is found, and the NVIC vector
emilmont 10:3bc89ef62ce7 35 ; table register (VTOR) is initialized to this address if != 0.
emilmont 10:3bc89ef62ce7 36 ;
emilmont 10:3bc89ef62ce7 37 ; Cortex-M version
emilmont 10:3bc89ef62ce7 38 ;
emilmont 10:3bc89ef62ce7 39
emilmont 10:3bc89ef62ce7 40 MODULE ?cstartup
emilmont 10:3bc89ef62ce7 41
emilmont 10:3bc89ef62ce7 42 ;; Forward declaration of sections.
emilmont 10:3bc89ef62ce7 43 SECTION CSTACK:DATA:NOROOT(3)
emilmont 10:3bc89ef62ce7 44
emilmont 10:3bc89ef62ce7 45 SECTION .intvec:CODE:NOROOT(2)
emilmont 10:3bc89ef62ce7 46
emilmont 10:3bc89ef62ce7 47 EXTERN __iar_program_start
emilmont 10:3bc89ef62ce7 48 EXTERN SystemInit
emilmont 10:3bc89ef62ce7 49 PUBLIC __vector_table
emilmont 10:3bc89ef62ce7 50 PUBLIC __vector_table_0x1c
emilmont 10:3bc89ef62ce7 51 PUBLIC __Vectors
emilmont 10:3bc89ef62ce7 52 PUBLIC __Vectors_End
emilmont 10:3bc89ef62ce7 53 PUBLIC __Vectors_Size
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 DATA
emilmont 10:3bc89ef62ce7 56
emilmont 10:3bc89ef62ce7 57 __vector_table
emilmont 10:3bc89ef62ce7 58 DCD sfe(CSTACK)
emilmont 10:3bc89ef62ce7 59 DCD Reset_Handler
emilmont 10:3bc89ef62ce7 60
emilmont 10:3bc89ef62ce7 61 DCD NMI_Handler
emilmont 10:3bc89ef62ce7 62 DCD HardFault_Handler
emilmont 10:3bc89ef62ce7 63 DCD MemManage_Handler
emilmont 10:3bc89ef62ce7 64 DCD BusFault_Handler
emilmont 10:3bc89ef62ce7 65 DCD UsageFault_Handler
emilmont 10:3bc89ef62ce7 66 __vector_table_0x1c
emilmont 10:3bc89ef62ce7 67 DCD 0
emilmont 10:3bc89ef62ce7 68 DCD 0
emilmont 10:3bc89ef62ce7 69 DCD 0
emilmont 10:3bc89ef62ce7 70 DCD 0
emilmont 10:3bc89ef62ce7 71 DCD SVC_Handler
emilmont 10:3bc89ef62ce7 72 DCD DebugMon_Handler
emilmont 10:3bc89ef62ce7 73 DCD 0
emilmont 10:3bc89ef62ce7 74 DCD PendSV_Handler
emilmont 10:3bc89ef62ce7 75 DCD SysTick_Handler
emilmont 10:3bc89ef62ce7 76
emilmont 10:3bc89ef62ce7 77 ; External Interrupts
emilmont 10:3bc89ef62ce7 78 DCD WDT_IRQHandler ; 16: Watchdog Timer
emilmont 10:3bc89ef62ce7 79 DCD TIMER0_IRQHandler ; 17: Timer0
emilmont 10:3bc89ef62ce7 80 DCD TIMER1_IRQHandler ; 18: Timer1
emilmont 10:3bc89ef62ce7 81 DCD TIMER2_IRQHandler ; 19: Timer2
emilmont 10:3bc89ef62ce7 82 DCD TIMER3_IRQHandler ; 20: Timer3
emilmont 10:3bc89ef62ce7 83 DCD UART0_IRQHandler ; 21: UART0
emilmont 10:3bc89ef62ce7 84 DCD UART1_IRQHandler ; 22: UART1
emilmont 10:3bc89ef62ce7 85 DCD UART2_IRQHandler ; 23: UART2
emilmont 10:3bc89ef62ce7 86 DCD UART3_IRQHandler ; 24: UART3
emilmont 10:3bc89ef62ce7 87 DCD PWM1_IRQHandler ; 25: PWM1
emilmont 10:3bc89ef62ce7 88 DCD I2C0_IRQHandler ; 26: I2C0
emilmont 10:3bc89ef62ce7 89 DCD I2C1_IRQHandler ; 27: I2C1
emilmont 10:3bc89ef62ce7 90 DCD I2C2_IRQHandler ; 28: I2C2
emilmont 10:3bc89ef62ce7 91 DCD SPI_IRQHandler ; 29: SPI
emilmont 10:3bc89ef62ce7 92 DCD SSP0_IRQHandler ; 30: SSP0
emilmont 10:3bc89ef62ce7 93 DCD SSP1_IRQHandler ; 31: SSP1
emilmont 10:3bc89ef62ce7 94 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
emilmont 10:3bc89ef62ce7 95 DCD RTC_IRQHandler ; 33: Real Time Clock
emilmont 10:3bc89ef62ce7 96 DCD EINT0_IRQHandler ; 34: External Interrupt 0
emilmont 10:3bc89ef62ce7 97 DCD EINT1_IRQHandler ; 35: External Interrupt 1
emilmont 10:3bc89ef62ce7 98 DCD EINT2_IRQHandler ; 36: External Interrupt 2
emilmont 10:3bc89ef62ce7 99 DCD EINT3_IRQHandler ; 37: External Interrupt 3
emilmont 10:3bc89ef62ce7 100 DCD ADC_IRQHandler ; 38: A/D Converter
emilmont 10:3bc89ef62ce7 101 DCD BOD_IRQHandler ; 39: Brown-Out Detect
emilmont 10:3bc89ef62ce7 102 DCD USB_IRQHandler ; 40: USB
emilmont 10:3bc89ef62ce7 103 DCD CAN_IRQHandler ; 41: CAN
emilmont 10:3bc89ef62ce7 104 DCD DMA_IRQHandler ; 42: General Purpose DMA
emilmont 10:3bc89ef62ce7 105 DCD I2S_IRQHandler ; 43: I2S
emilmont 10:3bc89ef62ce7 106 DCD ENET_IRQHandler ; 44: Ethernet
emilmont 10:3bc89ef62ce7 107 DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
emilmont 10:3bc89ef62ce7 108 DCD MCPWM_IRQHandler ; 46: Motor Control PWM
emilmont 10:3bc89ef62ce7 109 DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
emilmont 10:3bc89ef62ce7 110 DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
emilmont 10:3bc89ef62ce7 111 DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt
emilmont 10:3bc89ef62ce7 112 DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt
emilmont 10:3bc89ef62ce7 113 __Vectors_End
emilmont 10:3bc89ef62ce7 114
emilmont 10:3bc89ef62ce7 115 __Vectors EQU __vector_table
emilmont 10:3bc89ef62ce7 116 __Vectors_Size EQU __Vectors_End - __Vectors
emilmont 10:3bc89ef62ce7 117
emilmont 10:3bc89ef62ce7 118
emilmont 10:3bc89ef62ce7 119 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
emilmont 10:3bc89ef62ce7 120 ;;
emilmont 10:3bc89ef62ce7 121 ;; Default interrupt handlers.
emilmont 10:3bc89ef62ce7 122 ;;
emilmont 10:3bc89ef62ce7 123 THUMB
emilmont 10:3bc89ef62ce7 124
emilmont 10:3bc89ef62ce7 125 PUBWEAK Reset_Handler
emilmont 10:3bc89ef62ce7 126 SECTION .text:CODE:REORDER(2)
emilmont 10:3bc89ef62ce7 127 Reset_Handler
emilmont 10:3bc89ef62ce7 128 LDR R0, =SystemInit
emilmont 10:3bc89ef62ce7 129 BLX R0
emilmont 10:3bc89ef62ce7 130 LDR R0, =__iar_program_start
emilmont 10:3bc89ef62ce7 131 BX R0
emilmont 10:3bc89ef62ce7 132
emilmont 10:3bc89ef62ce7 133 PUBWEAK NMI_Handler
emilmont 10:3bc89ef62ce7 134 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 135 NMI_Handler
emilmont 10:3bc89ef62ce7 136 B NMI_Handler
emilmont 10:3bc89ef62ce7 137
emilmont 10:3bc89ef62ce7 138 PUBWEAK HardFault_Handler
emilmont 10:3bc89ef62ce7 139 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 140 HardFault_Handler
emilmont 10:3bc89ef62ce7 141 B HardFault_Handler
emilmont 10:3bc89ef62ce7 142
emilmont 10:3bc89ef62ce7 143 PUBWEAK MemManage_Handler
emilmont 10:3bc89ef62ce7 144 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 145 MemManage_Handler
emilmont 10:3bc89ef62ce7 146 B MemManage_Handler
emilmont 10:3bc89ef62ce7 147
emilmont 10:3bc89ef62ce7 148 PUBWEAK BusFault_Handler
emilmont 10:3bc89ef62ce7 149 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 150 BusFault_Handler
emilmont 10:3bc89ef62ce7 151 B BusFault_Handler
emilmont 10:3bc89ef62ce7 152
emilmont 10:3bc89ef62ce7 153 PUBWEAK UsageFault_Handler
emilmont 10:3bc89ef62ce7 154 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 155 UsageFault_Handler
emilmont 10:3bc89ef62ce7 156 B UsageFault_Handler
emilmont 10:3bc89ef62ce7 157
emilmont 10:3bc89ef62ce7 158 PUBWEAK SVC_Handler
emilmont 10:3bc89ef62ce7 159 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 160 SVC_Handler
emilmont 10:3bc89ef62ce7 161 B SVC_Handler
emilmont 10:3bc89ef62ce7 162
emilmont 10:3bc89ef62ce7 163 PUBWEAK DebugMon_Handler
emilmont 10:3bc89ef62ce7 164 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 165 DebugMon_Handler
emilmont 10:3bc89ef62ce7 166 B DebugMon_Handler
emilmont 10:3bc89ef62ce7 167
emilmont 10:3bc89ef62ce7 168 PUBWEAK PendSV_Handler
emilmont 10:3bc89ef62ce7 169 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 170 PendSV_Handler
emilmont 10:3bc89ef62ce7 171 B PendSV_Handler
emilmont 10:3bc89ef62ce7 172
emilmont 10:3bc89ef62ce7 173 PUBWEAK SysTick_Handler
emilmont 10:3bc89ef62ce7 174 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 175 SysTick_Handler
emilmont 10:3bc89ef62ce7 176 B SysTick_Handler
emilmont 10:3bc89ef62ce7 177
emilmont 10:3bc89ef62ce7 178 PUBWEAK WDT_IRQHandler
emilmont 10:3bc89ef62ce7 179 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 180 WDT_IRQHandler
emilmont 10:3bc89ef62ce7 181 B WDT_IRQHandler
emilmont 10:3bc89ef62ce7 182
emilmont 10:3bc89ef62ce7 183 PUBWEAK TIMER0_IRQHandler
emilmont 10:3bc89ef62ce7 184 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 185 TIMER0_IRQHandler
emilmont 10:3bc89ef62ce7 186 B TIMER0_IRQHandler
emilmont 10:3bc89ef62ce7 187
emilmont 10:3bc89ef62ce7 188 PUBWEAK TIMER1_IRQHandler
emilmont 10:3bc89ef62ce7 189 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 190 TIMER1_IRQHandler
emilmont 10:3bc89ef62ce7 191 B TIMER1_IRQHandler
emilmont 10:3bc89ef62ce7 192
emilmont 10:3bc89ef62ce7 193 PUBWEAK TIMER2_IRQHandler
emilmont 10:3bc89ef62ce7 194 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 195 TIMER2_IRQHandler
emilmont 10:3bc89ef62ce7 196 B TIMER2_IRQHandler
emilmont 10:3bc89ef62ce7 197
emilmont 10:3bc89ef62ce7 198 PUBWEAK TIMER3_IRQHandler
emilmont 10:3bc89ef62ce7 199 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 200 TIMER3_IRQHandler
emilmont 10:3bc89ef62ce7 201 B TIMER3_IRQHandler
emilmont 10:3bc89ef62ce7 202
emilmont 10:3bc89ef62ce7 203 PUBWEAK UART0_IRQHandler
emilmont 10:3bc89ef62ce7 204 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 205 UART0_IRQHandler
emilmont 10:3bc89ef62ce7 206 B UART0_IRQHandler
emilmont 10:3bc89ef62ce7 207
emilmont 10:3bc89ef62ce7 208 PUBWEAK UART1_IRQHandler
emilmont 10:3bc89ef62ce7 209 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 210 UART1_IRQHandler
emilmont 10:3bc89ef62ce7 211 B UART1_IRQHandler
emilmont 10:3bc89ef62ce7 212
emilmont 10:3bc89ef62ce7 213 PUBWEAK UART2_IRQHandler
emilmont 10:3bc89ef62ce7 214 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 215 UART2_IRQHandler
emilmont 10:3bc89ef62ce7 216 B UART2_IRQHandler
emilmont 10:3bc89ef62ce7 217
emilmont 10:3bc89ef62ce7 218 PUBWEAK UART3_IRQHandler
emilmont 10:3bc89ef62ce7 219 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 220 UART3_IRQHandler
emilmont 10:3bc89ef62ce7 221 B UART3_IRQHandler
emilmont 10:3bc89ef62ce7 222
emilmont 10:3bc89ef62ce7 223 PUBWEAK PWM1_IRQHandler
emilmont 10:3bc89ef62ce7 224 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 225 PWM1_IRQHandler
emilmont 10:3bc89ef62ce7 226 B PWM1_IRQHandler
emilmont 10:3bc89ef62ce7 227
emilmont 10:3bc89ef62ce7 228 PUBWEAK I2C0_IRQHandler
emilmont 10:3bc89ef62ce7 229 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 230 I2C0_IRQHandler
emilmont 10:3bc89ef62ce7 231 B I2C0_IRQHandler
emilmont 10:3bc89ef62ce7 232
emilmont 10:3bc89ef62ce7 233 PUBWEAK I2C1_IRQHandler
emilmont 10:3bc89ef62ce7 234 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 235 I2C1_IRQHandler
emilmont 10:3bc89ef62ce7 236 B I2C1_IRQHandler
emilmont 10:3bc89ef62ce7 237
emilmont 10:3bc89ef62ce7 238 PUBWEAK I2C2_IRQHandler
emilmont 10:3bc89ef62ce7 239 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 240 I2C2_IRQHandler
emilmont 10:3bc89ef62ce7 241 B I2C2_IRQHandler
emilmont 10:3bc89ef62ce7 242
emilmont 10:3bc89ef62ce7 243 PUBWEAK SPI_IRQHandler
emilmont 10:3bc89ef62ce7 244 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 245 SPI_IRQHandler
emilmont 10:3bc89ef62ce7 246 B SPI_IRQHandler
emilmont 10:3bc89ef62ce7 247
emilmont 10:3bc89ef62ce7 248 PUBWEAK SSP0_IRQHandler
emilmont 10:3bc89ef62ce7 249 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 250 SSP0_IRQHandler
emilmont 10:3bc89ef62ce7 251 B SSP0_IRQHandler
emilmont 10:3bc89ef62ce7 252
emilmont 10:3bc89ef62ce7 253 PUBWEAK SSP1_IRQHandler
emilmont 10:3bc89ef62ce7 254 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 255 SSP1_IRQHandler
emilmont 10:3bc89ef62ce7 256 B SSP1_IRQHandler
emilmont 10:3bc89ef62ce7 257
emilmont 10:3bc89ef62ce7 258 PUBWEAK PLL0_IRQHandler
emilmont 10:3bc89ef62ce7 259 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 260 PLL0_IRQHandler
emilmont 10:3bc89ef62ce7 261 B PLL0_IRQHandler
emilmont 10:3bc89ef62ce7 262
emilmont 10:3bc89ef62ce7 263 PUBWEAK RTC_IRQHandler
emilmont 10:3bc89ef62ce7 264 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 265 RTC_IRQHandler
emilmont 10:3bc89ef62ce7 266 B RTC_IRQHandler
emilmont 10:3bc89ef62ce7 267
emilmont 10:3bc89ef62ce7 268 PUBWEAK EINT0_IRQHandler
emilmont 10:3bc89ef62ce7 269 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 270 EINT0_IRQHandler
emilmont 10:3bc89ef62ce7 271 B EINT0_IRQHandler
emilmont 10:3bc89ef62ce7 272
emilmont 10:3bc89ef62ce7 273 PUBWEAK EINT1_IRQHandler
emilmont 10:3bc89ef62ce7 274 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 275 EINT1_IRQHandler
emilmont 10:3bc89ef62ce7 276 B EINT1_IRQHandler
emilmont 10:3bc89ef62ce7 277
emilmont 10:3bc89ef62ce7 278 PUBWEAK EINT2_IRQHandler
emilmont 10:3bc89ef62ce7 279 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 280 EINT2_IRQHandler
emilmont 10:3bc89ef62ce7 281 B EINT2_IRQHandler
emilmont 10:3bc89ef62ce7 282
emilmont 10:3bc89ef62ce7 283 PUBWEAK EINT3_IRQHandler
emilmont 10:3bc89ef62ce7 284 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 285 EINT3_IRQHandler
emilmont 10:3bc89ef62ce7 286 B EINT3_IRQHandler
emilmont 10:3bc89ef62ce7 287
emilmont 10:3bc89ef62ce7 288 PUBWEAK ADC_IRQHandler
emilmont 10:3bc89ef62ce7 289 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 290 ADC_IRQHandler
emilmont 10:3bc89ef62ce7 291 B ADC_IRQHandler
emilmont 10:3bc89ef62ce7 292
emilmont 10:3bc89ef62ce7 293 PUBWEAK BOD_IRQHandler
emilmont 10:3bc89ef62ce7 294 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 295 BOD_IRQHandler
emilmont 10:3bc89ef62ce7 296 B BOD_IRQHandler
emilmont 10:3bc89ef62ce7 297
emilmont 10:3bc89ef62ce7 298 PUBWEAK USB_IRQHandler
emilmont 10:3bc89ef62ce7 299 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 300 USB_IRQHandler
emilmont 10:3bc89ef62ce7 301 B USB_IRQHandler
emilmont 10:3bc89ef62ce7 302
emilmont 10:3bc89ef62ce7 303 PUBWEAK CAN_IRQHandler
emilmont 10:3bc89ef62ce7 304 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 305 CAN_IRQHandler
emilmont 10:3bc89ef62ce7 306 B CAN_IRQHandler
emilmont 10:3bc89ef62ce7 307
emilmont 10:3bc89ef62ce7 308 PUBWEAK DMA_IRQHandler
emilmont 10:3bc89ef62ce7 309 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 310 DMA_IRQHandler
emilmont 10:3bc89ef62ce7 311 B DMA_IRQHandler
emilmont 10:3bc89ef62ce7 312
emilmont 10:3bc89ef62ce7 313 PUBWEAK I2S_IRQHandler
emilmont 10:3bc89ef62ce7 314 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 315 I2S_IRQHandler
emilmont 10:3bc89ef62ce7 316 B I2S_IRQHandler
emilmont 10:3bc89ef62ce7 317
emilmont 10:3bc89ef62ce7 318 PUBWEAK ENET_IRQHandler
emilmont 10:3bc89ef62ce7 319 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 320 ENET_IRQHandler
emilmont 10:3bc89ef62ce7 321 B ENET_IRQHandler
emilmont 10:3bc89ef62ce7 322
emilmont 10:3bc89ef62ce7 323 PUBWEAK RIT_IRQHandler
emilmont 10:3bc89ef62ce7 324 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 325 RIT_IRQHandler
emilmont 10:3bc89ef62ce7 326 B RIT_IRQHandler
emilmont 10:3bc89ef62ce7 327
emilmont 10:3bc89ef62ce7 328 PUBWEAK MCPWM_IRQHandler
emilmont 10:3bc89ef62ce7 329 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 330 MCPWM_IRQHandler
emilmont 10:3bc89ef62ce7 331 B MCPWM_IRQHandler
emilmont 10:3bc89ef62ce7 332
emilmont 10:3bc89ef62ce7 333 PUBWEAK QEI_IRQHandler
emilmont 10:3bc89ef62ce7 334 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 335 QEI_IRQHandler
emilmont 10:3bc89ef62ce7 336 B QEI_IRQHandler
emilmont 10:3bc89ef62ce7 337
emilmont 10:3bc89ef62ce7 338 PUBWEAK PLL1_IRQHandler
emilmont 10:3bc89ef62ce7 339 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 340 PLL1_IRQHandler
emilmont 10:3bc89ef62ce7 341 B PLL1_IRQHandler
emilmont 10:3bc89ef62ce7 342
emilmont 10:3bc89ef62ce7 343 PUBWEAK USBActivity_IRQHandler
emilmont 10:3bc89ef62ce7 344 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 345 USBActivity_IRQHandler
emilmont 10:3bc89ef62ce7 346 B USBActivity_IRQHandler
emilmont 10:3bc89ef62ce7 347
emilmont 10:3bc89ef62ce7 348 PUBWEAK CANActivity_IRQHandler
emilmont 10:3bc89ef62ce7 349 SECTION .text:CODE:REORDER(1)
emilmont 10:3bc89ef62ce7 350 CANActivity_IRQHandler
emilmont 10:3bc89ef62ce7 351 B CANActivity_IRQHandler
emilmont 10:3bc89ef62ce7 352
emilmont 10:3bc89ef62ce7 353 #ifndef SRAM
emilmont 10:3bc89ef62ce7 354 SECTION .crp:CODE:ROOT(2)
emilmont 10:3bc89ef62ce7 355 DATA
emilmont 10:3bc89ef62ce7 356 /* Code Read Protection
emilmont 10:3bc89ef62ce7 357 CRP1 0x12345678 - Write to RAM command can not access RAM below 0x10000200.
emilmont 10:3bc89ef62ce7 358 - Read Memory command: disabled.
emilmont 10:3bc89ef62ce7 359 - Copy RAM to Flash command: cannot write to Sector 0.
emilmont 10:3bc89ef62ce7 360 - "Go" command: disabled.
emilmont 10:3bc89ef62ce7 361 - Erase sector(s) command: can erase any individual sector except
emilmont 10:3bc89ef62ce7 362 sector 0 only, or can erase all sectors at once.
emilmont 10:3bc89ef62ce7 363 - Compare command: disabled
emilmont 10:3bc89ef62ce7 364 CRP2 0x87654321 - Write to RAM command: disabled.
emilmont 10:3bc89ef62ce7 365 - Copy RAM to Flash: disabled.
emilmont 10:3bc89ef62ce7 366 - Erase command: only allows erase of all sectors.
emilmont 10:3bc89ef62ce7 367 CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
emilmont 10:3bc89ef62ce7 368 by pulling PIO0_1 LOW is disabled if a valid user code is
emilmont 10:3bc89ef62ce7 369 present in flash sector 0.
emilmont 10:3bc89ef62ce7 370 Caution: If CRP3 is selected, no future factory testing can be
emilmont 10:3bc89ef62ce7 371 performed on the device.
emilmont 10:3bc89ef62ce7 372 */
emilmont 10:3bc89ef62ce7 373 DCD 0xFFFFFFFF
emilmont 10:3bc89ef62ce7 374 #endif
emilmont 10:3bc89ef62ce7 375 END