spi_dma_stm32f1.c

00001 #if defined(TARGET_STM32F1) || defined(TARGET_STM32L1)
00002 /*
00003 
00004 This file is licensed under Apache 2.0 license.
00005 (C) 2016 dinau
00006 
00007 */
00008 #include "spi_dma.h"
00009 
00010 /* For SPI1 */
00011 #define SPI1_DMAx_CLK_ENABLE()     __DMA1_CLK_ENABLE() 
00012 #define SPI1_DMAx_TX_CHANNEL       DMA1_Channel3
00013 #define SPI1_DMAx_RX_CHANNEL       DMA1_Channel2   
00014 #define SPI1_DMAx_TX_IRQn          DMA1_Channel3_IRQn
00015 #define SPI1_DMAx_RX_IRQn          DMA1_Channel2_IRQn
00016 #define SPI1_DMAx_TX_IRQHandler    DMA1_Channel3_IRQHandler
00017 #define SPI1_DMAx_RX_IRQHandler    DMA1_Channel2_IRQHandler
00018 /* For SPI2 */
00019 #define SPI2_DMAx_CLK_ENABLE()     __DMA1_CLK_ENABLE() 
00020 #define SPI2_DMAx_TX_CHANNEL       DMA1_Channel5
00021 #define SPI2_DMAx_RX_CHANNEL       DMA1_Channel4   
00022 #define SPI2_DMAx_TX_IRQn          DMA1_Channel5_IRQn
00023 #define SPI2_DMAx_RX_IRQn          DMA1_Channel4_IRQn
00024 #define SPI2_DMAx_TX_IRQHandler    DMA1_Channel5_IRQHandler
00025 #define SPI2_DMAx_RX_IRQHandler    DMA1_Channel4_IRQHandler
00026 
00027 #define readReg( reg, mask)  (  (reg) & (mask)  )    
00028 
00029 
00030 void spi_dma_get_info( SPI_TypeDef *spi )
00031 {
00032     SpiHandle.Instance               = spi;
00033     SpiHandle.Init.Mode              = readReg(spi->CR1, SPI_MODE_MASTER); 
00034     SpiHandle.Init.BaudRatePrescaler = readReg(spi->CR1, SPI_CR1_BR);
00035     SpiHandle.Init.Direction         = readReg(spi->CR1, SPI_CR1_BIDIMODE); 
00036     SpiHandle.Init.CLKPhase          = readReg(spi->CR1, SPI_CR1_CPHA);
00037     SpiHandle.Init.CLKPolarity       = readReg(spi->CR1, SPI_CR1_CPOL);
00038     SpiHandle.Init.CRCCalculation    = readReg(spi->CR1, SPI_CR1_CRCEN);
00039     SpiHandle.Init.CRCPolynomial     = spi->CRCPR & 0xFFFF;
00040     SpiHandle.Init.DataSize          = readReg(spi->CR1, SPI_CR1_DFF);
00041     SpiHandle.Init.FirstBit          = SPI_FIRSTBIT_MSB;
00042     SpiHandle.Init.NSS               = readReg(spi->CR1, SPI_CR1_SSM);
00043     SpiHandle.Init.TIMode            = SPI_TIMODE_DISABLED;
00044     SpiHandle.State                  = HAL_SPI_STATE_READY;
00045 }
00046 
00047 void spi_dma_handle_setup( SPI_TypeDef *spi, uint8_t mode )
00048 {
00049     static uint8_t dma_handle_inited = 0;
00050     /* Peripheral DMA init*/
00051     /* TX: */
00052     if( !dma_handle_inited ){
00053         if( spi == SPI1 ){
00054             hdma_spi_tx.Instance             = SPI1_DMAx_TX_CHANNEL;
00055         } else if( spi == SPI2 ) {
00056             hdma_spi_tx.Instance             = SPI2_DMAx_TX_CHANNEL;
00057         }
00058         hdma_spi_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
00059         hdma_spi_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
00060         hdma_spi_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
00061         hdma_spi_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
00062         hdma_spi_tx.Init.Mode                = DMA_NORMAL;
00063         hdma_spi_tx.Init.Priority            = DMA_PRIORITY_HIGH;
00064     }
00065     hdma_spi_tx.Init.MemInc = ( mode == DMA_SPI_READ) ? DMA_MINC_DISABLE : DMA_MINC_ENABLE;
00066     HAL_DMA_Init(&hdma_spi_tx);
00067     __HAL_LINKDMA( &SpiHandle,hdmatx,hdma_spi_tx);
00068         /* RX: */
00069     if( !dma_handle_inited ){
00070         if( spi == SPI1 ){
00071             hdma_spi_rx.Instance             = SPI1_DMAx_RX_CHANNEL;
00072         } else if( spi == SPI2 ) {
00073             hdma_spi_rx.Instance             = SPI2_DMAx_RX_CHANNEL;
00074         }
00075         hdma_spi_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
00076         hdma_spi_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
00077         hdma_spi_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
00078         hdma_spi_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
00079         hdma_spi_rx.Init.Mode                = DMA_NORMAL;
00080         hdma_spi_rx.Init.Priority            = DMA_PRIORITY_LOW;
00081     } 
00082     hdma_spi_rx.Init.MemInc = (mode == DMA_SPI_READ) ? DMA_MINC_ENABLE : DMA_MINC_DISABLE;
00083     HAL_DMA_Init(&hdma_spi_rx);
00084     __HAL_LINKDMA( &SpiHandle,hdmarx,hdma_spi_rx);
00085 
00086     dma_handle_inited = 1;
00087 }
00088 
00089 void spi_dma_irq_setup( SPI_TypeDef *spi) 
00090 {
00091     if( spi == SPI1 ){
00092         /* DMA controller clock enable */
00093         SPI1_DMAx_CLK_ENABLE();
00094         /* DMA interrupt init */
00095         HAL_NVIC_SetPriority(SPI1_DMAx_TX_IRQn, 1, 0);
00096         HAL_NVIC_EnableIRQ(  SPI1_DMAx_TX_IRQn);
00097         HAL_NVIC_SetPriority(SPI1_DMAx_RX_IRQn, 1, 0);
00098         HAL_NVIC_EnableIRQ(  SPI1_DMAx_RX_IRQn);
00099     } else if( spi == SPI2 ){
00100         /* DMA controller clock enable */
00101         SPI2_DMAx_CLK_ENABLE();
00102         /* DMA interrupt init */
00103         HAL_NVIC_SetPriority(SPI2_DMAx_TX_IRQn, 1, 0);
00104         HAL_NVIC_EnableIRQ(  SPI2_DMAx_TX_IRQn);
00105         HAL_NVIC_SetPriority(SPI2_DMAx_RX_IRQn, 1, 0);
00106         HAL_NVIC_EnableIRQ(  SPI2_DMAx_RX_IRQn);
00107     }
00108 }
00109 
00110 /* SPI1 */
00111 void SPI1_DMAx_RX_IRQHandler(void)
00112 {
00113     HAL_DMA_IRQHandler(&hdma_spi_rx);
00114 }
00115 void SPI1_DMAx_TX_IRQHandler(void)
00116 {
00117     HAL_DMA_IRQHandler(&hdma_spi_tx);
00118 }
00119 
00120 /* SPI2 */
00121 void SPI2_DMAx_RX_IRQHandler(void)
00122 {
00123     HAL_DMA_IRQHandler(&hdma_spi_rx);
00124 }
00125 void SPI2_DMAx_TX_IRQHandler(void)
00126 {
00127     HAL_DMA_IRQHandler(&hdma_spi_tx);
00128 }
00129 
00130 #endif /* TARGET_STM32F1 */
00131