spi_dma_stm32f0.c

00001 #if defined(TARGET_STM32F0) || defined(TARGET_STM32L0)
00002 /*
00003 
00004 This file is licensed under Apache 2.0 license.
00005 (C) 2016 dinau
00006 
00007 */
00008 #include "spi_dma.h"
00009 
00010 /* For SPI1 */
00011 #define DMAx_CLK_ENABLE()     __DMA1_CLK_ENABLE()    
00012 #define SPIx_TX_DMA_CHANNEL   DMA1_Channel3
00013 #define SPIx_RX_DMA_CHANNEL   DMA1_Channel2
00014 
00015 #if defined(TARGET_STM32F091RC) 
00016 #define SPIx_DMA_IRQn         DMA1_Ch2_3_DMA2_Ch1_2_IRQn
00017 #define DMA_SPI_IRQHandler    DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
00018 #else
00019 #define SPIx_DMA_IRQn         DMA1_Channel2_3_IRQn    
00020 #define DMA_SPI_IRQHandler    DMA1_Channel2_3_IRQHandler
00021 #endif
00022 
00023 
00024 
00025 #define readReg( reg, mask)  (  (reg) & (mask)  )    
00026 
00027 void spi_dma_get_info( SPI_TypeDef *spi )
00028 {
00029     SpiHandle.Instance               = spi;
00030     SpiHandle.Init.Mode              = readReg(spi->CR1, SPI_MODE_MASTER); 
00031     SpiHandle.Init.BaudRatePrescaler = readReg(spi->CR1, SPI_CR1_BR);
00032     SpiHandle.Init.Direction         = readReg(spi->CR1, SPI_CR1_BIDIMODE); 
00033     SpiHandle.Init.CLKPhase          = readReg(spi->CR1, SPI_CR1_CPHA);
00034     SpiHandle.Init.CLKPolarity       = readReg(spi->CR1, SPI_CR1_CPOL);
00035     SpiHandle.Init.CRCCalculation    = readReg(spi->CR1, SPI_CR1_CRCEN);
00036     SpiHandle.Init.CRCPolynomial     = spi->CRCPR & 0xFFFF;
00037 #if defined(TARGET_STM32F0)
00038     SpiHandle.Init.DataSize          = readReg(spi->CR2, SPI_CR2_DS);
00039 #endif
00040     SpiHandle.Init.FirstBit          = SPI_FIRSTBIT_MSB;
00041     SpiHandle.Init.NSS               = readReg(spi->CR1, SPI_CR1_SSM);
00042     SpiHandle.Init.TIMode            = SPI_TIMODE_DISABLED;
00043     SpiHandle.State                  = HAL_SPI_STATE_READY;
00044 }
00045 
00046 void spi_dma_handle_setup( SPI_TypeDef *spi, uint8_t mode )
00047 {
00048     (void)spi;
00049     static uint8_t dma_handle_inited = 0;
00050     /* Peripheral DMA init*/
00051     /* TX: */
00052     if( !dma_handle_inited ){
00053         hdma_spi_tx.Instance                 = SPIx_TX_DMA_CHANNEL;
00054         hdma_spi_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
00055         hdma_spi_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
00056         hdma_spi_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
00057         hdma_spi_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
00058         hdma_spi_tx.Init.Mode                = DMA_NORMAL;
00059         hdma_spi_tx.Init.Priority            = DMA_PRIORITY_HIGH;
00060     }
00061     hdma_spi_tx.Init.MemInc = ( mode == DMA_SPI_READ) ? DMA_MINC_DISABLE : DMA_MINC_ENABLE;
00062     HAL_DMA_Init(&hdma_spi_tx);
00063     __HAL_LINKDMA( &SpiHandle,hdmatx,hdma_spi_tx);
00064     /* RX: */
00065     if( !dma_handle_inited ){
00066         hdma_spi_rx.Instance                 = SPIx_RX_DMA_CHANNEL;
00067         hdma_spi_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
00068         hdma_spi_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
00069         hdma_spi_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
00070         hdma_spi_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
00071         hdma_spi_rx.Init.Mode                = DMA_NORMAL;
00072         hdma_spi_rx.Init.Priority            = DMA_PRIORITY_LOW;
00073     }
00074     hdma_spi_rx.Init.MemInc = (mode == DMA_SPI_READ) ? DMA_MINC_ENABLE : DMA_MINC_DISABLE;
00075     HAL_DMA_Init(&hdma_spi_rx);
00076     __HAL_LINKDMA( &SpiHandle,hdmarx,hdma_spi_rx);
00077 
00078     dma_handle_inited = 1;
00079 }
00080 
00081 void spi_dma_irq_setup( SPI_TypeDef *spi) 
00082 {
00083     (void)spi;
00084     /* DMA controller clock enable */
00085     DMAx_CLK_ENABLE();
00086 
00087     /* DMA interrupt init */
00088     HAL_NVIC_SetPriority(SPIx_DMA_IRQn, 1, 0);
00089     HAL_NVIC_EnableIRQ(  SPIx_DMA_IRQn);
00090 }
00091 
00092 void DMA_SPI_IRQHandler(void)
00093 {
00094   HAL_DMA_IRQHandler(&hdma_spi_rx);
00095   HAL_DMA_IRQHandler(&hdma_spi_tx);
00096 }
00097 
00098 
00099 #endif /* TARGET_STM32F0 */
00100